JP4821183B2 - ELECTRO-OPTICAL DEVICE AND ELECTRONIC DEVICE HAVING THE SAME - Google Patents

Description

  The present invention relates to a technical field of, for example, an electro-optical device such as an active matrix driven liquid crystal device and an electronic apparatus including such an electro-optical device.

  In this type of electro-optical device, pixel electrodes arranged in a matrix, thin film transistors (hereinafter referred to as “TFTs” as appropriate) connected to the electrodes, and the TFTs are connected to the rows. And a scanning line and a data line provided in parallel in the column direction, respectively, the scanning line is driven by the scanning line driving circuit, and the data line is driven by the data line driving circuit. Therefore, so-called active matrix driving is often performed.

  In such an electro-optical device, a storage capacitor connected to the TFT and the pixel electrode is further provided on the TFT array substrate including the TFT and the pixel electrode described above. This storage capacitor is composed of a pair of electrodes sandwiching a dielectric film, and one of the electrodes is a pixel potential side capacitor electrode that is electrically connected to the pixel electrode and has the same potential, and the other electrode. Is generally a fixed potential side capacitive electrode having a fixed potential. Thereby, the potential applied to the pixel electrode can be held for a certain period, and the potential holding characteristics can be remarkably improved. Therefore, in order to improve image quality in an electro-optical device such as an active matrix driven liquid crystal device, it is one of important techniques to increase the potential holding characteristic by increasing the holding capacity.

  In addition, in this type of electro-optical device, it is preferable not to provide an element that blocks light in the opening area in the pixel area in order to enable a bright image display. Therefore, the storage capacitor is usually provided in a non-opening area that does not transmit light. It is common that

  In view of such a large storage capacitor and prevention of a decrease in pixel aperture ratio, from the viewpoint of the storage capacitor layout, it is possible to secure a storage capacitor area and reduce the inter-pixel light-shielding region with high light transmittance. A technique for providing a plurality of storage capacitors along a direction perpendicular to the substrate surface of the TFT array substrate by devising the structure of a plurality of stacked conductive films (for example, see Patent Document 1) For example, see Patent Document 2.). Further, from the viewpoint of the material of the constituent elements such as the capacitor electrode constituting the storage capacitor, a technique using a transparent electrode as the capacitor electrode constituting the storage capacitor (see, for example, Patent Document 3), between the data line and the pixel electrode A technique (Patent Document 4) in which a transparent electrode maintained at a fixed potential is provided (Patent Document 4), or a technique (Patent Document 5) in which both of a pair of capacitor electrodes constituting a storage capacitor are configured by a transparent electrode has been disclosed.

JP 2001-66638 A Japanese Patent Laid-Open No. 2001-147447 JP 2000-323698 A Japanese Patent Laid-Open No. 2003-262887 JP-A-5-257171

  However, the storage capacitor is usually made of an opaque material, and if the area of the electrode and dielectric constituting the storage capacitor is increased in order to increase the storage capacitor, the pixel aperture ratio is reduced. There is a problem. In addition, in the techniques disclosed in Patent Documents 1, 3, 4, and 5, only a storage capacitor is provided in a limited region such as a non-opening region of a pixel, and it is theoretically difficult to obtain a larger capacitance. It is. Further, in the technique disclosed in Patent Document 2, there is a concern that a laminated structure becomes complicated, and a new problem that causes a complicated manufacturing process and a decrease in yield associated therewith occurs.

  Therefore, the present invention has been made in view of the above problems and the like. For example, an active matrix can be used without reducing the amount of light transmitted through the aperture region in the pixel portion, that is, without reducing the pixel aperture ratio. It is an object of the present invention to provide an electro-optical device that can increase the storage capacity of an electro-optical device such as a driven liquid crystal device and an electronic apparatus including the same.

In order to solve the above problems, an electro-optical device according to a first aspect of the present invention includes a scan line and a data line, a transistor provided to overlap the data line, and a pixel corresponding to the transistor for each pixel. a pixel electrode provided, before Symbol a first storage capacitor transparent for temporarily holding the image signal supplied to the pixel electrodes, before SL is provided on the upper layer of the first storage capacitor, wherein the first storage capacitor And a transparent second storage capacitor electrically connected in parallel, and the first storage capacitor extends so as to overlap the scanning line and the data line, and covers a non-opening region of the pixel. Thus, the second storage capacitor is configured to include the pixel electrode and a capacitor electrode electrically connected to one capacitor electrode of the first storage capacitor .

  According to the electro-optical device of the present invention, first, the operation of the thin film transistor can be controlled through the scanning line, and the image signal can be written to the pixel electrode through the transistor through the data line. In other words, so-called active matrix driving can be performed. Since the first storage capacitor is transparent, the amount of light transmitted through the opening region is not reduced. Therefore, the capacity of the first storage capacitor can be increased without reducing the luminance in the pixel, and the potential storage capability for temporarily storing the image signal can be increased.

  Here, the “opening region” in the present invention is a region in a pixel through which light is substantially transmitted, for example, a region in which a pixel electrode is formed, and the liquid crystal is removed according to a change in transmittance. In other words, it means a region where the gradation of the emitted light can be changed. In other words, it means a region where the light condensed on the pixel is not blocked by the wiring, the light shielding film, the semiconductor element, or the like. In addition, the “non-opening region” of the present invention means a region where light contributing to display is not transmitted, for example, a region where non-transparent wiring or the like is arranged in a pixel. With the electro-optical device according to the present invention, even if the first storage capacitor is formed so as to cover all or part of the opening region, it does not significantly impede the passage of light. The image display will not be adversely affected.

  As described above, according to the electro-optical device according to the present invention, it is possible to increase the holding capability of temporarily holding the image signal without reducing the luminance of the pixel, and thus it is possible to provide an electro-optical device having high image quality. it can.

  In an aspect of the electro-optical device according to the first aspect of the present invention, the first storage capacitor includes a transparent pixel potential side capacitor electrode electrically connected to the transistor and a transparent first fixed potential side. A capacitance electrode and a transparent first dielectric film sandwiched between the pixel potential side capacitance electrode and the first fixed potential side capacitance electrode may be provided.

In this aspect, each of the pixel potential side capacitor electrode, the first fixed potential side capacitor electrode, and the first dielectric film is transparent, and the first storage capacitor has a three-layer structure including these electrodes and the dielectric film. ing. Therefore, the first storage capacitor is transparent, and in order to increase the capacity of the first storage capacitor, the pixel potential side capacitor electrode, the first fixed potential side capacitor electrode, and the first dielectric film are changed from the non-opening region to the opening region. Even if it is provided across, the amount of light transmitted through the aperture region is not reduced. That is, the pixel aperture ratio is not reduced. The pixel potential side capacitance electrode and the first fixed potential side electrode are transparent electrodes formed of, for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide), and the first dielectric film is silicon oxide (SiO ₂ ). Alternatively, it is a transparent dielectric such as silicon nitride (SiN). Here, SiN is yellowish compared to SiO ₂ , but is applicable to the first dielectric film because it has light transparency.

In the electro-optical device according to the first aspect of the present invention, before Symbol second storage capacitor upper and lower layer which is formed on a transparent second fixing of the pixel electrode of the first storage capacitor A potential-side capacitance electrode, and a transparent second dielectric film formed between the second fixed potential-side capacitance electrode and the pixel electrode, wherein the pixel electrode is a transparent electrode, A portion overlapping with the second fixed potential side electrode in plan view may be used also as a capacitor electrode paired with the second fixed potential side capacitor electrode.

  According to this aspect, the potential holding characteristic of the image signal can be improved as compared with the case where the image signal is temporarily held only by the first holding capacitor by the amount of the second holding capacitor. More specifically, since the second holding capacitor is electrically connected in parallel with the first holding capacitor, the potential holding characteristic for the image signal can be improved in the entire first holding capacitor and the second holding capacitor. It is. That is, according to this aspect, the second storage capacitor can be provided separately from the first storage capacitor using the pixel electrode incorporated in the existing design, and the first storage capacitor is extended to the opening region. It is possible to improve the potential holding characteristics that can be obtained only by using the above-described method.

  In addition, each of the second fixed potential side capacitor electrode, the second dielectric film, and the pixel electrode included in the second storage capacitor that is overlapped with the second fixed potential side electrode in a plan view is transparent. Therefore, the second storage capacitor is also transparent. Therefore, the amount of light transmitted through the opening region is not reduced by the second storage capacitor provided so as to extend from the non-opening region to the opening region.

In another aspect of the electro-optical device according to the first aspect of the present invention, the first storage capacitor includes a transparent pixel potential side capacitor electrode electrically connected to the transistor and a transparent first fixed potential side. A capacitor electrode, and a transparent first dielectric film sandwiched between the pixel potential side capacitor electrode and the first fixed potential side capacitor electrode, wherein the second storage capacitor is on an upper layer side of the first storage capacitor and A transparent second fixed potential side capacitor electrode formed on a lower layer side of the pixel electrode; and a transparent second dielectric film formed between the second fixed potential side capacitor electrode and the pixel electrode. The pixel electrode is a transparent electrode,
A portion of the pixel electrode that overlaps with the second fixed potential side capacitor electrode in plan view is also used as a capacitor electrode paired with the second fixed potential side capacitor electrode, and the first storage capacitor and The second storage capacitor may be electrically connected in parallel via a conductive portion formed between the first fixed potential side capacitor electrode and the second fixed potential side capacitor electrode.

  In this embodiment, the “conductive portion” is, for example, a contact hole that penetrates an interlayer insulating film interposed between the first storage capacitor and the second storage capacitor. Such a contact hole is provided according to the layout of the first storage capacitor, the second storage capacitor, and other components of the electro-optical device.

  In another aspect of the electro-optical device according to the first aspect of the present invention, the data line is provided on an upper layer side of the first storage capacitor and on a lower layer side of the second storage capacitor. It extends to the non-opening region so as to block the irradiated light.

  According to this aspect, the light incident from the upper layer side of the second storage capacitor can be shielded by the data line. More specifically, light leakage current flowing in a semiconductor layer included in the transistor can be reduced. Accordingly, it is possible to reduce the disturbance of the display image that occurs according to the light leakage current, and to suppress the deterioration of the image quality.

  In another aspect of the electro-optical device according to the first aspect of the present invention, the electro-optical device further includes a capacitor wiring formed on an upper layer side of the first storage capacitor and on a lower layer side of the second storage capacitor. The first storage capacitor and the second storage capacitor may be electrically connected via a capacitor wiring.

  According to this aspect, compared to the case where the first storage capacitor and the second storage capacitor are directly electrically connected, for example, they can be electrically connected by a shallow contact hole, and contact etching is facilitated.

In order to solve the above problems, an electro-optical device according to a second aspect of the present invention is provided with a data line, a transistor electrically connected to the data line, and a pixel corresponding to the transistor. a pixel electrode provided on the non-opening region of the pixel, a first storage capacitor for temporarily holding the image signal supplied before Symbol pixel electrode, extending in the non-opening area or RaHiraku port area As described above, a transparent second storage capacitor is provided above the first storage capacitor and is electrically connected in parallel with the first storage capacitor.

  According to the electro-optical device according to the second aspect of the present invention, similarly to the electro-optical device according to the first aspect of the present invention, the potential holding for temporarily holding the image signal by providing the second holding capacitor. The capability can be increased and the luminance in the pixel is not lowered. More specifically, since the second storage capacitor is transparent, even if the second storage capacitor is provided from the non-opening region to the opening region, the light transmission amount in the opening region is not reduced.

In order to solve the above problems, an electro-optical device according to a third aspect of the present invention is provided for each pixel corresponding to the data line, a transistor electrically connected to the data line, and the transistor. and the pixel electrode, wherein provided over the opening area from the non-aperture regions of the pixels, a first storage capacitor transparent for temporarily holding the pre-Symbol image signal supplied to the pixel electrode, from the non-opening region the open area is provided on an upper layer of the first storage capacitor so as to extend in, and a first storage capacitor electrically transparent second storage capacitor connected in parallel, the first holding The fixed potential side capacitor electrodes of the capacitor and the second storage capacitor are shared by the conductive layer formed between the first storage capacitor and the second storage capacitor.

  According to the electro-optical device according to the third aspect of the present invention, the conductive layer formed on the substrate and the conductive layer formed on the substrate can be compared with the case where the fixed potential side electrode is provided for each of the first storage capacitor and the second storage capacitor. The insulating layer can be reduced. Thereby, high image quality can be realized with a simple layer structure.

In order to solve the above problem, an electro-optical device according to a fourth aspect of the present invention is provided with a data line, a transistor electrically connected to the data line, and a pixel corresponding to the transistor. and the pixel electrode, wherein provided over the opening area from the non-aperture regions of the pixels, a first storage capacitor transparent for temporarily holding the pre-Symbol image signal supplied to the pixel electrode, from the non-opening region A transparent second holding capacitor that is provided in an upper layer of the first holding capacitor so as to extend to the opening region, and is electrically connected in parallel with the first holding capacitor; fixed potential side electrode of the capacitor is provided in the same layer as the conductive layer formed so as to electrically connect the pixel-potential-side electrode of the pixel-potential-side electrode of the second storage capacitor first storage capacitor It is also used as a capacitor wiring. Is formed transparent wiring so as to avoid said conductive layer at the same layer.

  According to the electro-optical device according to the fourth aspect of the present invention, it is possible to broaden the capacity wiring that is also used as the fixed potential side electrode of the second storage capacitor in a planar manner, while suppressing the electric resistance of the capacity wiring, Capacitance wiring can be easily connected to another conductive portion maintained at a fixed potential.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described electro-optical device according to the present invention.

  According to the electronic apparatus of the present invention, a projection display device, a television, a mobile phone, an electronic notebook, a word processor, a viewfinder type or a monitor direct view type video tape recorder capable of displaying a high-quality image, a work Various electronic devices such as a station, a videophone, a POS terminal, and a touch panel can be realized. Further, as an electronic apparatus of the present invention, for example, an electrophoretic device such as electronic paper, an electron emission device (Field Emission Display and Conduction Electron-Emitter Display), a DLP (Digital Light Processing), or the like can be realized.

  Such an operation and other advantages of the present invention will become apparent from the embodiments described below.

  Hereinafter, the electro-optical device and the electronic apparatus according to the present embodiment will be described in detail with reference to the drawings. In the present embodiment, a liquid crystal device driven by an active matrix driving method is given as an example of the electro-optical device according to the first and second inventions of the present invention.

<First Embodiment>
(Overall configuration of electro-optical device)
First, the entire configuration of a TFT active matrix driving type liquid crystal device with a built-in driving circuit, which is an example of the electro-optical device of this embodiment, will be described with reference to FIGS. FIG. 1 is a plan view of the electro-optical device when the TFT array substrate is viewed from the counter substrate side together with the components formed thereon, and FIG. 2 is a cross-sectional view taken along line HH ′ of FIG.

  1 and 2, the liquid crystal device 1 includes a TFT array substrate 10 and a counter substrate 20 disposed to face the TFT array substrate 10. A liquid crystal layer 50 is sealed between the TFT array substrate 10 and the counter substrate 20, and the TFT array substrate 10 and the counter substrate 20 are provided with a sealing material 52 provided in a seal region positioned around the image display region 10a. Are bonded to each other.

  A light-shielding frame light-shielding film 53 that defines the frame area of the image display area 10a is provided on the counter substrate 20 side in parallel with the inside of the seal area where the sealing material 52 is disposed. However, part or all of the frame light shielding film 53 may be provided as a built-in light shielding film on the TFT array substrate 10 side. In the present embodiment, there is a peripheral area located around the image display area 10a. In other words, particularly in the present embodiment, when viewed from the center of the TFT array substrate 10, the distance from the frame light shielding film 53 is defined as the peripheral region. A data line driving circuit 101 and an external circuit connection terminal 102 are provided along one side of the TFT array substrate 10 in a region located outside the sealing region in which the sealing material 52 is disposed in the peripheral region. A plurality of wirings 105 are provided to connect the two scanning line driving circuits 104 provided on both sides of the image display area 10a. The vertical conductive members 106 arranged at the four corners of the counter substrate 20 establish electrical continuity between the TFT array substrate 10 and the counter substrate 20.

  In FIG. 2, on the TFT array substrate 10, an alignment film is formed on the pixel electrode 9a after the pixel switching TFT, the scanning line, the data line and the like are formed. On the other hand, on the counter substrate 20, in addition to the counter electrode 21, a lattice-shaped or striped light-shielding film 23 and an alignment film are formed on the uppermost layer portion.

(Electrical configuration of electro-optical device)
Next, the electrical configuration of the liquid crystal device 1 will be described with reference to FIG. FIG. 3 is an equivalent circuit of various elements, wirings, and the like in a plurality of pixels formed in a matrix that forms an image display region of the electro-optical device.

  In FIG. 3, a pixel electrode 9 a and a TFT 30 for controlling the switching of the pixel electrode 9 a are formed in each of a plurality of pixel portions formed in a matrix that forms an image display region of the liquid crystal device 1. A data line 6 a to which an image signal is supplied is electrically connected to the source of the TFT 30. Image signals S1, S2,..., Sn to be written to the data line 6a are supplied line-sequentially in this order. Note that the image signals S1, S2,..., Sn may be supplied for each group to a plurality of adjacent data lines 6a.

  In the pixel portion provided in the liquid crystal device 1, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are pulsed to the scanning line 3a at a predetermined timing. It is configured to apply line-sequentially in this order. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and the image signal S1, S2,... Supplied from the data line 6a is closed by closing the switch of the TFT 30 serving as a switching element for a certain period. Sn is written at a predetermined timing.

  A predetermined level of image signals S1, S2,..., Sn written in the liquid crystal as an example of the electro-optical material via the pixel electrode 9a is held for a certain period with the counter electrode formed on the counter substrate. The The storage capacitor 70, which is an example of the “first storage capacitor” of the present invention, is electrically connected in parallel with the liquid crystal capacitor formed between the pixel electrode 9 a and the counter electrode in order to prevent the stored image signal from leaking. It is connected and temporarily holds an image signal supplied to the pixel electrode 9a. As will be described later, the liquid crystal device 1 of the present embodiment can display an image with high image quality by enhancing the potential holding characteristics of the holding capacitor 70. The liquid crystal modulates light and enables gradation display by changing the orientation and order of the molecular assembly depending on the applied voltage level. In the normally white mode, the transmittance for incident light is reduced according to the voltage applied in units of each pixel, and in the normally black mode, the light is incident according to the voltage applied in units of each pixel. The light transmittance is increased, and light having a contrast corresponding to the image signal is emitted from the electro-optical device as a whole.

(Specific configuration of pixel portion in electro-optical device)
Next, a specific configuration of the pixel portion in the liquid crystal device 1 of the present embodiment will be described with reference to FIGS. 4 to 6. 4 and 5 are plan views of a plurality of adjacent pixel groups on the TFT array substrate on which data lines, scanning lines, pixel electrodes and the like are formed. 4 and 5 separately show a lower layer portion (FIG. 4) and an upper layer portion (FIG. 5) in a laminated structure to be described later. FIG. 6 is a cross-sectional view taken along line AA ′ when FIGS. 4 and 5 are overlapped. In FIG. 6, the scales are different for each layer and each member so that each layer and each member can be recognized on the drawing.

  As shown in FIG. 6, the TFT array substrate 10 included in the liquid crystal device 1 includes a pixel electrode 9 a and an alignment film 16, and various configurations including these in a stacked structure. More specifically, the TFT array substrate 10 includes, in order from the bottom, a first layer including the scanning line 11a, a second layer including the TFT 30 including the gate electrode 3a, a third layer including the storage capacitor 70, and the data line 6a. And the like, a fifth layer including the capacitor wiring 400 and the like, and a sixth layer (uppermost layer) including the pixel electrode 9a and the alignment film 16 and the like. A base insulating film 12 is provided between the first layer and the second layer, a first interlayer insulating film 41 is provided between the second layer and the third layer, a second interlayer insulating film 42 is provided between the third layer and the fourth layer, and A third interlayer insulating film 43 is provided between the 4th and 5th layers, and a fourth interlayer insulating film 44 is provided between the 5th and 6th layers to prevent short-circuiting between the aforementioned elements. is doing. In these various insulating films 12, 41, 42, 43 and 44, for example, a contact hole for electrically connecting the high concentration source region 1d in the semiconductor layer 1a of the TFT 30 and the data line 6a is also provided. . Hereinafter, each of these elements will be described in order from the bottom. The first to third layers are shown in FIG. 4 as the lower layer portion, and the fourth to sixth layers are shown in FIG. 5 as the upper layer portion.

(Laminated structure / Structure of first layer-scanning line, etc.)
First, for example, the first layer includes at least one of refractory metals such as Ti, Cr, W, Ta, and Mo, a metal simple substance, an alloy, a metal silicide, a polysilicide, and a laminate of these, Alternatively, a scanning line 11a made of conductive polysilicon or the like is provided. The scanning lines 11a are patterned in stripes along the X direction in FIG. More specifically, the stripe-shaped scanning line 11a includes a main line portion extending along the X direction in FIG. 4 and a protruding portion extending in the Y direction in FIG. 4 from which the data line 6a or the capacitor wiring 400 extends. ing. Note that the protrusions extending from the adjacent scanning lines 11a are not connected to each other. Therefore, the scanning line 11a is divided into one line.

  Here, FIG. 5 also shows the configuration of the scanning line 11a shown in FIG. In the present embodiment, as shown in FIG. 5, the scanning line 11 a is formed so as to overlap with the capacitor wiring 400 when viewed in plan on the substrate surface of the TFT array substrate 10.

(Laminated structure / Second layer structure-TFT, etc.)
Next, the TFT 30 including the gate electrode 3a is provided as the second layer. As shown in FIG. 6, the TFT 30 has an LDD (Lightly Doped Drain) structure, and includes the above-described gate electrode 3a, for example, a polysilicon film, and a channel formed by an electric field from the gate electrode 3a. The channel region 1a ′ of the semiconductor layer 1a to be formed, the insulating film 2 including a gate insulating film that insulates the gate electrode 3a from the semiconductor layer 1a, the low concentration source region 1b and the low concentration drain region 1c in the semiconductor layer 1a, and the high concentration A source region 1d and a high concentration drain region 1e are provided.

  In the present embodiment, a relay electrode 719 is formed on the second layer as the same film as the gate electrode 3a. As shown in FIG. 4, the relay electrode 719 is formed in an island shape so as to be positioned approximately at the center of one side extending in the X direction of each pixel electrode 9 a as viewed in a plan view. Since the relay electrode 719 and the gate electrode 3a are formed as the same film, when the latter is made of a conductive polysilicon film or the like, the former is also made of a conductive polysilicon film or the like.

  The TFT 30 preferably has an LDD structure as shown in FIG. 6, but may have an offset structure in which impurities are not implanted into the low concentration source region 1b and the low concentration drain region 1c, and the gate electrode 3a as a mask. It may be a self-aligned TFT in which impurities are implanted at a high concentration and a high concentration source region and a high concentration drain region are formed in a self-aligning manner.

(Laminated structure / Structure between first layer and second layer-underlying insulating film-)
A base insulating film 12 made of, for example, a silicon oxide film is provided on the scanning line 11a described above and below the TFT 30. In addition to the function of interlayer insulating the TFT 30 from the scanning line 11a, the base insulating film 12 is formed on the entire surface of the TFT array substrate 10, thereby causing roughness during polishing of the surface of the TFT array substrate 10 and dirt remaining after cleaning. It has a function of preventing changes in the characteristics of the pixel switching TFT 30.

  In the base insulating film 12, groove-like contact holes 12 cv are formed on both sides of the semiconductor layer 1 a in a plan view along the channel length direction of the semiconductor layer 1 a extending along the data line 6 a described later. Corresponding to the contact hole 12cv, the gate electrode 3a stacked above the contact hole 12cv includes a concave portion formed on the lower side. Since the gate electrode 3a is formed so as to fill the entire contact hole 12cv, a side wall portion 3b formed integrally with the gate electrode 3a is extended. As a result, as shown in FIG. 4, the semiconductor layer 1a of the TFT 30 is covered from the side as seen in a plan view, and at least the incidence of light from this portion is suppressed. ing.

  The side wall 3b is formed so as to fill the contact hole 12cv, and its lower end is in contact with the scanning line 11a. Since the scanning line 11a is formed in a stripe shape as described above, the gate electrode 3a and the scanning line 11a existing in a certain row are always at the same potential as long as attention is paid to the row.

(Laminated structure / 3rd layer configuration-holding capacity, etc.)
Next, the layout and configuration of the storage capacitor 70 will be described in detail with reference to FIGS. As shown in FIGS. 4 and 6, the storage capacitor 70 is provided from the non-opening region of the third layer to the opening region, and extends to the opening region so as to overlap the pixel electrode 9a in plan view. Has been.

  In FIG. 6, a storage capacitor 70 includes a lower capacitor electrode 71 which is an example of the “pixel potential side capacitor electrode” of the present invention, a dielectric film 75 which is an example of the “first dielectric film” of the present invention, and the present invention. The upper capacitor electrode 300 which is an example of the “first fixed potential side capacitor electrode” is provided. Each of the lower capacitor electrode 71, the dielectric film 75, and the upper capacitor electrode 300 is formed of a transparent material, and is laminated in this order from the lower side in the drawing.

  The lower capacitor electrode 71 and the upper capacitor electrode 300 are transparent electrodes formed of ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). As shown in FIG. 6, the dielectric film 75 is, for example, a relatively thin HTO (High Temperature Oxide) film having a film thickness of about 5 to 200 nm, a silicon oxide film such as an LTO (Low Temperature Oxide) film, or a silicon nitride film. Consists of As shown in FIG. 6, the dielectric film 75 has a two-layer structure in which the lower layer is a silicon oxide film 75a and the upper layer is a silicon nitride film 75b. In FIG. 4, for convenience of explanation, the planar shapes of the upper silicon nitride film 75b and the silicon oxide film 75a are not shown, but these dielectric films are formed from the non-opening region to the opening region, that is, the pixel electrode 9a in plan view. It is formed to overlap. Here, the silicon nitride film 75b is yellower than the silicon oxide film 75a, but has light transmissivity. Therefore, the light transmissivity of the storage capacitor 70 is not lowered.

  In the present embodiment, the dielectric film 75 has a two-layer structure, but a three-layer structure such as a silicon oxide film, a silicon nitride film, and a silicon oxide film, or a stack of more layers. You may comprise so that it may have a structure. Of course, a single layer structure may be used. However, the dielectric film 75 is made of a transparent material.

  Here, the planar shape of the storage capacitor 70 will be described in detail with reference to FIG. The dielectric film 75 is formed in accordance with the planar shape of these electrodes so as to be sandwiched between the lower capacitor electrode 71 and the upper capacitor electrode 300.

  In FIG. 4, a lower capacitor electrode 71 and an upper capacitor electrode 300 are extended from a region where the data line 6a and the scanning line 11a intersect each other so as to overlap the pixel electrode 9a, and are provided for each pixel including the pixel electrode 9a. It has been. In the present embodiment, the lower capacitor electrode 71 and the upper capacitor electrode 300 are extended substantially over the entire open region, but may be extended so as to partially overlap the open region. That is, if the potential difference that can maintain the liquid crystal orientation can be maintained according to the image signal, the area of the storage capacitor 70, that is, the shape and area of the lower capacitor electrode 71, the dielectric film 75, and the upper capacitor electrode 300 can be determined according to the design. The convenience can be changed.

  Here, the non-opening region is a region where non-transparent data lines 6a and the like that do not transmit light contributing to image display are disposed. More specifically, in this embodiment, the non-opening region is a frame-like region surrounding the pixel electrode 9a in plan view. The opening area is an area in the pixel through which light is substantially transmitted. More specifically, the opening region is a region where light condensed on the pixel is not blocked by wiring such as the data line and the scanning line 11a, a semiconductor element such as the TFT 30, and a light shielding film.

  The lower electrode 71 has a function of relaying and connecting the pixel electrode 9a and the high concentration drain region 1e of the TFT 30 in addition to a function as a pixel potential side capacitor electrode. Incidentally, the relay connection referred to here is performed via the relay electrode 719.

  The potential of the upper capacitor electrode 300 is maintained at a fixed potential because the capacitor wiring 400 (described later) having a fixed potential and the upper capacitor electrode 300 are electrically connected.

  It should be noted that the upper capacitor electrode 300 can be used as a pixel potential side capacitor electrode and the lower capacitor electrode 71 can be used as a fixed potential side capacitor electrode by slightly changing the layout of each part in the TFT array substrate 10 of the present embodiment. It is.

  Thus, even if the storage capacitor 70 extends in the opening region so as to overlap with the transparent pixel electrode 9a in plan view, the transmittance of light transmitted through the opening region is not reduced. In addition, the area can be made larger so as to increase the capacity as compared with the case where the storage capacitor 70 is provided only in the non-opening area. Therefore, according to the liquid crystal device 1, it is possible to write an image signal to the pixel electrode 9a through the TFT 30 through the data line 6a while controlling the operation of the TFT 30 through the scanning line 11a, and temporarily hold the image signal. It is possible to perform so-called active matrix driving in a state in which the potential holding capability is increased. Since the storage capacitor 70 is transparent, the pixel aperture ratio of the entire liquid crystal device 1 is kept relatively large, and thereby a brighter image can be displayed. Therefore, according to the liquid crystal device 1, it is possible to achieve both an increase in the capacitance value of the storage capacitor and a bright image display, both of which have been difficult in the past.

(Laminated structure, configuration between second layer and third layer—first interlayer insulating film)
Next, the first interlayer insulating film 41 will be described in detail with reference to FIGS. The first interlayer insulating film 41 is formed on the TFT 30 to the gate electrode 3a and the relay electrode 719 and below the storage capacitor 70, for example, NSG (non-silicate glass), PSG (phosphorus silicate glass), BSG (boron). (Silicate glass), silicate glass film such as BPSG (boron phosphorus silicate glass), silicon nitride film or silicon oxide film, or preferably NSG.

  A contact hole 81 for electrically connecting the high-concentration source region 1d of the TFT 30 and a data line 6a described later is opened in the first interlayer insulating film 41 while penetrating the second interlayer insulating film 42 described later. Yes. A contact hole 83 is formed in the first interlayer insulating film 41 to electrically connect the high-concentration drain region 1 e of the TFT 30 and the lower capacitor electrode 71 constituting the storage capacitor 70. In the first interlayer insulating film 41, a contact hole 881 for electrically connecting the lower capacitor electrode 71 as the pixel potential side capacitor electrode constituting the storage capacitor 70 and the relay electrode 719 is opened. In addition, a contact hole 882 for electrically connecting the relay electrode 719 and a second relay electrode 6a2 described later is opened in the first interlayer insulating film 41 while penetrating the second interlayer insulating film 42. ing.

(Laminated structure / Fourth layer configuration-data lines, etc.)
A data line 6a is provided in the fourth layer following the third layer. As shown in FIG. 6, the data line 6a includes, in order from the lower layer, a layer made of aluminum (see reference numeral 41A in FIG. 6), a layer made of titanium nitride (see reference numeral 41TN in FIG. 6), and a layer made of a silicon nitride film ( 6) (see reference numeral 401 in FIG. 6). The silicon nitride film is patterned to a slightly larger size so as to cover the lower aluminum layer and titanium nitride layer.

  In the fourth layer, the capacitor wiring relay layer 6a1 and the second relay electrode 6a2 are formed as the same film as the data line 6a. As shown in FIG. 5, these are not formed so as to have a planar shape continuous with the data lines 6a when viewed in a plan view, but are formed so as to be divided due to patterning.

  Incidentally, since the capacitor wiring relay layer 6a1 and the second relay electrode 6a2 are formed as the same film as the data line 6a, in order from the lower layer, a layer made of aluminum, a layer made of titanium nitride, and a plasma nitride film are made. It has a three-layer structure of layers.

(Laminated structure / Structure between third layer and fourth layer-second interlayer insulating film-)
In FIG. 6, a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or preferably TEOS gas is used above the storage capacitor 70 and below the data line 6a. A second interlayer insulating film 42 formed by the conventional plasma CVD method is formed. In the second interlayer insulating film 42, a contact hole 81 for electrically connecting the high-concentration source region 1d of the TFT 30 and the data line 6a is opened, and the upper portion of the capacitor wiring relay layer 6a1 and the storage capacitor 70 is formed. A contact hole 801 for electrically connecting the capacitor electrode 300 as an electrode is opened. Further, a contact hole 882 for electrically connecting the second relay electrode 6a2 and the relay electrode 719 is formed in the second interlayer insulating film.

(Laminated structure / Fifth layer configuration-capacitor wiring, etc.)
A capacitor wiring 400 is formed in the fifth layer following the fourth layer. When viewed in plan, the capacitor wiring 400 is formed in a lattice shape so as to extend in the X direction and the Y direction in the drawing, as shown in FIG. With such a capacitive wiring 400, an opening region is defined for each pixel.

  The portion extending in the Y direction in FIG. 5 in the capacitor wiring 400 is formed so as to cover the data line 6a and wider than the data line 6a. In the portion extending in the X direction in FIG. 5, an opening formed separately from the opening region in the vicinity of the center of one side of each pixel electrode 9 a in order to secure a region for forming the third relay electrode 402. The window 400a which is a part is provided.

  In FIG. 5, a substantially triangular portion is provided at the corner of the intersecting portion of the capacitor wiring 400 extending in each of the XY directions so as to fill the corner. By providing the capacitor wiring 400 with the substantially triangular portion, light can be effectively shielded from the semiconductor layer 1a of the TFT 30. That is, the light entering the semiconductor layer 1a obliquely from above is reflected or absorbed by the triangular portion and does not reach the semiconductor layer 1a. Therefore, it is possible to suppress the generation of light leakage current and display a high-quality image without flicker or the like. The capacitor wiring 400 is extended from the image display region 10a where the pixel electrode 9a is disposed to the periphery thereof, and is electrically connected to a constant potential source to have a fixed potential.

  In the fifth layer, the third relay electrode 402 formed as the same film as the capacitor wiring 400 is formed in an island shape in the window 400 a of the capacitor wiring 400. More specifically, the capacitor wiring 400 and the third relay electrode 402 are not continuously formed in a planar shape, but are formed so as to be separated by patterning. Thereby, the third relay electrode 402 is electrically separated from the capacitor wiring 400. The third relay electrode 402 relays the electrical connection between the second relay electrode 6a2 and the pixel electrode 9a through the contact holes 804 and 89. The capacitor wiring 400 and the third relay electrode 402 have a two-layer structure in which a lower layer is made of aluminum and an upper layer is made of titanium nitride.

(Laminated structure / configuration between the fourth and fifth layers-third interlayer insulating film-)
In FIG. 6, on the data line 6a and below the capacitor wiring 400, a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like, or preferably a plasma using TEOS gas. A third interlayer insulating film 43 formed by the CVD method is formed. In the third interlayer insulating film 43, a contact hole 803 for electrically connecting the capacitor wiring 400 and the capacitor wiring relay layer 6a1, and a third relay electrode 402 and the second relay electrode 6a2 are electrically connected. Contact holes 804 for connection are opened.

(Laminated structure / 6th layer and 5th layer and 6th layer configuration-pixel electrode, etc.)
In FIG. 6, pixel electrodes 9a are formed in a matrix on the sixth layer, and an alignment film 16 is formed on the pixel electrodes 9a. Under the pixel electrode 9a, a silicate glass film such as NSG, PSG, BSG, or BPSG, a silicon nitride film, a silicon oxide film, or the like, or a fourth interlayer insulating film 44 preferably made of NSG is formed. In the fourth interlayer insulating film 44, a contact hole 89 for electrically connecting the pixel electrode 9a and the third relay electrode 402 is opened. Between the pixel electrode 9a and the TFT 30, the contact hole 89, the third relay layer 402, the contact hole 804, the second relay layer 6a2, the contact hole 882, the relay electrode 719, the contact hole 881, the lower electrode 71, and the contact hole 83 It will be electrically connected via.

  The liquid crystal device 1 of the present embodiment is constituted by the TFT array substrate 10 having the configuration as described above, the counter substrate 20 and the liquid crystal layer sandwiched between these substrates. According to the liquid crystal device 1 of the present embodiment, the potential holding characteristic of the holding capacitor 70 can be enhanced without impairing bright image display, and the display performance of the liquid crystal device driven by active matrix can be improved. . Even when the storage capacitor 70 is formed of a transparent material, it is incident from the counter substrate 20 side by the light shielding film 23, the capacitor wiring 400 and the third relay electrode 402, and the scanning line 11 a provided on the counter substrate 20 side. The light and the light incident from the element substrate 10 side can be reliably shielded. Therefore, according to the liquid crystal device 1 of the present embodiment, not only the potential holding characteristics of the holding capacitor 70 can be improved, but also the light leakage current of the TFT 30 can be suppressed. In addition, the contrast of the display image can be improved and the definition can be increased.

(Modification)
Next, a modification of the liquid crystal device 1 according to the present embodiment will be described with reference to FIG. FIG. 7 is a cross-sectional view of an essential part showing a specific configuration of the pixel portion in the liquid crystal device 1 of the present example, and corresponds to FIG. The liquid crystal device 100 of this example is different from the liquid crystal device 1 described above in that it includes two transparent storage capacitors that are electrically connected in parallel to each other. In the following description, portions common to FIGS. 1 to 6 will be described with common reference numerals. In addition, for convenience of explanation, description of convenience is omitted for common portions.

  In FIG. 7, the liquid crystal device 100 includes a storage capacitor 170 that is formed in an upper layer of the storage capacitor 70 and is an example of the “second storage capacitor” of the present invention. The storage capacitor 170 is formed so as to extend from the non-opening region to the opening region, and is electrically connected to the storage capacitor 70 via the contact holes 180a, 180b, and 180c constituting an example of the “conductive portion” of the present invention. Connected in parallel.

  The storage capacitor 170 is formed on the upper layer side of the storage capacitor 70 and on the lower layer side of the pixel electrode 9a, and includes a transparent capacitor electrode 171 extending from the non-opening region to the opening region, and a dielectric film 175. ing. The capacitor electrode 171 corresponds to an example of the “second fixed potential side capacitor electrode” of the present invention, and the dielectric film 175 corresponds to an example of the “second dielectric film” of the present invention. In addition, the overlapping portion 9aa that overlaps the capacitor electrode 171 in plan view in the transparent pixel electrode 9a is also used as a capacitor electrode paired with the capacitor electrode 171. Therefore, the storage capacitor 170 has a three-layer structure in which the capacitor electrode 171, the dielectric film 75, and the overlapping portion 9aa are stacked in this order.

  The capacitor electrode 171 is formed by depositing a transparent material such as ITO or IZO on the fourth interlayer insulating film 44 so as to be electrically connected to the contact hole 180a after forming the contact holes 180a, 180b and 180c. Yes. The dielectric film 175 has a multilayer structure including a silicon oxide film, a silicon nitride film, or a plurality of transparent dielectric films formed on the capacitor electrode 171. Therefore, the storage capacitor 170 does not block light transmitted through the opening region. In FIG. 7, the contact holes 180a, 180b and 180c are shown in contact with the capacitor wiring 400 and the data line 6a for convenience of explanation, but the capacitor wiring 400 and the data line 6a are avoided in plan view. Thus, the second interlayer insulating film 42, the third interlayer insulating film 43, and the fourth interlayer insulating film 44 are formed so as to penetrate. That is, the contact holes 180a, 180b, and 180c are laid out conveniently according to the arrangement of the storage capacitors 70 and 170 and other components of the liquid crystal device 1.

  Each of the storage capacitors 70 and 170 is electrically connected in parallel because the capacitor electrode 171 and the upper capacitor electrode 300 which are fixed potential side electrodes are electrically connected. Therefore, by extending the storage capacitor 70 to the opening region, it is possible to secure a capacity larger than that obtained by one storage capacitor. In addition, since the transparent storage capacitor 170 does not block light transmitted through the opening region, it is possible to secure a storage capacitor having a larger capacity than when the storage capacitor 170 is provided only in the non-opening region. As described above, according to the liquid crystal device 100 of this example, not only the planar shape of the storage capacitors 70 and 170 but also the plurality of storage capacitors are formed along the thickness direction of the TFT array substrate 10, thereby reducing the pixel aperture ratio. It is possible to make a large storage capacity in a very limited space without lowering, and compared with the case where the image signal is temporarily stored only by the storage capacity 70, as the storage capacity 170 is provided. The potential holding characteristic of the image signal can be improved.

  Further, in the liquid crystal device 100 of the present example, the data line 6a is provided on the upper layer side of the storage capacitor 70 and on the lower layer side of the storage capacitor 170, so that the light irradiated to the TFT 30 can be shielded. More specifically, since the data line 6a and the TFT 30 are provided in the non-opening region surrounding the opening region, the light irradiated to the TFT 30 from the upper side of the TFT array substrate 10 is shielded by the data line 6a. Therefore, according to the data line 6a, it is possible to block the light transmitted through the portion of the storage capacitor 170 extending to the non-opening region, and to reduce the light leakage current generated in the TFT 30. Thereby, the disturbance of the display image such as flicker generated according to the light leakage current of the TFT 30 can be suppressed. In this example, the data line 6a blocks the light applied to the TFT 30. However, the data line 6a is not limited to the data line 6a as long as it is a light blocking means provided in a non-opening region on the upper layer side of the TFT 30. In addition, for example, the light leakage current of the TFT 30 can be reduced by using the capacitor wiring 400 having a light shielding property or other components having a light shielding performance.

Second Embodiment
Next, the liquid crystal device 1 of the present embodiment will be described with reference to FIGS. FIG. 8 and FIG. 9 are diagrams showing the planar shapes of the capacitor electrode 171 and the transparent pixel electrode included in the storage capacitor 170, and each part of the capacitor electrode 171 and the pixel electrode 9a provided on the lower layer side thereof. It is shown together. FIG. 10 is a plan view showing a modified example of the capacitor electrode 171. FIG. 11 is a plan view showing a planar structure of the pixel portion on the lower layer side of FIGS. 8 and 9. FIG. 12 is a cross-sectional view taken along the line BB ′ in the pixel portion of the TFT array substrate 10 in which FIGS. 11, 8, and 9 are stacked in this order. In FIG. 12, as in FIG. 6, the scale of each layer / member is made different so that each layer / member can be recognized in the drawing.

  In FIG. 12, the liquid crystal device 200 of the present embodiment includes a storage capacitor 70a provided in the non-opening region and a transparent storage container 170 provided on the upper layer side of the storage capacitor 70a. The storage capacitor 170 is an example of the “second storage capacitor” in the second invention of the present invention. In the liquid crystal device 200 of the present embodiment, an opaque storage capacitor 70a is provided in the non-opening region, and a transparent storage capacitor 170 electrically connected in parallel with the storage capacitor 70a is provided from the non-opening region to the opening region. As a result, the potential holding characteristic is improved by the amount of the holding capacitor 170 provided.

  The storage capacitors 70a and 170 are electrically connected in parallel because the capacitor electrode 171 and the upper capacitor electrode 300a, which are fixed potential side electrodes, are electrically connected as in the first embodiment. Therefore, a capacity larger than the capacity obtained by extending the storage capacitor 70a to the opening region is secured. In addition, since the transparent storage capacitor 170 does not block light transmitted through the opening region, it is possible to secure a storage capacitor having a larger capacity than when the storage capacitor 170 is provided only in the non-opening region. In this embodiment, since the storage capacitor 70a provided on the upper layer side of the TFT 30 and on the lower layer side of the storage capacitor 170 is formed of an opaque material, the light irradiated to the TFT 30 from the upper side can be blocked by the storage capacitor 70a.

  Next, the planar shape of the pixel electrode 9a and the capacitor electrode 171 included in the storage capacitor 170 and the electrical connection structure of these electrodes will be described with reference to FIGS. 8, 9, 11 and 12. FIG.

  In FIG. 8, the capacitor electrode 171 extends from the non-opening region to the opening region, and is electrically connected to a contact hole 180a provided in the non-opening region. In FIG. 9, the transparent pixel electrode 9a extends from the non-opening region to the opening region, and is electrically connected to a contact hole 89 provided in the non-opening region. The capacitor electrode 171 and the overlapping portion 9aa are extended to the opening region so as to overlap almost the entire opening region. As shown in FIG. 11, the overlapping portion 9aa is connected to the lower capacitor electrode 71 through the contact hole 89, the third relay electrode 402, the contact hole 804, the second relay electrode 6a2, the contact hole 882, the relay electrode 719, and the contact hole 881. They are electrically connected, and the potential is maintained so as to be the pixel potential. Since the capacitor electrode 171 and the upper capacitor electrode 300 are electrically connected to each other through the contact holes 180a, 180b, and 180c, they are maintained at a fixed potential. Therefore, even if the storage capacitors 70a and 170 are formed in different layers on the TFT array substrate 10, these storage capacitors can be electrically connected in parallel, and a storage capacitor having a large capacity that cannot be secured by each storage capacitor alone. It can be formed on the TFT array substrate 10.

  As described above, according to the liquid crystal device 200 of the present embodiment, the potential holding capability for temporarily holding the image signal can be increased and the luminance of the pixel is lowered as in the liquid crystal device 1 of the first embodiment. There is nothing. Therefore, it is possible to suppress disturbance of a display image such as flicker and to display a bright image.

  In FIG. 12, the capacitor electrode 171 is not electrically connected to the upper capacitor electrode 300a via the contact holes 180b and 180c, but is electrically connected to the upper capacitor electrode 300a via a contact hole (not shown). The capacitor wiring 400 may be electrically connected only via the contact hole 180a. By electrically connecting the capacitor electrode 171 and the capacitor wiring 400 only through the contact hole 180a, the contact hole 180a only needs to be formed in the fourth interlayer insulating film 44. Therefore, shallow contact formation is sufficient, and contact etching is performed. It will be easy.

  Next, a modification of the capacitor electrode 171 will be described with reference to FIG. In FIG. 10, a capacitive electrode 171 made of a transparent material such as ITO is extended over a plurality of pixel regions along the vertical direction in the drawing, that is, the direction in which the data line extends, as viewed in a plan view. Therefore, compared to the case where the capacitor electrode 171 is formed in each pixel region, the area of the capacitor electrode 171 can be increased, and the storage capacitor can be increased. Further, the capacitor electrode 171 may have a large area by extending to each pixel region in the horizontal direction in the drawing, that is, along the scanning line, or may be formed in a lattice shape. That is, if it is formed so as to avoid the contact hole, it can be formed on the entire surface of the image display area.

<Third Embodiment>
Next, the configuration of the liquid crystal device of this embodiment will be described with reference to FIG. FIG. 13 is a cross-sectional view corresponding to FIG.

  In FIG. 13, the second storage capacitor includes a part 9aa of the pixel electrode 9a, a dielectric film 175, and a capacitor wiring 400. The capacitor wiring 400 is formed in the same layer as the third relay electrode 402 and is formed of a transparent material such as ITO.

  Therefore, the capacitor wiring 400 that is also used as the fixed potential side electrode of the storage capacitor 170 can be expanded in a plane, and the capacitor wiring can be connected to another conductive portion maintained at a fixed potential while suppressing the electric resistance of the capacitor wiring 400. 400 can be easily connected.

<Electronic equipment>
Next, various electronic devices to which the above-described liquid crystal device is applied will be described.

  First, a projector using the above-described liquid crystal device as a light valve will be described. FIG. 14 is a plan view showing a configuration example of the projector. As shown in FIG. 14, a projector 1100 includes a lamp unit 1102 made of a white light source such as a halogen lamp. The projection light emitted from the lamp unit 1102 is separated into three primary colors of RGB by four mirrors 1106 and two dichroic mirrors 1108 arranged in the light guide 1104, and liquid crystal as a light valve corresponding to each primary color. Incident on panels 1110R, 1110B and 1110G.

  The configurations of the liquid crystal panels 1110R, 1110B, and 1110G have the same configuration as that of the above-described liquid crystal device, and are driven by R, G, and B primary color signals supplied from the image signal processing circuit. The light modulated by these liquid crystal panels enters the dichroic prism 1112 from three directions. In the dichroic prism 1112, R and B light is refracted at 90 degrees, while G light travels straight. Accordingly, as a result of the synthesis of the images of the respective colors, a color image is projected onto the screen or the like via the projection lens 1114.

  However, paying attention to the display images by the liquid crystal panels 1110R, 1110B and 1110G, the display image by the liquid crystal panel 1110G needs to be horizontally reversed with respect to the display images by the liquid crystal panels 1110R and 1110B.

  Since light corresponding to the primary colors R, G, and B is incident on the liquid crystal panels 1110R, 1110B, and 1110G by the dichroic mirror 1108, it is not necessary to provide a color filter.

  Next, a mobile personal computer to which the above-described liquid crystal device is applied will be described. FIG. 15 is a perspective view showing the configuration of this personal computer. In FIG. 15, a computer 1200 includes a main body 1204 provided with a keyboard 1202 and a liquid crystal display unit 1206. The liquid crystal display unit 1206 is configured by adding a backlight to the back surface of the liquid crystal device 1005 described above.

  Further, a mobile phone to which the above-described liquid crystal device is applied will be described. FIG. 16 is a perspective view showing the configuration of this mobile phone. In FIG. 16, a mobile phone 1300 includes a reflective liquid crystal device 1005 together with a plurality of operation buttons 1302. In the reflective liquid crystal device 1005, a front light is provided on the front surface thereof as necessary.

  In addition to the electronic devices described with reference to FIGS. 14 to 16, a liquid crystal television, a viewfinder type, a monitor direct view type video tape recorder, a car navigation device, a pager, an electronic notebook, a calculator, a word processor, a work Examples include a station, a videophone, a POS terminal, and a device equipped with a touch panel. Needless to say, the liquid crystal device of this embodiment can be applied to these various electronic devices.

  The present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the gist or concept of the invention that can be read from the claims and the entire specification. Devices and electronic devices are also included in the technical scope of the present invention. More specifically, the electro-optical device or the electronic apparatus according to the present invention may be various transmissive types, reflective types, self-luminous devices such as LCOS (Liquid Crystal on Silicon), DMD (Digital Micromirror Device), and organic EL devices. Applicable to type devices.

1 is a plan view illustrating an overall configuration of an electro-optical device according to a first embodiment of the invention. It is HH 'sectional drawing of FIG. FIG. 3 is an equivalent circuit diagram of various elements and wirings included in a plurality of pixel units in the first embodiment. FIG. 7 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed, in a lower layer portion (lower layer portion up to reference numeral 70 (retention capacitor) in FIG. 6). Only such a configuration is shown. FIG. 7 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed, and an upper layer portion (an upper layer portion beyond reference numeral 70 (retention capacitor) in FIG. 6) Only the structure which concerns on this is shown. FIG. 6 is a cross-sectional view taken along line AA ′ when FIG. 4 and FIG. 5 are overlapped. It is sectional drawing of the modification corresponding to AA 'sectional drawing at the time of superposing FIG.4 and FIG.5. 11 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes and the like are formed, and is a middle layer portion (reference numeral 171 (capacitance electrode) to reference numeral 70 (retention capacitor) in FIG. 11). The structure which concerns on the part of the middle layer between) is shown. FIG. 11 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed, in an upper layer portion (upper layer portion up to reference numeral 9a (pixel electrode) in FIG. 11). This configuration is shown. FIG. 9 is a plan view illustrating a modification of the layout of the capacitor electrode 171 illustrated in FIG. 8. FIG. 11 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, and the like are formed, in a lower layer portion (lower layer portion up to reference numeral 11a (scanning line) in FIG. 11). This configuration is shown. FIG. 12 is a cross-sectional view taken along line BB ′ when FIGS. 8, 9, and 11 are overlapped. FIG. 10 is a cross-sectional view of an electro-optical device according to a third embodiment of the invention. FIG. 6 is a plan view illustrating a configuration of a projector as an example of an electronic apparatus to which the electro-optical device according to the first or second aspect of the invention is applied. FIG. 6 is a perspective view illustrating a configuration of a personal computer as an example of an electronic apparatus to which the electro-optical device according to the first or second aspect of the invention is applied. FIG. 6 is a perspective view illustrating a configuration of a mobile phone as an example of an electronic apparatus to which the electro-optical device according to the first or second aspect of the invention is applied.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1,100,200 ... Liquid crystal device, 9aa ... Superimposition part, 70, 70a, 170 ... Retention capacity, 71 ... Lower capacity electrode, 75, 175 ... Dielectric film, 171 ...・ Capacitance electrode, 300 ... Upper capacitance electrode

Claims (7)

Scanning lines and data lines;
A transistor provided to overlap the data line;
A pixel electrode provided for each pixel corresponding to the transistor ;
A first storage capacitor transparent for temporarily holding the image signal supplied before Symbol pixel electrode,
Before SL is provided on the upper layer of the first storage capacitor, and a first storage capacitor electrically connected in parallel to the transparent second storage capacitor,
The first storage capacitor extends so as to overlap the scanning line and the data line, and is provided to overlap the pixel electrode so as to cover a non-opening region of the pixel.
The second storage capacitor includes the pixel electrode and a capacitor electrode electrically connected to one capacitor electrode of the first storage capacitor . The first storage capacitor includes a transparent pixel potential side capacitor electrode electrically connected to the transistor, a transparent first fixed potential side capacitor electrode, the pixel potential side capacitor electrode, and the first fixed potential side capacitor. The electro-optical device according to claim 1, further comprising a transparent first dielectric film sandwiched between electrodes. The second storage capacitor includes a transparent second fixed potential side capacitor electrode formed on an upper layer side of the first storage capacitor and on a lower layer side of the pixel electrode, and between the second fixed potential side capacitor electrode and the pixel electrode. And a transparent second dielectric film formed on
The pixel electrode is a transparent electrode;
The portion of the pixel electrode that overlaps the second fixed potential side capacitor electrode in plan view is also used as a capacitor electrode paired with the second fixed potential side capacitor electrode. The electro-optical device according to 1 or 2. The first storage capacitor includes a transparent pixel potential side capacitor electrode electrically connected to the transistor, a transparent first fixed potential side capacitor electrode, the pixel potential side capacitor electrode, and the first fixed potential side capacitor. A transparent first dielectric film sandwiched between electrodes,
The second storage capacitor includes a transparent second fixed potential side capacitor electrode formed on an upper layer side of the first storage capacitor and on a lower layer side of the pixel electrode, and between the second fixed potential side capacitor electrode and the pixel electrode. And a transparent second dielectric film formed on
The pixel electrode is a transparent electrode;
A portion of the pixel electrode that overlaps the second fixed potential side capacitor electrode in plan view is also used as a capacitor electrode paired with the second fixed potential side capacitor electrode,
The first storage capacitor and the second storage capacitor are electrically connected in parallel via a conductive portion formed between the first fixed potential side capacitor electrode and the second fixed potential side capacitor electrode. The electro-optical device according to claim 1 . The data line is provided on an upper layer side of the first storage capacitor and on a lower layer side of the second storage capacitor, and extends to the non-opening region so as to block light irradiated on the transistor. The electro-optical device according to any one of claims 1 to 4, wherein the electro-optical device is provided. A capacitor wiring formed on an upper layer side of the first storage capacitor and on a lower layer side of the second storage capacitor;
The electro-optical device according to claim 4, wherein the conductive portion electrically connects the first storage capacitor and the second storage capacitor through the capacitor wiring. An electronic apparatus comprising the electro-optical device according to any one of claims 1 to 6 .

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