JP4808118B2 - Input / output terminal - Google Patents

Description

  The present invention provides a slave station address section in a common transmission line in a control system that transmits and receives control signals or monitoring signals to and from a slave station via a common transmission line in which a power supply is superimposed on the master station connected to the control section. The I / O terminal, which is a slave station that can be additionally installed with the slave station cascade input section or slave station cascade output section, eliminates wiring around the slave station, simplifies the wiring method, and facilitates multidimensional data. It relates to an input terminal or an output terminal that can input / output data.

  Conventionally, in a system that omits wiring for transmitting a control signal and a monitoring signal via a common transmission line in which a power supply is superimposed on a master station and a plurality of slave stations, each slave station part is integrated with a slave station address part, It was not possible to add an output part for outputting a control signal or an input part for inputting a monitoring signal by separating the inside of the slave station, and the extension was made in units of slave stations.

For example, in Patent Document 1, in a system that transmits a control signal and a monitoring signal, two control signals and two monitoring signals are superimposed on a clock signal, and one of the two control signals and the two monitoring signals is accelerated. A signal transmission system for transmitting data and transmitting the other at low speed is described.
In the above-described conventional example, the system is a system for transmitting a control signal and a monitoring signal in address units, and an output terminal for outputting a control signal and an input terminal for inputting a monitoring signal can be easily added by a cascade signal or in the middle of wiring. It was difficult to perform transmission by bundling the terminals and bundling the terminals.

Further, for example, in Patent Document 2, in a system for transmitting a control signal and a monitoring signal, control data and control signal are superposed on a transmission clock signal and transmitted to increase the average power to be transmitted. It is shown that the duty ratio is changed according to the value of each data of the signal. Thus, a technique has been proposed in which the capacity of the power supply inside the slave station is improved and the wiring is omitted while improving the reliability.
In the conventional example described above, a technique for omitting wiring has been developed as in Patent Document 1, but this is a system for transmitting a control signal and a monitoring signal in address units, and an output terminal and a monitoring signal for outputting the control signal are provided. The input terminals to be input could be easily added by a cascade signal, or a branch was provided in the middle of the wiring, and the terminals could not be bound to the wiring for transmission.
JP 2003-152748 A JP 2003-199178 A

Further, in the wiring method as described above, the amount of wiring can be reduced until branching is performed, but the amount of wiring in the case where input or output is distributed cannot be reduced.
In addition, in the conventional example, a branch is arbitrarily branched from a common transmission line on which power is superimposed, and a terminal added to the branch point is fixed to the wiring path with a binding band or the like, or installed with other wiring inside the wiring duct. I couldn't.
As a result, the entire apparatus is increased in size and the number of wiring steps is increased, resulting in high-cost equipment and an increase in maintenance time, resulting in problems. In addition, the change and addition of wiring requires a place for installing the terminal, so severe restrictions are imposed on the change.

In the system that omits the wiring for transmitting the control signal and the monitoring signal through the common transmission line superimposed with the conventional power source described above, an arbitrary number of input points or an arbitrary number of output points can be set at an arbitrary position in the wiring. Installation and wiring could not be omitted.
The present invention is intended to solve the problems of such a conventional configuration, and improves the degree of freedom of branching, which is a problem. This makes it possible to make a system with a high degree of freedom in adding and changing parts. In addition, by making it possible to install terminals in the middle of the wiring, it eliminates restrictions on wiring with fixed terminals, reduces wiring space, and can easily handle layout change requests. Accordingly, it is an object to reduce the equipment cost and the operation cost.
Another object of the present invention is to fix the terminal as a slave station together with other wirings to eliminate the restriction on the arrangement place, and to fix the fixing method in the duct or to remove the restriction of the fixing place by the magnet.
It is another object of the present invention to enable the capture or output of multidimensional data using a plurality of slave station cascade input units or slave station cascade output units.

  In order to achieve the above object, the present invention provides a slave station address unit that enables independence in a communication control system that performs communication control of a monitoring signal and a control signal via a common signal line with power supply superimposed thereon, The slave station cascade signal generated by the station address section is transmitted to the following slave station cascade input section or the plurality of slave station cascade output sections, and the input signal is captured and transmitted to the master station or the control signal from the master station is transmitted to the slave station. A terminal system for outputting from a slave station cascade output unit is provided.

  In addition, as a means for solving the second problem, by connecting the slave station address part, slave station cascade input part or slave station cascade output part only with the common signal line and cascade signal line of power supply superimposition, each can be separated, The size and size that can be easily fixed to the wiring path by bundling and the like are achieved, and the distance between the sensors and actuators is separated or distributed. This makes it possible to omit the wiring that goes back and forth between them.

  Also, as a means for solving the third problem, a multi-dimensional input or output terminal is installed at a position separated from each other by a large number of slave station cascade input units or slave station cascade output units, and monitoring data is captured or control signals are output. In this case, the present invention in which the input or output signals arranged in a distributed manner can be connected and wired only by the common signal line and the cascade signal line of the power supply superposition, the effect of omitting the wiring, and the simplification of the wiring work The effect which can be made possible is exhibited.

In claim 1, the master station receives an output signal from the output unit of the control unit, and the master station has an interface for transmitting the output signal of the master station to the input unit of the control unit. The master station and a plurality of slave stations are connected by a common data signal line with superimposed power, and the control signal from the master station is controlled from the output of the slave station via the common data signal line with superimposed power In a control system that sends a signal to a controlled unit as a signal, or takes a monitoring signal from a sensor unit from a slave station input unit of the slave station unit, and transmits it to the master station via the common data signal line superimposed on the power source,
Each of the slave station units is a single or multiple slave station cascade input unit cascaded to the slave station address unit and the slave station address unit, or a single or multiple cascaded to the slave station address unit The slave station cascade output section or a single or multiple slave station cascade input section cascaded to the slave station address section or a mixture of both single or multiple slave station cascade output sections The slave station address section and the slave station cascade input section, or the slave station cascade output section, or both the slave station cascade input section and the slave station cascade output section are respectively connected to the common data signal line on which the power supply is superimposed. Each slave station cascade input section or each slave station cascade output section is connected to a cascade output from the slave station address section. The slave station cascade input of each subsequent signals to the slave station address unit, or, sequentially transferred to the slave station cascade output unit, the slave station cascade input unit which receives the cascade signal, monitoring the taken from the sensor unit A signal is transmitted to the master station via the common data signal line on which the power supply is superimposed at the timing of the cascade signal, or the slave station cascade output unit receiving the cascade signal is connected to the common data signal line on which the power supply is superimposed. The control signal transmitted from the master station via the timing is taken in at the timing of the cascade signal, sent to the controlled unit, the controlled unit is controlled, the master station and the single or plural The slave stations are connected by the common data signal line superposed on the power source, and the slave station part transmits the cascade signal sent from the slave station address part to the cascade signal line. Single or followed sequentially the slave station address portion, a plurality of said slave stations cascade input unit or a single or connected to a plurality of said slave stations cascade output unit, a plurality of the monitoring signal or a plurality of said control signal A terminal system is described in which communication control is performed with the master station via the common data signal line on which the power is superimposed.

  Further, according to claim 2, the slave station having the slave station cascade input section or the slave station cascade output section following the slave station address section when all the slave station sections have a slave station address section in claim 1. A local part can be freely branched and connected to a common data signal line on which a power source is superimposed, and a sequential cascade signal is passed to the subsequent slave station cascade input part or the slave station cascade output part, so that a plurality of A terminal system is described, which makes it possible to add the slave station cascade input section or the slave station cascade output section.

  Further, in claim 3, after the branch of the common data signal line is performed in claim 1, the terminal which is the attached slave station address part or slave station cascade input part or slave station cascade output part is provided. A place where the terminal system is installed by fixing it on the wiring path using a cable tie band, or storing it in a wiring duct, or fixing it to iron plate parts or cases in the wiring path using magnets. It describes a terminal system characterized by not restricting

  Further, in claim 4, after performing wiring branching in claims 1 to 3, a part of the attached terminal has a magnet, and the magnet is attached and fixed to an iron plate component near the wiring path by the magnet. A terminal system is described.

  Further, in claim 5, in claim 1, two or more slave station cascade inputs are used to capture two-dimensional information, or three or more slave station cascade inputs are used to capture three-dimensional information. Alternatively, there is described a terminal system characterized in that multi-dimensional information is captured using a plurality of slave station cascade input units.

  Further, in claim 6, in claim 1, output of two-dimensional information using two or more slave station cascade output units, or output of three-dimensional information using three or more slave station cascade input units. Alternatively, a terminal system is described in which multidimensional information is output using a plurality of slave station cascade output units.

  Conventionally, as a method of reducing the number of wires between sensor terminals or between a sensor terminal system and a master station, a power supply is superimposed on a transmission line for transmitting a control signal and a monitoring signal, and each signal is arranged next. The number of signal lines can be reduced to two power lines by connecting each sensor terminal with a crossover line or transferring light between each sensor terminal by light according to the transfer method of the signal to be transferred to the terminal. The number of wirings can be greatly reduced.

  In the present invention, a cascade signal is newly added to the slave unit that is the adjacent input terminal or output terminal, and the corresponding I / O terminal that is the slave station cascade input / output unit is connected by transferring the cascade signal accordingly. In this way, the wiring can be omitted.

  Also, the common data signal line with superimposed power can be freely branched in the course of wiring, and the slave station address unit, slave station cascade input unit or slave station cascade output unit can be bundled and fixed together with other wires, or in the wiring duct By arranging the terminals, it is possible to provide a terminal that allows additional wiring of the terminal without requiring a new terminal installation space. Also, it can be fixed to iron plate parts and cases in the wiring path by magnets. In this case, the slave station cascade input unit or slave station cascade output unit coupled by the cascade signal is theoretically not limited, but about 256 points are appropriate for each transmission rate.

  Moreover, it becomes possible to obtain multi-dimensional input information from two-dimensional or three-dimensional by combining a plurality of slave station cascade input units, and further combining a plurality of slave station cascade output units to obtain two-dimensional or two-dimensional to multi-dimensional information. It is possible to output.

  According to the present invention, a terminal that is a slave station cascade input unit can be branched and added in the middle of wiring, and similarly, a terminal that is a slave station cascade output unit can be branched and added in the middle of wiring. As a result, it is possible to freely branch from the common data signal line on which power is superimposed and easily add multiple slave station cascade inputs and multiple slave station cascade outputs. When the output parts that need to be distributed are present, the wiring can be omitted, and the terminal according to the present invention can be bundled together with the wiring or stored in the wiring duct. Or it is also possible to fix to a plate-shaped part with a magnet. In addition, it is possible to easily input or output a plurality of input signals or a plurality of output signals in two or three dimensions, or even in a multi-dimension.

  The best mode for carrying out the present invention will be described below based on examples.

An embodiment of the present invention will be described with reference to FIGS.
FIG. 1 is a block diagram showing the entire communication control system including a plurality of slave station cascade input units or slave station cascade output units in the present invention.
The communication control system of FIG. 1 includes a control unit 1, a D + power superimposed common data signal line 7, a D−power superimposed common data signal line 8 linking a master station 6 and a slave station, and a plurality of slave stations 9. . Next, the operation of this configuration will be described.

  In the communication control system of FIG. 1, the master station 6 receives input information as a control output signal 4 from the output unit 2 of the control unit 1, and receives a monitoring signal obtained from a slave station of the master station 6 of the control unit 1. Passed to the input unit 3 as a control input signal 5. The master station 6 is connected to a plurality of slave stations via the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8. The station cascade output unit 11 and the slave station cascade input unit 12 are connected in parallel. The slave station address section 10 of the slave station section 9 receives the data signal from the master station 6 obtained from the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8, generates a cascade signal 15, and A cascade signal 15 is sent to the station cascade input unit 12 or the slave station cascade output unit 11.

The controlled unit 13 is connected to the slave station cascade output unit 11 and receives the control signal based on the control output signal 4 transmitted from the master station 6 to perform the controlled unit operation.
In addition, the sensor unit 14 sends the monitoring signal obtained from the sensor to the slave station cascade input unit 12, and the slave station cascade input unit 12 sends the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8. To the master station 6. Similarly, a plurality of slave station units 9 are connected to the master station 6 via the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8 to constitute the entire communication control system.

  In this communication control system, even if there are a plurality of slave station units 9, between the master stations 6, as shown in the figure, control is performed with two lines of the power superimposed common data signal line 7 and the D-power superimposed common data signal line 8. Signals and monitoring signals are transmitted, and the slave station cascade input unit 12 or slave station cascade output unit 11 connected after the slave station address unit 10 is connected to the power superimposition common data signal line 7, D-power superimposition. A cascade signal 15 is further added to the two lines of the common data signal line 8 and is composed of three wires, so that the wiring can be omitted easily, branch connection is easy, and terminals are distributed at a distance. In the wiring, together with the effect of omitting the wiring, the slave station address unit 10, the slave station cascade output unit 11, and the slave station cascade input unit 12 can be easily formed along the wiring.

  According to the present invention, as described above, the wiring between the two common signal lines, the slave station section 9, the address section 10, the slave station cascade output section 11, and the slave station cascade input section 12 is connected to the cascade signal 15. Therefore, the effect of saving wiring (a technique for omitting wiring) can be obtained. Therefore, it is easy to reduce the number of wirings compared to the conventional one, and the system can be configured with simple wiring. Therefore, not only can the cost be reduced by reducing the wiring man-hours and wiring components, but also the wiring work of the system. Therefore, the system startup time is shortened, the overall reliability is increased, and maintenance can be performed easily, leading to shortening of the maintenance time.

  FIG. 2 is a signal timing chart inside the communication control system according to the present invention shown in FIG. Control output states “0”, “0”, “1”, “1” and D + power supply superposition common to “0”, “1”, “2”, “3” sections at a certain timing including an address signal The voltage between the data signal lines between the data signal line 7 and the D-power superimposed common data signal line 8, the monitoring input signal states “0”, “1”, “0”, “0” in the section, and the monitoring data The signal 17 and the Is current signal 18 are shown with the horizontal axis as the time axis. A data signal 16 is carried on the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8, and the relationship is shown in the output signal state timing chart for the address. For the addresses 0, 1, 2, and 3, the output signals “0”, “0”, “1”, and “1” signals indicate the state of the data signal 16 as rectangular wave pulses. As shown by the data signal 16 in FIG. 2, the output data state “0” indicates a duty cycle in which the fall time is long and the high-level state is set only in the second quarter, and the output data state “0” is further increased. After one cycle, the transmission pulse width indicating the output data “1” becomes a high level during the last three-quarter cycles from the short low-level state in the first quarter, and the output signal that follows is also “1”. Therefore, it is at the high level during the last three-quarter cycles from the short low-level state in the first quarter.

  On the other hand, the input signal which is the monitoring data signal 17 indicates the input signals “0”, “1”, “0”, “0” for the addresses 0, 1, 2, 3 and the Is current signal 18 Is a low level state of only the IP data signal in the section of the input signal “0”, continues in the section of the input signal “0”, flows in the section IP + Iis of the input signal “1”, and is in the low level section of the data signal 16 After the continuation, the data signal 16 is inverted and becomes low level. Then, the low level of the input signal “0” continues, the current IP + Iis of the input signal “1” flows again, and the low level of the data signal 16 continues after the low level of the data signal 16 continues.

FIG. 3 shows functional blocks inside the master station in the present invention.
The master station 6 receives the parallel signal which is the control output signal 4 from the control unit 1 and the data input unit 20 which sends the serial data of the entire slave station in the master station 6 to the control unit 1 as a parallel signal and sends it to the control unit 1. The output data section 21 to be captured as a serial signal in the station 6, the clock signal generation circuit used in the entire control system, the circuit that controls the address setting means of the master station, the master station input section 31 that captures the signal from the slave station, and the parent It is composed of a master station output unit 25 and a power source unit 26 that superimpose and transmit a signal from the station to the slave station and power serving as a power source of the slave station.

  The master station 6 converts the serial signal received from the slave station to the input unit 3 of the control unit 1 from serial to parallel and sends it as the master station transmission signal 5. The master station 6 receives the master signal from the output unit 2 of the control unit 1. An output data unit 21, a timing generation unit 23, a control data generation unit 24, and a master station output unit 25 are configured to perform parallel / serial conversion on the parallel signal received as the station reception signal 4 and take in the signal. The master station output unit 25 includes a control data generation unit 24 and a line driver 27, receives power supply from the DC power supply 26, and passes through the D + power superimposed common data signal line 7 and the D-power superimposed common data signal line 8, Supply power to the entire system. This signal transmission by power supply superposition is a part of the feature that realizes the omission of wiring.

  The master station input unit 32 of the master station 6 includes a monitoring signal detection unit 30 and a monitoring data extraction unit 29, and sends a signal to the input data unit 20. The monitoring signal detection means 30 is a group of slave station cascade input units 12 or slave station cascade output units sent from the terminal system 67 via the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8. 11 detects a data signal which is detected object information obtained from the slave station cascade input / output terminal 11. The master station 6 has a transmission bleeder current circuit 28.

  A transmission bleeder current circuit 28, which is an interface circuit of the master station, is connected to a line driver 27 in the master station output unit 25, and is a clock sent from the timing generator 23 to control data received from the control data generator 24. Along with the signal, the external signal connection part (D + side) 32 is passed to the D + power supply superimposed common data signal line 7, and the external signal connection part (D− side) 33 is passed to the D-power supply superimposed common data signal line 8. To send.

  The line driver 27 passes the data signal to the monitoring signal detection means 30 of the master station input unit 31, and the monitoring data extraction means 29 obtains the monitoring data signal in synchronization with the clock signal received from the timing generation means 23. This monitoring data signal is passed to the input data unit 20 and transmitted as the master station transmission signal 5 to the input unit 3 of the control unit 1. On the other hand, the output unit 2 of the control unit 1 transmits the master station received signal 4 to the output data unit 21 of the master station, and the control data in the master station output unit 25 by the clock signal received from the timing generation means 23. The generation means 24 generates control data and sends it to the D-power superimposed common data signal line 8 via the line driver 27 via the external signal connection unit (D-side) 33.

FIG. 4 shows a functional block and wiring diagram inside the master station.
The master station 6 converts the serial data of the entire slave station in the master station 6 to the control unit 1 into a 32-bit parallel signal from the output port p number “0” 38 to the control unit 1 from the output port p number “31” 39. The 32-bit parallel signal that is the control output signal 4 from the data input unit 20 and the control unit 1 to be sent is input from the input port i number “0” 36 to the input port i number “31” 37 to the master station 6 and converted into a serial signal. Output data section 21 to be captured and a clock signal generation circuit used in the entire control system, a circuit that controls the address setting means of the master station by a 6-bit address setting switch, and a monitor signal detection that captures a signal from the slave station as a monitor signal Means 30, monitoring data extracting means 29, serial / parallel conversion input data section shift register, line driver 27, control data generating means 2 It is constituted by the parent station output section 25 and the power supply unit 26 for transmitting by superimposing the power as a power source of the signal and the child station to the parent station input section 31 and the master station to made of.

  The master station 6 converts the serial data signal received from the monitoring data extraction means 29 to the input unit 3 of the control unit 1 in the input data unit 20 by serial / parallel conversion by the shift register, and inputs it from the input port i number “0” 36. It is transmitted as the master station transmission signal 5 through the input port of the port i number “31” 37. On the other hand, the master station reception signal 4 transmitted from the output unit 2 of the control unit 1 to the master station 6 passes through the output port p number “0” 38 to the output port p number “31” 39 to the output data unit 21. The parallel data is converted into serial data and is taken into the control data generating means 24.

  The timing generator 23 sends a Dck clock signal 41 to the output data unit 21, sends an ST signal 43 to the control data generator 24, and sends a Dick data input clock signal 44 to the input data unit 20. The master station input unit 31 detects the monitoring signal by the monitoring data detection means 30 and sends it as a dip signal 47 to the flip-flop of the monitoring data extraction means 29 via the inverter 40.

The signals sent from the master station 6 to each sensor terminal are the D + power superimposed common data signal line 7 and the D− power superimposed common data signal from the external signal connecting portion (D + side) 34 and the external signal connecting portion (D− side) 35. Sent out on line 8.
The output data unit 21 performs parallel / serial conversion on the data received as an interface, sends the data as a Dops serial data signal 42 to the control data generating unit 24, and outputs the control data Pck signal 46 from the line driver 27 to the external signal connection unit (D -Side) 35, the data is transmitted to the D-power superimposed common data signal line 8.
The timing generator 23 is used as a preset signal for parallel / serial conversion of the output data section 21 and as a preset signal for a serial / parallel conversion input data section shift register of the input data section 20.

  The transmission bleeder current circuit 28 is connected in parallel to the D + power superimposed common data signal line 7 and the D−power superimposed common data signal line 8. The combined current of the output current of the line driver 27 and the Ip signal 48 flowing out of the bleeder current circuit and the Iis current signal 50 flows as an Is current signal 49 to the circuit of the monitoring signal detecting means 30. A monitoring signal is detected from the Is current signal 49 and is transmitted as a dip signal 47 to the flip-flop which is the monitoring data extracting means 29 via the inverter 40. A Diis data input monitoring signal 45 is transmitted from the output of the flip-flop to the input data portion.

The serial Diis data input monitoring signal 45, which is a status signal of each sensor unit, is temporarily stored in the shift register of the input data unit 20. The data of each cell of the shift register, which is serial data, is transferred as it is as parallel data from the input port i number “0” 36 to the input port i number “31” 37, and as parallel data to the input unit of the control unit. Send it out. On the other hand, the master station received signal 4 sent from the output unit of the control unit is sent from the output port p number “0” 38 to the output port p number “31” 39, and the serial conversion of parallel data is performed inside the output data unit 21. And sent to the control data generating means 24 as a Dops serial data signal 42.
In this way, the current signal from the slave station can be taken into the master station as a monitoring signal, and simultaneously the output signal of the master station can be sent to the slave station as a pulse width signal. Since the control system can be configured without having separate signal lines, wiring can be omitted.

FIG. 5 shows a timing chart of each signal inside the master station. FIG. 5 is a signal waveform of each part of the wiring functional block diagram of the master station 6 in FIG.
FIG. 5 shows a 4CK signal 51 that is a basic clock signal, a Dck clock signal 41 that is a system clock signal, a start signal ST signal 43, an END signal 53, and a Dick data input clock that is a clock signal corresponding to a monitoring signal. A signal 44, a Dops signal 42 which is a control output signal, a Pck signal 51 including a control output signal and a clock signal, and a transmission signal between the D + power superimposed common data signal line 7 and the D-power superimposed common data signal line 8. , The Is current signal 18 including the monitoring signal current, the input current signal Diip signal 47 obtained by inverting the monitoring signal, the monitoring signal Diis data input monitoring signal 45, and the shift register signal of the input data portion are respectively plotted on the horizontal axis. It represents as.

The timing chart of FIG. 5 will be described.
The 4CK signal 51 is a basic clock signal. The Dck clock signal 41 continuously sends out a clock signal having a constant period after the rising signal of the ST signal 43 until the rising edge of the next start signal. To ST signal 43, at the end of all slave stations data, END signal 53 having a pulse width of 1.5 t ₀ is transmitted, recognizes the end of a series of the transmission signal. The Dick data input clock signal 44 is a clock signal for performing signal processing of the input data unit 20. The Dick data input clock signal 44 starts one clock cycle after the clock start point of the Dck clock signal 41 and ends one cycle before the clock end point.

  The input data unit 20 waits for the monitoring signal of the slave station cascade input unit 12 from the monitoring data extraction means 29 and performs signal processing. The control output signal 4 which is a parallel signal passed from the output unit 2 of the control unit 1 to the output data unit 21 of the master station 6 is converted from parallel data to serial data by the output signal conversion unit 21 and is converted into a serial data signal. A certain Dops signal 42 is sent to the control data generating means 24. FIG. 5 shows signal examples when the state of the Dops signal 42 is “0”, “0”, “1”, “1”.

  The Diis data input monitoring signal 45 indicates a signal example when the monitoring signal is in the state of “0”, “1”, “0”, “0”. The Pck signal 51 is a clock signal having a phase opposite to that of the Dck clock signal 41, and is sent from the line driver 27 to the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8, and is connected to the slave station cascade input / output. Performs status signal processing of the input / output unit terminal. The dip signal 47 is an input current signal obtained by inverting the monitoring signal detected by the monitoring signal detection means 30 by the inverter 40, and transmits the monitoring signal information to the input of the flip-flop as the monitoring data extraction means. The flip-flop, which is the monitoring data extraction means, sends a Diis data input monitoring signal 45 to the input data unit 20 in synchronization with the Dick data input clock signal 44. The Ip signal current 48 is a signal current of a transmission bleeder current circuit that flows in accordance with signals on the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8.

FIG. 6 is an internal wiring diagram and a functional block diagram of the slave station.
The slave station 9 includes a slave station address section 10, a single or multiple slave station cascade input section 12, a single or multiple slave station cascade output section 11, or a single or multiple slave station cascade input section 12. Alternatively, a plurality of slave station cascade output units 11 are mixed. Here, the slave station section 9 will be described.

  The slave station unit 9 sends an ADQ signal 57 as a cascade signal to the slave station cascade input unit 12 or the slave station cascade output unit 11 following the slave station address unit 10. The slave station cascade input unit 12 or the slave station cascade output unit 11 that has received the ADQ signal 57 sequentially transfers the CQ signal 58 to the subsequent slave station cascade input unit 12 or slave station cascade output unit 11. Therefore, the slave station section 9 is connected by a total of three wires, that is, two wires of the D + power superimposed common data signal line 7 and the D−power superimposed common data signal line 8 and one ADQ signal line or CQ signal line. ing.

  In FIG. 6, the cascade input ports 59 and 72 of the slave station cascade input unit 12 describe switch inputs as sensor inputs in this case. The slave station cascade output unit 11 describes an output example in which LEDs are connected to the cascade output ports 60 and 82 as an embodiment. The CQ signal 58 is generated by the slave station cascade input unit 12 or the slave station cascade output unit 11 as long as the slave station cascade input unit 12 or the slave station cascade output unit 11 continues. It is sent to the station cascade output unit 11.

FIG. 7 is a functional block diagram of the slave station address section.
The slave station address unit 10 includes a power supply diode 62 and a capacitor that generate power consumed inside the slave station address unit 10, a slave station address unit power supply unit 61, and an address data signal as a D + power supply superimposed common data signal line 7. Is constituted by a circuit for extracting from the address, address extracting means 55 and address setting means 54. The operation of the slave station address part will be described.
A branch is provided for the D + power superimposed common data signal line 7 and the D− power superimposed common data signal line 8 to connect the slave station unit 9. The slave station address unit 10 is connected to the first slave station unit 9, and the slave station cascade is connected. Subsequently, the input unit 12 or the slave station cascade output unit 11 is connected. As a power source for the slave station address unit 10, a pulsating current is suppressed from the D + power superimposed common data signal line 7 through a power source diode 62 by charging a capacitor to obtain Vcp (+ 24V).

On the other hand, the signal level Vcg (+19 V) is obtained from the D-power supply superimposed common data signal line 8 via the slave station address unit power supply unit 61. A transmission signal including a signal component of 5 V is included between the Vcp (+24 V) line and Vcg (+19 V).
From the D + power superimposing common data signal line 7, the control data signal extraction means 56 is taken into the address extraction means 55 as the d0 signal 63, and the address setting means 54 determines the address of the slave station and combines it. An ADQ signal 57 which is a cascade signal is generated and sent to the subsequent slave station cascade input unit 12 or slave station cascade output unit 11.

  FIG. 8 is a timing chart of the slave station address part. The timing chart of the slave station address part shows the transmission signal, which is the data signal 16 between the D + power superimposed common data signal line 7 and the D-power superimposed common data signal line 8, and the D + power superimposed common data signal line 7 and Vcg. The signal between (+ 19V), the d0 signal 63, the ST signal 43 that is the start signal, and the ADQ signal 57 that is the cascade signal generated by the slave station address part are shown with the horizontal axis as the time axis.

D + power line common data signal line 7, the on-delay timer from the rising of d0 signal 63 obtained through the inverter from the signal transmitted by the D- power line common data signal line 8, after 3t _0, st signal 43 There falls the rise, along with the falling edge of the start signal of 5t _0. The timing relationship of the ADQ signal 57 transmitted as a cascade signal from the ADQ signal transmitted from the slave station address section 9 to the slave station cascade input section 12 or the slave station cascade output section 11 is indicated by a broken line.

FIG. 9 is a circuit diagram and a functional block diagram inside the slave station cascade input unit.
The slave station cascade input unit 12 includes a power supply diode and a capacitor for generating power consumed in the slave station address unit 12, a slave station address unit power supply unit CV, and an address data signal as a D + power supply superimposed common data signal line 7. , A flip-flop 65 for setting the capture timing of the first monitor signal, a flip-flop 66 for setting the capture timing of the second monitor signal, and a 3-input AND that captures the first monitor signal A gate 67, a 3-input AND gate 68 for taking in the second monitoring signal, an OR gate 69 for passing the output signal of the slave station cascade input section 12, and an output signal of the slave station cascade input section 12 as D + An output transistor 71 and an address extracting means 55 for sending between the power superimposed common data signal line 7 and the D-power superimposed common data signal line 8; Cascade input ports 59 and 72 for taking in the first and second monitoring signals and a CQout terminal for sending a CQ signal 58 to the next slave station cascade input unit 12 or slave station cascade output unit 11 as a cascade signal. .

The operation of the slave station cascade input unit 12 will be described.
The slave station unit 9 branches from the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8 and is connected to the slave station cascade input unit 12 to obtain the d0 signal 63 and the d01 signal 64. The d0 signal 63 and the d01 signal 64 are connected to the clock terminals Ck of the flip-flops 65 and 66, and set the 2-bit input signal capturing timing. In addition, two 3-input AND gates 67 and 68 which receive the dr1 signal 73 and the dr2 signal 74 which are the output signals of the d01 signal 64, the flip-flops 65 and 66, and the switch input signals from the cascade input ports 59 and 72, respectively. The dip signal 70, which is the output of the OR gate 69, is sent from the output transistor 71 to the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8.

      The D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8 are sent to the slave station as a data signal 16 which is a control signal received from the control unit by the master station. Therefore, the slave station cascade input unit 12 extracts the d0 signal 63 from the D + power supply superimposed common data signal line 7 and obtains a d01 signal 64 that is an inverted signal of the signal component d0 signal 63 via an inverter. The d01 signal 64 is connected to the ck portion of the flip-flop 65, and the flip-flop outputs a pulse by the d01 signal 64 and the ADQ signal 57. In the example of the slave station cascade input unit 12, since there are two inputs, the slave station cascade input unit 12 includes a flip-flop 65 that determines the capture timing of the cascade input port 59 and a flip-flop 66 that determines the signal capture timing shifted by one clock. .

      A sensor input signal that is a first monitoring signal of the slave station cascade input unit 12 is fetched from the cascade input port 59, and a dr1 signal 73 that is a timing signal for fetching the first monitoring signal and a signal from the master station are received. The three signals of the d01 signal 64 synchronized with the output of the three-input AND gate 67 to be received are connected to the OR gate 69. Further, a sensor input signal that is a second monitoring signal is captured from the cascade input port 72, and a dr2 signal 74 that is a timing signal for capturing the second monitoring signal is synchronized with a signal from the master station. The three signals of 64 and the output of the received three-input AND gate 68 are connected to the OR gate 69. The output of the OR gate 69 is sent as a dip signal 70 from the output transistor 71 between the D + power superimposed common data signal line 7 and the D−power superimposed common data signal line 8. The dr2 signal 74, which is the timing of the end of the operation of the slave station cascade input unit 12, is used as the CQ signal 58 for the operation of the next slave station cascade input unit 12 or slave station cascade output unit 11.

  The d01 signal 71 and the dr1 signal 73 which is the output of the flip-flop are connected to the three-input AND gate 67. The output of the three-input AND gate is the dip signal 72, and the output signal is supplied to the D + power supply via the transistor. The second monitoring signal 1Bit is transmitted to the superimposed common data signal line 7 and the D-power superimposed common data signal line 8 following the first monitoring signal 1Bit. The output of the flip-flop 66 is sent to the next slave station cascade input unit 12 or slave station cascade output unit 11 as a CQ signal 58 which is a cascade signal.

FIG. 10 is a timing chart of signals inside the slave station cascade input section.
The timing chart of the signals in the slave station cascade input unit 12 shows the transmission signal, which is the data signal 16 between the D + power superimposed common data signal line 7 and the D−power superimposed common data signal line 8, and the D + power superimposed common data. A signal between the signal line 7 and Vcg (+ 19V), a d0 signal 63, a d01 signal 64 which is an inverted signal of the d0 signal 63 after passing through an inverter, and an ADQ signal 57 which is a cascade signal generated in the slave station address portion And an in ₀ switch input signal from the cascade input port 59, an in ₁ switch input signal from the cascade input port 72, and a dr1 signal 73 that is an output signal of the flip-flop 65 that sets the timing for taking in the first monitoring signal. And a dr2 signal 74 which is an output signal of the flip-flop 66 for setting the timing of taking in the second monitoring signal At the timing when the operation of the slave station cascade input unit 12 ends, the CQ signal 58 that is a cascade signal for the operation of the next slave station cascade input unit 12 or the slave station cascade output unit 11 and the monitoring signal are used as a current signal to superimpose the D + power supply. The dip signal 70 transmitted between the common data signal line 7 and the D-power supply superimposed common data signal line 8 is shown with the horizontal axis as the time axis.

The operation of FIG. 10 which is a timing chart of each part of FIG. 9 will be described from signal waveforms. The d0 signal 63 having the same phase as the data signal 16 on the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8, which is a common data signal line, is connected to the D + power superimposed data signal line 7 via a resistor. Therefore, it is the basic signal in the slave station cascade input unit 12 that exhibits the same signal components as the signals of the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8. The d01 signal 64 is a signal after the inverter of the d0 signal 63, and therefore represents an inverted signal of the d0 signal 63. The ADQ signal 57 is transmitted as a cascade signal to the slave station cascade input section 12 following the address section of the slave station section 9 after confirming the address signal by the address extracting means. Next, a state in which the in ₀ switch input signal is taken in from the cascade input port 59 as the first monitoring signal is shown, and a state in which the in ₁ switch input signal is taken in from the cascade input port 72 as the second monitoring signal Indicates.

  The d01 signal 64 enters the Ck terminal of the flip-flop 65 that sets the timing for taking in the first monitoring signal, and the dr1 signal 73 indicates the timing at which the cascade ADQ signal 57 from the address section enters the D terminal of the flip-flop 65. To the 3-input AND gate 67. Next, when the d01 signal 64 enters the Ck terminal of the flip-flop 66 that sets the timing for taking in the second monitoring signal, and the signal at the output terminal Q of the flip-flop 65 is taken into the D terminal of the flip-flop 66, the flip-flop 66 The dr2 signal 74, which is a timing signal for taking in the second monitoring signal shifted by one clock from the flip-flop 65, is obtained at the output terminal Q of the loop 66.

The dr2 signal 74 becomes the CQ signal 58 as it is as a cascade signal.
The output signal of the slave station cascade input unit 12 is the dip signal 70, the d01 signal 64, the output signals of the flip-flops 65 and 66, the dr1 signal 73 and the dr2 signal 74, and the cascade input ports 59 and 72. The outputs of the two 3-input AND gates 67 and 68 that receive the switch input signal are received by the OR gate 69, and the output signal of the OR gate 69 is output from the output transistor 71 to the D + power superimposed common data signal line 7 and the D− power superimposed. The data is sent to the common data signal line 8. Here, the signal examples when the monitor signal input is in the “0”, “1”, “0”, “0” state for the input addresses “0”, “1”, “2”, “3”. Show.

FIG. 11 is a circuit diagram and a functional block diagram inside the slave station cascade output unit.
The slave station cascade output unit 11 includes a power supply diode and a capacitor that generate power consumed in the slave station cascade output unit 11, a power source unit CV of the slave station cascade output unit, and a control data signal as D + power superimposed common data. A circuit extracted from the signal line 7, a flip-flop 75 for setting the output timing of the first control signal, a flip-flop 76 for setting the output timing of the second output signal, and a first output signal 2 an aND gate 77 input, flip-flop 80 for holding the second output signal to output a second input of aND gate 78, the OFF-delay timer 79 to delay the output _t 0/2, the first and second output state , 81 and flip-flops 80, 81 are used as outputs of the slave station cascade output unit 11, and the two outputs for outputting the first and second outputs And power transistors, to _OUT 0, OUT ₁ terminal and, Tsuzukuko station cascade input unit 12 or the slave station cascade output unit 11 for outputting the slave station cascade output ports 60,82 for outputting the output of the output transistor to the outside, a cascade It is composed of a CQOUT terminal that outputs a CQ signal 58 as a signal.

The function and operation of each unit of the slave station cascade output unit 11 will be described.
In FIG. 11, a signal component d0 signal 63 extracted from the D + power supply superimposed common data signal line 7 obtains a d01 signal 64 which is an inverted signal of the signal component d0 signal 63 via an inverter. The d01 signal 64 is connected to the ck portion of the flip-flops 75 and 76 for setting the first and second output timings, and the CQ signal 58 or the ADQ signal 57 is connected to the D terminal of the flip-flop 75. A dr1 signal 83 which is a first output timing signal is generated from the output terminal Q of the flip-flop 75. At the same time, the dr1 signal 83 is connected to the D terminal of the flip-flop 76 in order to obtain the next second output timing signal.
Accordingly, the output terminal Q of the flip-flop 76 generates a second output timing signal dr2 signal 84 that is delayed by one cycle from the first output timing.

Next, the signal obtained by further inverting the d01 signal 64 by the inverter is connected to the first and second output timing signals dr1 signal 83 and dr2 signal 84 to the two-input AND gates 77 and 78, respectively. Furthermore, the d1 signal 85 having passed through the off-delay timer 79 of t _0/2 on a signal obtained by inverting in further inverters d01 signal 64 of each of the flip-flops 80 and 81 for holding the first and second output state Connected to the D terminal, the first and second output states OUT ₀ , OUT ₁ are connected from the respective output transistors to the cascade output ports OUT ₀ , OUT ₁ , and the LEDs are connected to the output terminals. "," Indicates that the "1" state is output. The output from the Q terminal of the flip-flop 81 outputs a CQ signal 58 that is a cascade signal of the slave station cascade output unit 11.

FIG. 12 is a timing chart of signals inside the slave station cascade output unit.
The timing chart of the signals inside the slave station cascade output unit 11 in FIG. 11 shows the transmission signal, which is the data signal 16 between the D + power superimposed common data signal line 7 and the D−power superimposed common data signal line 8, and the D + power supply. A signal between the superimposed common data signal line 7 and Vcg (+ 19V), a d0 signal 63, a d01 signal 64 which is an inverted signal of the d0 signal 63 after passing through the inverter, and a slave station cascade input section before the slave station section 9 12 or a signal CQ _in capturing a CQ signal 58 as an input signal a cascade signal generated by the slave station cascade output section 11, and the dr1 signal 83 which is a first output timing signal, a second output timing signal CQ which is a cascade signal for the operation of a certain dr2 signal 84 and the next slave station cascade input unit 12 or slave station cascade output unit 11 A signal 58, and d1 signal 85 having passed through the off-delay timer 79 of t _0/2 on a signal obtained by inverting the d01 signal 64 by an inverter, child output first and second outputs from the two output transistors The signals of the OUT ₀ and OUT ₁ terminals output from the station cascade output ports 60 and 82 are represented with the horizontal axis as the time axis.

The operation and function of FIG. 12, which is a timing chart diagram of signals in each part of FIG. 11, will be described from signal waveforms.
The d0 signal 63 having the same phase as the data signal 16 on the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8, which is a common data signal line, is connected to the D + power superimposed data signal line 7 via a resistor. And the same signal component as the signals of the D + power supply superimposed common data signal line 7 and the D− power supply superimposed common data signal line 8, and is a basic signal inside the slave station cascade output unit 11. The d01 signal 64 is a signal after the inverter of the d0 signal 63, and is therefore an inverted signal of the d0 signal 63. The CQ signal 58 is a cascade signal generated by the slave station cascade input unit 12 or the slave station cascade output unit 11.

  The d0 signal 63 is connected to the Ck terminal of the flip-flop 75, and the cascade signal CQ signal 58 taken from the previous slave station cascade input unit 12 or slave station cascade output unit 11 is connected to the D terminal of the flip-flop 75. The output of the flip-flop 75 becomes the output timing of the first output as the dr1 signal 83. The dr1 signal 83 is connected to the D terminal of the flip-flop 76 in order to generate the output timing signal of the second output, and the dr2 signal is output from the output terminal of the flip-flop 76 one clock cycle later than the dr1 signal 83. 84 is a signal waveform obtained by outputting 84.

An inverter is provided after the d01 signal 64, and this signal is input to the two AND gates 77 and 78. The output timing dr1 signal 83 and the dr2 signal 84 of the first and second outputs are connected to the respective AND gates, respectively. The outputs of the slave station cascade output unit 11 are connected to the respective Ck terminals of the flip-flops 80 and 81 latching, and an inverter is provided at each D terminal after the d01 signal 64, and this signal is passed through the off-delay timer 79. connecting d1 signal 85 is off-delay signal _t 0/2 Te. The signal waveform at this time is the d1 signal 85. The outputs of the flip-flops 80 and 81 become the signal waveforms of the cascade output ports 60 and 82 at the OUT ₀ and OUT ₁ terminals as the first and second output signal waveforms, respectively.

  FIG. 13 is a slave station cascade input unit, an air cylinder, a sensor wiring diagram, and an air piping diagram. Among automatic control devices, the reciprocating motion in the straight direction by the air cylinder 86 or the hydraulic cylinder 86 shown in FIG. 13 is widely used. In this case, cylinder position sensors 87 and 88 are used to electrically grasp the position of the cylinder, thereby controlling the solenoid valve or the like with the pneumatic pressure source or the hydraulic pressure source, and the air control piping 89. , 90 or hydraulic piping, and the cylinder shaft is controlled to a predetermined entry / exit position. The position sensor signal lines 91 and 92 are not a problem with a single pneumatic or hydraulic device. However, when performing automatic control by arranging a large number of pneumatic or hydraulic devices in a cylinder, The signal lines 91 and 92 and their input terminals are highly demanded to simplify the wiring as much as possible and to omit the wiring. Therefore, if the respective sensor inputs are D +, D−, cascade line 93 and connectors 94 and 97 are used, and terminal 95 can be provided in the middle of the wiring, wiring can be greatly omitted and wiring can be simplified. If the binding band 96 is fixed together with other wires in the middle of the wiring, the wiring can be largely omitted and the wiring can be simplified. Also, fixing to iron plate parts and cases in the wiring path by magnets is effective because it reduces wiring restrictions.

FIG. 14 shows a slave station address part, a slave station cascade input part, and a sensor arrangement diagram.
In FIG. 14, the two-input slave station cascade input unit 12 of the automatic control device having a large number of cylinders in the previous figure is connected one after another with three lines of D +, D−, and cascade line 93, and the wiring is omitted and simplified. Is.
D + power superimposing common data signal line 7 and D- power superimposing common data signal line 7 and D- power superimposing common data signal line 8 connecting the master station 6 and the slave station portion are branched into a T shape by a branch connector 101 and D + power superimposing common data signal line 7 The slave station address section 98 is connected to the common data signal line 8, and the slave station cascade input section 12 is connected to the common data signal line 8 by a three-wire cable wiring and D +, D−, cascade line 93 and a connector. Cylinder position sensors 99 and 100 are connected to the slave station cascade input section 12 by position sensor signal lines 91 and 92. Similarly, the slave station cascade input section 12 is connected to the next slave station cascade input section 12 from the connector at the other end of the slave station cascade input section 12 by a three-wire cable wiring that is D +, D−, cascade line 93, and the slave station cascade input section 12. Are connected to cylinder position sensors 99 and 100.

The connection of the slave station cascade input units 12 that require connection is repeated using the three-line cable wiring that is the D +, D−, and cascade lines 93. Further, the D + power superimposed common data signal line 7 and the D−power superimposed common data signal line 8 which are the trunk lines and the branched D + power superimposed common data signal line 7 and the D−power superimposed common data signal line 8 are connected by the branch connector 101. Branch to the mold, connect the slave station address section 98, repeat the connection of the slave station cascade input section 12 with the three-line cable wiring and connector D +, D-, cascade line 93, and send necessary monitoring data from the sensor Can be entered and aggregated to the master station.
As described above, the present invention is useful for omitting significant wiring in a system with a large number of input points, a system with a large number of similar output points (not shown), or a system with a large number of inputs and outputs. Wiring can be simplified and simplified.

FIG. 15 shows a schematic diagram of the slave station cascade input section and a plurality of air cylinder connections.
The slave station address section 98 is connected to the D + power superimposed common data signal line 7 and the D− power superimposed common data signal line 8 that connect the master station 6 and the slave station section 9, and the three lines D +, D−, and the cascade line 93 are connected. Is connected to the terminal 95 which is the slave station cascade input section 12 by the cable wiring and connector of the above, and is connected to the terminal 95 by the position sensor signal lines 91 and 92 to detect the cylinder position of the air cylinder 86 and The station cascade output unit 11 is attached, and the air cylinder is controlled via the air control pipes 89 and 90. By monitoring the number of slave station cascade input units 12 equal to the number of air cylinders to be controlled with D +, D−, and the three-line cable wirings that are cascade lines 93 and connectors, the position of the cylinders can be monitored. The solenoid valve can be controlled by the cascade output unit 11. The wiring in this case is a three-line cable wiring that is D +, D−, and a cascade line 93, and the system can be completed with simple and easy wiring work. Further, since the terminal 95 which is the slave station cascade input unit 12 can be incorporated in the wiring path by other wiring and a binding band, the entire system can be reduced in size, and at the same time, the sensors to be monitored are constant. Even if they are arranged at intervals or at random, the wiring is simply repeated, and the efficiency of wiring work, the omission of wiring, and the miniaturization can be realized.

Although not shown in the figure, the slave station cascade output unit 11 and the slave station cascade input unit 12 are paired to form a transmissive sensor with the output side emitting light and the input side receiving light, and by combining a plurality of the above pairs. An information data collection system ranging from one dimension to multiple dimensions can be realized. In this case, compared with multi-dimensional analysis by image analysis, an inexpensive multi-dimensional information input device can be realized because it is simple and can be freely performed without restriction on the sensor position or the projection position. For example, when products of different shapes flow in a conveyor line in which a product flows while drawing a curve, the multidimensional information data collection system is used even if the product shape is large or small and has a complicated shape. Therefore, it is possible to collect the three-dimensional shape (three-dimensional information) of the object easily and inexpensively, and by collecting the three-dimensional shape (three-dimensional information) of the object again at a distance, four-dimensional information such as time and speed can be obtained. It can be obtained easily and inexpensively. In a system using a camera, if a blind spot occurs in the field of view or if a further camera is provided to prevent this, the cost will increase significantly. However, if the sensor system is used, it can be freely arranged according to the physical distribution route. Therefore, a sensor system that is easy to use and inexpensive can be constructed.
Such a three-dimensional (three-dimensional data) or four-dimensional (three-dimensional data temporal change) information collection system is not limited to physical distribution monitoring, but also for systems that perform intrusion monitoring in security systems and shape and speed monitoring in traffic systems. Can be widely applied.

1 shows a system of a plurality of slave station cascade input units and a plurality of slave station cascade output units in the present invention. The signal timing chart figure of the system of the some slave station cascade input part in this invention, and several slave station cascade output part is shown. 2 shows functional blocks inside the master station in the present invention. The functional block and wiring diagram inside the master station are shown. The timing chart figure of each signal inside a master station is shown. It is an internal wiring diagram and a functional block diagram of a slave station part. It is a functional block diagram of a slave station address part. It is a timing chart figure of a slave station address part. It is the circuit diagram and functional block diagram inside a slave station cascade input part. It is a timing chart figure of the signal inside a slave station cascade input part. It is the circuit diagram and functional block diagram inside a slave station cascade output part. It is a timing chart figure of the signal inside a slave station cascade output part. It is a slave station cascade input part, an air cylinder, a sensor wiring diagram, and an air piping diagram. A slave station address part, a slave station cascade input part, and a sensor arrangement diagram are shown. The schematic diagram of a slave station cascade input part and several air cylinder connection is shown.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Control part 2 Output unit 3 Input unit 4 Control output signal 5 Control input signal 6 Master station 7 D + Power supply superimposition common data signal line 8 D-Power supply superposition common data signal line 9 Child station part 10 Slave station address part 11 Slave station cascade output Unit 12 Slave station cascade input unit 13 Controlled unit 14 Sensor unit 15 Cascade signal 16 Data signal 17 Monitoring data signal 18 Is current signal 19 Crystal oscillation circuit 20 Input data unit 21 Output data unit 22 Master station address setting unit 23 Timing generation unit 24 control data generation means 25 master station output section 26 DC power supply 27 line driver 28 transmission bleeder current circuit 29 monitoring data extraction means 30 monitoring signal detection means 31 master station input sections 32, 34 external signal connection section (D + side)
33, 35 External signal connection (D-side)
36 Input port i number “0”
37 Input port i number “31”
38 Output port p number “0”
39 Output port p number “31”
40 Inverter 41 Dck clock signal 42 Dops signal 43 ST signal 44 Dick data input clock signal 45 Diis data input monitoring signal 46 Pck signal 47 Diip signal 48 Ip signal current 49 Is current signal 50 Iis current signal 51 4CK signal 52 Preset signal terminal 53 END signal 54 Address setting means 55 Address extraction means 56 Control data signal extraction means 57 ADQ signal 58 CQ signals 59 and 72 Cascade input ports 60 and 82 Cascade output ports 61 Slave station address section power supply section 62 Power supply diode 63 d0 signal 64 d01 Signals 65, 66, 75, 76, 80, 81 Flip-flops 67, 68, 77, 78 AND gate 69 OR gate 70 dip signal 71 Output transistors 73, 83 dr1 signals 74, 84 dr Signal 79 Off-delay timer 85 d1 signal 86 Air cylinder 87, 88, 99, 100 Cylinder position sensor 89, 90 Air control piping 91, 92 Position sensor signal line 93 D +, D-, Cascade line 94, 97 Connector 95, 88 Terminal 96 Bundling band 98 Slave station address part 101 Branch connector

Claims (6)

The master station receives the output signal from the output unit of the control unit,
Further, the master station has an interface for sending the output signal of the master station to the input unit of the control unit, and the master station and the plurality of slave stations are connected by a common data signal line in which power is superimposed. The control signal from the master station is sent to the controlled part as the control signal from the output part of the slave station part through the common data signal line superimposed on the power supply, or the monitoring signal from the sensor part is sent to the slave station part. In the control system that takes in from the slave station input unit and transmits to the master station via the common data signal line superimposed on the power source,
Each of the slave station units is a single or multiple slave station cascade input unit cascaded to the slave station address unit and the slave station address unit, or a single or multiple cascaded to the slave station address unit The slave station cascade output section or a single or multiple slave station cascade input section cascaded to the slave station address section or a mixture of both single or multiple slave station cascade output sections ,
Each of the slave station address section and the slave station cascade input section, the slave station cascade output section, or both the slave station cascade input section and the slave station cascade output section are connected to the common data signal line superimposed on the power source, respectively. Connected
Each of said slave stations cascade input unit or slave station cascade output unit, the slave station cascade input of each subsequent cascade signal output from the slave station address unit to the slave station address unit, or slave station The slave cascade input unit that sequentially transfers to the cascade output unit and receives the cascade signal receives the monitor signal from the sensor unit via the common data signal line on which the power is superimposed at the timing of the cascade signal. The slave station cascade output unit that receives the cascade signal transmits the control signal transmitted from the master station via the common data signal line superimposed with the power supply at the timing of the cascade signal. Take in, send to the controlled unit, control the controlled unit, and the master station and the single or multiple slave station units are common to the power supply superimposed The slave station unit is connected by a data signal line, and in the slave station unit, a cascade signal sent from the slave station address unit is sequentially connected to the slave station address unit by a cascade signal line. or a single or connected to a plurality of said slave stations cascade output unit, a plurality of said monitoring signals or communication a plurality of said control signals to and from said master station through a common data signal line and the power line Terminal system characterized by controlling   In Claim 1, since all the slave station parts have a slave station address part, the slave station cascade input part that follows the slave station address part or the slave station part that has the slave station cascade output part is overlapped with a power source. It is possible to freely branch connection to the data signal line, and by passing successive cascade signals to the subsequent slave station cascade input unit or the slave station cascade output unit, a plurality of slave station cascade input units or A terminal system, characterized in that the slave station cascade output section can be added.   In Claim 1, 2, after performing the wiring branch of the common data signal line, the attached slave station address unit or slave station cascade input unit or slave station cascade output terminal using the binding band of the wiring A terminal system characterized in that it can be arbitrarily fixed on a wiring route or stored in a wiring duct, so that the place where the terminal system is installed is not restricted.   4. The terminal system according to claim 1, wherein after the wiring is branched, a part of the attached terminal has a magnet, and the magnet is attracted and fixed to an iron plate component near the wiring path by the magnet.     2. The two-dimensional information is captured using two or a plurality of slave station cascade inputs, or the three-dimensional information is captured using three or a plurality of slave station cascade inputs, or a plurality of slave station cascades. A terminal system characterized in that multidimensional information is captured using an input unit.     2. The output of two-dimensional information using two or a plurality of slave station cascade output units, the output of three-dimensional information using a three or a plurality of slave station cascade input units, or a plurality of slave station cascades according to claim 1. A terminal system that outputs multidimensional information using an output unit.

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