JP4762621B2 - Method for manufacturing micro electromechanical device - Google Patents

Description

  The present invention relates to a microelectromechanical device formed on an insulating substrate and a manufacturing method thereof.

  In recent years, research on micro mechanical systems called MEMS has been actively conducted. MEMS (Micro Electro Mechanical System) is an abbreviation for a microelectromechanical system, and is sometimes simply called a micromachine. A micromachine generally refers to a microdevice in which “a microstructure having a three-dimensional structure and a movable microstructure” and “an electronic circuit having a semiconductor element” are integrated using a semiconductor microfabrication technique. Unlike the semiconductor element, the microstructure has a three-dimensional structure and has a movable portion. And it has the function of a switch, a variable capacitor, or an actuator.

  Micromachines can control their microstructures with electronic circuits, so they are not a central processing control type as with conventional computer-based devices. It is thought that it is possible to build an autonomous decentralized system that performs a series of actions to take action through the.

  A lot of research has been done on micromachines. For example, an improved MEMS wafer level package has been proposed with the object that the manufacturing process cannot be compatible with wafer manufacturing and plastic assembly facilities (see Patent Document 1).

Further, there is a document relating to a thin-film crystallized mechanical device and an electromechanical device called MEMS (see Patent Document 2). Patent Document 2 lists amorphous materials, nanocrystalline materials, microcrystalline materials, and polycrystalline materials as thin film starting materials, including silicon, germanium, silicon germanium, anisotropic dielectric materials, and anisotropic piezoelectric materials. Body materials, copper, aluminum, tantalum, and titanium are listed. An amorphous thin film silicon layer is formed on the surface of the glass substrate and crystallized. In crystallization, it is described to control laser irradiation to achieve internal crystallinity that produces desirable mechanical properties.
JP 2001-144117 A Japanese Patent Laid-Open No. 2004-1201

  As described in Patent Document 1, a microstructure constituting a micromachine is manufactured by a semiconductor element manufacturing process using a silicon wafer. In particular, in order to obtain a material having a thickness and strength sufficient for manufacturing a microstructure, a micromachine that is put into practical use is mainly manufactured using a silicon wafer.

  In view of mass productivity of micromachines having a minute structure, reduction in manufacturing cost is desired. Therefore, a method for integrally forming a microstructure and a semiconductor element that controls the microstructure is desired. However, in the case where the microstructure and the semiconductor element are formed integrally, a process different from the manufacturing process of the semiconductor element, such as etching of the sacrificial layer, is necessary, and the process becomes complicated.

  Patent Document 2 only describes a cantilever using an amorphous thin-film silicon layer formed on the surface of a glass substrate.

  Therefore, an object of the present invention is to provide a microstructure manufactured at low cost and an apparatus having the microstructure.

  In view of the above problems, the present invention is characterized in that a microstructure is formed using a thin silicon layer over an insulating substrate. Such a silicon layer can also be applied to a semiconductor element that controls a microstructure, and these can be formed over an insulating substrate. The silicon layer is preferably a polycrystalline silicon layer crystallized using a metal. The present invention can provide a micromachine (hereinafter referred to as a semiconductor device or a microelectromechanical device) having the microstructure formed as described above.

  The specific configuration of the present invention will be described below.

  One embodiment of the present invention is a second layer including a first layer provided on an insulating surface and a polycrystalline silicon layer which is provided on the first layer so as to be rotatable and is crystallized using metal. A microelectromechanical device including a microstructure having

  Another embodiment of the present invention is a first layer provided on an insulating surface, and a polycrystalline silicon layer provided in a cross shape so as to be rotatable on the first layer and crystallized using a metal And a third layer including a polycrystalline silicon layer which is provided on the first layer and at the tip of the cross of the second layer and is crystallized using a metal. A microelectromechanical device including a microstructure.

  Another embodiment of the present invention is a second layer including a first layer provided on an insulating surface and a polycrystalline silicon layer provided on the first layer so as to be rotatable and crystallized using metal. And a micro structure having a space provided between the first layer and the second layer.

  Another embodiment of the present invention is a first layer provided on an insulating surface, and a polycrystalline silicon layer provided in a cross shape so as to be rotatable on the first layer and crystallized using a metal A second layer including a third layer including a polycrystalline silicon layer provided on a tip of a cross of the second layer on the first layer and crystallized using a metal; A microelectromechanical device comprising a microstructure having a layer and a space provided between the second layer.

  In the present invention, the space is provided by removing a sacrificial layer provided between the first layer and the second layer. Therefore, the sacrificial layer includes a layer containing a metal, a metal compound, silicon oxide, or silicon nitride. Since the sacrificial layer is removed by wet etching or dry etching, the sacrificial layer has a sufficient selectivity with respect to polycrystalline silicon.

  Another embodiment of the present invention is a second layer including a first layer provided on an insulating surface and a polycrystalline silicon layer provided on the first layer so as to be rotatable and crystallized using metal. The second layer is a microelectromechanical device characterized in that the second layer includes an insulating surface or a portion that is not in contact with the first layer and includes a microstructure that is rotatable.

  Another embodiment of the present invention is a second layer including a first layer provided on an insulating surface and a polycrystalline silicon layer provided on the first layer so as to be rotatable and crystallized using metal. And a fourth layer including a polycrystalline silicon layer which is rotatably provided on the second layer and is crystallized using a metal. It is.

Another embodiment of the present invention is a second layer including a first layer provided on an insulating surface and a polycrystalline silicon layer provided on the first layer so as to be rotatable and crystallized using metal. And a fourth layer including a polycrystalline silicon layer crystallized using a metal, which is rotatably provided on the second layer, and is provided between the second layer and the fourth layer. A microelectromechanical device characterized by including a microstructure having an open space.

  Another embodiment of the present invention is a second layer including a first layer provided on an insulating surface and a polycrystalline silicon layer provided on the first layer so as to be rotatable and crystallized using metal. And a fifth layer provided on the second layer and including a polycrystalline silicon layer crystallized using a metal and provided with an opening, and a genus provided on the fifth layer. A sixth layer including a polycrystalline silicon layer crystallized by using the fourth layer, and the fourth layer is an axis located at the opening of the third layer, and is fixed to the second layer at the bottom surface of the fourth layer. And the upper part of the 4th layer is a micro electromechanical device characterized by including the microstructure which has an area larger than the opening provided in the 3rd layer.

Another embodiment of the present invention is a second layer including a first layer provided on an insulating surface and a polycrystalline silicon layer provided on the first layer so as to be rotatable and crystallized using metal. And a fifth layer provided on the second layer and including a polycrystalline silicon layer crystallized using a metal and provided with an opening, and a genus provided on the fifth layer. A sixth layer including a polycrystalline silicon layer crystallized using the sixth layer, the sixth layer being an axis located at the opening of the fifth layer, and being fixed to the second layer at the bottom surface of the sixth layer In addition, the upper part of the sixth layer has an area larger than the opening provided in the fifth layer, and the fifth layer includes a microstructure that is rotatable by a shaft. Device.

  In the present invention, thermal crystallization or laser crystallization is used for crystallization of the polycrystalline silicon layer.

  In one embodiment of a method for manufacturing a microelectromechanical device of the present invention, a layer having amorphous silicon is formed over an insulating surface, and the amorphous silicon is crystallized using metal to form polycrystalline silicon. The polycrystalline silicon is patterned to have a rotatable structure, and a space is formed above or below the layer having polycrystalline silicon.

  In another embodiment of the manufacturing method of the present invention, a layer having amorphous silicon is formed over an insulating surface, and the amorphous silicon is crystallized using metal to form polycrystalline silicon, and the polycrystalline silicon is rotated. Patterning is performed so as to have a free structure, a layer having a conductive layer or an insulating layer is formed over the layer having polycrystalline silicon, and the layer having a conductive layer or an insulating layer is removed.

  In another embodiment of the manufacturing method of the present invention, a conductive layer or a layer having an insulating layer is formed over an insulating surface, and a layer having amorphous silicon is formed over a sacrificial layer. It is characterized in that it is crystallized to form polycrystalline silicon, and the polycrystalline silicon is patterned so as to have a rotatable structure, and a layer having a conductive layer or an insulating layer is removed.

  In another embodiment of the manufacturing method of the present invention, a first layer is formed over an insulating surface, a second layer including polycrystalline silicon is formed over the first layer, and a conductive layer or an insulating layer is formed over the second layer. Forming a layer having a layer, forming a third layer having amorphous silicon on the layer having a conductive layer or an insulating layer, and crystallizing the amorphous silicon using a metal to form polycrystalline silicon; The polycrystalline silicon is patterned to have a rotatable structure, and a layer having a conductive layer or an insulating layer is removed.

  In another embodiment of the manufacturing method of the present invention, a first layer is formed over an insulating surface, a second layer including polycrystalline silicon is formed over the first layer, and a conductive layer or an insulating layer is formed over the second layer. Forming a layer having a layer, forming a third layer having amorphous silicon on the layer having a conductive layer or an insulating layer, and crystallizing the amorphous silicon using a metal to form polycrystalline silicon; Patterning the polycrystalline silicon so as to be rotatable, forming an opening in the third layer, and introducing an etchant through the opening to remove the layer having the conductive layer or the insulating layer; Features.

  In another embodiment of the manufacturing method of the present invention, a first layer is formed over an insulating surface, a second layer including polycrystalline silicon is formed over the first layer, and a conductive layer or an insulating layer is formed over the second layer. Forming a layer having a layer, forming a third layer having amorphous silicon on the layer having a conductive layer or an insulating layer, and crystallizing the amorphous silicon using a metal to form polycrystalline silicon; Polycrystalline silicon is patterned to have a rotatable structure, and a layer having a conductive layer or an insulating layer is removed to form a portion where the second layer and the insulating surface or the first layer are not in contact with each other. It is characterized by that.

  In the present invention, an alloy of silicon and metal may be formed without removing the metal.

  In the microelectromechanical device of the present invention, a microstructure and a semiconductor element that controls the microstructure can be integrally formed over an insulating substrate.

  The present invention can provide a microstructure that can withstand external force and stress and can control conductivity by using polycrystalline silicon crystallized using a metal for a structure layer of the microstructure. In addition, the present invention can provide a semiconductor device in which a microstructure and a semiconductor element are integrally formed by using polycrystalline silicon crystallized using a metal for a structural layer. As a result, a microstructure having a lower cost than that of a microstructure formed on a silicon wafer can be provided.

  Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description. It will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the following embodiments and examples. Note that in describing the structure of the present invention with reference to the drawings, the same portions are denoted by the same reference numerals in different drawings.

(Embodiment 1)
In this embodiment mode, a microstructure and a manufacturing method thereof according to the present invention will be described with reference to drawings. In the drawings, (A) shows a top view, and (B) shows a cross-sectional view in a top view OP.

  First, a substrate (hereinafter referred to as an insulating substrate) 101 having an insulating surface is prepared (see FIG. 1A). The insulating substrate is a glass substrate, a quartz substrate, a plastic substrate, or the like. By forming a microstructure on a plastic substrate, a highly flexible and thin semiconductor device can be formed. In addition, a thin semiconductor device can be formed by thinning the glass substrate by polishing or the like. Furthermore, the microstructure of the present invention can be formed over a conductive substrate such as a metal or a substrate in which an insulating layer is formed over a semiconductor substrate such as silicon.

  A base film 102 is formed over the insulating substrate 101 (see FIG. 1A). The base film 102 has an oxide layer containing silicon (silicon oxide) or a nitride containing silicon (silicon nitride), for example, an insulating layer such as a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer in a single layer or a stacked structure. Can be formed. Although the case where a two-layer structure is used as the base film 102 is described in this embodiment mode, the base film 102 may have a single-layer structure or a stacked structure of three or more layers.

As a first layer of the base film 102, a CVD method is used to form a silicon oxynitride layer formed using SiH ₄ , NH ₃ , N ₂ O, and H ₂ as reaction gases in a thickness of 10 to 200 nm (preferably 50 to 100 nm). In this embodiment mode, a silicon oxynitride layer with a thickness of 50 nm is formed. Next, as the second layer of the base film 102, a CVD method is used, and a silicon oxynitride layer formed using SiH ₄ and N ₂ O as a reaction gas is laminated to a thickness of 50 to 200 nm (preferably 100 to 150 nm). In this embodiment, a silicon oxynitride layer with a thickness of 100 nm is formed.

  Next, the first structure layer 103 which forms the microstructure is formed. The first structural layer 103 can be formed using a thin semiconductor layer. In this embodiment mode, the first structure layer 103 is formed using a layer containing a semiconductor material containing silicon (a silicon layer). Then, a silicon layer is formed and patterned into a predetermined shape to form the first structure layer 103 (see FIGS. 1A and 1B). In this embodiment, the silicon layer is patterned in a circular shape. By patterning in a circular shape, a rotatable structure layer can be provided. Needless to say, a structure that rotates without being limited to a circular shape can be provided.

  The silicon layer can be formed from a semiconductor material having silicon. Examples of the semiconductor material containing silicon include a silicon material and a silicon germanium material having germanium in an amount of about 0.01 to 4.5 atomic%.

Further, in the case where conductivity is required for the structural layer, an impurity element such as phosphorus, arsenic, or boron can be added. An impurity region may be formed by adding such an impurity element. The impurity region can be formed by forming a resist mask by photolithography and adding an impurity element. The impurity element can be added by an ion doping method or an ion implantation method. Typically, phosphorus (P) or arsenic (As) is used as the impurity element imparting N-type, and boron (B) is used as the impurity element imparting p-type. In the n-type impurity region and the p-type impurity region, an impurity region to which an impurity element imparting n-type conductivity is added in a concentration range of 1 × 10 ²⁰ to 1 × 10 ²¹ / cm ³ can be formed. Such a structure having conductivity is suitable for a semiconductor device in which a microstructure is controlled by an electrostatic force. Of course, the microstructure may be controlled by electromagnetic force.

  After the impurity region is formed, heat treatment may be performed to activate the impurity element. The heat treatment may be performed under the conditions described above.

  Thus, by forming the structural layer with a thin film made of a silicon layer, it can be formed very thin compared to the case of using a wafer. Further, since such a structural layer can be formed over an insulating substrate, production cost can be reduced.

  Next, a sacrificial layer 104 is formed and patterned into a predetermined shape (see FIGS. 1A and 1B). In this embodiment mode, patterning is performed so as to form a cross shape. The sacrificial layer 104 is a metal such as titanium (Ti), aluminum (Al), molybdenum (Mo), tungsten (W), etc., an oxide containing silicon or a nitride containing silicon, or a metal that is a compound of the metal and silicon. It can be formed by using a compound as a material and using a sputtering method, a CVD method, or the like. For patterning, a resist mask is formed using a photolithography method, and anisotropic dry etching is performed.

  A space is provided by removing such a sacrificial layer. That is, the sacrificial layer refers to a layer that is removed in a later step. Therefore, the sacrificial layer may be a material to be removed, and may be a conductive material or an insulating material.

  The thickness of the sacrificial layer 104 can be determined in consideration of various factors such as the material of the sacrificial layer 104, the structure and operation method of the microstructure, and the etching method for removing the sacrificial layer. For example, if the sacrificial layer 104 is too thin, the etching agent does not diffuse and is not etched, and the structure layer formed on the sacrificial layer 103 buckles after etching. Furthermore, when the microstructure is operated with an electrostatic force, the sacrificial layer may be too thick to be driven. Therefore, when driving by electrostatic force, the sacrificial layer 104 preferably has a thickness of, for example, 0.5 μm to 3 μm and preferably 1 μm to 2.5 μm.

  It is difficult to form a sacrificial layer having such a film thickness thick at a time. In particular, if a material having a large internal stress is used as a material for the sacrificial layer, it becomes difficult to form a thick film at a time. In such a case, the sacrificial layer can be formed thick by repeating film formation and patterning. That is, the sacrificial layer may have a single layer structure or a laminated structure.

In particular, when an insulating layer made of an inorganic material is used for the sacrificial layer 104, the surface of the formation surface is preferably oxidized or nitrided. As a means for such oxidation or nitridation, there is a high density plasma treatment. The high-density plasma treatment means that the plasma density is 1 × 10 ¹¹ cm ⁻³ or more, preferably 1 × 10 ¹¹ cm ⁻³ to 9 × 10 ¹⁵ cm ⁻³ , such as a microwave (for example, a frequency of 2.45 GHz). This is plasma processing using high frequency. When plasma is generated under such conditions, the low electron temperature is changed from 0.2 eV to 2 eV. As described above, high-density plasma characterized by a low electron temperature has low kinetic energy of active species, so that a film with less plasma damage and fewer defects can be formed.

  A substrate formed up to the first structural layer 103 is placed in a film formation chamber capable of such plasma treatment, and the distance between an electrode for plasma generation, a so-called antenna, and an object to be formed is 20 mm to 80 mm, preferably The film forming process is performed at 20 mm to 60 mm. Such a high-density plasma treatment can realize a low-temperature process (substrate temperature of 400 ° C. or lower). Therefore, plastic can be used as the insulating substrate 101 as well as glass with low heat resistance.

  The film formation atmosphere of such an insulating layer can be a nitrogen atmosphere or an oxygen atmosphere. The nitrogen atmosphere is typically a mixed atmosphere of nitrogen and a rare gas, or a mixed atmosphere of nitrogen, hydrogen, and a rare gas. As the rare gas, at least one of helium, neon, argon, krypton, and xenon can be used. The oxygen atmosphere is typically a mixed atmosphere of oxygen and a rare gas, a mixed atmosphere of oxygen, hydrogen, and a rare gas, or a mixed atmosphere of dinitrogen monoxide and a rare gas. As the rare gas, at least one of helium, neon, argon, krypton, and xenon can be used.

  The sacrificial layer formed in this way is dense with little damage to other coatings. An insulating layer formed by high-density plasma treatment can improve an interface state in contact with the insulating layer. For example, when the sacrificial layer 104 is formed using high-density plasma treatment, the interface state with the formation surface can be improved. By forming such an insulating layer as a sacrificial layer over the structural layer, damage to the microstructure can be reduced.

  Although the case where high-density plasma treatment is used for forming the sacrificial layer has been described here, the semiconductor layer may be subjected to high-density plasma treatment. The semiconductor layer surface can be modified by high-density plasma treatment. As a result, the interface state can be improved, and the electrical characteristics of the semiconductor element can be improved.

  Further, high-density plasma treatment can be used not only for the sacrificial layer 104 but also for the base film 102.

  Then, the second structural layer 105 is formed over the sacrificial layer 104. The second structural layer 105 is formed from a silicon layer and patterned into a predetermined shape (see FIG. 1B). In the present embodiment, there are four T-shaped second structure layers 105 extending in the cross direction (in which the width of the tip is wide), and the second structure layer 105 is provided at the tip of the T-shaped structure layer. Patterning is performed so that part of the structural layer 105 is provided (see FIG. 1A). In other words, a cross-shaped second structural layer 105 and a structural layer formed of the same material as the second structural layer 105 are provided in an outer region thereof.

  A part of the second structural layer 105 provided at the tip of the T shape can function as an electrode for supplying electric power for rotating the second structural layer 105 extending in a cross shape. The adjacent regions of the second structural layer 105 that functions as an electrode and the T-shaped second structural layer 105 each have an arc when viewed from above.

  In other words, the shape of the second structural layer 105 is, in other words, a first region of a circle provided at the center, a second region provided outside the first region, a first region, and a second region. It can be expressed as having a region connecting.

  In the cross-sectional view shown in FIG. 1B, the second structural layer 105 has a structure having openings above both end regions of the sacrificial layer 104, and the sacrificial layer 104 is formed in the openings. Is exposed (see FIG. 1B).

  However, in the present invention, the second structure layer 105 is not limited to the structure shown in FIG. 1 as long as it can move.

  As the second structural layer 105, a material similar to that of the first structural layer 103 and a material having a similar crystal structure can be used. In this embodiment mode, a thin silicon layer is used as in the first structure layer 103.

  In the case where the second structure layer 105 needs to have conductivity, an impurity element may be formed by adding an impurity element similarly to the first structure layer 103. After such an impurity region is formed, the impurity element may be activated. The activation means is the same as the crystallization means.

  The second structural layer 105 can have a stacked structure similar to the first structural layer 103 in order to obtain a necessary thickness.

  The material and the film thickness of the second structural layer 105 are the adhesion to the first structural layer 103, the thickness of the sacrificial layer 104, the material of the second structural layer 105, the structure of the microstructure, or It can be determined in consideration of various factors such as a method for etching the sacrificial layer. Further, when the second structural layer 105 is formed thick, a distribution is generated in internal stress, which causes warpage and buckling. On the other hand, if the thickness of the second structural layer 105 is small, the microstructure may be buckled by the surface tension of the solution used at the time of sacrifice layer etching. In consideration of these, the thickness of the second structural layer 105 can be determined, and the thickness of the second structural layer 105 is preferably 1 μm or more.

  In addition, if a material having a large internal stress distribution difference is used as the material of the second structural layer 105, the second structural layer 105 may be warped. It is also possible to construct a body.

  Next, the sacrificial layer 104 is removed by etching (see FIGS. 2A and 2B). As an etching method, there are a wet etching method and a dry etching method. Etching of the sacrificial layer 104 can be performed by an etching agent and an etching method suitable for the material of the sacrificial layer. Then, the sacrificial layer can be removed by introducing an etchant into the opening provided in the second structure layer 105.

  For example, when the sacrificial layer is tungsten (W), the sacrificial layer is immersed in a solution in which 28% ammonia and 31% hydrogen peroxide solution are mixed at a ratio of 1: 2 for about 20 minutes. When the sacrificial layer is silicon dioxide, buffered hydrofluoric acid in which ammonium fluoride is mixed in a ratio of 7 to 49% aqueous solution 1 of hydrofluoric acid is used.

  When drying after wet etching, in order to prevent the microstructure from buckling due to capillarity, rinse with a low-viscosity organic solvent (for example, cyclohexane), or dry under low temperature and low pressure conditions, or both Combined processing can be performed.

The sacrificial layer can be dry-etched using F ₂ or XeF ₂ under high pressure conditions such as atmospheric pressure. In order to prevent the microstructure from buckling due to capillary action, plasma treatment for imparting water repellency to the surface of the microstructure can also be performed.

  By removing the sacrificial layer 104 using such a process, the microstructure 106 can be manufactured.

  The microstructure 106 has a structure in which the second structure layer 105 is not fixed to the substrate or the first structure layer 103 bonded to the substrate by removing the sacrificial layer 104, an electrostatic force, or the like. It becomes the structure which is not touched by. That is, the second structural layer 105 can be maintained and rotated without being fixed to the first structural layer 103 by electrostatic force. Such a structure can be expressed as a gear structure. Due to the gear structure, the second structural layer 105 can move. In particular, the rotating structure as in the present embodiment can be expressed as a rotating body.

  In the case where the microstructure 106 is moved by an electrostatic force, a conductive layer 110 used as a common electrode, a control electrode, or the like may be formed under the base film 102 (see FIG. 11A). In the case where the base film 102 has a stacked structure, the conductive layer 110 can be formed between the base films 102 (see FIG. 11B). The conductive layer 110 can be formed by a CVD method, a sputtering method, or the like using a metal such as tungsten or a conductive material as a material. Further, it can be selectively formed by patterning into a predetermined shape as required. For example, the conductive layer 110 is formed only below the electrode for controlling the microstructure having a gear structure. Such a conductive layer 110 can be referred to as a lower electrode.

  In the case where the microstructure 106 is moved by an electrostatic force, a conductive layer that is bonded to the first structure layer 103 may be formed at the same time as the fabrication of the microstructure 106. As such a conductive layer, in addition to a metal material, a material made of Si and whose conductivity is increased only by doping or silicidation can be used.

  Since the second structure layer 105 manufactured in this manner is not fixed to the substrate or another layer, the second structure layer 105 can be moved independently of the substrate. For example, the second structural layer 105 can be rotated or translated, that is, can move.

  In the layer constituting the microstructure 106 described above, in the case of a pattern having corners when viewed from the upper surface, patterning is preferably performed so that the corner portions are rounded. The same applies to the sacrificial layer that is removed later.

  FIG. 12 is a top view corresponding to FIG. 2A and shows a state in which the corners of the pattern of the second structural layer 105 are rounded. By patterning in such a rounded state, the generation of dust can be suppressed and the yield can be improved. In addition, cracks that cause destruction are less likely to occur.

  Further, the low friction layer 111 can be formed on the first structural layer 103. (See FIGS. 6A and 6B). After the sacrificial layer is removed, the second structural layer 105 does not float, but is placed on the first structural layer 103 by gravity, and the first structural layer 103, the second structural layer 105, Can cause friction. In addition to gravity, the adjacent layers are touched by electrostatic force and van der Waals force. Therefore, by providing the low friction layer, the friction between the rotating body and the layer in contact with the rotating body can be reduced. For the low friction layer 111, a material containing silicon such as silicon nitride or silicon carbide formed by a CVD method, a sputtering method, or the like, or diamond-like carbon (DLC) can also be used. For example, a silicon oxynitride layer (composition ratio Si = 32%, O = 59%, N = 7%, H = 2%) is formed with a thickness of 115 nm by a CVD method. Since silicon nitride has little friction and is not easily worn, the friction between the rotating second structural layer 105 and the first structural layer 103 can be reduced, and the resistance can be reduced. In addition, the rotating microstructure 106 can be protected by the low friction layer 111. In particular, since the low friction layer 111 using DLC is dense, the protective function is high and preferable.

  The present invention is characterized by using a thin film for a structural layer formed on an insulating substrate, and is not limited to other configurations. For example, although the second structural layer 105 is formed over the sacrificial layer 104 in the above process, an insulating layer may be formed over the sacrificial layer 104 and then the second structural layer 105 may be formed. It is.

  In this manner, by forming the insulating layer between the sacrificial layer 104 and the second structural layer 105, the second structural layer 105 is protected by the insulating layer when the sacrificial layer 104 is removed, Damage to the second structural layer 105 can be reduced.

  In the method for manufacturing the microstructure 106 described above, an appropriate combination of the material for the first structural layer 103, the second structural layer 105, the material for the sacrificial layer 104, and an etchant for removing the sacrificial layer is used. Can be determined. For example, when a specific etching agent is determined, the sacrificial layer 104 may be formed using a material having a higher etching rate than the materials of the first structural layer 103 and the second structural layer 105.

  Thus, the present invention can produce a microstructure having a gear structure on an insulating substrate. As a result, a microstructure having a lower cost than that of a microstructure formed on a silicon wafer can be provided.

(Embodiment 2)
As the silicon layer applied to the first structure layer or the second structure layer described in the above embodiment, a silicon layer having a crystalline state or an amorphous state can be used. Therefore, in this embodiment mode, a case where polycrystalline silicon crystallized using a metal is used for the structural layer will be described.

  First, an amorphous silicon layer is formed over a formation surface on which the first structural layer 103 and the second structural layer 105 are formed, and crystallized using a metal.

  For the heat treatment, a heating furnace, laser irradiation, irradiation of light emitted from a lamp (hereinafter referred to as lamp annealing), or a combination thereof can be used.

In the case of using laser irradiation as the heat treatment, a continuous wave laser beam (CW laser beam) or a pulsed laser beam (pulse laser beam) can be used. As the laser beam, Ar laser, Kr laser, excimer laser, YAG laser, Y ₂ O ₃ laser, YVO ₄ laser, YLF laser, YAlO ₃ laser, glass laser, ruby laser, alexandrite laser, Ti: sapphire laser, copper vapor A laser or a gold vapor laser oscillated from one or a plurality of types can be used. By irradiating the fundamental wave of such a laser beam and the second to fourth harmonics of the fundamental wave, a crystal having a large grain size can be obtained. For example, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) can be used. Energy density of the laser is about 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation is performed at a scanning speed of about 10 to 2000 cm / sec.

  The continuous wave fundamental laser beam and the continuous wave harmonic laser beam may be irradiated, or the continuous wave fundamental laser beam and the pulsed harmonic laser beam may be irradiated. You may do it. By irradiating a plurality of laser beams, energy can be supplemented with each other.

  It is also possible to use a pulse oscillation type laser beam that oscillates the laser at an oscillation frequency that allows irradiation of the next pulse of laser light after the semiconductor layer is melted by the laser light and solidifies. it can. By oscillating the laser beam at such a frequency, crystal grains continuously grown in the scanning direction can be obtained. A specific oscillation frequency of the laser beam is 10 MHz or more, and a frequency band that is significantly higher than a frequency band of several tens to several hundreds Hz that is normally used is used.

When a heating furnace is used as another heat treatment, the amorphous semiconductor layer is heated at 400 to 550 ° C. for 2 to 20 hours. At this time, the temperature may be set in multiple stages in the range of 400 to 550 ° C. so that the temperature gradually increases. In the first heating process at about 400 ° C., hydrogen and the like of the amorphous semiconductor layer are generated, so that film roughness during crystallization can be reduced.
Furthermore, it is preferable to form a metal that promotes crystallization, such as nickel (Ni), on the amorphous semiconductor layer because the heating temperature can be reduced. As metals, iron (Fe), rutinium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), copper (Cu), gold (Au), cobalt A metal such as (Co) can also be used.

  Further, in addition to the heating furnace, the polycrystalline silicon layer may be formed by performing laser irradiation as described above.

  Polycrystalline silicon formed in this way is crystallized using a metal, so that the crystal structure is almost the same as when a single crystal is used. Compared with toughness. This is because polycrystalline silicon with continuous grain boundaries can be produced by crystallization using a metal. Unlike polycrystalline silicon obtained by crystallization without using a metal, polycrystalline silicon in which crystal grain boundaries are continuous does not break a covalent bond at the crystal grain boundary. Therefore, the stress concentration caused by the crystal grain boundary does not occur, and as a result, the fracture stress is higher than that of polycrystalline silicon formed without using a metal. Furthermore, since the mobility of electrons is large due to continuous crystal grain boundaries, it is suitable as a material for controlling a microstructure with electrostatic force (electrostatic attraction). Of course, the microstructure may be controlled by electromagnetic force.

  Furthermore, the structural layer can have conductivity by including a metal that promotes crystallization.

  When nickel is used as the metal, nickel silicide can be formed in the silicon layer. A silicon alloy such as nickel silicide is generally known to have high strength. Therefore, the metal used in the heat treatment is left in the silicon layer as a whole or selectively, and an appropriate heat treatment is performed, whereby a microstructure that is harder and has higher conductivity can be manufactured.

  By laminating a layer having a nickel silicide (nickel silicide layer) leaving the metal used for crystallization as described above and a polycrystalline silicon layer, a highly structured and flexible structure layer can be obtained. . In addition, by stacking an amorphous silicon layer and a nickel silicide layer, a hard material having excellent conductivity can be obtained.

  Such a silicide layer can be formed of tungsten, titanium, molybdenum, tantalum, cobalt, or platinum in addition to nickel. A tungsten silicide layer, a titanium silicide layer, a molybdenum silicide layer, a tantalum silicide layer, a cobalt silicide layer, and a platinum silicide layer are formed. Among these, cobalt and platinum can also be used as a metal for lowering the heating temperature.

  Note that since the metal becomes a contamination source of the semiconductor device, it can be removed after crystallization. In this case, after crystallization using a metal, a layer serving as a gettering sink is formed on the silicon layer, and the metal can be removed or reduced by heating. This is because the metal moves to the gettering sink by the heat treatment. As the gettering sink, a polycrystalline semiconductor layer or a semiconductor layer to which an impurity element is added can be used. For example, a polycrystalline semiconductor layer to which an inert element such as argon is added can be formed over the semiconductor layer, and this can be used as a gettering sink. By adding an inert element, the polycrystalline semiconductor layer can be strained, and the metal can be efficiently captured by the strain. In addition, a metal can be captured by forming a semiconductor layer to which an element such as phosphorus is added.

  In addition, the structure layer can have a laminated structure in order to obtain a necessary thickness. For example, a multilayer structure of a polycrystalline silicon layer can be formed by repeating formation of an amorphous silicon layer and crystallization by heat treatment. By this heat treatment, stress in the previously formed polycrystalline silicon layer can be relieved, and film peeling and substrate deformation can be prevented. Further, in order to relieve the stress in the film, it can be repeated including the patterning of the silicon layer. A manufacturing method including such patterning is suitable when a material having a large internal stress is used for the structural layer.

  As described above, when crystallization is performed using a metal, since crystallization can be performed at a lower temperature than crystallization performed without using a metal, the width of a material that can be used for a substrate for forming a microstructure is small. spread. For example, when the semiconductor layer is crystallized only by heating, it is necessary to perform heating for about 1 hour at a temperature of about 1000 ° C., and a glass substrate that is vulnerable to heat cannot be used. However, by crystallization using the above metal as in this embodiment, a glass substrate or the like having a distortion point of 593 ° C. can be used.

(Embodiment 3)
In this embodiment, a process of integrally forming a microstructure and a semiconductor element that controls the microstructure on the same substrate will be described. In the drawings, a top view is shown on the upper side, and a sectional view in the top view OP is shown on the lower side.

  FIG. 16A illustrates a first region where a microstructure is formed and a second region where a semiconductor element which controls the microstructure is formed. A base film 102 is formed on the insulating substrate 101 in the first and second regions. In this embodiment mode, the base film 102 having a stacked structure is formed. However, the present invention is not limited to this, as in the above embodiment mode. The insulating substrate 101 and the base film 102 can be manufactured with reference to the above embodiment mode.

  A semiconductor layer 103 is formed on the base film 102 and patterned into a predetermined shape. The semiconductor layer 103 thus patterned functions as the first structural layer 103a in the first region, and functions as the semiconductor layer 103b of the semiconductor element in the second region. The first structure layer 103a is patterned to be circular. For the material, patterning shape, and the like of the semiconductor layer 103, the above embodiment mode can be referred to. In the present invention, a structure layer of a microstructure and a semiconductor layer of a semiconductor element can be manufactured in the same process.

  After that, the insulating layer 104 is formed over the semiconductor layer 103. The insulating layer 104 is patterned into a predetermined shape (see FIG. 16B). The patterned insulating layer 104 functions as a sacrificial layer 104a in the first region and functions as a gate insulating layer 104b in the second region. The sacrificial layer 104a is patterned to have a cross shape. The material, patterning shape, and the like of the insulating layer 104 can be manufactured with reference to the above embodiment modes. In consideration of the gate insulating film 104b, the insulating layer 104 is formed using oxide containing silicon or nitride containing silicon. Use it. In the present invention, the sacrificial layer of the microstructure and the gate insulating layer of the semiconductor element can be manufactured in the same process.

  Next, the conductive layer 105 is formed over the insulating layer 104. The conductive layer 105 is patterned into a predetermined shape (see FIG. 16C). The patterned conductive layer 105 functions as the second structural layer 105a in the first region and functions as the gate electrode 105b in the second region. The second structure layer 105a has four T-shapes extending in the cross direction as in the above embodiment, and is patterned so that the second structure layer 105 is also provided at the tip of the T-shape. The second structural layer 105 provided at the tip of the T-shape can function as an electrode that supplies power for rotating the second structural layer 105 extending in a cross shape. The material, patterning shape, and the like of the conductive layer 105 can be manufactured with reference to the above embodiment mode, and silicon (Si), titanium (Ti) aluminum (Al), molybdenum (Mo), One or more conductive materials selected from tungsten (W) or the like may be used. Note that in the case of using silicon, a crystalline structure is provided to provide conductivity. In the present invention, the second structure layer of the microstructure and the gate electrode of the semiconductor element can be manufactured in the same process.

  After that, an opening is provided in the second structural layer 105b. Then, an etchant is introduced into the opening to remove the sacrificial layer 104a. As the etchant, the above-described buffered hydrofluoric acid or the like can be used. In the case of using a buffered fluoride, it is preferable to use silicon oxide for the sacrificial layer 104a and silicon having crystallinity for the second structure layer 105b in consideration of an etching selectivity. At this time, a mask is formed on the semiconductor element in the second region so as not to be etched. The mask can be formed using an inorganic material or an organic material. The selectively provided mask can be formed by a droplet discharge method typified by an inkjet method.

  After that, a protective insulating layer for protecting the semiconductor element can be formed. Further, an insulating layer functioning as a sidewall may be provided on a side surface of the gate electrode of the semiconductor element. The sidewall can prevent a short channel effect that occurs as the gate length is shortened. Such a protective insulating layer and sidewall may be formed in a microstructure. On the other hand, if it is not desired to form the microstructure, a mask may be selectively formed only in the first region. When such a mask is formed, it is better to remove the sacrificial layer after removing the mask. This is because if the mask is formed after the sacrificial layer is removed and a space is generated, the structure may be destroyed.

  An electric circuit can be formed using the semiconductor element formed as described above, and the microstructure can be controlled. A semiconductor device having such a microstructure can reduce manufacturing costs. In addition, mass productivity can be improved by the method for manufacturing a microelectromechanical device of the present invention as compared with a structure in which an electric circuit is separately formed and electrically connected to a microstructure as in the conventional case.

(Embodiment 4)
In this embodiment, unlike the above embodiment, a micro structure in which a gear structure is fixed by a shaft will be described with reference to FIGS. In the drawings, (A) shows a top view, and (B) shows a cross-sectional view in a top view OP.

  As shown in FIG. 3A, a base film 102, a first structure layer 103, and a first sacrificial layer 104 are formed over an insulating substrate 101 as in the above embodiment mode. The above embodiment modes can be referred to for these manufacturing methods.

  After that, a layer including polycrystalline silicon is formed as the second structural layer 105 over the first sacrificial layer 104. For the layer including polycrystalline silicon, the above embodiment mode can be referred to. The second structural layer 105 is patterned into a predetermined shape, and then an opening is provided. In the cross-sectional view, the opening is provided above both end regions of the first sacrificial layer 104 as in the above embodiment (see FIG. 3B). Further, in this embodiment mode, the second structural layer 105 is patterned so as to be rotatable. In addition, as shown in FIGS. 3A and 3B, a region where a shaft is provided is also formed in the second structural layer 105. In this embodiment mode, an opening is formed at the center of the second structural layer 105 in order to provide the axis as the center. It should be noted that the position where the shaft is provided is not necessarily the center, and the center may be intentionally removed when it is desired to use a rotor.

  Next, a second sacrificial layer 108 is formed so as to cover the second structural layer 105 (see FIG. 4A). Note that a method for manufacturing the second sacrificial layer 108 and the like can be the same as those of the first sacrificial layer 104. At this time, the second sacrificial layer 108 is provided so as to fill the opening of the second structural layer 105. In addition, since the opening for forming the shaft has a long diameter, the opening may be formed so as to follow the opening without being completely filled with the second sacrificial layer 108.

  Thereafter, the first sacrificial layer 104 and the second sacrificial layer 108 are patterned into a predetermined shape so that the first structural layer 103 is exposed in the opening for the shaft provided in the second structural layer 105 (see FIG. (See FIG. 4B). Such patterning can be performed by photolithography and dry etching. Dry etching can be performed anisotropically, and the first sacrificial layer 104 and the second sacrificial layer 108 can be etched into a predetermined shape.

  After that, the third structure layer 109 is formed over the second sacrificial layer 108 so as to fill the inside of the opening for the shaft provided in the second structure layer 105 (see FIG. 4C). ). The third structural layer 109 can be manufactured in a manner similar to that of the second structural layer 105. For example, a silicon layer crystallized using a metal can be used for the third structure layer 109.

  At this time, the third structural layer 109 is bonded to the first structural layer 103 at the bottom surface of the opening for the shaft.

  The third structural layer 109 provided in this way has an area above the second structural layer 105 that is larger than the opening for the shaft provided in the second structural layer 105. Inside, the second sacrificial layer 108 is separated from the second structural layer 105 without being in contact therewith. The third structural layer 109 functions as an axis when the second structural layer 105 rotates. Hereinafter, such a shaft structure is referred to as a T-axis.

  Next, the first sacrificial layer 104 and the second sacrificial layer 108 are removed by etching (see FIGS. 5A and 5B). The above embodiment mode can be referred to for the etching conditions of the first sacrificial layer 104 and the second sacrificial layer 108. The first sacrificial layer 104 and the second sacrificial layer 108 can be removed in the same step. When the sacrificial layer is removed in this way, a space is created there. Such a space allows the microstructure to move. In this manner, the microstructure 106 that rotates around the T-shaped axis can be formed.

  Further, when the microstructure 106 is moved by an electrostatic force, a conductive layer 110 that can be used as a common electrode, a control electrode, or the like may be formed under the base film 102 as in the above embodiment mode. is there. Therefore, the lower electrode structure in FIG. 11A can be applied to the microstructure in this embodiment.

  In the case where the base film 102 has a stacked structure, the lower electrode 110 is formed between the base films 102 as in the above embodiment. Therefore, the lower electrode structure in FIG. 11B can be applied to the microstructure having the T-axis in this embodiment.

  Similarly to the above embodiment, in the case where the layer included in the microstructure 106 has a pattern with a corner when viewed from above, it is preferable that the corner portion be patterned into a rounded shape. The same applies to the sacrificial layer 104 that is removed later. Therefore, the step of patterning in a state in which a corner is rounded and rounded as shown in FIG. 12 can also be applied to the microstructure having the T-shaped axis of this embodiment. As a result, generation of dust can be suppressed and yield can be improved.

  Similarly to the above embodiment, a low friction layer can be formed on the first structural layer 103. Therefore, the structure including the low friction layer 111 illustrated in FIGS. 6A and 6B can be applied to the microstructure including the T-axis in this embodiment. As a result, friction between the first structural layer 103 and the second structural layer 105 can be reduced. Further, when a dense film such as DLC is used for the low friction layer, the function of protecting the microstructure can be enhanced.

  Similarly to the above embodiment mode, a semiconductor crystallized using a metal that can be applied to the first structural layer 103, the second structural layer 105, and the T-axis 109 that form the microstructure 106. The metal can be left to increase the conductivity of the layer. In addition, in a semiconductor layer crystallized using a metal that is applied to a semiconductor element, the metal may cause a problem in the operation of the semiconductor element; therefore, the metal may be selectively removed.

  Similarly to the above embodiment mode, the metal contained in the first structural layer 103, the second structural layer 105, and the semiconductor layer applied to the T-shaped shaft 109 included in the microstructure 106 is removed. If any of the first structural layer 103, the second structural layer 105, and the T-axis 109 is required to drive the microstructure 106, an impurity element that becomes p-type or n-type is used. Can be added. The addition of the impurity element can be performed simultaneously with the impurity element addition step in forming the impurity region of the semiconductor element. Such a structure layer having conductivity is suitable for the structure of a microstructure controlled by electrostatic force.

  Note that this embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 5)
In the present invention, silicon or silicon compounds having various properties can be stacked on the microstructure. A silicon layer having various properties becomes silicon having different properties such as strength by selecting one of an amorphous state, a microcrystalline state, and a polycrystalline state. Furthermore, even if it is polycrystal, it becomes a silicon layer having a difference in properties due to a change in crystal direction. An example of a structure in which silicon layers having different properties are stacked is shown below.

  FIG. 14A illustrates an example of a microstructure having a T-axis, in which the first structure layer 103 has a stacked structure. That is, the upper first structural layer 103b is stacked on the lower first structural layer 103a.

  FIG. 14B illustrates an example of a microstructure having a T-axis, in which the second structure layer 105 has a stacked structure. That is, the upper first structural layer 105b is stacked on the lower first structural layer 105a.

  FIG. 14C illustrates an example of a microstructure having a T-shaped axis, in which the T-shaped axis 109 has a stacked structure. That is, the upper T-shaped shaft 109b is laminated on the lower T-shaped shaft 109a.

  In the stacked structure as shown in FIGS. 14A to 14C, for example, polycrystalline silicon can be used for the lower layer and amorphous silicon can be used for the upper layer. In this embodiment mode, a stacked structure of three or more layers may be used. For example, a laminated structure in which amorphous silicon is sandwiched between polycrystalline silicons may be used.

  Polycrystalline silicon is preferably crystallized using a metal. Furthermore, even in the case of polycrystal, the crystal direction can be varied depending on the direction of laser irradiation and the metal addition region. Such polycrystalline silicon layers having different crystal directions may be stacked.

  Alternatively, a silicon layer and a layer containing a silicon compound may be stacked. Examples of the compound include silicon oxide and silicon nitride.

  Furthermore, in the case of using crystallization using a metal, crystallization can be partially performed by selectively applying a metal. For example, selectively crystallized silicon can be formed by applying a metal to only a portion of the structural layer having a sacrificial layer below and crystallizing it.

  Even if the present invention has a single layer structure, a silicon layer having a different crystal state depending on a region can be applied.

  The selective crystallization as described above can also be achieved by selectively irradiating a laser. Further, it may be selectively crystallized by changing the laser conditions. In the present invention, a microstructure can be formed using silicon having different crystal states.

  As described above, according to the present invention, a structure layer or the like having a stacked structure and different crystal states can be easily manufactured, and a microstructure having desired properties can be manufactured.

  Furthermore, when a metal is added to the entire surface and laser irradiation or heat treatment is performed, the crystal growth direction of silicon advances in a direction perpendicular to the substrate, and a metal is selectively added and laser irradiation or heat treatment is performed. The crystal growth direction proceeds in a direction parallel to the substrate. By laminating two or more layers having different crystal growth directions, a material having further excellent toughness can be obtained. Since films with different crystal growth directions are stacked, cracks hardly propagate to layers with different crystal growth directions even if a single layer breaks down. As a result, it is difficult to break, and a structural layer with high strength can be manufactured. Thus, even if it is a polycrystalline silicon, what laminated | stacked the crystal growth direction can be laminated | stacked, and it can apply to a structural layer.

  In the present invention, the stacked structures shown in FIGS. 14A to 14C can be freely combined.

  Although this embodiment mode has been described using a microstructure body having a T-axis, a stacked structure can be used even for the microstructure body described in Embodiment Mode 1. Specifically, in the microstructure described in Embodiment 1, the first structure layer 103 and the second structure layer 105 can have a stacked structure. As described above, the stacked structure in this embodiment can be freely combined with the above embodiment.

(Embodiment 6)
In this embodiment mode, unlike the above embodiment mode, a gear-type or comb-type microstructure is fixed using a part that also serves as an electrode, and the microstructure is driven by being lifted by an electrostatic force. The body will be described with reference to FIGS. In the drawings, a top view is shown on the upper side, and a sectional view in the top view OP is shown on the lower side.

  As shown in FIG. 7A, a base film 202, a first structure layer 203, and a first sacrificial layer 204 are formed over an insulating substrate 201. The above embodiment modes can be referred to for these manufacturing methods. In this embodiment mode, the base film 202 in which two layers are stacked is used. However, a single layer or a stacked structure of three or more layers may be used. The first structural layer 203 and the first sacrificial layer 204 are patterned so as to have a predetermined shape. In this embodiment mode, a rectangular shape is used, and the first sacrificial layer 204 is patterned to be smaller than the first structural layer 203.

  Next, as illustrated in FIG. 7B, a layer including polycrystalline silicon is formed as the second structural layer 205 over the first sacrifice layer 204 and the first structural layer 203. The second structure layer 205 is patterned to have a predetermined shape. In this embodiment mode, patterning is performed so as to be rectangular and smaller than the first sacrificial layer 204. The above embodiment mode can be referred to for a method for manufacturing a layer including polycrystalline silicon, and in this embodiment mode, a polycrystalline silicon layer crystallized using a metal is used.

  Then, an opening is formed in the second structural layer 205 in order to remove the first sacrificial layer 204. In this embodiment mode, the opening is provided above both ends of the first sacrificial layer 204 in the second structural layer 205, but the present invention is not limited to this. That is, an opening may be provided in the second structure layer 205 so that the sacrificial layer can be removed.

  Further, the second structure layer 205 is patterned into a shape that allows the microstructure to move. In this embodiment mode, the second structural layer 205 is patterned so as to have a comb shape (see FIG. 8A). The patterning of the second structural layer 205 can be performed in the same process.

  In addition to the comb shape, the second structural layer 205 can be patterned into a shape that functions as a rotor or a gear, or a shape that functions as a slider. That is, the second structure layer 205 may be patterned so as to be movable, and is not limited to the structure.

  Next, a second sacrificial layer 206 is formed so as to cover the second structural layer 205 and fill the opening (see FIG. 8B). The second sacrificial layer 206 can be manufactured in a manner similar to that of the first sacrificial layer 104. The second sacrificial layer 206 is patterned so as to have a predetermined shape. In this embodiment mode, patterning is performed so as to be smaller than the second structural layer 205.

  After that, a third structural layer 207 is formed so as to cover the second sacrificial layer 206 and the second structural layer 205 (see FIG. 9A). The third structure layer 207 is patterned to have a predetermined shape. In this embodiment mode, the third structure layer 207 is patterned so as to cover only both ends of the second sacrificial layer 206 and have a rectangular shape. The third structure layer 207 can be formed from a conductive material such as polycrystalline silicon crystallized using a metal or a conductor. The third structural layer 207 can function as an electrode that supplies electric power for moving the second structural layer 205.

  Next, the first sacrifice layer 204 and the second sacrifice layer 206 are removed by etching (see FIG. 9B). For the etching conditions and the like of the first sacrificial layer 204 and the second sacrificial layer 206, the above embodiment mode can be referred to. The first sacrificial layer 204 and the second sacrificial layer 206 can be removed in the same step. When these sacrificial layers are removed, a space is formed. Due to the space, the second structural layer 205 can translate. In this manner, the movable microstructure 208 that can move can be formed.

  The second structural layer 205 is separated from the first structural layer 203 and the third structural layer 207 by a space. Then, by applying a voltage to the third structural layer 207, the second structural layer 205 can be driven in a floating state without being fixed. By driving in such a floating state, friction on the surface where the second structural layer 205 is in contact with the first structural layer 203 can be significantly reduced, and driving with low power is possible. . In addition, wear of the microstructure due to wear can be avoided.

  In the case where the microstructure 208 is moved by an electrostatic force, a conductive layer that can be used as a common electrode, a control electrode, or the like may be formed under the base film 202 as in the above embodiment mode. Therefore, the lower electrode structure in FIG. 11A can be applied to the microstructure in this embodiment.

  Further, in the case where the base film 102 has a stacked structure, a lower electrode can be formed between the base films 202 as in the above embodiment mode, and the lower electrode structure in FIG. It can be applied to a microstructure of a form.

  Similarly to the above embodiment, in the case where the layer included in the microstructure 208 has a pattern with corners when viewed from above, it is preferable that the corners be patterned into a rounded shape. The same applies to the sacrificial layer 104 that is removed later. FIG. 13 shows a top view in which a shape with rounded corners is applied to the microstructure of this embodiment mode. By rounding the corners, generation of dust can be suppressed and yield can be improved.

  Similarly to the above embodiment, a low friction layer can be formed on the first structural layer 203. Therefore, the structure including the low friction layer 111 illustrated in FIGS. 6A and 6B can be applied to the microstructure of this embodiment. Further, a low friction layer may be provided between the second structural layer 205 and the third structural layer 207. As a result, friction between the first structural layer 203 and the second structural layer 205 or between the second structural layer 205 and the third structural layer 207 can be reduced. Further, when a dense film such as DLC is used for the low friction layer, the function of protecting the microstructure can be enhanced.

  By combining a plurality of such movable microstructures, it is possible to manufacture microstructures having various functions.

  Similarly to the above embodiment mode, the first structural layer 203, the second structural layer 205, and the third structural layer 207 included in the microstructure 208 are crystallized using metal in order to increase conductivity. The metal can be left in the silicon layer. Note that in the case where a malfunction occurs in a metal, the metal may be removed. For removal of the metal element, a gettering sink can be used as in the above embodiment.

  Further, even when the metal contained in the first structure layer 203, the second structure layer 205, and the third structure layer 207 included in the microstructure 208 is removed, the microstructure 208 is driven. When conductivity is required for any of the first structural layer 203, the second structural layer 205, and the third structural layer 207 included in the microstructure 208, an impurity element which becomes p-type or n-type is added. can do. The addition of the impurity element can be performed simultaneously with the impurity element addition step in forming the impurity region of the semiconductor element. Such a structure layer having conductivity is suitable for the structure of a microstructure controlled by electrostatic force.

  Note that this embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 7)
In this embodiment mode, a structural example of a microelectromechanical device including the microstructure of the present invention and a manufacturing method thereof will be described with reference to drawings.

  The microelectromechanical device having the microstructure of the present invention belongs to the field of micromachines, and has a size of micrometer to millimeter. Further, when manufactured to be incorporated as a part of a certain mechanical device, it may have a metric size so that it can be easily handled during assembly.

  First, FIG. 10 shows a conceptual diagram of a microelectromechanical device having the microstructure of the present invention.

  The microelectromechanical device 11 of the present invention can be used in combination with an electric circuit portion 12 having a semiconductor element and a structure portion 13 constituted by a microstructure. The electric circuit unit 12 includes a control circuit 14 that controls the microstructure, an interface 15 that communicates with the external control device 10, and the like. In addition, the structure body portion 13 includes a sensor 16, an actuator 17, a switch, and the like by a microstructure. An actuator is a component that converts a signal (mainly an electrical signal) into a physical quantity.

  The electric circuit unit 12 can also include a central processing unit for processing information obtained by the structure unit 13.

  The external control device 10 transmits a signal for controlling the microelectromechanical device 11, receives information obtained by the microelectromechanical device 11, or supplies driving power to the microelectromechanical device 11. Perform the action.

  The microelectromechanical device having the microstructure of the present invention is not limited to the above configuration example.

  According to the present invention, a semiconductor element constituting such a circuit and a microstructure can be formed integrally on the same substrate. By integrally forming, connection failure between a circuit or the like and a microstructure can be reduced.

  Conventionally, when handling a minute object such as a millimeter or less, the structure of a minute object is enlarged, a human or a computer obtains the information to determine the information processing and operation, and the operation is reduced. It needed a process of communicating to minute objects. However, a semiconductor device having a microstructure according to the present invention can handle a minute device simply by a human or computer transmitting a high-level conceptual command. That is, when a human or a computer determines a purpose and transmits a command, a semiconductor device having a microstructure can obtain information on an object using a sensor or the like, perform information processing, and take an action.

  In the above example, it is assumed that the object is very small. For example, the object itself has a size of a meter, but includes a minute signal (for example, a minute change in light or pressure) emitted from the object.

(Embodiment 8)
In this embodiment mode, usage modes of the microstructure described above will be described.

  FIG. 15 shows a microstructure 501 having a gear shape and a microstructure having a slider shape 502 provided with grooves according to teeth. Any microstructure can be formed over an insulating substrate.

  When the microstructure having a gear shape is rotated by electrostatic force or electromagnetic force, the microstructure having a slider shape is moved accordingly. In this manner, by combining a plurality of microstructures, it can be moved in a specific direction. The moving distance of the microstructure can be controlled by the semiconductor element integrally formed with the microstructure.

  A semiconductor device including such a microstructure and a semiconductor element can be used as a manipulator that handles small cells.

4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microstructure according to the invention. 1 is a block diagram illustrating a microelectromechanical device having a microstructure according to the present invention. 3A and 3B illustrate a structure of a microstructure according to the invention. 3A and 3B illustrate a top surface of a microstructure body of the present invention. 3A and 3B illustrate a top surface of a microstructure body of the present invention. 3A and 3B illustrate a structure of a microstructure according to the invention. 3A and 3B illustrate a structure of a microstructure according to the invention. 4A and 4B illustrate a manufacturing process of a microelectromechanical device including the microstructure of the invention.

Claims (13)

Forming a layer containing silicon on the insulating surface;
Etching the layer containing silicon to form a first layer of a microstructure and a semiconductor layer of a semiconductor element;
Forming a conductive layer on the silicon-containing layer;
A method of manufacturing a microelectromechanical device that etches the conductive layer to form a second layer of the microstructure and a gate electrode of the semiconductor element,
In the microstructure, the second layer is etched into a rotatable shape, and a space is formed below the second layer, and the second layer is rotated with respect to the insulating surface. A method for manufacturing a microelectromechanical device, characterized by being made freely. Forming a layer containing silicon on the insulating surface;
Etching the layer containing silicon to form a first layer of a microstructure and a semiconductor layer of a semiconductor element;
Forming a conductive layer on the silicon-containing layer;
A method of manufacturing a microelectromechanical device that etches the conductive layer to form a second layer of the microstructure and a gate electrode of the semiconductor element,
In the microstructure, the second layer is etched into a rotatable shape, and the insulating layer formed below the second layer is removed, so that the second layer is formed on the insulating surface. A method for manufacturing a microelectromechanical device, characterized in that the device can be freely rotated. According to claim 2, by wet etching or dry etching, a method for manufacturing a micro-electro-mechanical device, which comprises removed by dividing the insulating layer. According to claim 2 or 3, wherein the insulating layer is silicon, a method for manufacturing a micro-electro-mechanical device, characterized in that it comprises a silicon oxide or silicon nitride. Forming a layer containing silicon on the insulating surface;
Etching the layer containing silicon to form a first layer of a microstructure and a semiconductor layer of a semiconductor element;
Forming a sacrificial layer on the silicon-containing layer;
Forming a conductive layer on the sacrificial layer;
A method of manufacturing a microelectromechanical device that etches the conductive layer to form a second layer of the microstructure and a gate electrode of the semiconductor element,
In the microstructure, the second layer is etched into a rotatable shape, and the sacrificial layer is removed so that the second layer is rotatable with respect to the insulating surface. A method for manufacturing a microelectromechanical device. 6. The method for manufacturing a micro electro mechanical device according to claim 5 , wherein the sacrificial layer is removed by wet etching or dry etching. According to claim 5 or 6, wherein the sacrificial layer, a method for manufacturing a micro-electro-mechanical device characterized by having a metal or metal compound. In any one of claims 1 to 7, by etching the conductive layer, a method for manufacturing a micro-electro-mechanical device, which comprises forming the second layer of the microstructure in a cross shape. 9. The method for manufacturing a microelectromechanical device according to claim 8 , wherein the third layer provided at the tip of the cross is formed simultaneously with the formation of the cross-shaped second layer. The conductive layer of the second layer according to any one of claims 1 to 9 , wherein the conductive layer includes a polycrystalline silicon layer crystallized using a metal.
A method for manufacturing a microelectromechanical device, wherein thermal crystallization or laser crystallization is used for the crystallization. The conductive layer of the second layer according to any one of claims 1 to 9 , wherein the conductive layer includes a polycrystalline silicon layer crystallized using a metal.
The method of manufacturing a microelectromechanical device, wherein the polycrystalline silicon layer is a polycrystalline silicon layer selectively crystallized by applying the metal to a part of an amorphous silicon layer. . According to claim 10 or 11, without removing the metal, a method for manufacturing a micro-electro-mechanical device, which comprises forming an alloy of the said silicon metal. The conductive layer of the second layer according to any one of claims 1 to 9 , wherein the conductive layer includes a polycrystalline silicon layer,
The method for manufacturing a microelectromechanical device, wherein the polycrystalline silicon layer is a polycrystalline silicon layer that is selectively crystallized by irradiating a part of the amorphous silicon layer with a laser.

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