JP4664017B2 - Optical semiconductor integrated circuit device - Google Patents

Description

  The present invention relates to an optical semiconductor integrated circuit device.

Conventionally, a light detection element using CdS or the like is known. An optical integrated circuit using a silicon photodiode as a photodetecting element is also known (for example, Patent Document 1 below).
JP-A-6-189204

  However, in order to realize a wide dynamic range, a device capable of changing the sensitivity with a simple configuration is desired. In particular, a small-sized optical semiconductor integrated circuit device that can be used for an on-vehicle optical semiconductor instead of CdS. Was desired.

  The present invention has been made in view of such problems, and it is an object of the present invention to provide an optical semiconductor integrated circuit device capable of changing the sensitivity with a simple configuration and thereby easily expanding the dynamic range. Objective.

In order to solve the above-described problems, an optical semiconductor integrated circuit device according to the present invention includes a light detection element, charge voltage conversion means for generating a voltage corresponding to the amount of charge output from the light detection element, and the voltage input Comparator, a time measuring means for measuring the time from the reference time until the output of the comparator is switched, a conversion coefficient control means for controlling the conversion coefficient of the charge voltage conversion means, and an input signal to the conversion coefficient control means And an input / output terminal for taking out an output signal from the time measuring means to the outside, and further including elements to be described later.

  A current is output from the light detection element in accordance with the amount of light incident on the light detection element. The amount of charge output from the photodetecting element is converted into a voltage. When this voltage exceeds the reference voltage of the comparator, the output of the comparator is switched. The time measuring means measures the time from the reference time to the switching time. Therefore, the output pulse width of the time measuring means is the amount of light incident on the light detection element, that is, the amount of charge output from the light detection element. It will be inversely proportional to.

  By taking out the output of the time measuring means from the input / output terminal to the outside, it is possible to detect the amount of light incident on the light detection element, but an input signal from the outside is input to the input / output terminal. This input signal is input to the conversion coefficient control means, and changes the conversion coefficient of the charge voltage conversion means. That is, the conversion coefficient of the charge amount to voltage changes. The magnitude of the input signal to the comparator can be controlled by adjusting the conversion coefficient.

  In other words, even when the amount of charge is large, the input to the comparator can be reduced by reducing the conversion coefficient (however, the amount of change in voltage is also small with respect to the amount of change in charge: low accuracy : Low sensitivity: Corresponds to the high light quantity area), even when the charge amount is small, the input to the comparator can be increased by increasing the conversion coefficient (however, the voltage change with respect to the change amount of the charge amount) The amount becomes large: high accuracy and high sensitivity: corresponding to the low light quantity region).

  In particular, this device can change the sensitivity from the outside and take out the output of the light intensity measurement from the input / output terminal. Therefore, it is possible to change the sensitivity with a simple configuration. Can be spread easily.

The above-described optical semiconductor integrated circuit device further includes a resin package for molding the light detection element, the charge voltage conversion means, the comparator, the time measurement means, and the conversion coefficient control means, and the input / output terminals are externally provided from within the resin package. It may extend to .

  In this case, by electrically connecting the input / output terminal extending from the inside of the resin package to the control computer, an input signal from the computer can be received via the input / output terminal, The output signal can be input to a computer. In addition, the resin package protects each molded element and is transparent in the wavelength band from ultraviolet to infrared, so that light can be incident on the light detection element via the resin package. In addition, the resin package has the advantage of being lightweight.

As described above, the first optical semiconductor integrated circuit device according to the present invention includes the photodetection element, the charge-voltage conversion means for generating a voltage corresponding to the amount of charge output from the photodetection element, and the input voltage. Comparator, a time measuring means for measuring the time from the reference time until the output of the comparator is switched, a conversion coefficient control means for controlling the conversion coefficient of the charge voltage conversion means, and an input signal to the conversion coefficient control means And an input / output terminal for taking out the output signal from the time measuring means to the outside, and further comprising a tri-state buffer for connecting the time measuring means and the input / output terminal. The time measuring means and the input / output terminal are substantially connected / disconnected in accordance with the input of the enable signal to the tri-state buffer.

  That is, the tristate buffer can be used to separate the time measuring means and the input / output terminal, and the input signal input from the input / output terminal can be input to the conversion coefficient control circuit at the time of separation.

In addition, as described above, the second optical semiconductor integrated circuit device according to the present invention includes a light detection element, a charge-voltage conversion unit that generates a voltage corresponding to the amount of charge output from the light detection element, and the voltage. , A time measuring means for measuring the time from the reference time until the output of the comparator is switched, a conversion coefficient control means for controlling the conversion coefficient of the charge voltage conversion means, and a conversion coefficient control means An input / output terminal for inputting an input signal from the outside and taking out an output signal from the time measuring means to the outside, and a connection switch for connecting the time measuring means and the input / output terminal are further provided. The time measuring means and the input / output terminal are substantially connected / disconnected in response to the input of the enable signal to the connection switch.

  That is, the connection switch can be used to separate the time measuring means and the input / output terminal, and the input signal input from the input / output terminal can be input to the conversion coefficient control circuit at the time of separation.

According to a third optical semiconductor integrated circuit device, the first optical semiconductor integrated circuit device further includes a reset terminal for inputting an enable signal. That is, an enable signal can be input through the reset terminal.

According to a fourth optical semiconductor integrated circuit device, in the first optical semiconductor integrated circuit device, (A) a conversion coefficient control means is connected via the input / output terminal during a disconnection period between the time measuring means and the input / output terminal. An input signal is input to (B), and the time measuring means measures the time within a connection period between the time measuring means and the input / output terminal.

  That is, the input of the enable signal connects / disconnects the time measuring means and the input / output terminal, but during the disconnection period, even if the input signal is input to the conversion coefficient control means via the input / output terminal, the time is The measuring means is not affected, and the signal obtained by measuring the time by the time measuring means can be taken out from the input / output terminal within the connection period.

In the fifth optical semiconductor integrated circuit device, in the third optical semiconductor integrated circuit device, the reset terminal and the time are used so that the enable signal input to the reset terminal is also used as a reset signal that gives a reference time of the time measuring means. The measuring means is connected.

  That is, the reset terminal is a reset signal shared input terminal that also functions as an enable signal. By inputting the reset signal, a reference time of time measurement by the time measuring means can be given, and the time measuring means and the input / output shared terminal Thus, the influence of the input signal from the outside to the input / output terminal on the time measuring means can be removed.

According to a sixth optical semiconductor integrated circuit device, in the third optical semiconductor integrated circuit device, the charge-voltage conversion means includes a current mirror circuit in which one line is connected to the photodetecting element and the other line in the current mirror circuit. And a variable-capacitance capacitor connected thereto.

  A current proportional to the current output from the light detection element flows to the other line of the current mirror circuit, and a charge proportional to the time integral value of this current is accumulated in the capacitor. A time proportional value of the current output from the element, that is, a voltage proportional to the charge is generated. Since this voltage is input to the comparator, when the voltage corresponding to the charge amount exceeds the reference voltage, the output of the comparator is switched. The time from the reference time to the comparator switching time is inversely proportional to the amount of charge output from the photodetecting element.

According to a seventh optical semiconductor integrated circuit device, in the sixth optical semiconductor integrated circuit device, the conversion coefficient control means controls the capacitance of the capacitor according to the input signal, and the conversion coefficient depends on the capacitance. And

  That is, when the capacitance of the capacitor is large, the input voltage to the comparator is small (voltage = charge / capacitance), so the output switching time of the comparator is delayed, the sensitivity of the device is low, and the light quantity is high. Yes. When the capacitance of the capacitor is small, the input voltage to the comparator increases (voltage = charge / capacitance), so the output switching time of the comparator is earlier and the amount of light that can be handled by this device is lower. Since the input voltage fluctuation to the comparator with respect to the change becomes large, the detection sensitivity increases. The conversion coefficient defines the conversion coefficient of charge with respect to voltage, but this conversion coefficient can also be controlled by controlling the capacitance of the capacitor.

The eighth optical semiconductor integrated circuit device is the sixth or seventh optical semiconductor integrated circuit device, wherein a ratio of current flowing through the input side line and the output side line of the current mirror circuit is variable, and one line is input to the input line. The conversion coefficient control means controls the current ratio according to the input signal, and the conversion coefficient depends on the current ratio.

  That is, the conversion coefficient may be determined by the amount of charge that flows into the capacitor per unit time. The current flowing into the capacitor can be controlled by the ratio of the current flowing through the input side line and the output side line of the current mirror. In this apparatus, since the current ratio is variable, the conversion coefficient can be controlled and the detection sensitivity can be controlled. From the relationship of voltage = charge / capacitance, increase / decrease in the amount of charge flowing into the capacitor has the opposite effect to increase / decrease in capacitance.

As described above, the ninth optical semiconductor integrated circuit device according to the present invention includes the photodetection element, the charge-voltage conversion means for generating a voltage corresponding to the amount of electric charge output from the photodetection element, and the input voltage. Comparator, a time measuring means for measuring the time from the reference time until the output of the comparator is switched, a conversion coefficient control means for controlling the conversion coefficient of the charge voltage conversion means, and an input signal to the conversion coefficient control means And an input / output terminal for taking out the output signal from the time measuring means to the outside, and the conversion coefficient control means is a counter for counting the number of input pulses from the input / output terminal. And a decoder for determining the conversion coefficient in accordance with the output of the counter.

  When the conversion coefficient is determined in association with the output of the counter, for example, since the combined capacitance of the capacitors can be controlled to be the conversion coefficient, the detection sensitivity can be adjusted according to an external input signal.

According to a tenth optical semiconductor integrated circuit device, in the fifth optical semiconductor integrated circuit device, the time measuring means includes a first one-shot circuit that generates a one-shot pulse in response to an input of a reset signal, and an output of the comparator A second one-shot circuit that generates a one-shot pulse in response to switching, and a flip-flop that switches an output in accordance with outputs of the first and second one-shot circuits.

  The output of the flip-flop is switched according to the reset signal (pulse of the first one-shot circuit) that gives the reference time for time measurement and the output of the comparator (pulse of the second one-shot circuit) that gives the end time of time measurement. Therefore, it is possible to output a time measurement signal, that is, a square wave having a pulse width proportional to the amount of light incident on the light detection element.

An eleventh optical semiconductor integrated circuit device according to the tenth optical semiconductor integrated circuit device is characterized in that the charge-voltage conversion means includes a current mirror circuit in which one line is connected to the photodetecting element, and the other line in the current mirror circuit. A capacitor having a connected variable capacitor and a connection switch for connecting the other line to the capacitor are provided so that the charge to the capacitor is accumulated by the output of the flip-flop generated in synchronization with the input of the reset signal. A connection switch is connected.

  In this case, a reference time for time measurement is given in synchronization with the input of the reset signal, the connection switch is connected, and charge accumulation in the capacitor starts.

A twelfth optical semiconductor integrated circuit device is the eleventh optical semiconductor integrated circuit device according to the eleventh optical semiconductor integrated circuit device, wherein the charge-voltage conversion means further includes a discharge switch for connecting the capacitor and a fixed potential, and is synchronized with the output of the second one-shot circuit. A discharge switch is connected so that the charge accumulated in the capacitor is discharged by the output of the flip-flop generated in this manner.

  In this case, the time measurement end time is given by the output of the second one-shot circuit. In this case, the discharge switch is connected to discharge the charge accumulated in the capacitor to a fixed potential. In addition, since charge accumulation and discharge depend on the polarity of the charge, when a fixed potential is connected to a positive power source or the like, a positive charge will flow when the discharge switch is connected. It can be understood that negative charge is stored in the capacitor during storage, and negative charge is discharged during discharge. Further, a configuration in which the difference between the charge amounts during storage and discharge is used as the output voltage of the capacitor is also conceivable.

A thirteenth optical semiconductor integrated circuit device according to the sixth optical semiconductor integrated circuit device is provided with a dummy photodetecting element connected in parallel to the photodetecting element via a current mirror circuit, and the dummy photodetecting element. The light-shielding body is provided. Since the incidence of light on the dummy photodetecting element is blocked by the light shield, a dark current flows through the line on the dummy photodetecting element side of the current mirror circuit. Since this dark current can be estimated to be equal to the dark current flowing through the photodetection element for light detection, the current from which the dark current has been removed flows through the other line of the current mirror circuit connected to the capacitor side. It becomes.

  According to the optical semiconductor integrated circuit device of the present invention, it is possible to change the sensitivity with a simple configuration, thereby expanding the dynamic range.

  The optical semiconductor integrated circuit device according to the embodiment will be described below. In addition, the same code | symbol is used for the same element and the overlapping description is abbreviate | omitted.

  FIG. 1 is a plan view of an optical semiconductor integrated circuit device (optical IC) 100.

  The optical IC 100 includes a monolithic semiconductor chip 10 molded in a resin package 11, and four lead pins 1, 2, 3, and 4 are electrically connected to the semiconductor chip 10, and each of them is made of resin. It extends from the inside of the package 11 to the outside. The lead pin 1 is a reset terminal, the lead pin 2 is a GND (ground) terminal, the lead pin 3 is a power supply terminal, and the lead pin 4 is an input / output terminal.

  FIG. 2 is a circuit diagram for explaining a circuit formed on the monolithic semiconductor chip 10 of the optical IC.

  The optical IC 100 is connected to the computer CP via the lead pins 1 to 4. The reset signal RESET is input from the computer CP from the reset terminal 1, the input signal INPUT is input from the computer CP to the input / output terminal 4, and the output signal OUTPUT is output from the inside. The ground terminal 2 is grounded, the power terminal 3 is grounded via a power source 31, and a capacitor 32 is inserted in parallel with the power source 31.

The semiconductor chip 10 of the optical IC 100 includes a light detection element (photodiode in this example) 10a, a charge-voltage conversion circuit (means) 10b that generates a voltage V corresponding to the amount of charge output from the light detection element 10a, The comparator 10c to which the voltage V is input, the time measuring circuit (means) 10d for measuring the time T ₀ from the reference time t _RESET to the output of the comparator 10c switching, and the conversion coefficient α of the charge-voltage conversion circuit 10b A conversion coefficient control circuit (means) 10f to be controlled and an AND gate 10g for preventing the output from the time measurement circuit from entering the conversion coefficient control circuit are provided.

  In addition, as described above, the optical IC 100 receives the input signal INPUT to the conversion coefficient control circuit 10f from the outside, and the input / output terminal 4 for taking out the output signal OUTPUT from the time measurement circuit 10d to the outside. It has.

  Further, the semiconductor chip 10 of the optical IC 100 further includes a tristate buffer 10e for connecting the time measuring circuit 10d and the input / output terminal 4 and an enable signal (control signal: reset signal RESET) of 10d is supplied to the tristate buffer. In response to the input, the time measuring circuit 10d and the input / output terminal 4 are substantially connected / disconnected. The tri-state buffer (inverter) 10e is a type of buffer that can set the output of a normal buffer or inverter to high impedance according to the level of the enable signal. High impedance is the same state as when the output terminal is disconnected from the internal circuit.

  The tristate buffer 10e separates the time measuring circuit 10d and the input / output terminal 4 as necessary, and the input signal INPUT input from the input / output terminal 4 is input to the conversion coefficient control circuit 10f at the time of separation. . The enable signal is input from the reset terminal 1. The tri-state buffer 10e can be replaced with a connection switch, or a signal may be amplified by placing a buffer before or after the connection switch.

  The photodetector 10a, the charge voltage conversion circuit 10b, the comparator 10c, the time measurement circuit 10d, the conversion coefficient control circuit 10f, the tristate buffer 10e, and the AND gate 10g are included in the resin package 11 (see FIG. 1). Is molded. When the input / output terminal 4 extending from the resin package 11 to the outside is electrically connected to the control computer CP, the input signal INPUT from the computer CP can be received via the input / output terminal 4. The output signal OUTPUT can be input to the computer CP. Since the resin package 11 protects each molded element and is transparent in the wavelength band from ultraviolet to infrared, light can be incident on the light detection element 10a via the resin package 11 (see FIG. 1). ). Further, the resin package 11 has an advantage of being lightweight.

When light passes through the resin package 11 and enters the light detection element 10a, a current is output from the light detection element 10a according to the amount of light incident on the light detection element 10a. The charge amount (q) output from the photodetecting element 10a is converted into a voltage V by the charge / voltage conversion circuit 10b, and if this voltage V exceeds the reference voltage Vref input to the comparator 10c, the comparison is made. The output of the device 10c is switched. The time measurement circuit 10d measures a time T ₀ from the reference time t _RESET to the time t _{COM at} which the time measurement circuit 10d is switched. Therefore, the pulse width of the output of the time measurement circuit 10d is the amount of light incident on the light detection element 10a, That is, it is inversely proportional to the amount of charge q output from the photodetecting element 10a.

  By extracting the output of the time measuring circuit 10d from the input / output terminal 4 to the outside, the amount of light incident on the photodetecting element 10a can be detected.

  An input signal from the input / output terminal 4 is input to the conversion coefficient control circuit 10f, and changes the conversion coefficient α of the charge-voltage conversion circuit 10b.

  The conversion coefficient α is given by V = α × q = (K / Cx) × q. As will be described later, K is a multiplication factor of the current mirror circuit, and Cx is a combined capacity, which are variable physical quantities.

  Although the conversion coefficient α of the charge amount q to the voltage V is variable, the magnitude of the input signal V to the comparator 10c can be controlled by adjusting the conversion coefficient α. That is, even when the charge amount q is large, the input to the comparator 10c can be reduced by reducing the conversion coefficient α. In this case, the voltage change amount is also small with respect to the change amount of the charge amount. Although it is low accuracy, it can be low sensitivity and can cope with high light quantity.

  Even when the amount of charge q is small, the input to the comparator 10c can be increased by increasing the conversion coefficient α, and the amount of change in voltage increases with respect to the amount of change in charge. Although the sensitivity is high, the amount of light that can be handled is low.

  In this device, the sensitivity can be changed from the outside and the output of the light quantity measurement can be taken out from the input / output terminal 4, so that the sensitivity can be changed with a simple configuration, and the dynamic range is thereby reduced. Can be easily spread.

  This conversion coefficient α is switched when the reset signal RESET that cuts off the tri-state buffer 10e is input. When the period when the tri-state buffer 10e is disconnected is (A) and the period when it is connected is (B), the input signal INPUT is input as follows.

  (A) An input signal is input to the conversion coefficient control circuit 10 f via the input / output terminal 4 during the disconnection period of the time measurement circuit 10 d and the input / output terminal 4. That is, the input of the enable signal (RESET) connects and disconnects the time measurement circuit 10d and the input / output terminal 4; however, during the disconnection period, the input is performed to the conversion coefficient control circuit 10f via the input / output terminal 4. Even if the signal INPUT is input, the time measuring circuit 10d is not affected. At this time, since the enable signal (RESET) is at the H level, the signal input to the input / output terminal 4 is input to the conversion coefficient control circuit by the AND gate 10g.

(B) In the time measuring circuit 10d and the connection period of the input-output terminal 4, the time measurement circuit 10d measures the time _{T 0.} In the connection period, it is possible to take out a signal time measuring circuit 10d has measured time T ₀ from the input-output terminal 4 to the outside. At this time, since the enable signal (RESET) is at the L level, the output of the time measuring circuit is not input to the conversion coefficient control circuit by the AND gate.

The enable signal (RESET) input to the reset terminal 1 is also used as a reset signal RESET that gives a reference time t _RESET of the time measuring circuit 10d. The reset terminal 1 and the time measuring circuit 10d are thus It is connected. The reset terminal 1 is a dual-purpose input terminal for a reset signal RESET that also functions as an enable signal (RESET). By inputting the reset signal RESET, a reference time t _RESET for time measurement by the time measurement circuit 10d can be given, and time The connection between the measurement circuit 10d and the input / output terminal 4 can be disconnected to eliminate the influence of the input signal INPUT from the outside to the input / output terminal 4 on the time measurement circuit 10d.

  FIG. 3 is a circuit diagram of the charge-voltage conversion circuit.

  The charge-voltage conversion circuit 10b includes a current mirror circuit CM having one line connected to the photodetecting element 10a, and a variable capacitor connected to the other line of the current mirror circuit CM.

Current K · I _PD proportional to the current I _PD flowing through the light detection element 10a to flow into the other line of the current mirror circuit CM, charge proportional to the time integral value of this current the capacitor Cx (for convenience, the combined capacitance Cx Between the two ends of the capacitor Cx, the voltage V = α × q = (K / Cx) × q proportional to the charge q. Will occur.

Since this voltage V is input to the comparator 10c together with the reference voltage Vref, when the voltage V corresponding to the charge amount exceeds the reference voltage Vref, the output V _COM of the comparator 10c is switched. A time T ₀ from the reference time t _RESET to the switching time t _COM of the comparator 10c is inversely proportional to the amount of charge q that has flowed to the photodetecting element 10a.

The ratio of the current flowing through the input side line and the output side line of the current mirror circuit CM is variable, and one line connected to the photodetecting element 10a is set as an input side line, and the other line is set as an output side line. A transistor T0 is interposed in series on the input side line, and transistors T1, T2, and T3 are interposed in parallel on the output side line with a common gate. ON / OFF of currents flowing through the transistors T1, T2, and T3 is controlled by opening and closing of the switches SW _T1 , SW _T2 , and SW _T3 , respectively.

When the number of connected switches among the switches SW _T1 , SW _T2 , and SW _T3 is large, the proportional constant K of the current ratio increases. The conversion coefficient control circuit 10f controls this current ratio according to the input signal INPUT. Note that the conversion coefficient α depends on the current ratio (α = K / Cx). In this case, the conversion coefficient α is determined by the amount of charge flowing into the capacitor Cx per unit time. The current flowing into the capacitor Cx is controlled by the ratio of the current flowing through the input side line and the output side line of the current mirror CM. In this example, since the current ratio is variable, the conversion coefficient α can be controlled and the detection sensitivity can be controlled. From the relationship of voltage = charge / capacitance, the increase / decrease in the amount of charge flowing into the capacitor Cx has the opposite effect to the increase / decrease in capacitance.

  The effect of increasing / decreasing the capacitance Cx will be described.

The conversion coefficient control circuit 10f controls the capacitance (Cx) of the capacitor Cx according to the input signal INPUT. As described above, the conversion coefficient α depends on this capacity (α = K / Cx). And the capacitance Cx of the capacitor is large, since the smaller the input voltage V to the comparator 10c (voltage = charge / volume), the output switching time t _COM comparator 10c becomes slower, the sensitivity of the device is low Can handle high light levels. And the capacitance of the capacitor Cx (Cx) is small, since the greater the input voltage V to the comparator 10c (voltage = charge / volume), the output switching time _{t COM} of comparator 10c is faster, response of the device Although the amount of light that can be reduced, the variation in the input voltage to the comparator 10c with respect to the change in the amount of charge increases, so the detection sensitivity increases. As described above, when the capacitance (Cx) of the capacitor Cx is controlled, the conversion coefficient α can be controlled.

Between the output side line of the current mirror circuit CM and the variable-capacitance capacitor Cx, a connection switch SW _B for connecting them is interposed. The connection switch SW _B is connected so that the charge to the capacitor Cx is accumulated by the first specific output (Q = H level: switch connection) generated in synchronization with the input of the reset signal RESET. In this case, a time measurement reference time t _RESET is given in synchronization with the input of the reset signal, the connection switch SW _B is connected, and charge accumulation in the capacitor Cx starts.

Charge-voltage converting circuit 10b further comprises a discharge switch SW _R2 connecting the capacitor Cx and the fixed potential (ground potential in this example), the second specific output when switching of the comparator 10c (Q = L level: switch disconnect ) To connect the discharge switch SW _R2 so that the charge accumulated in the capacitor Cx is discharged (Q bar: switch connection).

The first specific output Q = H level is an output of a later-described flip-flop FF, and the second specific output Q = L level is a flip-flop generated in synchronization with an output of a later-described second one-shot circuit OS2. This is the output of FF. In the case of Q = L level, the reset switch SW _R1 connecting the output side line to a fixed potential (ground potential) is also connected.

That is, in synchronization with the _fall time of the reset signal (reference time t _RESET ), the connection switch SW _B is connected and charge accumulation is performed, the reset switch SW _R1 and the discharge switch SW _R2 are disconnected, and the output of the comparator 10c in synchronism with the switching time _{t COM,} the reset switch _{SW R1} and the discharge switch _{SW R2} are connected, the connection switch SW _B is cut.

  FIG. 4 is a graph showing a temporal change in the voltage V across the capacitor.

The voltage V increases from the reference time t _RESET and becomes 0 when the voltage reaches Vref, that is, when the time t _COM is reached. The time between the reference time t _RESET and the time t _COM is the measurement time T ₀ .

  FIG. 5 is a circuit diagram of the time measuring circuit 10d.

The time measuring circuit 10d switches the output of the first one-shot circuit OS1 that generates a one-shot pulse in response to the input of a reset signal RESET (with the voltage V _RESET ) and the output of the comparator 10c (in this example, the falling time) ) (Where the comparator output voltage is V _COM ), and a flip-flop whose output is switched according to the outputs of the first and second one-shot circuits OS1 and OS2 FF.

  FIG. 6 is an input / output correspondence table of the SR flip-flop.

  The SR (set reset) flip-flop FF is the most basic flip-flop FF, and has a set input terminal S, a reset input terminal R, output terminals Q and Q bars (Q NOT). In the SR flip-flop FF, when the terminals S and R are both 0, the output terminal Q holds the previous state. If the terminal S is 0 and the terminal R is 1, the terminal Q is 0. If the terminal S is 1 and the terminal R is 0, the terminal Q is 1. It is forbidden for both terminals S and R to be 1. Here, the H level is “0” (switch connection), and the L level is “1” (switch disconnection).

The output of the flip-flop FF includes a reset signal (the pulse of the first one-shot circuit OS1: input to the S terminal at the L level) that gives a time reference time t _RESET , and a comparator 10c that gives a time measurement end time t _COM. (The pulse of the second one-shot circuit OS2: input to the R terminal at the L level). Therefore, the flip-flop FF can output a time measurement signal, that is, a square wave having a pulse width proportional to the amount of light incident on the light detection element 10a.

In FIG. 3, since the time measurement end time t _COM is given by the output of the second one-shot circuit OS2 (the R terminal is at the L level), Q is at the L level (switch disconnection), and the Q bar is at the H level ( In this case, the discharge switch SW _R2 is connected to discharge the charge accumulated in the capacitor Cx to a fixed potential.

Since charge accumulation and discharge depend on the polarity of the charge, when the fixed potential is connected to a positive power source or the like, a positive charge flows in when the discharge switch SW _R2 is connected. It can be understood that negative charge is stored in the capacitor during storage and negative charge is discharged during discharge. Further, a configuration in which the difference between the charge amounts during storage and discharge is used as the output voltage of the capacitor is also conceivable.

  FIG. 7 is a circuit diagram of the conversion coefficient control circuit.

Transform coefficient control circuit 10f is provided with a counter 10f ₁ for counting the number of input pulses from the input-output terminal 4, and a decoder 10f ₂ to determine a conversion factor α in accordance with the output of the counter 10f _1. When the counter 10f ₁ of the association with the output to determine the conversion factor alpha, for example, because the combined capacitance Cx of the capacitor can be controlled to transform coefficient alpha, the dynamic range and detection sensitivity in response to an input signal INPUT from external Can be adjusted.

Moreover, the conversion factor alpha, to also proportional to the current ratio K, in association with the output of the counter 10f _1, it is also possible to change the current ratio K.

The capacitor Cx has a plurality of capacitors C1, C2, and C3 connected in parallel between the input terminal of the comparator 10c and the ground potential, so that each capacitor C1, C2, and C3 functions effectively. Connects a plurality of switches SW _C1 , SW _C2 , SW _C3 respectively connecting the input terminal (inverting input terminal) of the comparator 10c and the capacitors C1, C2, C3. The greater the number of connections, the greater the combined capacitance Cx, the lower the sensitivity, and the higher light quantity can be accommodated.

Further, the larger the number of connections of the switches SW _T1 , SW _T2 , SW _T3 on the current mirror side, the larger the current ratio K, the higher the sensitivity, and the lower the amount of light that can be handled. Note that the conversion coefficient α = K / Cx. The number of transistors can be adjusted on both the input side and the output side.

  FIG. 8 is an input / output correspondence table showing an example of the output of the decoder.

  A bit indicating connection of each switch is “0”, and a bit indicating disconnection is “1”. When the number of input pulses is 0 to 8, counter output and decoder output are indicated. When the number of pulses of the input signal INPUT is 0 to 2, when the current ratio K is large, the sensitivity ranges indicate low (L), medium (M), and high (H), respectively. The greater the number of input pulses, the lower the sensitivity.

  FIG. 9 is a timing chart of various signals.

In the reset signal RESET period t _r of the H level, the tri-state buffers 10e is disconnected, input-output terminal 4 functions as an input pin, an adjustment of the conversion coefficient α is carried out. For example, when the sensitivity range is H, two pulses are input, and the capacitors C1 to C3 are all connected, and the sensitivity is lowered.

At the falling edge of the reset signal, the L level is input to the S terminal of the flip-flop FF, whereby the output Q of the time measuring circuit 10d (flip-flop FF) becomes the H level, and charge accumulation is started. The tristate buffer 10e is connected. When the voltage V proportional to the charge exceeds the reference voltage V _ref of the comparator 10c, the L level is input to the R terminal of the flip-flop FF, and the output Q of the time measuring circuit 10d (flip-flop FF) is L Level, and charge discharge is performed. Until the next reset signal is input, the tristate buffer 10e is connected, and the input / output terminal 4 functions as an output pin. From the time measuring circuit 10d, a square wave having a pulse width T ₀ proportional to the amount of light is output.

  FIG. 10 is a graph showing the relationship of the pulse width (s) to the incident light amount (au). The pulse width can be changed according to the sensitivity ranges L, M, and H. The graph is a graph when the power supply potential is 3 V, the wavelength of incident light is 650 nm, and the temperature is 25 ° C.

  FIG. 11 is a graph showing the relationship of relative sensitivity (au) to wavelength (nm).

  The photodetecting element 10a in this example is a silicon photodiode and has sensitivity to light from ultraviolet rays to infrared rays. In addition, since the above-mentioned resin package 11 is transparent, it transmits these lights.

  FIG. 12 is a partial circuit diagram of an optical IC provided with a dummy photodetecting element and a light shield.

  In this example, a dummy light detection element 10a ′ connected in parallel to the light detection element 10a via a current mirror circuit CM ′, and a light blocking body SLD provided on the dummy light detection element 10a ′ are further provided. Have been disclosed. Since the light incident on the dummy light detection element 10a 'is blocked by the light shield SLD, a dark current flows through the line on the dummy light detection element 10a' side of the current mirror circuit CM '.

  Since this dark current can be estimated to be equal to the dark current flowing in the light detection element 10a for light detection, the other line of the current mirror circuit CM connected to the capacitor Cx side has a current from which the dark current has been removed. Will flow.

  The present invention can be used for an optical semiconductor integrated circuit device.

It is a top view of an optical semiconductor integrated circuit device (optical IC). It is a circuit diagram for demonstrating the circuit formed on the monolithic semiconductor chip of optical IC. It is a circuit diagram of a charge-voltage conversion circuit. It is a graph which shows the time change of the both-ends voltage V of a capacitor. It is a circuit diagram of a time measurement circuit. It is an input / output correspondence table of the SR flip-flop. It is a circuit diagram of a conversion coefficient control circuit. It is an input-output correspondence table which shows an example of the output of a decoder. It is a timing chart of various signals. It is a graph which shows the relationship of pulse width (s) with respect to incident light quantity (au). It is a graph which shows the relationship of the relative sensitivity (au) with respect to a wavelength (nm). It is a partial circuit diagram of optical IC provided with the dummy photon detection element and the light-shielding body.

Explanation of symbols

  10a, photodetection element, 10b, charge voltage conversion circuit, 10c, comparator, 10d, time measurement circuit, 10f, conversion coefficient control circuit, 10g, AND gate, 4, ..Input / output terminals.

Claims (13)

In an optical semiconductor integrated circuit device,
A light detection element;
Charge voltage conversion means for generating a voltage corresponding to the amount of charge output from the photodetecting element;
A comparator to which this voltage is input;
Time measuring means for measuring the time from the reference time until the output of the comparator is switched;
Conversion coefficient control means for controlling the conversion coefficient of the charge voltage conversion means;
An input / output terminal for inputting an input signal to the conversion coefficient control means from the outside and taking out an output signal from the time measurement means, and
Bei to give a,
A tristate buffer for connecting the time measuring means and the input / output terminal;
In response to the input of the enable signal to the tri-state buffer, the time measuring means and the input / output terminal are substantially connected / disconnected,
An optical semiconductor integrated circuit device. In an optical semiconductor integrated circuit device,
A light detection element;
Charge voltage conversion means for generating a voltage corresponding to the amount of charge output from the photodetecting element;
A comparator to which this voltage is input;
Time measuring means for measuring the time from the reference time until the output of the comparator is switched;
Conversion coefficient control means for controlling the conversion coefficient of the charge voltage conversion means;
An input / output terminal for inputting an input signal to the conversion coefficient control means from the outside and taking out an output signal from the time measurement means, and
Bei to give a,
A connection switch for connecting the time measuring means and the input / output terminal;
In response to an enable signal input to the connection switch, the time measuring means and the input / output terminal are substantially connected / disconnected.
An optical semiconductor integrated circuit device. A reset terminal for inputting the enable signal;
The optical semiconductor integrated circuit device according to claim 1 . Within the disconnection period of the time measuring means and the input / output terminal,
An input signal is input to the conversion coefficient control means via the input / output terminal,
In the connection period between the time measuring means and the input / output terminal,
The time measuring means measures the time;
The optical semiconductor integrated circuit device according to claim 1 . The reset terminal and the time measuring means are connected so that the enable signal input to the reset terminal is also used as a reset signal for giving the reference time of the time measuring means.
The optical semiconductor integrated circuit device according to claim 3 . The charge voltage conversion means includes
A current mirror circuit having one line connected to the light detection element;
A variable capacitor connected to the other line of the current mirror circuit;
The optical semiconductor integrated circuit device according to claim 3 , further comprising: The conversion coefficient control means controls the capacitance of the capacitor according to the input signal,
The conversion factor depends on this capacity,
The optical semiconductor integrated circuit device according to claim 6 . The current ratio flowing through the input side line and the output side line of the current mirror circuit is variable,
The one line is the input line,
The other line is the output line,
The conversion coefficient control means controls the current ratio according to the input signal,
The conversion factor depends on this current ratio,
8. The optical semiconductor integrated circuit device according to claim 6 or 7 , wherein: In an optical semiconductor integrated circuit device,
A light detection element;
Charge voltage conversion means for generating a voltage corresponding to the amount of charge output from the photodetecting element;
A comparator to which this voltage is input;
Time measuring means for measuring the time from the reference time until the output of the comparator is switched;
Conversion coefficient control means for controlling the conversion coefficient of the charge voltage conversion means;
An input / output terminal for inputting an input signal to the conversion coefficient control means from the outside and taking out an output signal from the time measurement means, and
Bei to give a,
The conversion coefficient control means includes
A counter for counting the number of input pulses from the input / output terminal;
A decoder for determining the conversion coefficient according to the output of the counter;
An optical semiconductor integrated circuit device comprising: The time measuring means includes
A first one-shot circuit that generates a one-shot pulse in response to the input of the reset signal;
A second one-shot circuit that generates a one-shot pulse in response to switching of the output of the comparator;
A flip-flop whose output switches according to the outputs of the first and second one-shot circuits;
The optical semiconductor integrated circuit device according to claim 5 , comprising: The charge voltage conversion means includes
A current mirror circuit having one line connected to the light detection element;
A variable capacitor connected to the other line of the current mirror circuit;
A connection switch connecting the other line and the capacitor;
With
11. The optical semiconductor integrated circuit according to claim 10 , wherein the connection switch is connected so that electric charges are accumulated in the capacitor by an output of the flip-flop generated in synchronization with an input of the reset signal. Circuit device. The charge voltage conversion means includes
A discharge switch for connecting the capacitor and a fixed potential;
12. The discharge switch according to claim 11 , wherein the discharge switch is connected so that the charge accumulated in the capacitor is discharged by the output of the flip-flop generated in synchronization with the output of the second one-shot circuit. The optical semiconductor integrated circuit device described. A dummy photodetecting element connected in parallel to the photodetecting element via a current mirror circuit;
A light shield provided on the dummy photodetecting element;
The optical semiconductor integrated circuit device according to claim 6 , further comprising:

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