JP4372090B2 - Image forming apparatus - Google Patents

Description

  The present invention relates to an image forming apparatus such as a printer, a copier, a facsimile machine, or a multi-function peripheral that conveys paper and forms an image on the paper, and more particularly to an image forming apparatus that is suitable when a large-capacity memory is installed. .

  In the image forming apparatus, an error check is performed on all bits of the mounted memory, and the system is activated after confirming that the bit is normal.

  On the other hand, with an increase in resolution and color of the formed image and a reduction in the cost of the memory, the capacity of the memory mounted in the apparatus is increasing.

  For this reason, the memory error check time when the power is turned on may take several minutes, which causes discomfort to the user.

  Here, in the memory error check at power-on, the check pattern is limited to, for example, “01010101” and “10101010” in order to shorten the time, and the write and read are 1 for the same address and the same check pattern. Only once.

  However, since a memory error occurs due to, for example, leakage charge movement between the memory cell and its periphery, the amount of leakage charge varies depending on the check pattern, and whether or not a memory error is detected varies depending on the check pattern or the like.

  For this reason, when a memory error occurs in the image data area and the image quality deteriorates, it may not be possible to determine whether or not the cause is a memory error.

  In order to increase the memory error detection rate, it is necessary to perform a memory error check in detail. In this case, the memory error check time may exceed 10 minutes.

  Patent Document 1 below discloses that a memory is divided into a plurality of blocks and a memory error check is performed on one sequential memory block for each periodic timer interrupt.

  However, if a timer error is repeatedly performed during normal processing and a memory error check is performed in detail, the normal processing is slowed down and the user feels uncomfortable.

  Japanese Patent Application Laid-Open No. 2004-259259 discloses that a memory error check is performed during the data processing idle time of the apparatus.

However, it is unclear exactly what free time is used for processing, and the memory error check may result in different results if it is interrupted before completing a series of processing, so it takes time to switch to normal processing. As a result, the user feels uncomfortable.
JP-A-4-542 Japanese Patent Laid-Open No. 3-171349

  SUMMARY An advantage of some aspects of the invention is that it provides an image forming apparatus capable of performing a memory error check without causing discomfort to the user.

In the first aspect of the image forming apparatus according to the present invention,
A processor;
Storage means coupled to the processor, the program is stored,
A volatile memory coupled to said processor,
Input means for inputting a set time information is coupled to the processor,
Timer means for counting the time and interrupting the processor when the time reaches the time indicated by the set time information;
A display device coupled to said processor,
Have
The program causes the processor to perform a memory error check on the volatile memory in response to the interrupt, and to display information indicating the result on the display device.

In a second aspect of the image forming apparatus according to the present invention,
A processor;
Storage means coupled to the processor, the program is stored,
A volatile memory coupled to said processor,
Coupled to the processor, a nonvolatile memory electrically writable,
Input means for inputting a set time information is coupled to the processor,
A display device coupled to said processor,
It is coupled to the processor and operates with a power source independent of the system power source of the image forming apparatus, counts the time, turns on the system power source when the time reaches the time indicated by the set time information, and inputs a reset signal System power supply control means for turning off the system power supply in response to activation of
The program for the processor
When the system power supply is turned on by the system power supply control means, a memory error check is performed on the volatile memory, information indicating the result is stored in the nonvolatile memory, and then the system power supply control means Activating the reset signal for
When the system power is turned on by the user, information indicating the result of the memory error check is read from the nonvolatile memory and the memory error check result is displayed on the display device.

In a third aspect of the image forming apparatus according to the present invention, in the second aspect,
The nonvolatile storage means further stores power-on number information,
The program for the processor
Update the power-on frequency information every time the power is turned on,
If the power-on count information indicates a first set value or more and the system power control means turns on the system power, a memory error check is performed on the volatile memory.

In a fourth aspect of the image forming apparatus according to the present invention, in the third aspect,
The program for the processor
If the power-on count information indicates a second set value or less and the system power control means turns on the system power, the memory error check for the volatile memory is performed.

In a fifth aspect of the image forming apparatus according to the present invention, in the second or third aspect,
A watchdog timer coupled to or built into the processor for detecting time-up and interrupting the processor;
The program causes the processor to perform a memory error check on the volatile memory in response to the interrupt, and to display the information on the display device when an error is detected.

  According to the configuration of the first aspect, the memory error check is not performed when the power is turned on, and the memory error check is performed when the time reaches the set time. Therefore, the user can start up the system in a short time and image formation is performed. Since the time in the time zone when the device is not used can be set as the set time, a detailed memory error check can be performed over time, and there is no switching to the normal operation during the check, which makes the user uncomfortable. In addition, the results can be obtained when the use is resumed.

  According to the configuration of the second aspect, when the time reaches the set time, the system power is automatically turned on and a memory error check is performed. The result is stored in the nonvolatile memory and the system power is turned off. Next, when the user turns on the system power, the memory error check result is displayed without performing the memory error check, so even if a large capacity memory is installed in the image forming apparatus, the system can be started up in a short time, Further, since there is no switching to normal operation during the check, there is no discomfort to the user. Further, since the system power is turned off before and after the memory error check, useless power is not consumed. Furthermore, since the time in the time zone when the image forming apparatus is not used can be set as the set time, a detailed memory error check can be performed over time.

  According to the configuration of the third and fourth aspects, since the memory error check is performed at the set time only during a period in which the memory error occurrence rate is considered to be relatively high, wasteful power consumption can be further reduced.

  According to the configuration of the fifth aspect, it is possible to deal with the occurrence of a memory error during a period when the memory error check is not performed.

  Other objects, configurations and effects of the present invention will become apparent from the following description.

  FIG. 1 is a schematic block diagram illustrating a hardware configuration of an image forming apparatus according to Embodiment 1 of the present invention.

  The image forming apparatus 10 is, for example, a multifunction peripheral, and is configured by combining an operation / display unit 12 and an image forming apparatus main body 13 with a control device 11. The control device 11 processes a document image read by the image forming apparatus main body 13 based on information set by the operation / display unit 12 and default setting values, or is supplied from an external host computer 20. Based on the setting information and the image data, the image forming apparatus main body 13 is caused to form an image.

  In the control device 11, a nonvolatile memory 111, an electrically rewritable nonvolatile memory 111A, a volatile memory 112, and interfaces 113 to 116 are coupled to the MPU 110 via a bus, and the interfaces 113 to 116 are respectively connected to the operation / display unit 12, It is coupled to the image forming apparatus main body 13, the host computer 20 and the timer 117.

  The timer 117 operates with the battery 118 and its own clock even when the power is turned off. When the current time Tn coincides with the set time Ts, the coincidence pulse is supplied to the interrupt input terminal of the interface 116. In response to this, the interface 116 interrupts the MPU 110.

  The MPU 110 sets the current time Tn and the set time Ts input from the operation / display unit 12 to the timer 117 via the interface 116 according to the program.

  The nonvolatile memory 111 stores data such as programs and initial values of the system. The nonvolatile memory 111A is an EPROM, a flash memory, or the like, and stores a value set by the operation / display unit 12.

  As described in the background art section, in order to increase the memory error detection rate, it is preferable to perform a detailed memory error check over time.

  On the other hand, since the user turns on the power when the user wants to use the image forming apparatus, it is preferable to shorten the system startup time.

  Therefore, in the first embodiment, the memory error check is not performed when the power is turned on, so that the system startup time is shortened and the user is not uncomfortable, and the detailed memory is set at the time Ts set by the user. An error check is started. The set time Ts is, for example, 12:30 during lunch break.

  FIG. 2 is a flowchart showing the processing of a program stored in the nonvolatile memory 111, and this program is started by the above interrupt. In the following, the step identification codes in the figure are shown in parentheses.

  (S0) A memory error check is performed on the nonvolatile memories 111, 111A, and 112.

  In the memory error check for the nonvolatile memory 111, for example, the hash value of the predetermined area is calculated and stored in advance in the nonvolatile memory 111, and the MPU 110 calculates the hash value of this area and stores it. If the two values do not match, an error is determined. Here, the hash value is, for example, a hash total, and the predetermined area is the entire area in the nonvolatile memory 111 excluding the hash value storage area, and includes a memory error check program.

  In the memory error check for the volatile memory 112, the volatile memory 112 is checked for each of a plurality of check patterns stored in the non-volatile memory 111, for example, '01010101', '10101010', '00000000', '11111111', etc. A pattern is written, the contents of the volatile memory 112 are read, and it is determined whether or not this matches the written value. If they do not match, an error is determined.

  In this memory error check, a check is performed in block units, for example, 4 KB units. For example, as shown in FIG. 3, when checking the block 30, the contents are first saved in the unused area 31 and stored in the block 30. A memory error check is performed as described above, and then the contents of the saved area 31 are written into the block 30.

  In the memory error check for the non-volatile memory 111A, the same check is performed a plurality of times for each of “0” and “1” for each bit.

  (S1) If an error is detected in step S0, the process proceeds to step S2, and if not, the process before the interrupt is continued.

  (S2) Information indicating the location of the memory error is displayed on the operation / display unit 12. In addition, this selection is displayed on the operation / display unit 12 in order to leave the selection of whether to continue or end the processing to the user's judgment.

  (S3) If continuation is selected by the user, the process before interruption is continued; otherwise, the process ends. In the case of termination, the image forming apparatus 10 may be turned off.

  According to the first embodiment, the memory error check is not performed when the power is turned on, and the detailed memory error check is performed when the current time Tn reaches the set time Ts. Therefore, the user can start the system in a short time. By setting the time in the time zone when the image forming apparatus 10 is not used as the set time Ts, it is possible to perform a detailed memory error check over time, and there is no need to switch to the normal mode during the check. No discomfort to the user.

  FIG. 4 is a block diagram illustrating a schematic configuration of an image forming apparatus according to Embodiment 2 of the present invention.

  In this apparatus, a commercial power supply voltage of AC 100V is supplied to the power supply circuit 16A through a parallel connection of the manual operation switch 14 and the controllable switch 15, and is converted into a direct current voltage so that the timer 117 of the control apparatus 11 is controlled. Supplied to each element except.

  The switch 15 is on / off controlled via the driver 18 by the output Q of the flip-flop 17. The flip-flop 17 is set by the time-up pulse of the timer 117 and is reset by the MPU 110 via the interface 116. The commercial power supply voltage supplied without going through the switches 14 and 15 is converted into a DC voltage by the power supply circuit 16B and supplied to the flip-flop 17 and the driver 18. The power control switch 14 is, for example, a relay contact. In this case, the driver 18 includes a relay coil that operates the relay contact.

  The current time Tn and set time Ts of the timer 117 are set in the same manner as in the first embodiment. In addition, the memory error check result is stored in the nonvolatile memory 111A.

  Other points are the same as in FIG.

  The set time Ts is set, for example, at 3 o'clock in the middle of the night. At this time, the flip-flop 17 is set by the time-up pulse from the timer 117, the switch 15 is turned on, and the control device 11 is automatically turned on. The

  FIG. 2 is a flowchart showing processing of a program stored in the nonvolatile memory 111. This program is started when the power is turned on automatically or manually.

  (S20) If the output Q of the flip-flop 17 is “1”, it is determined that the power is automatically turned on and the process proceeds to step S21. Otherwise, it is determined that the power is turned on manually and the process proceeds to step S24. .

  (S21) A detailed memory error check is performed as in step S0 of FIG.

  (S22) The result is stored in the nonvolatile memory 111A.

  (S23) The flip-flop 17 is reset to set its output Q to "0", thereby turning off the switch 15. As a result, the power is automatically turned off, and the process ends.

  Thereafter, when the user turns on the manual operation switch, it is determined in step S20 that Q = '0', and the following processing is performed.

  (S24) The check result is displayed on the operation / display unit 12.

  (S25) If the check result indicates that there is a memory error, the process proceeds to step S26; otherwise, the process proceeds to step S28.

  (S26) This selection is displayed on the operation / display unit 12 in order to leave the selection of whether to continue or end the processing to the user's judgment.

  (S27) If continuation is selected by the user, the process proceeds to step S28, and if not, the process ends.

  (S28) The operating system (OS) and a dedicated program operating on the OS are activated to put the image forming apparatus 10 into a ready state.

  According to the second embodiment, when the current time Tn reaches the set time Ts, the power is automatically turned on and a detailed memory error check is performed. The result is stored in the nonvolatile memory 111A and the power is turned off. Next, when the user turns on the power, the memory error check result is displayed without performing the memory error check. Therefore, even if a large-capacity memory is installed in the image forming apparatus 10, the system starts up in a short time, Further, since it is not necessary to switch to the normal operation during the check, the user is not uncomfortable. Further, since the power of the image forming apparatus 10 is turned off before and after the memory error check, useless power is not consumed.

  FIG. 6 is a block diagram illustrating a schematic configuration of an image forming apparatus according to Embodiment 2 of the present invention.

  In this apparatus, a watchdog timer 119 is coupled to the MPU 110 as a countermeasure when an abnormality such as a program runaway occurs due to a memory failure or the like. The watchdog timer 119 activates the time-up output signal when a relatively long time has elapsed since the start, for example, 2 seconds. This signal is supplied to the interrupt input terminal IRQ of the MPU 110. If the watchdog timer 119 is not reset before the time-up output signal becomes active, the MPU 110 is interrupted. Watchdog timer 119 restarts when reset.

  Therefore, a reset signal output command is inserted in the program area of the nonvolatile memory 111 so that the watchdog timer 119 does not time out unless an abnormality such as a program runaway occurs. When this instruction is executed, a reset pulse is supplied to the input terminal RST of the watchdog timer 119, and the watchdog timer 119 is reset.

  The timer 117 has the function described in the second embodiment. Further, the output of the timer 117 can be set to enable or disable (the output is maintained at “0”). Done through.

  FIG. 7 is a flowchart showing a part of processing of a program stored in the nonvolatile memory 111, and is added between step S20 and step S24 of FIG.

  (S30) The value of the power-on count N is incremented by 1.

  (S31) If N ≦ N0, the process proceeds to step S33; otherwise, the process proceeds to step S32. Here, N0 is a value that is larger by a safety margin value than a value corresponding to the end of a period when the initial failure occurrence rate of the memory is relatively high, and is 100, for example, and stored in advance in the nonvolatile memory 111.

  (S32) If N ≧ N1, the process proceeds to step S33; otherwise, the process proceeds to step S34. Here, N1 is a value that is smaller by a safety margin value than a value corresponding to the beginning of the period when the memory deteriorates due to secular change and the failure occurrence rate becomes relatively high, for example, 500, and is previously stored in the nonvolatile memory 111. Stored.

  (S33) The output of the timer 18A is enabled, and the process proceeds to step S25 in FIG.

  (S34) The output of the timer 18A is disabled, and the process proceeds to step S2C in FIG.

  Therefore, a detailed memory error check is performed at the set time Ts only during a period in which the memory error occurrence rate is considered to be relatively high. In other cases, the memory error check is not performed at the set time Ts or at power-on. Wasteful power consumption can be reduced.

  In order to deal with the occurrence of a memory error during a period in which the memory error check is not performed, the memory error check is performed as follows in the interrupt process caused by the time-up output signal of the watchdog timer 119.

  FIG. 3 is a flowchart showing the processing of the program stored in the nonvolatile memory 111. This program is a watch dog timer (WDT) interrupt processing caused by occurrence of an abnormality such as a program runaway.

  (S40) If the heater of the fixing device, the paper conveyance roller, the motor of the print engine or the scanner, or the light source of the scanner provided in the image forming apparatus main body 13 is on, the MPU 110 turns off the device via the interface 114. This prevents damage to the device and ensures safety.

  (S41) A memory error check is performed on all areas of the memory nonvolatile memories 111, 111A and 112 in the same manner as in step S0 of FIG.

  (S42) When a memory error is detected and a memory error is detected, information indicating the location is displayed on the operation / display unit 12. In addition, this selection is displayed on the operation / display unit 12 in order to leave the user's decision to restart or end the process.

  (S43) If restart is selected by the user, the system is reset to start the process of FIG. 5, otherwise the process ends.

  According to the third embodiment, a detailed memory error check is performed at the set time Ts only during a period in which the memory error occurrence rate is considered to be relatively high. In other cases, the memory is only used in the interrupt processing by the watchdog timer 119. Since the error check is performed, the power consumption of the image forming apparatus 10 can be further reduced as compared with the case of the second embodiment.

  The present invention includes various modifications in addition to the above.

  For example, since a system reset is generally performed when the power is turned on, in the present specification and claims, “when the power is turned on” means “when the power is turned on or when the system is reset”.

  In the second and third embodiments, the case where it is determined by the output Q of the flip-flop 17 that the power supply circuit 16A as the system power supply is turned on by the switch 15 has been described. However, the current time and the set time of the timer 117 are determined. If the difference is equal to or smaller than the threshold value, the switch 15 may determine that the system power is turned on.

  Further, the watchdog timer may be built in the MPU 110.

  In the above embodiment, the case where the program is stored in the nonvolatile memory 111 has been described. However, the program only needs to be stored in the nonvolatile storage device and is stored in an external storage device such as a hard disk. May be.

1 is a schematic block diagram illustrating a hardware configuration of an image forming apparatus according to Embodiment 1 of the present invention. It is a flowchart which shows the process of the program started by the timer interruption during system starting. It is processing explanatory drawing of step S0 of FIG. FIG. 5 is a schematic block diagram illustrating a hardware configuration of an image forming apparatus according to Embodiment 2 of the present invention. It is a flowchart which shows the process of the program started by power activation. It is a schematic block diagram which shows the hardware constitutions of the image forming apparatus which concerns on Example 3 of this invention. It is a flowchart which shows a part of process of the program started by power activation. It is a flowchart which shows a watchdog timer interruption process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Image forming apparatus 11 Control apparatus 110 MPU
111, 111A Nonvolatile memory 112 Volatile memory 113-116 Interface 117 Timer 118 Battery 119 Watchdog timer 12 Operation / display unit 13 Image forming apparatus body 14 Manual operation switch 15 Switch 16A, 16B Power supply circuit 17 Flip-flop 18 Driver 20 Host Computer 16 Flip-flop 18, 18A Timer Ts Set time Tn Current time F Check complete flag N Number of power on

Claims (6)

A processor;
Storage means coupled to the processor, the program is stored,
A volatile memory coupled to said processor,
Coupled to the processor, a nonvolatile memory electrically writable,
Input means for inputting a set time information is coupled to the processor,
A display device coupled to said processor,
It is coupled to the processor and operates with a power source independent of the system power source of the image forming apparatus, counts the time, turns on the system power source when the time reaches the time indicated by the set time information, and inputs a reset signal System power supply control means for turning off the system power supply in response to activation of
The program for the processor
When the system power supply is turned on by the system power supply control means, a memory error check is performed on the volatile memory, information indicating the result is stored in the nonvolatile memory, and then the system power supply control means Activating the reset signal for
When the system power is turned on by a user, information indicating the result of the memory error check is read from the nonvolatile memory and the memory error check result is displayed on the display device.
An image forming apparatus. The system power supply control means includes:
A switch having a control input terminal for turning on / off the system power;
A timer coupled to the processor for counting the time and activating a time-up signal when the time reaches the time indicated by the set time information;
A flip-flop set by activation of the time-up signal, reset by activation of the reset signal input, and an output terminal coupled to the control input terminal of the switch;
The image forming apparatus according to claim 1 , further comprising: The program causes the processor to determine whether the system power is turned on by the system power control means or whether the system power is turned on by a user based on the signal level of the output terminal of the flip-flop. The image forming apparatus according to claim 2 . The nonvolatile storage means further stores power-on number information,
The program for the processor
Update the power-on frequency information every time the power is turned on,
If the power-on frequency information indicates a first set value or more and the system power supply is turned on by the system power control means, a memory error check is performed on the volatile memory.
The image forming apparatus according to claim 1 , wherein the image forming apparatus is an image forming apparatus. The program for the processor
If the power-on frequency information indicates a second set value or less and the system power is turned on by the system power control means, a memory error check is performed on the volatile memory.
The image forming apparatus according to claim 4 . A watchdog timer coupled to or built into the processor for detecting time-up and interrupting the processor;
The program causes the processor to perform a memory error check on the volatile memory in response to the interrupt, and to display the information on the display device when an error is detected.
The image forming apparatus according to claim 4 , wherein the image forming apparatus is an image forming apparatus.

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