JP4279388B2 - Optical semiconductor device and method for forming the same - Google Patents

Optical semiconductor device and method for forming the same Download PDF

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Publication number
JP4279388B2
JP4279388B2 JP02323699A JP2323699A JP4279388B2 JP 4279388 B2 JP4279388 B2 JP 4279388B2 JP 02323699 A JP02323699 A JP 02323699A JP 2323699 A JP2323699 A JP 2323699A JP 4279388 B2 JP4279388 B2 JP 4279388B2
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Prior art keywords
optical semiconductor
flat plate
semiconductor device
semiconductor element
resin
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JP2000223752A (en
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良馬 末永
洋一 松岡
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Nichia Corp
Fuji Machinery Manufacturing and Electronics Co Ltd
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Nichia Corp
Fuji Machinery Manufacturing and Electronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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Description

【0001】
【発明の属する技術分野】
本発明はスイッチ内照明やドットマトリクスディスプレイの各種光源や光センサなど、SMD(Surface Maunt Device)などとして利用される表面実装用の光半導体装置に係わり、特に小型化可能であり、信頼性の高い光半導体装置及びその形成方法に関するものである。
【0002】
【従来の技術】
今日、発光素子や受光素子はスイッチ内照明、ドットマトリクスディスプレイ等の各種光源やセンサとして種々利用されている。利用分野の広がりと共により小型化され回路基板上に直接実装できるようなSMD(Surface Maunt Device)などとして利用される表面実装用の光半導体装置が開発されつつある。光半導体装置は極めて小さく形成できると共に内部に配置される光半導体素子を保護するパッケージなどにより、扱い安さを向上させることができる。
【0003】
このような光半導体装置として特開平8−125227号などが挙げられる。光半導体装置の具体的一例として本発明と比較のためのチップ部品型発光ダイオードを図6に示す。図6に示す表面実装型発光ダイオード600は、貫通孔602を有する樹脂基板601に金属薄板604を設けたパッケージを利用してある。パッケージの表面から側面、裏面にかけては一対の配線パターン605、606が形成されている。一方の配線パターン606は、貫通孔内の側壁に沿って延びた金属薄板となっている。金属薄板上にはAgペースト607を用いてLEDチップを固定すると共にLEDチップ603の一方の電極と導通を取っている。他方の配線パターン605はパッケージに設けられた貫通孔の外側上面においてLEDチップ603の他方の電極と金属細線608を用いて導通を取っている。LEDチップ上に透明樹脂609を設けることにより表面実装型発光ダイオード600を形成してある。
【0004】
こうして形成された表面実装型発光ダイオードは貫通孔602及び金属薄板604を利用した凹部にLEDチップ603を配置させてあるため、全体の厚みを極めて薄くすることができる。そのため、量産性よく小型化可能な表面実装型発光ダイオードを形成することができる。
【0005】
【発明が解決しようとする課題】
しかしながら、使用環境の広がりと共に求められるより厳しい環境下で使用されるにつれ、上記構成の表面実装型発光ダイオードなどにおいては十分な信頼性を得ることが難しくさらなる改良が求められていた。本発明は上記問題点に鑑み、信頼性が高く且つ薄型化が可能な光半導体装置を提供することを目的とする。
【0006】
【課題を解決するための手段】
本発明は、貫通孔が形成された絶縁性平板の一方の面側に設けられ該絶縁性平板よりも薄い薄板と、貫通孔を利用したキャビティ底面の薄板上に少なくとも樹脂を有するダイボンド部材によりダイボンドされた光半導体素子と、絶縁性平板に設けられた光半導体素子と外部とを電気的に接続させるリード電極と、キャビティ内の光半導体素子を被覆する透光性樹脂とを有する光半導体装置である。特に、薄板が金属であり、その表面が、少なくとも樹脂又は多孔質材料である光半導体装置である。これにより、光半導体装置を量産性よく小型化できると共に信頼性を著しく向上し得るものである。
【0007】
本発明の請求項2に記載の光半導体装置は、多孔質材料がセラミックである。これにより光半導体素子からの放熱性を向上させるばかりでなく機械的強度を向上し得る。さらに、光利用効率を向上させ得ることもできる。
【0008】
本発明の請求項3に記載の光半導体装置は、薄板を構成する金属が樹脂によって封止され前記リード電極と電気的に独立している。接着シートなど接着剤で絶縁性平板と薄膜とを添設させた場合、光半導体装置の半田などの実装時に接着シートの界面から半田などが浸入する場合がある。同様に水分が浸入することもある。本発明はこのような水分や半田の浸入を防止すると共に薄板に導電性の部材を利用していたとしてもリード電極から電気的に独立しているため、薄板を介してリード電極間がショートすることを極めて低減することができる。また、薄板上の樹脂は、絶縁性を高める他に半田塗れ性を高め、光半導体装置を半田付け等する場合における電極間の短絡を防止する効果をも有する。
【0009】
本発明の請求項4に記載の光半導体装置の形成方法は、絶縁性平板に貫通穴を形成する工程と、接着シートを介して絶縁性平板と金属とを添設する工程と、絶縁性平板上に少なくとも一対のリード電極を形成する工程と、貫通穴を利用したキャビティ底面の接着シート上に光半導体素子を少なくとも樹脂を有するダイボンド部材によってダイボンドする工程と、光半導体素子の各電極と絶縁性平板に形成されたリード電極とを導電性材料でそれぞれ電気的に接続する工程と、少なくとも光半導体素子を透光性樹脂で被覆する工程とを有する。これにより比較的簡単な工程で小型化可能且つ信頼性の高い光半導体装置を量産性よく形成させることができる。
【0010】
本発明の請求項5に記載の光半導体装置の形成方法は、接着シートを有する絶縁性平板に貫通穴を形成する工程と、接着シートを介して絶縁性平板と、少なくとも絶縁性平板と対向する表面にセラミックを有する金属層とを添設する工程と、絶縁性平板に少なくとも一対のリード電極を形成する工程と、貫通穴を利用したキャビティ底面のセラミック上に光半導体素子を少なくとも樹脂を有するダイボンド部材によってダイボンドする工程と、光半導体素子の各電極と、絶縁性平板に形成されたリード電極とを導電性材料でそれぞれ電気的に接続する工程と、少なくとも光半導体素子を透光性樹脂で被覆する工程とを有する。これにより上述と同様、比較的簡単な工程で小型化可能且つ信頼性の高い光半導体装置を量産性よく形成させることができる。
【0011】
【発明の実施の形態】
本発明者らは種々の実験の結果、貫通孔を持った絶縁性平板に特定の表面を持った薄板を添設することにより、小型化と信頼性とを向上させ得ることを見いだし本発明をなすに至った。
【0012】
本発明の構成による信頼性向上の作用は定かではないが、貫通孔を持った絶縁性平板に添付された薄板の表面形状が大きく影響すると考えられる。即ち、貫通孔を持った絶縁性平板及び薄板を利用することにより、量産性よく小型化を図ることができる。特に、キャビティの凹部底面を構成する薄板は、絶縁性平板よりも薄くするなどすると光半導体素子からの熱を外部に放出しやすくなり駆動安定性や信頼性などの特性が向上できる。他方、光半導体装置の半田接続時や外部環境などからの種々の熱を薄板を介して光半導体素子や貫通孔内部に直接繰り返し与えられる影響も大きくなる。
【0013】
このような熱は光半導体素子を被覆する透光性樹脂と貫通孔の側壁や薄板との熱膨張率の差や形成時に混入した水分の膨張などにより光半導体素子を薄板などから剥離すると考えられる。特に金属薄板を用いた場合は、光半導体素子を被覆する樹脂との密着性が相対的に低いばかりでなく、熱伝導性が高く樹脂との熱膨張率が著しく異なるために剥離傾向が極めて強いと考えられる。光半導体素子と薄板との剥離は光学特性を変化させるばかりでなく、電極近傍の導電性部材である金属細線の断線などを生じさせる。場合によっては光半導体素子と外部との電気的に導通がとれないという不都合を生ずる。
【0014】
本発明は、図1の斜視図に示す如く、貫通孔が形成された絶縁性平板101の一方の面側に設けられ絶縁性平板よりも薄い薄板111と、貫通孔を利用したキャビティ底面の薄板上に少なくとも樹脂を有するダイボンド部材によりダイボンドされた光半導体素子103と、絶縁性平板に設けられた光半導体素子103と外部とを電気的に接続させるリード電極105と、キャビティ内の光半導体素子を被覆する透光性樹脂109とを有する光半導体装置である。特に、キャビティ底面を構成する薄板111の表面は、少なくとも樹脂112となっている。これにより、小型化、量産性を維持しつつ、光半導体素子を被覆する透光性樹脂、光半導体素子を実装するダイボンド部材などとの密着性を向上させた薄板を利用することで、より信頼性を向上せしめ得るものである。以下、本発明の実施例について詳述するがこれのみに限られないことはいうまでもない。
【0015】
【実施例】
(実施例1)以下、本発明の実施例を図面を用いて説明する。図2、図3は本発明の一実施例を示すものであり、その製造工程を図3に基づいて説明する。あらかじめ、リード電極の一部を構成する銅箔が好適に形成されたガラスエポキシを絶縁性平板101として利用する(図3A工程)。
【0016】
絶縁性平板101には後に、光半導体素子であるLEDチップ103が配置されるキャビティを構成する貫通孔を形成する。絶縁性平板101は、LEDチップなどの光半導体素子103を外部から保護すると共に薄型化が可能なものが好ましく、具体的にはガラスエポキシ、液晶ポリマー、アクリル樹脂、エポキシ樹脂やセラミックなど種々のものを利用することができる。絶縁性平板101に設けられる貫通孔は、内部に光半導体素子を配置させる程度の大きさでよく、光半導体素子として、RGB(赤色、緑色、青色)のLEDチップを配置させる場合、YB(黄色、青色)のLEDチップを配置させる場合や発光素子と受光素子とを共に配置させる場合など複数個利用する場合はそれぞれが配置可能な大きさとすればよい。したがって、絶縁性平板に形成される貫通孔は光半導体素子の大きさ、形状や数に合わせて絶縁性平板の種々の位置に複数設けることもできる。
【0017】
同様に、絶縁性平板101の厚みは貫通孔を利用することによりキャビティの深さを構成するため、所望に応じて種々の厚みのものを利用することができる。また、特に光半導体素子として窒化物半導体である活性層をダブルへテロ構造とした発光素子を利用する場合、活性層の端面方向から放出される光が極めて多いため、キャビティの側壁となる貫通孔に反射性の高い材質を利用することが好ましい。これにより貫通孔を形成するだけで光利用効率の高い光半導体装置とすることができる。具体的には、キャビティ側壁には可視光の短波長側で光の吸収の大きいAuメッキなどを形成させることなく、絶縁性樹脂平板の白色材質面を露出させることで効果的に光を利用することができる。
【0018】
キャビティを構成する貫通孔は絶縁性平板が薄くとも貫通孔により比較的簡単に制御性よく形成できるため、極めて浅く形成することができる。具体的には約200μm以下程度の厚さとすることもできる。このような貫通孔は、絶縁性平板をエッチングすることにより構成することができるし、ドリルを用いて機械的に構成することもできる。さらに、炭酸ガスを利用したガスレーザー、YAGを利用した固体レーザーなど各種レーザーを用いて貫通孔を形成することもできる。エッチング溶液の選択、ドリルの刃先形状やレーザー光の集光を調整することで貫通孔の形状をすり鉢状や円柱状など所望に調整することもできる。同様に正面から見た貫通孔の形状も円形のみに限定されず、楕円形、正方形、長方形、縁なしの矩形や複数の円形が連続して貫通した形状など所望に応じて種々のものを選択することができる。
【0019】
次に、略中央に貫通穴が形成された絶縁性平板に薄板として厚さ約60μmのエポキシ樹脂からなる接着シート112を介して金属層111を張り合わせ貫通孔を利用したキャビティ102を形成する。薄板111を絶縁性平板101よりも薄くすることで光半導体装置100全体の厚みを薄くできると共に放熱性を向上させ得ることができる。絶縁性平板101は光半導体素子103を保護する或いは光利用効率を向上させるなどのために厚みの制限が設けられやすいのに対し、薄板111は光半導体素子103を支持することができればよいからである。
【0020】
薄板111として約30から170μmの厚さのものを好適に利用することができる。本発明の薄板111はダイボンド樹脂を介して光半導体素子を固定する。或いは、透光性樹脂であるモールド部材109などと接する場合があり、ダイボンド樹脂107や樹脂モールド部材109などとの密着性が優れた表面を持つ。薄板の具体的表面としてはダイボンド樹脂などとの化学的や機械的に結合できるような密着性の優れた樹脂表面112や多孔質表面を持ったセラミックなどを利用することができる。極めて薄い接着性樹脂シートなどを利用した薄板の場合、機械的強度が得られ難いため補強用部材として金属やセラミックなどを添設させることもできる。補強用に金属を利用した場合、光半導体装置の各電極との短絡を防止するためにレジストインクなどの樹脂を利用して絶縁性被覆していることが好ましい。
【0021】
なお、接着シート112を白色系の反射率の高い材質を利用すると共に光半導体素子103を窒化物半導体発光素子を利用するとさらに光利用効率を高めることもできる。同様に、樹脂絶縁性平板101であり側壁となる白色材質面が露出したキャビティ102内に絶縁性基板上に少なくとも発光層がダブルへテロ構造の窒化物半導体であり同一面側に一対の電極を有する光半導体素子103を、配置させることにより光利用効率をさらに高めることもできる。また、接着シート112の組成や溶媒を光半導体素子103を接着するダイボンド樹脂107の組成に同一或いは近づけることにより、より強固な接着強度を得ることもできる。
【0022】
次に、薄板111となる銅板をキャビティ底面が絶縁性平板に固定される部位を残してエッチングした(図3のB工程)。
【0023】
また、好適には銅板の密着強度を高めると共に絶縁性を確保するために露出した薄板111である銅板を樹脂113により封止した。続いて、光半導体装置の外部リード電極105、106を形成する。外部リード電極105、106は電解及び無電解メッキ法を利用して絶縁性平板101の発光或いは入射側上面、上面と対向する下面及び側面にメッキ層を形成することにより極めて薄膜のリード電極を比較的簡単に形成することができる。さらに、写真法を利用して、絶縁性平板の発光側上面及び下面のメッキ層を補強することもできる。こうして、光半導体素子が配置されるキャビティ102及びリード電極105、106が形成されたパッケージを形成することができる(図3C工程)。
【0024】
なお、キャビティを構成する薄板の補強部材である金属板とリード電極105、106とは電気的に独立している。また、樹脂113によってその端部を封止すると共に絶縁性を高めている。ここでは、リード電極を形成させた後に樹脂によって薄板を封止することを開示したが、薄板を封止した後に樹脂によって封止することもできることはいうまでもない。
【0025】
続いて、貫通穴を利用して形成されたキャビティ102底面の接着シート112上にダイボンド樹脂107として透光性エポキシ接着剤により、少なくとも発光層が窒化ガリウム系化合物半導体のLEDチップ103をダイボンド機器を用いてダイボンドする。キャビティ102内に配置されたLEDチップ103とパッケージに形成された発光側上面のリード電極105、106とを直径約30μmのAuを利用してワイヤボンドする(図3D工程)。
【0026】
LEDチップ103とパッケージに形成されたリード電極105、106との接続は、小型化、接続強度や量産性等を考慮して20から40μmの導電性ワイヤ108を利用して電気的に導通を取ることができる。また、導電性ワイヤの材料としては金、アルミニウムなど種々の特性に合わせて適宜選択することができる。
【0027】
同様に、光半導体素子とリード電極との導通を取るためだけであれば薄膜との密着性を損なわない限り光半導体素子の電極同士がショートしないように酸化珪素などの絶縁性保護膜で電極を除く半導体素子部分を被覆した後、銀、カーボン、ITOなどの導電性フィラーを含有させた導電性樹脂や半田などをダイボンド部材兼導電性部材として利用することもできる(不示図)。また、ダイボンド樹脂としては金、銀、銅などの金属やITO、酸化錫などの金属酸化物、さらには導線性に優れたカーボンなどを所望に応じて混入させることができる他、ダイボンド樹脂の耐光性を向上させるためにガラスなどの無機物質などを混入させることもできる。これにより半導体層を介して一対の電極を持った光半導体素子においても本発明を適用することができる。
【0028】
本発明において光半導体素子103とは、種々の半導体を利用した発光素子や受光素子を利用することができる。具体的な発光素子としては、サファイア、スピネル、SiCやGaN基板上に窒化物半導体を積層したものを好適に利用することができる。窒化物半導体はそのバンドギャップにより紫外域から可視域まで種々の電磁波を放出することができる。特に、窒化物半導体はサファイア基板上に形成させることで結晶性と量産性の両立した発光素子とすることができる。また、サファイア基板上に窒化ガリウム系化合物半導体を有し同一平面側に一対の電極を形成させたLEDチップは、サファイア基板及び窒化ガリウム共に硬度が高いためサファイア基板を研磨するなど約150μm以下の薄型にすることができる。より具体的には、全高が70〜90μmのLEDチップを利用すると、光半導体装置の高さを約0.3mm以下とすることができる。
【0029】
このような光半導体素子103は絶縁性基板上に一対の電極を形成するため小型化且つ光利用効率の向上を図ることができ、本発明の効果が特に大きい。なお、他の半導体素子としてはガリウム燐やガリウム砒素基板上にインジウム・アルミニウム・ガリウム・燐である発光層を持った発光素子を利用することもできる。同様に、シリコン基板上に不純物を高濃度にドープしたシリコンである受光層を持った受光素子とすることもできる。
【0030】
最後に、キャビティ102内にLEDチップ103が配置され、金線108でLEDチップの各電極とパッケージのリード電極105、106とを接続させたパッケージ表面を部分的にモールド部材109として透光性エポキシ樹脂により射出成型によって封止させる(図3E工程)。
【0031】
モールド部材はLEDチップや導電性ワイヤなどを外部環境や外力から保護するために好適に設けられるものであり、エポキシ樹脂、シリコーン樹脂、ユリア樹脂や低融点ガラスなど種々のものを利用することができる。モールド部材は光半導体素子に入射される光や光半導体素子から放出される光を集光或いは拡散させるために凸レンズ形状や凹レンズ形状とすることができる。また、凸レンズも所望となる指向特性に合わせて単なる凸レンズや楕円レンズ形状など種々選択させることができる。また、モールド部材には不要な波長をカットする目的で種々の着色剤、拡散光を得る目的で酸化チタン、酸化珪素などの拡散材を含有させることができる。
【0032】
また、発光素子から放出される電磁波の少なくとも一部を他の波長に変換させるペリレン系誘導体やセリウムで付活されたイットリウム・アルミニウム・ガーネット系酸化物などの蛍光体を含有させ白色発光可能な光半導体装置とすることもできる。こうして一辺がそれぞれ約1.2mm、約1.8mmの矩形状であって、厚さが約0.3mmとなる極めて小型な光半導体装置を比較的簡単に形成することができる。
【0033】
(実施例2)
次に、図4に示す構造の光半導体装置について詳述する。実施例1と同様の絶縁性平板401を利用して薄板411を添設しリード電極405、406をメッキさせることによりパッケージを形成させた。なお、実施例1とは異なり、絶縁性平板にエポキシ樹脂からなる接着シートを張り合わせ接着層を形成させた(図5A工程)後、接着層ごと貫通孔を形成させた。
【0034】
キャビティ402を構成する貫通孔を形成させた絶縁性平板401の接着層412が形成された面に、あらかじめ銅箔上にセラミック414を蒸着させた薄膜411をキャビティの底面として利用するため添設した(図5B工程)。薄板を添設後、銅箔をキャビティ底部を残して銅箔をエッチングし、リード電極405、406と電気的に独立させるべく絶縁樹脂413によって封止してある(図5C工程)。なお、キャビティの底面となる部位を切り抜いた接着シートを張り付けた薄膜により絶縁性平板に添設させることもできる。
【0035】
薄板として具体的には厚さ約35μmのCu泊上にセラミックを蒸着させ総膜厚約50μmで表面が白色で多孔性のセラミック複合金属層20である。これ以外は実施例1と同様にして光半導体素子403をマウント部材407としてエポキシ樹脂によりダイボンドすると共に電気的に導通を取った(図5D工程)。これにモールド部材409を形成させ光半導体装置400を形成させた(図5E工程)。実施例2で形成された光半導体装置は実施例1に比べて放熱性が優れている反面、外部からの熱も受けやすい。しかしながら、形成された光半導体装置の熱衝撃試験では実施例1とほとんど遜色なかった。
【0036】
なお、本発明の具体的実施例においては、それぞれ一個ずつの光半導体装置において説明しているが、量産性よく形成させるためには絶縁性平板にドットマトリックス状に複数の貫通穴を形成する。絶縁性平板全体に接着シートを介して絶縁性平板と金属を個々の貫通孔に対応などして添設した後、上述の工程を介して光半導体装置を形成する。形成させた光半導体装置を個々に分離させることによって複数個の光半導体装置を量産することができる。また、個々に分離させなければドットマトリックス状の光半導体装置を形成することもできる。
【0037】
(比較例1)
薄板を厚さ約50μmの銅板とし銅板上にエポキシ樹脂により直接LEDをダイボンドさせた以外は実施例1と同様にして光半導体装置を形成させた。形成させた実施例1及び比較例1の光半導体装置を1400個用いて、それぞれ−20℃30分、80℃30分で500サイクルの条件で熱衝撃試験を行った。試験後、実施例1の不灯となった発光ダイオードは比較例1の発光ダイオードの3割にも満たなかった。不灯となった比較例1の発光ダイオードを調べたところ薄膜となる銅板とダイボンド部材とが剥離していると共にワイヤの断線も生じていた。
【0038】
【発明の効果】
本発明は、小型化可能な光半導体装置の薄板表面状態を特定の表面とさせることにより、光半導体装置を小型化できると共に信頼性を著しく向上し得るものである。また、本発明の方法は上述の光半導体装置を量産性よく形成することができるものである。
【図面の簡単な説明】
【図1】 本発明の光半導体装置の模式的斜視図である。
【図2】 本発明の光半導体装置の模式的断面図である。
【図3】 図1に示す光半導体装置の形成方法を説明するための工程図である。
【図4】 本発明の他の光半導体装置の模式的断面図である。
【図5】 図3に示す光半導体装置の形成方法を説明するための工程図である。
【図6】 本発明と比較のために示す光半導体装置の模式的断面図である。
【符号の説明】
100・・・光半導体装置
101・・・絶縁平板
102・・・キャビティ
103・・・光半導体素子
105、106・・・リード電極
107・・・マウント部材
108・・・ワイヤ
109・・・モールド部材
111・・・薄板
112・・・接着シート
113・・・薄板の少なくとも端部を覆う樹脂
400・・・光半導体装置
401・・・絶縁平板
402・・・キャビティ
403・・・光半導体素子
405、406・・・リード電極
407・・・マウント部材
409・・・モールド部材
411・・・薄板
412・・・接着層
413・・・絶縁樹脂
414・・・光半導体素子が配置される側の薄板表面を構成するセラミック
601・・・樹脂基板
602・・・貫通孔
603・・・LEDチップ
604・・・金属薄板
605、606・・・配線パターンとなるリード電極
607・・・Agペースト
608・・・ワイヤとなる金属細線
609・・・モールド部材となる透明樹脂
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an optical semiconductor device for surface mounting used as SMD (Surface Mount Device), such as illumination in a switch, various light sources and optical sensors of a dot matrix display, and can be particularly downsized and highly reliable. The present invention relates to an optical semiconductor device and a method for forming the same.
[0002]
[Prior art]
Today, light emitting elements and light receiving elements are variously used as various light sources and sensors such as in-switch illumination and dot matrix displays. A surface mount optical semiconductor device used as a SMD (Surface Mount Device) or the like that can be mounted on a circuit board more compactly as the application field expands is being developed. The optical semiconductor device can be formed extremely small, and the handling efficiency can be improved by a package for protecting the optical semiconductor element disposed inside.
[0003]
An example of such an optical semiconductor device is disclosed in JP-A-8-125227. As a specific example of the optical semiconductor device, a chip component type light emitting diode for comparison with the present invention is shown in FIG. The surface-mounted light emitting diode 600 shown in FIG. 6 uses a package in which a thin metal plate 604 is provided on a resin substrate 601 having a through hole 602. A pair of wiring patterns 605 and 606 are formed from the front surface to the side surface and back surface of the package. One wiring pattern 606 is a thin metal plate extending along the side wall in the through hole. On the thin metal plate, an Ag paste 607 is used to fix the LED chip, and electrical connection is established with one electrode of the LED chip 603. The other wiring pattern 605 is electrically connected to the other electrode of the LED chip 603 and the metal thin wire 608 on the outer upper surface of the through hole provided in the package. A surface-mounted light emitting diode 600 is formed by providing a transparent resin 609 on the LED chip.
[0004]
Since the surface-mounted light-emitting diode formed in this way has the LED chip 603 disposed in the recess using the through-hole 602 and the metal thin plate 604, the overall thickness can be extremely reduced. Therefore, a surface-mounted light-emitting diode that can be miniaturized with high mass productivity can be formed.
[0005]
[Problems to be solved by the invention]
However, as it is used in a more severe environment that is required along with the spread of the use environment, it is difficult to obtain sufficient reliability in the surface mount type light emitting diode having the above configuration, and further improvement has been demanded. In view of the above problems, an object of the present invention is to provide an optical semiconductor device that is highly reliable and can be thinned.
[0006]
[Means for Solving the Problems]
The present invention provides a die bond by a thin plate provided on one surface side of an insulating flat plate in which a through hole is formed and thinner than the insulating flat plate, and a die bonding member having at least a resin on a thin plate on the bottom surface of the cavity using the through hole. An optical semiconductor device, a lead electrode for electrically connecting the optical semiconductor element provided on the insulating flat plate to the outside, and a translucent resin that covers the optical semiconductor element in the cavity. is there. In particular, it is an optical semiconductor device in which the thin plate is a metal and the surface thereof is at least a resin or a porous material. As a result, the optical semiconductor device can be miniaturized with high productivity and the reliability can be remarkably improved.
[0007]
In the optical semiconductor device according to claim 2 of the present invention, the porous material is ceramic. Thereby, not only the heat dissipation from the optical semiconductor element can be improved, but also the mechanical strength can be improved. Furthermore, the light utilization efficiency can be improved.
[0008]
In an optical semiconductor device according to a third aspect of the present invention, the metal constituting the thin plate is sealed with resin and is electrically independent of the lead electrode. When an insulating flat plate and a thin film are attached with an adhesive such as an adhesive sheet, solder or the like may enter from the interface of the adhesive sheet when mounting the solder or the like of the optical semiconductor device. Similarly, moisture may enter. The present invention prevents such moisture and solder from entering, and even if a conductive member is used for the thin plate, it is electrically independent from the lead electrode, so the lead electrodes are short-circuited via the thin plate. This can be greatly reduced. Further, the resin on the thin plate has the effect of preventing the short circuit between the electrodes in the case of soldering the optical semiconductor device, etc., in addition to improving the insulating property, and improving the solderability.
[0009]
According to a fourth aspect of the present invention, there is provided a method for forming an optical semiconductor device comprising: a step of forming a through hole in an insulating flat plate; a step of attaching an insulating flat plate and a metal via an adhesive sheet; A step of forming at least a pair of lead electrodes thereon, a step of die-bonding an optical semiconductor element on an adhesive sheet on the bottom surface of the cavity using a through-hole, with a die-bonding member having at least a resin, and an insulating property between each electrode of the optical semiconductor element A step of electrically connecting each of the lead electrodes formed on the flat plate with a conductive material; and a step of covering at least the optical semiconductor element with a translucent resin. Accordingly, an optical semiconductor device that can be miniaturized and has high reliability by a relatively simple process can be formed with high productivity.
[0010]
According to a fifth aspect of the present invention, there is provided a method for forming an optical semiconductor device, comprising: forming a through hole in an insulating flat plate having an adhesive sheet; and facing the insulating flat plate and at least the insulating flat plate through the adhesive sheet. A step of attaching a metal layer having a ceramic on the surface; a step of forming at least a pair of lead electrodes on an insulating flat plate; and a die bond having an optical semiconductor element on the ceramic at the bottom of the cavity using a through hole. A step of die bonding by a member, a step of electrically connecting each electrode of the optical semiconductor element and a lead electrode formed on an insulating flat plate with a conductive material, and at least covering the optical semiconductor element with a translucent resin The process of carrying out. As described above, an optical semiconductor device that can be miniaturized and has high reliability can be formed with high productivity by a relatively simple process.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
As a result of various experiments, the present inventors have found that by adding a thin plate having a specific surface to an insulating flat plate having a through hole, it is possible to improve the miniaturization and reliability. It came to an eggplant.
[0012]
Although the effect of improving the reliability by the configuration of the present invention is not certain, it is considered that the surface shape of the thin plate attached to the insulating flat plate having the through hole greatly affects. That is, by using an insulating flat plate and a thin plate having through holes, it is possible to reduce the size with high productivity. In particular, if the thin plate constituting the bottom surface of the concave portion of the cavity is made thinner than the insulating flat plate, heat from the optical semiconductor element is easily released to the outside, and characteristics such as driving stability and reliability can be improved. On the other hand, the influence that various heats, such as when soldering the optical semiconductor device is connected or from the external environment, is directly applied to the inside of the optical semiconductor element or the through hole through the thin plate is also increased.
[0013]
Such heat is considered to peel the optical semiconductor element from the thin plate or the like due to a difference in thermal expansion coefficient between the translucent resin that coats the optical semiconductor element and the side wall of the through-hole or the thin plate or expansion of moisture mixed in the formation. . In particular, when a thin metal plate is used, not only the adhesiveness with the resin coating the optical semiconductor element is relatively low, but also the thermal conductivity is high and the coefficient of thermal expansion is significantly different from that of the resin. it is conceivable that. The peeling between the optical semiconductor element and the thin plate not only changes the optical characteristics, but also causes disconnection of a fine metal wire that is a conductive member in the vicinity of the electrode. In some cases, there arises a disadvantage that electrical conduction between the optical semiconductor element and the outside cannot be established.
[0014]
As shown in the perspective view of FIG. 1, the present invention includes a thin plate 111 provided on one surface side of an insulating flat plate 101 in which a through hole is formed and thinner than the insulating flat plate, and a thin plate on the bottom surface of the cavity using the through hole. An optical semiconductor element 103 die-bonded by a die-bonding member having at least a resin, a lead electrode 105 electrically connecting the optical semiconductor element 103 provided on the insulating flat plate and the outside, and an optical semiconductor element in the cavity This is an optical semiconductor device having a translucent resin 109 to be coated. In particular, the surface of the thin plate 111 constituting the bottom surface of the cavity is at least a resin 112. As a result, while maintaining miniaturization and mass productivity, the use of a thin plate with improved adhesion to a translucent resin that coats an optical semiconductor element, a die-bonding member that mounts the optical semiconductor element, etc. makes it more reliable. It can improve the performance. Hereinafter, although the Example of this invention is explained in full detail, it cannot be overemphasized that it is not restricted only to this.
[0015]
【Example】
(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. 2 and 3 show an embodiment of the present invention, and the manufacturing process will be described with reference to FIG. Glass epoxy on which a copper foil constituting a part of the lead electrode is suitably formed in advance is used as the insulating flat plate 101 (step of FIG. 3A).
[0016]
A through-hole constituting a cavity in which the LED chip 103 as an optical semiconductor element is disposed later is formed in the insulating flat plate 101. The insulating flat plate 101 is preferably one that can protect the optical semiconductor element 103 such as an LED chip from the outside and can be thinned. Specifically, various types such as glass epoxy, liquid crystal polymer, acrylic resin, epoxy resin, and ceramic can be used. Can be used. The through hole provided in the insulating flat plate 101 may be large enough to arrange an optical semiconductor element therein. When an RGB (red, green, blue) LED chip is arranged as the optical semiconductor element, YB (yellow) , Blue) LED chip or when a plurality of light emitting elements and light receiving elements are arranged together, the sizes may be set to each other. Therefore, a plurality of through holes formed in the insulating flat plate can be provided at various positions on the insulating flat plate in accordance with the size, shape and number of the optical semiconductor elements.
[0017]
Similarly, since the thickness of the insulating flat plate 101 forms the depth of the cavity by using the through holes, those having various thicknesses can be used as desired. In particular, when a light-emitting element having a double heterostructure as an active layer made of a nitride semiconductor is used as an optical semiconductor element, a large amount of light is emitted from the end face direction of the active layer, so that a through-hole serving as a sidewall of the cavity It is preferable to use a highly reflective material. Thus, an optical semiconductor device with high light utilization efficiency can be obtained simply by forming a through hole. Specifically, light is effectively used by exposing the white material surface of the insulating resin plate without forming Au plating or the like that absorbs light on the short wavelength side of the visible light on the cavity side wall. be able to.
[0018]
The through-holes constituting the cavity can be formed extremely shallow because the through-holes can be formed relatively easily and with good controllability even if the insulating flat plate is thin. Specifically, the thickness can be about 200 μm or less. Such a through hole can be formed by etching an insulating flat plate, or can be mechanically formed using a drill. Furthermore, the through holes can be formed using various lasers such as a gas laser using carbon dioxide gas and a solid laser using YAG. The shape of the through hole can be adjusted as desired, such as a mortar shape or a cylindrical shape, by selecting the etching solution, adjusting the shape of the cutting edge of the drill, and condensing the laser beam. Similarly, the shape of the through-hole as viewed from the front is not limited to a circle, but various shapes such as an ellipse, square, rectangle, borderless rectangle, and a shape in which a plurality of circles are continuously penetrated can be selected. can do.
[0019]
Next, a metal layer 111 is bonded to an insulating flat plate having a through hole in the approximate center as a thin plate through an adhesive sheet 112 made of an epoxy resin having a thickness of about 60 μm, thereby forming a cavity 102 using the through hole. By making the thin plate 111 thinner than the insulating flat plate 101, the entire thickness of the optical semiconductor device 100 can be reduced and the heat dissipation can be improved. The insulating flat plate 101 is easily limited in thickness for protecting the optical semiconductor element 103 or improving the light utilization efficiency, whereas the thin plate 111 only needs to support the optical semiconductor element 103. is there.
[0020]
The thin plate 111 having a thickness of about 30 to 170 μm can be preferably used. The thin plate 111 of the present invention fixes the optical semiconductor element through a die bond resin. Alternatively, the surface may be in contact with a mold member 109 that is a light-transmitting resin and has excellent adhesion to the die bond resin 107 and the resin mold member 109. As a specific surface of the thin plate, a resin surface 112 having excellent adhesion that can be chemically or mechanically bonded to a die bond resin or the like, ceramic having a porous surface, or the like can be used. In the case of a thin plate using an extremely thin adhesive resin sheet or the like, it is difficult to obtain mechanical strength, so that a metal or ceramic can be added as a reinforcing member. When a metal is used for reinforcement, it is preferable that an insulating coating is made using a resin such as resist ink in order to prevent a short circuit with each electrode of the optical semiconductor device.
[0021]
In addition, if the adhesive sheet 112 uses a white material having a high reflectance and the optical semiconductor element 103 uses a nitride semiconductor light emitting element, the light utilization efficiency can be further increased. Similarly, at least a light-emitting layer is a nitride semiconductor having a double hetero structure on an insulating substrate in a cavity 102 which is a resin insulating flat plate 101 and exposed with a white material surface serving as a side wall, and a pair of electrodes are provided on the same surface side. The light utilization efficiency can be further increased by arranging the optical semiconductor element 103 having the optical semiconductor element 103. Further, by making the composition and the solvent of the adhesive sheet 112 the same as or close to the composition of the die bond resin 107 that adheres the optical semiconductor element 103, a stronger adhesive strength can be obtained.
[0022]
Next, the copper plate used as the thin plate 111 was etched leaving the site | part where a cavity bottom face is fixed to an insulating flat plate (B process of FIG. 3).
[0023]
Further, the copper plate, which is the exposed thin plate 111, is preferably sealed with a resin 113 in order to increase the adhesion strength of the copper plate and ensure insulation. Subsequently, external lead electrodes 105 and 106 of the optical semiconductor device are formed. External lead electrodes 105 and 106 are compared with extremely thin lead electrodes by forming plating layers on the light emitting or incident side upper surface, the lower surface and the side opposite to the upper surface of the insulating flat plate 101 using electrolytic and electroless plating methods. Can be formed easily. Furthermore, it is possible to reinforce the plating layers on the light emitting side upper surface and the lower surface of the insulating flat plate by using a photographic method. In this manner, a package in which the cavity 102 in which the optical semiconductor element is disposed and the lead electrodes 105 and 106 are formed can be formed (step in FIG. 3C).
[0024]
The metal plate, which is a thin plate reinforcing member constituting the cavity, and the lead electrodes 105 and 106 are electrically independent. Further, the end portion is sealed with the resin 113 and the insulating property is enhanced. Although it has been disclosed here that the thin plate is sealed with resin after the lead electrode is formed, it goes without saying that the thin plate can be sealed with resin after sealing.
[0025]
Subsequently, an LED chip 103 having at least a light-emitting layer of a gallium nitride compound semiconductor is attached to a die-bonding device by using a translucent epoxy adhesive as a die-bonding resin 107 on the adhesive sheet 112 on the bottom surface of the cavity 102 formed using the through hole. Use die bonding. The LED chip 103 disposed in the cavity 102 and the lead electrodes 105 and 106 on the light emitting side formed on the package are wire-bonded using Au having a diameter of about 30 μm (step 3D in FIG. 3).
[0026]
The connection between the LED chip 103 and the lead electrodes 105 and 106 formed on the package is electrically connected using a conductive wire 108 of 20 to 40 μm in consideration of downsizing, connection strength, mass productivity, and the like. be able to. The material of the conductive wire can be appropriately selected according to various characteristics such as gold and aluminum.
[0027]
Similarly, as long as the connection between the optical semiconductor element and the lead electrode is ensured, the electrode of the optical semiconductor element is covered with an insulating protective film such as silicon oxide so that the electrodes of the optical semiconductor element are not short-circuited unless the adhesion with the thin film is impaired. After covering the semiconductor element portion to be removed, a conductive resin or solder containing a conductive filler such as silver, carbon, or ITO can also be used as a die bond member / conductive member (not shown). The die bond resin can be mixed with metals such as gold, silver and copper, metal oxides such as ITO and tin oxide, and carbon with excellent conductivity as desired. In order to improve the property, an inorganic substance such as glass can be mixed. Accordingly, the present invention can be applied to an optical semiconductor element having a pair of electrodes via a semiconductor layer.
[0028]
In the present invention, as the optical semiconductor element 103, light emitting elements and light receiving elements using various semiconductors can be used. As a specific light-emitting element, a sapphire, spinel, SiC, or GaN substrate laminated with a nitride semiconductor can be suitably used. Nitride semiconductors can emit various electromagnetic waves from the ultraviolet region to the visible region due to their band gaps. In particular, when a nitride semiconductor is formed on a sapphire substrate, a light emitting element having both crystallinity and mass productivity can be obtained. In addition, an LED chip having a gallium nitride compound semiconductor on a sapphire substrate and having a pair of electrodes formed on the same plane side has a thinness of about 150 μm or less, such as polishing the sapphire substrate because both the sapphire substrate and gallium nitride have high hardness. Can be. More specifically, when an LED chip having an overall height of 70 to 90 μm is used, the height of the optical semiconductor device can be reduced to about 0.3 mm or less.
[0029]
Since such an optical semiconductor element 103 forms a pair of electrodes on an insulating substrate, it is possible to reduce the size and improve the light utilization efficiency, and the effect of the present invention is particularly great. As another semiconductor element, a light-emitting element having a light-emitting layer of indium, aluminum, gallium, and phosphorus on a gallium phosphide or gallium arsenide substrate can be used. Similarly, a light receiving element having a light receiving layer made of silicon in which impurities are doped at a high concentration on a silicon substrate can be provided.
[0030]
Finally, the LED chip 103 is disposed in the cavity 102, and the surface of the package in which each electrode of the LED chip and the lead electrodes 105 and 106 of the package are connected by the gold wire 108 is partially used as a molding member 109 to form a translucent epoxy. It seals by injection molding with resin (process 3E).
[0031]
The mold member is suitably provided to protect the LED chip, the conductive wire, and the like from the external environment and external force, and various types such as an epoxy resin, a silicone resin, a urea resin, and a low melting point glass can be used. . The mold member may have a convex lens shape or a concave lens shape in order to collect or diffuse light incident on the optical semiconductor element or light emitted from the optical semiconductor element. Also, the convex lens can be variously selected such as a simple convex lens or an elliptical lens shape in accordance with the desired directivity. The mold member can contain various colorants for the purpose of cutting unnecessary wavelengths and diffusing materials such as titanium oxide and silicon oxide for the purpose of obtaining diffused light.
[0032]
Light that can emit white light by containing a phosphor such as a perylene derivative that converts at least a portion of the electromagnetic wave emitted from the light emitting element into another wavelength or a cerium-activated yttrium / aluminum / garnet oxide. A semiconductor device can also be provided. In this way, an extremely small optical semiconductor device having a rectangular shape with sides of about 1.2 mm and about 1.8 mm and a thickness of about 0.3 mm can be formed relatively easily.
[0033]
(Example 2)
Next, the optical semiconductor device having the structure shown in FIG. 4 will be described in detail. A thin plate 411 was added using the same insulating flat plate 401 as in Example 1, and the lead electrodes 405 and 406 were plated to form a package. Unlike Example 1, an adhesive sheet made of an epoxy resin was bonded to an insulating flat plate to form an adhesive layer (step of FIG. 5A), and then a through hole was formed with the adhesive layer.
[0034]
A thin film 411 obtained by pre-depositing a ceramic 414 on a copper foil is added to the surface of the insulating flat plate 401 on which the through hole forming the cavity 402 is formed, in order to use it as the bottom surface of the cavity. (FIG. 5B process). After attaching the thin plate, the copper foil is etched leaving the cavity bottom and sealed with an insulating resin 413 to be electrically independent of the lead electrodes 405 and 406 (step C in FIG. 5). In addition, it can also be attached to an insulating flat plate with the thin film which stuck the adhesive sheet which cut out the site | part used as the bottom face of a cavity.
[0035]
Specifically, the ceramic composite metal layer 20 having a total surface thickness of about 50 μm and a white surface and a porous surface is obtained by depositing ceramic on a Cu plate having a thickness of about 35 μm. Except for this, the optical semiconductor element 403 was die-bonded with an epoxy resin as the mount member 407 in the same manner as in Example 1 and electrically connected (step D in FIG. 5). A mold member 409 was formed thereon, and an optical semiconductor device 400 was formed (step E in FIG. 5). The optical semiconductor device formed in Example 2 is superior in heat dissipation compared to Example 1, but is also susceptible to heat from the outside. However, the thermal shock test of the formed optical semiconductor device was almost the same as Example 1.
[0036]
In the specific embodiments of the present invention, one optical semiconductor device is described, but a plurality of through holes are formed in the form of a dot matrix in an insulating flat plate in order to form with high productivity. After the insulating flat plate and the metal are attached to the entire insulating flat plate through an adhesive sheet so as to correspond to each through hole, the optical semiconductor device is formed through the above-described steps. A plurality of optical semiconductor devices can be mass-produced by separating the formed optical semiconductor devices individually. In addition, a dot-matrix optical semiconductor device can be formed if it is not separated individually.
[0037]
(Comparative Example 1)
An optical semiconductor device was formed in the same manner as in Example 1 except that the thin plate was a copper plate having a thickness of about 50 μm and the LED was directly die-bonded on the copper plate with an epoxy resin. Using 1400 optical semiconductor devices of Example 1 and Comparative Example 1 thus formed, thermal shock tests were performed under conditions of 500 cycles at −20 ° C. for 30 minutes and 80 ° C. for 30 minutes, respectively. After the test, the number of light emitting diodes that were unlit in Example 1 was less than 30% of the light emitting diode in Comparative Example 1. When the light emitting diode of Comparative Example 1 which was turned off was examined, the copper plate and the die-bonding member that became a thin film were peeled off, and the wire was also broken.
[0038]
【The invention's effect】
According to the present invention, an optical semiconductor device can be reduced in size and reliability can be remarkably improved by making the surface state of a thin plate of an optical semiconductor device that can be reduced in size a specific surface. The method of the present invention can form the above-described optical semiconductor device with high productivity.
[Brief description of the drawings]
FIG. 1 is a schematic perspective view of an optical semiconductor device of the present invention.
FIG. 2 is a schematic cross-sectional view of an optical semiconductor device of the present invention.
FIG. 3 is a process diagram for explaining a method of forming the optical semiconductor device shown in FIG. 1;
FIG. 4 is a schematic cross-sectional view of another optical semiconductor device of the present invention.
5 is a process diagram for explaining a method of forming the optical semiconductor device shown in FIG. 3; FIG.
FIG. 6 is a schematic cross-sectional view of an optical semiconductor device shown for comparison with the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100 ... Optical semiconductor device 101 ... Insulating flat plate 102 ... Cavity 103 ... Optical semiconductor element 105,106 ... Lead electrode 107 ... Mount member 108 ... Wire 109 ... Mold member 111 ... Thin plate 112 ... Adhesive sheet 113 ... Resin 400 covering at least the end of the thin plate ... Optical semiconductor device 401 ... Insulating flat plate 402 ... Cavity 403 ... Optical semiconductor element 405, 406 ... Lead electrode 407 ... Mount member 409 ... Mold member 411 ... Thin plate 412 ... Adhesive layer 413 ... Insulating resin 414 ... Thin plate surface on the side where the optical semiconductor element is arranged 601 ... resin substrate 602 ... through hole 603 ... LED chip 604 ... metal thin plates 605, 606 ... wiring pattern The emission lead electrodes 607 ... Ag paste 608 ... wire become fine metal wires 609 ... sealing member to become transparent resin

Claims (5)

貫通孔が形成された絶縁性平板の一方の面側に設けられ該絶縁性平板よりも薄い薄板と、前記貫通孔を利用したキャビティ底面の薄板上に少なくとも樹脂を有するダイボンド部材によりダイボンドされた光半導体素子と、前記絶縁性平板に設けられた光半導体素子と外部とを電気的に接続させるリード電極と、前記キャビティ内の光半導体素子を被覆する透光性樹脂とを有する光半導体装置であって、前記キャビティ底面を構成する薄板が金属であり、その表面は、少なくとも樹脂又は多孔質材料であることを特徴とする光半導体装置。Light that is die-bonded by a die-bonding member having at least a resin on a thin plate that is provided on one surface side of an insulating flat plate in which a through hole is formed and is thinner than the insulating flat plate, and a thin plate on the bottom surface of the cavity using the through-hole. An optical semiconductor device comprising: a semiconductor element; a lead electrode that electrically connects the optical semiconductor element provided on the insulating flat plate to the outside; and a translucent resin that covers the optical semiconductor element in the cavity. The optical semiconductor device is characterized in that the thin plate constituting the bottom surface of the cavity is a metal, and the surface thereof is at least a resin or a porous material. 前記多孔質材料はセラミックである請求項1に記載の光半導体装置。The optical semiconductor device according to claim 1, wherein the porous material is ceramic. 前記薄板を構成する金属が樹脂によって封止され前記リード電極と電気的に独立している請求項1または2に記載の光半導体装置。The optical semiconductor device according to claim 1 or 2 metal constituting the sheet are sealed independently the so lead electrode electrically sealed by a resin. 内部に光半導体素子が配置された光半導体装置の形成方法において、(a)絶縁性平板に貫通穴を形成する工程と、(b)接着シートを介して絶縁性平板と金属とを添設する工程と、(c)前記絶縁性平板上に少なくとも一対のリード電極を形成する工程と、(d)前記貫通穴を利用したキャビティ底面の接着シート上に光半導体素子を少なくとも樹脂を有するダイボンド部材によってダイボンドする工程と、(e)前記光半導体素子の各電極と前記絶縁性平板に形成されたリード電極とを導電性材料でそれぞれ電気的に接続する工程と(f)少なくとも前記光半導体素子を透光性樹脂で被覆する工程とを有することを特徴とする光半導体装置の形成方法。 In a method of forming an optical semiconductor device in which an optical semiconductor element is disposed, (a) a step of forming a through hole in the insulating flat plate, and (b) an insulating flat plate and a metal are attached via an adhesive sheet. And (c) a step of forming at least a pair of lead electrodes on the insulating flat plate; and (d) a die bond member having at least a resin on the adhesive sheet on the bottom surface of the cavity using the through hole. A step of die-bonding; and (e) a step of electrically connecting each electrode of the optical semiconductor element and a lead electrode formed on the insulating flat plate with a conductive material, respectively; and (f) at least passing through the optical semiconductor element. A method of forming an optical semiconductor device, comprising: a step of coating with a light-sensitive resin. 内部に光半導体素子が配置された光半導体装置の形成方法において、(a)接着シートを有する絶縁性平板に貫通穴を形成する工程と、(b)前記接着シートを介して絶縁性平板と、少なくとも絶縁性平板と対向する表面にセラミックを有する金属層とを添設する工程と、(c)前記絶縁性平板に少なくとも一対のリード電極を形成する工程と、(d)前記貫通穴を利用したキャビティ底面のセラミック上に光半導体素子を少なくとも樹脂を有するダイボンド部材によってダイボンドする工程と、(e)前記光半導体素子の各電極と、前記絶縁性平板に形成されたリード電極とを導電性材料でそれぞれ電気的に接続する工程と(f)少なくとも前記光半導体素子を透光性樹脂で被覆する工程とを有することを特徴とする光半導体装置の形成方法。 In a method for forming an optical semiconductor device in which an optical semiconductor element is disposed, (a) a step of forming a through hole in an insulating flat plate having an adhesive sheet; (b) an insulating flat plate through the adhesive sheet; Using at least a pair of lead electrodes on the insulating flat plate; and (d) using the through hole. A step of die-bonding an optical semiconductor element on a ceramic at the bottom of the cavity with a die-bonding member having at least a resin; and (e) each electrode of the optical semiconductor element and a lead electrode formed on the insulating flat plate with a conductive material. A method of forming an optical semiconductor device, comprising: an electrical connection step; and (f) a step of covering at least the optical semiconductor element with a translucent resin. .
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USD783547S1 (en) 2015-06-04 2017-04-11 Cree, Inc. LED package

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US11791442B2 (en) 2007-10-31 2023-10-17 Creeled, Inc. Light emitting diode package and method for fabricating same

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