JP4236738B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP4236738B2
JP4236738B2 JP25941598A JP25941598A JP4236738B2 JP 4236738 B2 JP4236738 B2 JP 4236738B2 JP 25941598 A JP25941598 A JP 25941598A JP 25941598 A JP25941598 A JP 25941598A JP 4236738 B2 JP4236738 B2 JP 4236738B2
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layer
substrate
strip
emitting diode
semiconductor laser
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JP2000077726A (en
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太平 山路
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Seiwa Electric Mfg Co Ltd
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Seiwa Electric Mfg Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49107Connecting at different heights on the semiconductor or solid-state body
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)
  • Wire Bonding (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、絶縁性又は高抵抗の基板の上に各層が積層されてなる発光ダイオード又は半導体レーザ素子である半導体素子の製造方法に関する。
【0002】
【従来の技術】
半導体素子としての発光ダイオード素子3000のうち、GaN系のものは、図10に示すように、Al2 3 (サファイヤ)やSiC(シリコンカーバイド)等の絶縁性又は高抵抗の基板3100の上にN層3110、活性層3120、P層3130、透明電極層3140等の各層を積層することによって構成されている。このような発光ダイオード素子3000では、基板3100の下面側に電極を形成することはできないので、発光ダイオード素子3000の表面側に2つの電極3151、3152を形成するようにしている。すなわち、透明電極層3140の上に一方の電極3151が、露出されたN層3110の上に他方の電極3152がそれぞれ形成されている。
【0003】
このように表面側に2つの電極3151、3152が形成された発光ダイオード素子3000は、図11に示すように、リードフレーム3300A、3300Bに、ダイボンディングされる。図11(A)に示すタイプであると、電極3151、3152が形成された表面側をリードフレーム3300Aに向けて、すなわち発光ダイオード素子3000を逆立ちさせて、各電極3151、3152をバンプ3331A、3332Aを介してリードフレーム3300Aの第1接続部3310A及び第2接続部3320Aに接続する。
【0004】
また、図11(B)に示すタイプであると、発光ダイオード素子3000を第1接続部3310Bにダイボンディングし、2つの電極3151、3152をボンディングワイヤ3331B、3332Bで第1接続部3310B及び第2接続部3320Bに接続する。
【0005】
これは、発光ダイオード素子3000に限らず半導体レーザ素子4000の場合でも同様である。半導体レーザ素子4000は、図12に示すように、Al2 3 (サファイヤ)やSiC(シリコンカーバイド)等の絶縁性又は高抵抗の基板4100の上にN層4110、活性層4120、P層4130、絶縁層4140等の各層を積層することによって構成されている。このような半導体レーザ素子4000では、基板4100の下面側に電極を形成することはできないので、半導体レーザ素子4000の表面側に2つの電極4150、4160を形成するようにしている。すなわち、絶縁層4140から溝4141を介して露出したP層4130の上に一方の電極4150が、露出されたN層4110の上に他方の電極4160がそれぞれ形成されている。
【0006】
このように構成された半導体レーザ素子4000は、チップキャリア4300にダイボンディングされるが、図13(A)に示すタイプであると、電極4150、4160が形成された表面側をチップキャリア430に向けて、すなわち半導体レーザ素子4000を逆立ちさせて、各電極4150、4160をバンプ4310、4320を介してチップキャリア4300のパッドに接続する。
【0007】
また、図13(B)に示すタイプであると、半導体レーザ素子4000をチップキャリア4300にダイボンディングし、2つの電極4150、4160をボンディングワイヤ4330、4340で各パッドに接続する。
【0008】
なお、GaAs系、GaP系の低抵抗基板を用いた発光ダイオード素子或いは半導体レーザ素子であれば、基板の下面側に電極を形成することは可能である。
【0009】
【発明が解決しようとする問題】
しかしながら、上述したような発光ダイオード素子3000や半導体レーザ素子4000には以下のような問題点がある。まず、発光ダイオード素子3000では、表面側に2つの電極3151、3152が形成されているために、基板の下面側に1つの電極を形成することができる低抵抗基板であるGaAs系、GaP系の発光ダイオード素子の評価のための装置や、組立のための装置を使用することができず、専用品が必要となる。また、リードフレーム等の副材料にも専用品が必要となる。
【0010】
また、半導体レーザ素子4000を図13(A)に示すようにダイボンディングするためには、半導体レーザ素子の高い寸法精度、組立時の位置合わせ精度が要求される。このため、前記精度の確保を図るために1枚のウエハに形成できる数を少なくして半導体レーザ素子を大きくすることが必要であった。すなわち、これでは、歩留りの向上は見込めないのである。また、1枚のウエハに形成できる数を優先して半導体レーザ素子を小さくし、図13(B)に示すような基板の下面をダイボンディングするようにしていた。しかしこれでは、放熱性に問題があった。
【0011】
本発明は上記事情に鑑みて創案されたもので、基板に絶縁性又は高抵抗のものを用いたとしても、従来のように組立装置や副材料に専用品を必要とせず、歩留りの向上が可能で、しかも放熱性に優れた半導体素子方法を提供することを目的としている。
【0012】
【課題を解決するための手段】
本発明に係る半導体素子の製造方法は、発光ダイオード又は半導体レーザ素子の半導体素子を製造する方法において、絶縁性又は高抵抗のウエハーの基板の表面上にN層、活性層及びP層を順次積層する工程と、N層、活性層及びP層の一部をエッチングして前記N層の表面上の外側端部を露出させる工程と、前記N層の露出表面上に各素子のオーミック電極を各々形成するとともに前記基板の裏面の全面に裏面側ボンディングパット部を形成する工程と、前記基板を切断することにより複数の素子が形成された短冊状の基板を作成する工程と、前記N層の露出表面上及び基板裏面上の外側端部が露出するように複数の前記短冊状の基板を板状のスペーサを挟んで交互に重ね合わせる工程と、重ね合わされた状態の前記短冊状の基板及びスペーサに金属蒸着を行うことにより前記各素子のオーミック電極と裏面側ボンディングパット部との間を電気接続するための導電性膜を各々形成する工程と、前記短冊状の基板を切断することにより前記基板から各素子を切り離す工程とを具備している。
【0014】
【発明の実施の形態】
図1は本発明の実施の形態に係る半導体素子である発光ダイオード素子の概略的断面図、図2は本発明の実施の形態に係る半導体素子である発光ダイオード素子の概略的斜視図、図3は本発明の実施の形態に係る半導体素子である発光ダイオード素子の製造方法を示す概略的斜視図、図4は本発明の実施の形態に係る半導体素子である発光ダイオード素子の製造方法を示す概略的斜視図、図5は本発明の実施の形態に係る半導体素子である発光ダイオード素子の製造方法を示す概略的斜視図、図6は本発明の実施の形態に係る半導体素子である発光ダイオード素子をリードフレームにダイボンディングした状態の概略的正面図である。
【0015】
また、図は本発明の実施の形態に係る半導体素子である半導体レーザ素子の概略的断面図、図は本発明の実施の形態に係る半導体素子である半導体レーザ素子をチップキャリアにダイボンディングした状態の概略的正面図、図は本発明の実施の形態に係る半導体素子であるその他の半導体レーザ素子の概略的断面図である。
【0016】
本発明の実施の形態に係る半導体素子である発光ダイオード素子1000は、Al2 3 (サファイヤ)からなる絶縁性の基板1100の上にN層1110、活性層1120、P層1130、P側透明電極層1140等の各層が積層されて構成されている。そして、前記N層1110の一部が露出されている。従って、このN層1110は、発光ダイオード素子1000の表面側に露出したことになる。かかるN層1110には、発光ダイオード素子1000(半導体素子)の表面側に露出した電極としてのオーミックコンタクト部1180が形成されている。
【0017】
そして、前記P側透明電極1140の片隅、それも前記オーミックコンタクト部1180が形成された側とは反対の側の片隅には、P側ボンディングパッド部1150が形成されている。
【0018】
また、前記基板1100は、裏面側に導電性を有する裏面側ボンディングパッド部1160(裏側電極部)が全面にわたって形成されている。そして、この裏面側ボンディングパッド部1160と、前記オーミックコンタクト部1180とは、発光ダイオード素子1000の側面に形成された導電性膜1170によって電気的に接続されている。
【0019】
このような発光ダイオード素子1000は、次のような製造工程で製造される。まず、基板1100の上にN型GaNであるN層1110と、活性層1120と、P型GaNであるP層1130とをMOVPE等の一般的な結晶成長の手法で積層する。なお、この状態では基板1100はウエハ状である。
【0020】
なお、前記N層1110の厚さは数μm、活性層1120の厚さは数十〜数百nm、P層1130の厚さは数百nmとなっている。
【0021】
最も上面のP層1130、活性層1120及びN層1110の一部をエッチングで除去して、発光部を独立させるとともに、N層1110を露出させる。
【0022】
次に、P層1130等をエッチングで除去することで露出したN層1110に表面側に露出した電極としてのオーミックコンタクト部1180を形成する。このオーミックコンタクト部1180は、Ti/Alを蒸着することによって形成する。そして、このオーミックコンタクト部1180は、図2に示すように、発光ダイオード素子1000の奥行き寸法より若干小さく形成する。従って、オーミックコンタクト部1180は、隣接する発光ダイオード素子1000のオーミックコンタクト部1180とは連ならないように形成される。
【0023】
なお、前記オーミックコンタクト部1180の厚さは、数十〜数百nmとなっている。
【0024】
次に、前記P層1130のほぼ全面にわたってP側透明電極1140を積層する。このP側透明電極1140は、Ni/Auからなる薄膜であって、オーミックコンタクトが可能なものである。
【0025】
さらに、前記P側透明電極1140の上にP側ボンディングパッド部1150を形成する。このP側ボンディングパッド部1150は、Ti/Alからなり、後述するボンディングワイヤ1330が接続される部分である。なお、このP側ボンディングパッド部1150の厚さは、数百nm〜数μmとなっている。
【0026】
上述したようにして各層としてのN層1110、活性層1120、P層1130等を積層した基板1100の裏面を研削、研磨し、厚さを100μm程度にし、裏面側ボンディングパッド部1160を形成する。この裏面側ボンディングパッド部1160は、研磨、鏡面処理した基板1100の裏面の全面にTi/Alを蒸着することで形成する。かかる裏面側ボンディングパッド部1160は、ボンディングパッドとして機能するのみならず、反射材としても機能する。
【0027】
次に、基板1100を切断して、図3に示すような短冊状の基板1100Tとする。この短冊状の基板1100Tには、複数個(図3では5個)の発光ダイオード素子1000となるべき部分が1列に並んでいる。そして、この短冊状の基板1100Tの長手辺の一方(図3では左側)には、前記オーミックオーミック部1180が並んでいる。従って、この短冊状の基板1100Tの長手辺の他方(図3では右側)には、P側ボンディングパッド部1150が並ぶことになる。
【0028】
このような短冊状の基板1100Tを間にスペーサ1200を介在させて複数個(図4及び図5では11個)を重ね合わせる。ここで、前記スペーサ1200の長さ寸法をL1 、幅寸法をW1 とし、短冊状の基板1100Tの長さ寸法をL2 、幅寸法をW2 とした場合、L1 =L2 、W1 >W2 の関係が成立する。しかも、短冊状の基板1100Tのエッチングされた部分の幅寸法をwとした場合、W1 −w<W2 の関係が成立するようになっている。
【0029】
従って、図4に示すように、短冊状の基板1100Tとスペーサ1200との短手辺を一致させるとともに、P側ボンディングパッド部1150が形成された側の長手辺を一致させた状態で、短冊状の基板1100Tとスペーサ1200とを交互に重ね合わせると、オーミックコンタクト部1180が形成された部分と、その裏面側の裏面側ボンディングパッド部1160は、スペーサ1200に覆われることなく露出する。
【0030】
この状態で、短冊状の基板1100Tとスペーサ1200とが交互に重ね合わされたものの側面に導電性膜1170を形成する。この導電性膜1170としては、Ti/Alを蒸着することで形成する。
【0031】
この導電性膜1170は、1つの短冊状の基板1100Tに着目すると、オーミックコンタクト部1180と裏面側ボンディングパッド部1160とを電気的に接続することになる。換言すると、短冊状の基板1100Tの側面、短冊状の基板1100Tを構成する発光ダイオード素子1000となるべきもののオーミックコンタクト部1180及び裏面側ボンディングパッド部1160の3箇所以外は、スペーサ1200で覆われているため、導電性膜1170は前記3箇所以外には付着しないのである。
【0032】
このようにして導電性膜1170が形成された短冊状の基板1100Tをスペーサ1200とともに、ダイシングラインDL(図3参照)から切断すると、図1や図2に示す個々の発光ダイオード素子1000が完成する。
【0033】
このようにして構成された発光ダイオード素子1000は、次のようにしてリードフレーム1300にボンディングされる。まず、図6に示すように、第1リードフレーム1310の反射部1311の底部に発光ダイオード素子1000をダイボンディングする。これによって、裏面側ボンディングパッド1160と導電性膜1170とを介してオーミックコンタクト部1180が第1リードフレーム1310に電気的に接続される。
【0034】
次に、発光ダイオード素子1000の表面に形成されているP側ボンディングパッド部1150と第2リードフレーム1320とをボンディングワイヤ1330で電気的に接続する。
【0035】
このようにしてリードフレーム1300にボンディングされた発光ダイオード素子1000は、図示しないモールド樹脂等によってパッケージされる。
【0036】
また、上述した発光ダイオード素子1000の製造工程において、短冊状の基板1100Tは、複数個の発光ダイオード素子1000となるべき部分が1列に並んでいるとして説明した。しかしながら、複数個の発光ダイオード素子1000となるべき部分は、2列に並んでもよい。この場合には、導電性膜1170の形成のために、オーミックコンタクト部1180が形成される側が外側になるようにすることが大切である。また、この場合には、個々の発光ダイオード素子1000への切断は、まず発光ダイオード素子1000が1列に並ぶように切断した後に、個々の発光ダイオード素子1000となるように切断する必要がある。しかし、このように発光ダイオード素子1000となるべき部分を2列とした場合には、より多くの発光ダイオード素子1000に導電性膜1170を同時に形成することができるので、生産効率の向上に資する。
【0037】
次に、本発明の実施の形態に係る半導体素子である半導体レーザ素子2000について説明する。本発明に係る半導体レーザ素子2000は、図に示すように、Al2 3 (サファイヤ)からなる絶縁性の基板2100の上にN層2110、活性層2120、P層2130、絶縁層2140、P側電極2150等の各層が積層されて構成されている。そして、前記N層2110の一部が露出されている。従って、このN層2110は、半導体レーザ素子2000の表面側に露出したことになる。
【0038】
また、半導体レーザ素子200の表面に露出したN層2110には、オーミックコンタクト部2180が形成されている。
【0039】
前記基板2100は、裏面側に導電性を有するN側電極2160が全面にわたって形成されている。そして、このN側電極2160と、前記オーミックコンタクト部2180とは、半導体レーザ素子200の側面に形成された導電性膜2170によって電気的に接続されている。
【0040】
次に、上述したような半導体レーザ素子2000の製造工程について説明する。まず、基板2100の上にN型GaNであるN層2110と、活性層2120と、P型GaNであるP層2130とを一般的な結晶成長の手法で積層する。なお、この状態では基板2100はウエハ状である。
【0041】
なお、前記N層2110の厚さは数μm、活性層2120の厚さは数十nm、P層2130の厚さは数百nmとなっている。
【0042】
また、この時点で最も上面のP層2130の上に絶縁層2140となるSiO2 を積層する。そして、この絶縁層2140となるSiO2 にストライプ状の溝2141をエッチング等で形成する。
【0043】
最も上面のP層2130、活性層2120及びN層2110の一部をエッチングで除去して、N層2110を露出させる。特に、半導体レーザ素子2000の対向する一対のエッジ部に沿ってエッチングで除去するとよい。
【0044】
次に、溝2141が形成されて絶縁層2140となったSiO2 の上にP側電極2150を形成する。このP側電極2150は、Ni/Auの膜である。従って、P側電極2150は、絶縁層2140の溝2141を介してP層2130に電気的に接続されている。
【0045】
次に、P層2130等をエッチングで除去することで露出したN層2110にオーミックコンタクト部2180を形成する。このオーミックコンタクト部2180は、Ni/Auを蒸着することによって形成する。なお、このオーミックコンタクト部2180は、半導体レーザ素子2000の奥行き寸法より若干小さく形成する。従って、オーミックコンタクト部2180は、隣接する半導体レーザ素子2000のオーミックコンタクト部2180とは連ならないように形成される。
【0046】
上述したようにして各層としてのN層2110、活性層2120、P層2130等を積層した基板2100の裏面を研削、研磨し厚さを100μm程度にした後、N側電極2160(裏側電極部)を形成する。このN側電極2160は、研磨、鏡面処理した基板2100の裏面の全面にTi/Alを蒸着することで形成する。
【0047】
次に、基板2100を切断して、短冊状の基板とする。この短冊状の基板には、複数個(例えば、5個)の半導体レーザ素子2000となるべき部分が1列に並んでいる。そして、この短冊状の基板の長手辺の一方には、前記オーミックオーミック部2180が並んでいる。従って、この短冊状の基板の長手辺の他方には、P側電極2150が並ぶことになる。
【0048】
このような短冊状の基板を間にスペーサを介在させて複数個(例えば、11個)を重ね合わせる。ここで、前記スペーサの長さ寸法をL1 、幅寸法をW1 とし、短冊状の基板の長さ寸法をL2 、幅寸法をW2 とした場合、L1 =L2 、W1 >W2 の関係が成立する。しかも、短冊状の基板のエッチングされた部分の幅寸法をwとした場合、W1 −w<W2 の関係が成立するようになっている。
【0049】
従って、短冊状の基板とスペーサとの短手辺を一致させるとともに、P側電極2150が形成された側の長手辺を一致させた状態で、短冊状の基板とスペーサとを交互に重ね合わせると、オーミックコンタクト部2180が形成された部分と、その裏面側のN側電極2160の一部とは、スペーサに覆われることなく露出する。
【0050】
この状態で、短冊状の基板とスペーサとが交互に重ね合わされたものの側面に導電性膜2170を形成する。この導電性膜2170としては、Ti/Alを蒸着することで構成する。
【0051】
すると、導電性膜2170は、1つの短冊状の基板に着目すると、オーミックコンタクト部2180とN側電極2160とを電気的に接続することになる。換言すると、短冊状の基板の側面、短冊状の基板を構成する半導体レーザ素子2000となるべきもののオーミックコンタクト部2180及びN側電極2160の3箇所以外は、スペーサで覆われているため、導電性膜2170は前記3箇所以外には付着しないのである。
【0052】
このようにして導電性膜2170が形成された短冊状の基板をスペーサとともに、ダイシングラインDLから切断すると、図に示す個々の半導体レーザ素子2000が完成する。
【0053】
なお、上述した短冊状の基板への切断、スペーサとの交互の重ね合わせ、導電性膜2170の形成、個々の半導体レーザ素子2000への切断は、上述した発光ダイオード素子1000の場合とまったく同一である。
【0054】
このようにして構成された半導体レーザ素子2000は、次のようにしてチップキャリア2300にボンディングされる。まず、図に示すように、チップキャリア2300の表面に形成されたダイボンディング部2310の上に、半導体レーザ素子2000のP側電極2150がダイボンディングされる。すると、半導体レーザ素子2000は、N側電極部2160が上を向いた状態でチップキャリア2300にダイボンディングされる。
【0055】
次に、チップキャリア2300の表面に形成されたワイヤボンディング部2320と、半導体レーザ素子2000のN側電極2160とをボンディングワイヤ2330で電気的に接続する。
【0056】
このようにしてチップキャリア2300にボンディングされた半導体レーザ素子2000は、図示しないステム、カバー等によってパッケージされる。
【0057】
さらに、上述した説明では、導電性膜2170は溝2141に対して平行な側面に形成したが、図に示すように、導電性膜2170を溝2141に対して直交する側面に形成してもよい。この場合には、導電性膜形成には、マスキングが必要であるが、この工程と相前後して端面の保護もしくは反射率調整を目的とした端面コーティングを同じ短冊状のまま行なうことができるという利点がある。
【0058】
【発明の効果】
本発明に係る半導体素子の製造方法は、絶縁性又は高抵抗のウエハーの基板の表面上にN層、活性層及びP層を順次積層する工程と、N層、活性層及びP層の一部をエッチングして前記N層の表面上の外側端部を露出させる工程と、前記N層の露出表面上に各素子のオーミック電極を各々形成するとともに前記基板の裏面の全面に裏面側ボンディングパット部を形成する工程と、前記基板を切断することにより複数の素子が形成された短冊状の基板を作成する工程と、前記N層の露出表面上及び基板裏面上の外側端部が露出するように複数の前記短冊状の基板を板状のスペーサを挟んで交互に重ね合わせる工程と、重ね合わされた状態の前記短冊状の基板及びスペーサに金属蒸着を行うことにより前記各素子のオーミック電極と裏面側ボンディングパット部との間を電気接続するための導電性膜を各々形成する工程と、前記短冊状の基板を切断することにより前記基板から各素子を切り離す工程とを具備している。
【0059】
このように発光ダイオード素子や半導体レーザ素子の表裏両面に電極を形成することができるので、従来の低抵抗基板を用いた半導体素子の製造に用いられる組立装置や副材料を流用することができるとともに、放熱特性に優れた半導体素子を得ることができる。また、歩留りを向上させることが可能となる。更に、各素子の導電性膜を同時に形成することができるとので、生産効率の向上に資することになる。
【0064】
【図面の簡単な説明】
【図1】本発明の実施の形態に係る半導体素子である発光ダイオード素子の概略的断面図である。
【図2】本発明の実施の形態に係る半導体素子である発光ダイオード素子の概略的斜視図である。
【図3】本発明の実施の形態に係る半導体素子である発光ダイオード素子の製造方法を示す概略的斜視図である。
【図4】本発明の実施の形態に係る半導体素子である発光ダイオード素子の製造方法を示す概略的斜視図である。
【図5】本発明の実施の形態に係る半導体素子である発光ダイオード素子の製造方法を示す概略的斜視図である。
【図6】本発明の実施の形態に係る半導体素子である発光ダイオード素子をリードフレームにダイボンディングした状態の概略的正面図である。
【図】本発明の実施の形態に係る半導体素子である半導体レーザ素子の概略的断面図である。
【図】本発明の実施の形態に係る半導体素子である半導体レーザ素子をチップキャリアにダイボンディングした状態の概略的正面図である。
【図】本発明の実施の形態に係る半導体素子であるその他の半導体レーザ素子の概略的断面図である。
【図10】従来の発光ダイオード素子の概略的断面図である。
【図11】従来の発光ダイオード素子をリードフレームにボンディングした状態の概略的正面図である。
【図12】従来の半導体レーザ素子の概略的断面図である。
【図13】従来の半導体レーザ素子をリードフレームにボンディングした状態の概略的正面図である。
【0065】
【符号の説明】
1000 発光ダイオード素子
1100 基板
1110 N層
1120 活性層
1130 P層
1140 P側透明電極
1150 P側ボンディングパッド部
1160 裏面側ボンディングパッド部
1170 導電性膜
1180 オーミックコンタクト部
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device which is a light emitting diode or a semiconductor laser device in which layers are stacked on an insulating or high resistance substrate.
[0002]
[Prior art]
Among the light emitting diode element 3000 as a semiconductor element, those of GaN-based, as shown in FIG. 10, on the Al 2 O 3 (sapphire) or SiC (silicon carbide) insulating or high-resistance substrate 3100, such as It is configured by laminating layers such as an N layer 3110, an active layer 3120, a P layer 3130, a transparent electrode layer 3140, and the like. In such a light emitting diode element 3000, an electrode cannot be formed on the lower surface side of the substrate 3100, and therefore, two electrodes 3151 and 3152 are formed on the surface side of the light emitting diode element 3000. That is, one electrode 3151 is formed on the transparent electrode layer 3140, and the other electrode 3152 is formed on the exposed N layer 3110.
[0003]
The light emitting diode element 3000 in which two electrodes 3151,3152 are formed on the surface side as is shown in FIG. 11, the lead frame 3300A, the 3300B, are die-bonded. In the type shown in FIG. 11A , the electrodes 3151 and 3152 are bumped 3331A and 3332A with the surface side on which the electrodes 3151 and 3152 are formed facing the lead frame 3300A, that is, the light emitting diode element 3000 is inverted. To the first connection portion 3310A and the second connection portion 3320A of the lead frame 3300A.
[0004]
Further, FIG 11 If it is the type (B), the light emitting diode element 3000 is die-bonded to the first connection portion 3310B, the first two electrodes 3151,3152 bonding wire 3331b, at 3332B connection portion 3310B and the second Connect to connection 3320B.
[0005]
This applies not only to the light emitting diode element 3000 but also to the semiconductor laser element 4000. As shown in FIG. 12 , the semiconductor laser element 4000 includes an N layer 4110, an active layer 4120, and a P layer 4130 on an insulating or high resistance substrate 4100 such as Al 2 O 3 (sapphire) or SiC (silicon carbide). Further, each layer such as the insulating layer 4140 is laminated. In such a semiconductor laser element 4000, since electrodes cannot be formed on the lower surface side of the substrate 4100, two electrodes 4150 and 4160 are formed on the surface side of the semiconductor laser element 4000. That is, one electrode 4150 is formed on the P layer 4130 exposed from the insulating layer 4140 through the groove 4141, and the other electrode 4160 is formed on the exposed N layer 4110.
[0006]
The semiconductor laser device 4000 configured as described above is die-bonded to the chip carrier 4300. In the type shown in FIG. 13A , the surface side on which the electrodes 4150 and 4160 are formed faces the chip carrier 430. That is, the semiconductor laser element 4000 is turned upside down, and the electrodes 4150 and 4160 are connected to the pads of the chip carrier 4300 via the bumps 4310 and 4320, respectively.
[0007]
Further, if it is the type shown in FIG. 13 (B), the semiconductor laser device 4000 is die-bonded to the chip carrier 4300, is connected to each pad two electrodes 4150,4160 by bonding wires 4330,4340.
[0008]
In the case of a light emitting diode element or semiconductor laser element using a GaAs-based or GaP-based low-resistance substrate, an electrode can be formed on the lower surface side of the substrate.
[0009]
[Problems to be solved by the invention]
However, the light emitting diode element 3000 and the semiconductor laser element 4000 as described above have the following problems. First, in the light emitting diode element 3000, since two electrodes 3151 and 3152 are formed on the front surface side, a GaAs-based or GaP-based substrate which is a low resistance substrate capable of forming one electrode on the lower surface side of the substrate. A device for evaluating a light emitting diode element or a device for assembly cannot be used, and a dedicated product is required. In addition, special materials are also required for sub-materials such as lead frames.
[0010]
Further, in order to die-bond the semiconductor laser element 4000 as shown in FIG. 13A , high dimensional accuracy of the semiconductor laser element and alignment accuracy during assembly are required. For this reason, in order to ensure the accuracy, it is necessary to reduce the number that can be formed on one wafer and increase the size of the semiconductor laser element. In other words, this cannot improve the yield. Further, the number that can be formed on a wafer by reducing the semiconductor laser device in preference, the lower surface of the substrate as shown in FIG. 13 (B) had to be die-bonded. However, this has a problem in heat dissipation.
[0011]
The present invention was devised in view of the above circumstances, and even if an insulating or high-resistance substrate is used, an assembly apparatus or a secondary material is not required as in the conventional case, and the yield is improved. An object of the present invention is to provide a semiconductor element method which is possible and excellent in heat dissipation.
[0012]
[Means for Solving the Problems]
A method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device of a light emitting diode or a semiconductor laser device, wherein an N layer, an active layer, and a P layer are sequentially stacked on the surface of a substrate of an insulating or high resistance wafer. A step of etching a part of the N layer, the active layer and the P layer to expose an outer end portion on the surface of the N layer, and an ohmic electrode of each element on the exposed surface of the N layer. Forming a backside bonding pad portion on the entire backside of the substrate, forming a strip-shaped substrate having a plurality of elements formed by cutting the substrate, and exposing the N layer A step of alternately stacking the plurality of strip-shaped substrates with a plate-shaped spacer interposed therebetween so that the outer edge portions on the front surface and the back surface of the substrate are exposed; and the strip-shaped substrate and the space in the stacked state. Forming a conductive film for electrical connection between the ohmic electrode of each element and the backside bonding pad portion by performing metal deposition on the substrate, and cutting the strip-shaped substrate Separating each element from the substrate.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
1 is a schematic cross-sectional view of a light-emitting diode element that is a semiconductor element according to an embodiment of the present invention. FIG. 2 is a schematic perspective view of the light-emitting diode element that is a semiconductor element according to an embodiment of the present invention. FIG. 4 is a schematic perspective view showing a method for manufacturing a light-emitting diode element that is a semiconductor element according to an embodiment of the present invention, and FIG. 4 is a schematic diagram showing a method for manufacturing the light-emitting diode element that is a semiconductor element according to an embodiment of the present invention. FIG. 5 is a schematic perspective view showing a method for manufacturing a light-emitting diode element that is a semiconductor element according to an embodiment of the present invention, and FIG. 6 is a light-emitting diode element that is a semiconductor element according to an embodiment of the present invention. It is a schematic front view of the state which carried out die bonding to the lead frame.
[0015]
FIG. 7 is a schematic cross-sectional view of a semiconductor laser element that is a semiconductor element according to an embodiment of the present invention. FIG. 8 is a diagram illustrating die bonding of a semiconductor laser element that is a semiconductor element according to an embodiment of the present invention to a chip carrier. FIG. 9 is a schematic cross-sectional view of another semiconductor laser device which is a semiconductor device according to an embodiment of the present invention.
[0016]
A light-emitting diode element 1000 which is a semiconductor element according to an embodiment of the present invention includes an N layer 1110, an active layer 1120, a P layer 1130, and a P-side transparent on an insulating substrate 1100 made of Al 2 O 3 (sapphire). Each layer such as the electrode layer 1140 is laminated. A part of the N layer 1110 is exposed. Therefore, the N layer 1110 is exposed on the surface side of the light emitting diode element 1000. The N layer 1110 is formed with an ohmic contact portion 1180 as an electrode exposed on the surface side of the light emitting diode element 1000 (semiconductor element).
[0017]
A P-side bonding pad portion 1150 is formed at one corner of the P-side transparent electrode 1140, that is, the other corner opposite to the side where the ohmic contact portion 1180 is formed.
[0018]
Further, the substrate 1100 has a back surface side bonding pad portion 1160 (back side electrode portion) having conductivity on the entire back surface. And this back surface side bonding pad part 1160 and the said ohmic contact part 1180 are electrically connected by the electroconductive film 1170 formed in the side surface of the light emitting diode element 1000. FIG.
[0019]
Such a light emitting diode element 1000 is manufactured by the following manufacturing process. First, an N layer 1110 that is N-type GaN, an active layer 1120, and a P layer 1130 that is P-type GaN are stacked on a substrate 1100 by a general crystal growth technique such as MOVPE. In this state, the substrate 1100 has a wafer shape.
[0020]
The N layer 1110 has a thickness of several μm, the active layer 1120 has a thickness of several tens to several hundreds of nm, and the P layer 1130 has a thickness of several hundreds of nm.
[0021]
The P layer 1130, the active layer 1120, and the N layer 1110 on the top surface are partially removed by etching to make the light emitting portion independent and to expose the N layer 1110.
[0022]
Next, an ohmic contact portion 1180 as an electrode exposed on the surface side is formed on the N layer 1110 exposed by removing the P layer 1130 and the like by etching. The ohmic contact portion 1180 is formed by depositing Ti / Al. The ohmic contact portion 1180 is formed slightly smaller than the depth dimension of the light emitting diode element 1000 as shown in FIG. Accordingly, the ohmic contact portion 1180 is formed so as not to be connected to the ohmic contact portion 1180 of the adjacent light emitting diode element 1000.
[0023]
The ohmic contact portion 1180 has a thickness of several tens to several hundreds of nanometers.
[0024]
Next, a P-side transparent electrode 1140 is stacked over almost the entire surface of the P layer 1130. The P-side transparent electrode 1140 is a thin film made of Ni / Au and can make ohmic contact.
[0025]
Further, a P-side bonding pad portion 1150 is formed on the P-side transparent electrode 1140. The P-side bonding pad portion 1150 is made of Ti / Al and is a portion to which a bonding wire 1330 described later is connected. The P-side bonding pad portion 1150 has a thickness of several hundred nm to several μm.
[0026]
As described above, the back surface of the substrate 1100 on which the N layer 1110, the active layer 1120, the P layer 1130, etc. as the respective layers are laminated is ground and polished to a thickness of about 100 μm, and the back surface side bonding pad portion 1160 is formed. The back surface side bonding pad portion 1160 is formed by vapor-depositing Ti / Al on the entire back surface of the polished and mirrored substrate 1100. The back surface side bonding pad portion 1160 not only functions as a bonding pad but also functions as a reflector.
[0027]
Next, the substrate 1100 is cut into a strip-shaped substrate 1100T as shown in FIG. In this strip-shaped substrate 1100T, a plurality of (five in FIG. 3) light-emitting diode elements 1000 are arranged in a line. The ohmic ohmic portion 1180 is arranged on one side (left side in FIG. 3) of the long side of the strip-shaped substrate 1100T. Therefore, the P-side bonding pad portion 1150 is arranged on the other long side (the right side in FIG. 3) of the strip-shaped substrate 1100T.
[0028]
A plurality (11 in FIGS. 4 and 5) of such strip-shaped substrates 1100T are overlapped with a spacer 1200 interposed therebetween. Here, when the length of the spacer 1200 is L 1 , the width is W 1 , the length of the strip-shaped substrate 1100T is L 2 , and the width is W 2 , L 1 = L 2 , W The relationship 1 > W 2 is established. Moreover, when the width dimension of the etched portion of the strip-shaped substrate 1100T is w, the relationship of W 1 −w <W 2 is established.
[0029]
Accordingly, as shown in FIG. 4, the strip-shaped substrate 1100T and the spacer 1200 are made to coincide with the short sides, and the long sides on the side where the P-side bonding pad portion 1150 is formed are made to coincide with each other. When the substrate 1100T and the spacer 1200 are alternately overlapped, the portion where the ohmic contact portion 1180 is formed and the back surface side bonding pad portion 1160 on the back surface side are exposed without being covered with the spacer 1200.
[0030]
In this state, a conductive film 1170 is formed on the side surface of the strip-shaped substrate 1100T and the spacer 1200 alternately stacked. The conductive film 1170 is formed by depositing Ti / Al.
[0031]
The conductive film 1170 electrically connects the ohmic contact portion 1180 and the back surface side bonding pad portion 1160 when focusing on one strip-shaped substrate 1100T. In other words, the side surface of the strip-shaped substrate 1100T, the ohmic contact portion 1180 and the back surface-side bonding pad portion 1160 of the light-emitting diode element 1000 constituting the strip-shaped substrate 1100T are covered with the spacer 1200. Therefore, the conductive film 1170 does not adhere to other than the three places.
[0032]
When the strip-shaped substrate 1100T on which the conductive film 1170 is formed in this manner is cut from the dicing line DL (see FIG. 3) together with the spacer 1200, the individual light emitting diode elements 1000 shown in FIGS. 1 and 2 are completed. .
[0033]
The light emitting diode element 1000 configured as described above is bonded to the lead frame 1300 as follows. First, as shown in FIG. 6, the light emitting diode element 1000 is die-bonded to the bottom of the reflecting portion 1311 of the first lead frame 1310. As a result, the ohmic contact portion 1180 is electrically connected to the first lead frame 1310 via the back surface side bonding pad 1160 and the conductive film 1170.
[0034]
Next, the P-side bonding pad portion 1150 formed on the surface of the light emitting diode element 1000 and the second lead frame 1320 are electrically connected by a bonding wire 1330.
[0035]
The light emitting diode element 1000 bonded to the lead frame 1300 in this way is packaged with a mold resin or the like (not shown).
[0036]
In the above-described manufacturing process of the light emitting diode element 1000, the strip-shaped substrate 1100T has been described as having a plurality of portions to be the light emitting diode elements 1000 arranged in a line. However, the portions to be the plurality of light emitting diode elements 1000 may be arranged in two rows. In this case, in order to form the conductive film 1170, it is important that the side on which the ohmic contact portion 1180 is formed be on the outside. In this case, the individual light emitting diode elements 1000 need to be cut such that the light emitting diode elements 1000 are first cut in a line and then cut into individual light emitting diode elements 1000. However, when the portions to be the light emitting diode elements 1000 are arranged in two rows in this way, the conductive film 1170 can be formed on more light emitting diode elements 1000 at the same time, which contributes to an improvement in production efficiency.
[0037]
Next, a semiconductor laser device 2000 that is a semiconductor device according to an embodiment of the present invention will be described. As shown in FIG. 7 , a semiconductor laser device 2000 according to the present invention has an N layer 2110, an active layer 2120, a P layer 2130, an insulating layer 2140 on an insulating substrate 2100 made of Al 2 O 3 (sapphire). Each layer such as the P-side electrode 2150 is laminated. A part of the N layer 2110 is exposed. Therefore, the N layer 2110 is exposed on the surface side of the semiconductor laser element 2000.
[0038]
An ohmic contact portion 2180 is formed on the N layer 2110 exposed on the surface of the semiconductor laser element 200.
[0039]
The substrate 2100 has a conductive N-side electrode 2160 formed on the entire back surface. The N-side electrode 2160 and the ohmic contact portion 2180 are electrically connected by a conductive film 2170 formed on the side surface of the semiconductor laser element 200.
[0040]
Next, a manufacturing process of the semiconductor laser element 2000 as described above will be described. First, an N layer 2110 that is N-type GaN, an active layer 2120, and a P layer 2130 that is P-type GaN are stacked on a substrate 2100 by a general crystal growth technique. In this state, the substrate 2100 has a wafer shape.
[0041]
The N layer 2110 has a thickness of several μm, the active layer 2120 has a thickness of several tens of nm, and the P layer 2130 has a thickness of several hundred nm.
[0042]
At this time, SiO 2 to be the insulating layer 2140 is laminated on the uppermost P layer 2130. Then, a stripe-shaped groove 2141 is formed in the SiO 2 to be the insulating layer 2140 by etching or the like.
[0043]
The uppermost P layer 2130, active layer 2120 and part of the N layer 2110 are removed by etching to expose the N layer 2110. In particular, it may be removed by etching along a pair of facing edge portions of the semiconductor laser element 2000.
[0044]
Next, a P-side electrode 2150 is formed on SiO 2 in which the trench 2141 is formed and becomes the insulating layer 2140. The P-side electrode 2150 is a Ni / Au film. Accordingly, the P-side electrode 2150 is electrically connected to the P layer 2130 through the groove 2141 of the insulating layer 2140.
[0045]
Next, an ohmic contact portion 2180 is formed on the N layer 2110 exposed by removing the P layer 2130 and the like by etching. The ohmic contact portion 2180 is formed by depositing Ni / Au. The ohmic contact portion 2180 is formed slightly smaller than the depth dimension of the semiconductor laser element 2000. Accordingly, the ohmic contact portion 2180 is formed so as not to be connected to the ohmic contact portion 2180 of the adjacent semiconductor laser element 2000.
[0046]
As described above, the back surface of the substrate 2100 on which the N layer 2110, the active layer 2120, the P layer 2130, etc. as the respective layers are laminated is ground and polished to a thickness of about 100 μm, and then the N side electrode 2160 (back side electrode portion) Form. The N-side electrode 2160 is formed by depositing Ti / Al on the entire back surface of the polished and mirror-finished substrate 2100.
[0047]
Next, the substrate 2100 is cut into a strip-shaped substrate. In this strip-shaped substrate, a plurality of (for example, five) portions to be semiconductor laser elements 2000 are arranged in a line. The ohmic ohmic portion 2180 is arranged on one of the long sides of the strip-shaped substrate. Therefore, the P-side electrode 2150 is arranged on the other long side of the strip-shaped substrate.
[0048]
A plurality of (for example, 11) such strip-shaped substrates are overlapped with a spacer interposed therebetween. Here, if the length of the spacer L 1, the width dimension and W 1, the length of the strip-shaped substrate with L 2, the width and W 2, L 1 = L 2 , W 1> the relationship of W 2 is established. In addition, when the width dimension of the etched portion of the strip-shaped substrate is w, the relationship of W 1 −w <W 2 is established.
[0049]
Accordingly, when the strip-shaped substrate and the spacer are alternately overlapped with the short sides of the strip-shaped substrate and the spacer being matched and the long sides of the side where the P-side electrode 2150 is formed are matched. A portion where the ohmic contact portion 2180 is formed and a part of the N-side electrode 2160 on the back surface side thereof are exposed without being covered by the spacer.
[0050]
In this state, a conductive film 2170 is formed on the side surface of the strip-shaped substrate and the spacers alternately stacked. The conductive film 2170 is formed by depositing Ti / Al.
[0051]
Then, when the conductive film 2170 pays attention to one strip-shaped substrate, the ohmic contact portion 2180 and the N-side electrode 2160 are electrically connected. In other words, the side surfaces of the strip-shaped substrate, the ohmic contact portion 2180 and the N-side electrode 2160 other than the three portions of the semiconductor laser element 2000 constituting the strip-shaped substrate are covered with spacers, so that the conductive The film 2170 does not adhere to other than the three places.
[0052]
When the strip-shaped substrate on which the conductive film 2170 is formed in this way is cut from the dicing line DL together with the spacers, the individual semiconductor laser elements 2000 shown in FIG. 7 are completed.
[0053]
The above-described cutting into strip-shaped substrates, alternating superposition with spacers, formation of the conductive film 2170, and cutting into individual semiconductor laser elements 2000 are exactly the same as in the case of the above-described light-emitting diode element 1000. is there.
[0054]
The semiconductor laser device 2000 configured in this way is bonded to the chip carrier 2300 as follows. First, as shown in FIG. 8 , the P-side electrode 2150 of the semiconductor laser element 2000 is die-bonded on the die bonding portion 2310 formed on the surface of the chip carrier 2300. Then, the semiconductor laser element 2000 is die-bonded to the chip carrier 2300 with the N-side electrode portion 2160 facing upward.
[0055]
Next, the wire bonding part 2320 formed on the surface of the chip carrier 2300 and the N-side electrode 2160 of the semiconductor laser element 2000 are electrically connected by a bonding wire 2330.
[0056]
The semiconductor laser element 2000 bonded to the chip carrier 2300 in this way is packaged by a stem, a cover, etc. (not shown).
[0057]
Further, in the above description, the conductive film 2170 is formed on the side surface parallel to the groove 2141. However, as shown in FIG. 9 , the conductive film 2170 may be formed on the side surface orthogonal to the groove 2141. Good. In this case, masking is necessary for forming the conductive film, but the end face coating for the purpose of protecting the end face or adjusting the reflectivity can be performed in the same strip shape before and after this step. There are advantages.
[0058]
【The invention's effect】
A method of manufacturing a semiconductor device according to the present invention includes a step of sequentially stacking an N layer, an active layer, and a P layer on the surface of a substrate of an insulating or high resistance wafer, and a part of the N layer, the active layer, and the P layer. And exposing an outer end portion on the surface of the N layer, forming ohmic electrodes for each element on the exposed surface of the N layer, and forming a back surface side bonding pad portion on the entire back surface of the substrate. Forming a strip-shaped substrate in which a plurality of elements are formed by cutting the substrate, and exposing the outer end portions on the exposed surface of the N layer and on the back surface of the substrate. The step of alternately stacking a plurality of the strip-shaped substrates with a plate-shaped spacer interposed therebetween, and metal deposition is performed on the strip-shaped substrate and the spacers in the stacked state, and the ohmic electrodes and the back surface side of each element Bonde A step of respectively forming a conductive film for electrically connecting the Ngupatto portion, and a step of disconnecting the elements from the substrate by cutting the strip-shaped substrate.
[0059]
As described above, the electrodes can be formed on both the front and back surfaces of the light emitting diode element and the semiconductor laser element, so that it is possible to divert the assembling apparatus and sub-materials used for manufacturing the semiconductor element using the conventional low resistance substrate. A semiconductor element having excellent heat dissipation characteristics can be obtained. In addition, the yield can be improved. Furthermore, since the conductive film of each element can be formed simultaneously, it contributes to the improvement of production efficiency.
[0064]
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a light-emitting diode element which is a semiconductor element according to an embodiment of the present invention.
FIG. 2 is a schematic perspective view of a light-emitting diode element which is a semiconductor element according to an embodiment of the present invention.
FIG. 3 is a schematic perspective view showing a method for manufacturing a light-emitting diode element which is a semiconductor element according to an embodiment of the present invention.
FIG. 4 is a schematic perspective view showing a method for manufacturing a light-emitting diode element which is a semiconductor element according to an embodiment of the present invention.
FIG. 5 is a schematic perspective view showing a method for manufacturing a light-emitting diode element which is a semiconductor element according to an embodiment of the present invention.
FIG. 6 is a schematic front view showing a state where a light-emitting diode element, which is a semiconductor element according to an embodiment of the present invention, is die-bonded to a lead frame.
FIG. 7 is a schematic cross-sectional view of a semiconductor laser device which is a semiconductor device according to an embodiment of the present invention.
FIG. 8 is a schematic front view showing a state in which a semiconductor laser element, which is a semiconductor element according to an embodiment of the present invention, is die-bonded to a chip carrier.
FIG. 9 is a schematic cross-sectional view of another semiconductor laser element which is a semiconductor element according to an embodiment of the present invention.
FIG. 10 is a schematic cross-sectional view of a conventional light emitting diode device.
FIG. 11 is a schematic front view of a conventional light emitting diode device bonded to a lead frame.
FIG. 12 is a schematic cross-sectional view of a conventional semiconductor laser device.
FIG. 13 is a schematic front view of a conventional semiconductor laser device bonded to a lead frame.
[0065]
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1000 Light emitting diode element 1100 Substrate 1110 N layer 1120 Active layer 1130 P layer 1140 P side transparent electrode 1150 P side bonding pad part 1160 Back surface side bonding pad part 1170 Conductive film 1180 Ohmic contact part

Claims (1)

発光ダイオード又は半導体レーザ素子の半導体素子を製造する方法において、絶縁性又は高抵抗のウエハーの基板の表面上にN層、活性層及びP層を順次積層する工程と、N層、活性層及びP層の一部をエッチングして前記N層の表面上の外側端部を露出させる工程と、前記N層の露出表面上に各素子のオーミック電極を各々形成するとともに前記基板の裏面の全面に裏面側ボンディングパット部を形成する工程と、前記基板を切断することにより複数の素子が形成された短冊状の基板を作成する工程と、前記N層の露出表面上及び基板裏面上の外側端部が露出するように複数の前記短冊状の基板を板状のスペーサを挟んで交互に重ね合わせる工程と、重ね合わされた状態の前記短冊状の基板及びスペーサに金属蒸着を行うことにより前記各素子のオーミック電極と裏面側ボンディングパット部との間を電気接続するための導電性膜を各々形成する工程と、前記短冊状の基板を切断することにより前記基板から各素子を切り離す工程とを具備することを特徴とする半導体素子の製造方法。In a method of manufacturing a semiconductor device such as a light emitting diode or a semiconductor laser device, a step of sequentially stacking an N layer, an active layer, and a P layer on the surface of a substrate of an insulating or high resistance wafer; Etching a part of the layer to expose an outer edge on the surface of the N layer; forming an ohmic electrode for each element on the exposed surface of the N layer; A step of forming a side bonding pad portion, a step of forming a strip-shaped substrate having a plurality of elements formed by cutting the substrate, and an outer end portion on the exposed surface of the N layer and on the back surface of the substrate. A plurality of the strip-shaped substrates that are alternately exposed so as to be exposed with plate-shaped spacers interposed therebetween, and metal deposition is performed on the strip-shaped substrates and spacers in the superimposed state. Forming a conductive film for electrically connecting the ohmic electrode of the child and the backside bonding pad part, and separating each element from the substrate by cutting the strip-shaped substrate A method for manufacturing a semiconductor device, comprising:
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