JP3964850B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device technology, and particularly to a technology effective when applied to a semiconductor device having a TCP (Tape Carrier Package) structure capable of high-density mounting.

  2. Description of the Related Art With the development and manufacture of small, thin, and highly functional electronic devices, TCP that can be mounted in a thin shape and can be multi-pin in a package constituting the electronic device has attracted attention.

  The TCP is a package in which conductor leads repeatedly formed on a tape carrier and electrodes of a semiconductor chip are overlapped and bonded, and the semiconductor chip is sealed with a sealing resin or the like.

  The basic structure of TCP is usually that the thickness of the semiconductor chip is thicker than the thickness of the tape carrier, and the mounting height is high even if it is stacked as a single unit. In order to reduce the mounting height, for example, JP-A-63-52431 describes a tape carrier having a structure in which the back surface of a semiconductor chip is cut (see Patent Document 1). Japanese Patent Laid-Open No. 5-291218 discloses a technique for simultaneously thinning the back surface of a semiconductor chip and a peripheral tape (see Patent Document 2).

  In addition, a frame called a stiffener is provided around the semiconductor chip whose back surface is bonded to the heat spreader, a tape carrier is installed on the stiffener, and one end of the lead is bonded to the semiconductor chip. There is also a TCP structure in which a bump electrode is provided on the end side. In this case, the TCP is thick overall and is not a structure that can be stacked.

  Further, in the TCP structure examined by the present inventors, a semiconductor chip thinner than the tape carrier is arranged in the device hole of the tape carrier so that the back surface thereof is substantially the same as the back surface of the tape carrier, and the semiconductor chip There is a TCP structure in which a main surface and side surfaces are covered with a sealing resin. In this case, since only the main surface and side surfaces of the semiconductor chip are sealed with the sealing resin, there arises a problem that the semiconductor chip warps after the sealing step. In the case of this technique, a hard plate for preventing chip cracks is provided on the back surface of the semiconductor chip. However, the TCP thickness is increased for this purpose, and the structure cannot be laminated. In addition, the structure in which the sealing plate is provided on the sealing resin is not a structure in which the TCP thickness becomes thick and can be laminated. A thin package structure in which the lower surface of the film substrate and the back surface of the chip are on the same plane is described in, for example, Japanese Patent Application Laid-Open No. 60-106153 (see Patent Document 3).

When laminating such a TCP, according to the technology studied by the present inventors, the thickness of the semiconductor chip is usually thicker than that of the tape carrier, so that the outer leads are arranged so that the semiconductor chip does not contact the mounting substrate. It is molded in a gull wing shape. In addition, when mounting a plurality of them in the thickness direction of the TCP, manufacture TCPs with different outer lead lengths, and lower the mounting height after lead molding, A mounting method is adopted in which the top one is high. However, in this case, different tape carriers are used to change the outer lead dimensions so that they overlap. Therefore, a plurality of types of tape carriers and molding dies are required, and the manufacturing cost increases. The TCP stacking technique is described in, for example, Japanese Patent Application Laid-Open No. 64-71162 (see Patent Document 4).
JP-A-63-52431 Japanese Patent Laid-Open No. 5-291218 JP-A-60-106153 JP-A 64-71162

  As described above, in TCP technology, how to obtain a small, thin and highly reliable TCP is an important issue.

  An object of the present invention is to provide a technique capable of obtaining a small, thin, and highly reliable semiconductor device having a TCP structure.

  An object of the present invention is to provide a technology capable of obtaining a semiconductor device having a small, thin, high-density mounting, and having a highly reliable TCP structure at low cost.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, according to the present invention, a semiconductor chip thinner than the thickness of the tape carrier is disposed in each device hole of the plurality of stacked tape carriers, and the leads provided in each of the plurality of stacked tape carriers. One end of each of the semiconductor chips and the external terminals of the semiconductor chips in the respective device holes are electrically connected, and each of the semiconductor chips is covered with a sealing resin on both the main surface and the back surface, and the plurality of the semiconductor chips are stacked. In addition, the common signal and power supply leads of the tape carrier are electrically connected to each other and have a stacked package structure that is led out as a connection terminal that is electrically connected to the wiring of the mounting board.

  The outline of a representative one of the other inventions disclosed in the present application will be briefly described as follows.

  A semiconductor device according to the present invention includes a semiconductor chip disposed in a device hole provided in a tape carrier, and electrically connected one end of a lead provided in the tape carrier and an external terminal of the semiconductor chip. In the semiconductor device, the thickness of the semiconductor chip is made thinner than the thickness of the tape carrier, and the semiconductor chip is sealed with a sealing resin so that both the main surface and the back surface are covered. is there. Thereby, the stress which a semiconductor chip receives from the main surface and the back surface can be made small.

  In the semiconductor device of the present invention, the semiconductor chip is arranged on a stress neutral plane parallel to the main surface of the semiconductor chip at a position in the thickness direction of the tape carrier. As a result, the semiconductor chip can be disposed at a position where the stress received from the TCP is the smallest, and even if an external force is applied and the entire tcp is deformed, the stress received by the semiconductor chip is small. Therefore, it is possible to greatly reduce the incidence of chip cracks and connection failures when mounting semiconductor devices.

  In the semiconductor device of the present invention, a communication port for injecting a sealing resin is formed in a part of the tape carrier so as to communicate the gate of the mold used in the molding process of the sealing resin and the device hole. It is. As a result, since the sealing resin can be uniformly injected onto both the main surface and the back surface of the semiconductor chip, the formation of voids and traps in the sealing resin can be greatly reduced. It becomes possible.

  Further, in the semiconductor device of the present invention, the tape carrier is formed with a communication port for air discharge for communicating a mold air vent used in the sealing resin molding step and a device hole of the tape carrier. . This can reduce the air remaining in the sealing resin that covers both the main surface and back surface of the semiconductor chip, greatly reducing the formation of voids and traps in the sealing resin. It becomes possible to do. Therefore, the reliability of the semiconductor device can be further improved.

  In the semiconductor device of the present invention, a plating process is performed on the surface of the tape carrier in the vicinity of the communication port for injecting the sealing resin, where the sealing resin contacts in the sealing resin molding process. The metal layer formed is formed. Thereby, since the adhesive force between the sealing resin and the tape carrier can be reduced, the resin and the tape carrier in the sub-runner can be easily separated when separating the TCP and the resin of the sub-runner after the resin sealing process. Is possible.

  In the semiconductor device of the present invention, the back surface of the semiconductor chip is polished by a spin etching method. Thereby, the semiconductor chip can be thinned. Further, since the back surface of the semiconductor chip can be smoothed, the semiconductor chip can be made to have a structure that is strong against bending stress and hardly cracked.

  In the semiconductor device of the present invention, a semiconductor chip thinner than the thickness of the tape carrier is disposed in each device hole of the plurality of stacked tape carriers, and is provided in each of the plurality of stacked tape carriers. One end of each of the leads is electrically connected to an external terminal of the semiconductor chip in each of the device holes, and each of the semiconductor chips is covered with a sealing resin on both the main surface and the back surface, Having a stacked package structure in which the common signal and power supply leads of the individually stacked tape carriers are electrically connected to each other and connected to the wiring of the mounting board as a connection terminal. It is. As a result, it is possible to obtain a thin TCP semiconductor device having a high mounting density of semiconductor chips.

  In the semiconductor device of the present invention, a connection hole is formed in each of the plurality of stacked tape carriers so that a part of the lead is exposed, and a part of the lead protrudes into the connection hole. In this way, the conductor material is embedded in the connection hole, whereby the common signal and power supply leads of each of the plurality of stacked tape carriers are electrically connected to each other. Thereby, the lead and the conductor material can be reliably brought into contact with each other in the connection hole, so that the connection reliability within the connection hole can be improved.

  Further, in the semiconductor device of the present invention, each of the plurality of stacked tape carriers is provided with a connection hole in which a part of the lead is exposed, and by performing a plating process in the connection hole, The common signal and power supply leads of each of the plurality of stacked tape carriers are electrically connected to each other. Thereby, since the conductor part is formed in the connection hole by the plating process conventionally used, it becomes possible to form the conductor part in the connection hole relatively easily.

  In the semiconductor device of the present invention, each of the plurality of stacked tape carriers is provided with a connection hole through which a part of the lead is exposed, and a conductor pin is inserted into the connection hole. In addition, the common signal and power supply leads of each of the plurality of stacked tape carriers are electrically connected to each other, and one end of the conductor pin is projected from the mounting surface side of the stacked package as the connection terminal. Is. Thereby, the mechanical strength of the laminated TCP can be improved at a relatively low cost.

  In the semiconductor device of the present invention, the other end of each lead of the plurality of stacked tape carriers is protruded from the outer periphery of each tape carrier, and the plurality of stacked lead portions are stacked on the tape. The common signal and power supply leads of each carrier are bent and overlapped so as to be electrically connected. By adopting a structure in which the outer lead portion is bent, the mechanical strength of the lead configuration can be improved relatively easily and at low cost. Moreover, it becomes possible to absorb the thermal expansion difference between the laminated TCP and the mounting substrate.

  In the semiconductor device of the present invention, it is prohibited to form a bump electrode on a predetermined external terminal of the semiconductor chip so as to change a connection path between the semiconductor chip and the lead. Accordingly, it is possible to flexibly cope with a connection path change by using one type of the same tape carrier.

Also, a method for manufacturing a semiconductor device of the present invention includes
(A) drilling a connection hole in the tape carrier such that a part of the lead is exposed from an inner wall surface;
(B) a step of embedding a conductor paste in the connection hole of the tape carrier;
(C) forming a stacked package by stacking a plurality of the tape carriers such that the formation positions of the connection holes coincide with each other;
(D) A step of heat-treating the stacked package after the stacking step to melt and integrate the conductor paste in the connection hole of each tape carrier. As a result, the single packages can be joined to each other with the conductor paste without using an adhesive layer therebetween.

Also, a method for manufacturing a semiconductor device of the present invention includes
(A) stacking a plurality of the single packages with an adhesive to form a stacked package;
(B) a step of embedding a conductor paste in a connection hole formed in each tape carrier of the stacked package;
(C) a step of performing a heat treatment on the stacked package. As a result, the single packages can be joined to each other by the adhesive layer constituting the single package, so that it is possible to manufacture the laminated TCP without increasing the number of manufacturing steps.

  In addition, the semiconductor device manufacturing method of the present invention joins an external terminal and a lead of the semiconductor chip by a single point bonding method, and a predetermined external terminal among the external terminals according to a change in a connection path. The predetermined lead is not joined. Accordingly, it is possible to flexibly cope with a connection path change by using one type of the same tape carrier.

Also, a method for manufacturing a semiconductor device of the present invention includes
(A) arranging leads around a device hole and preparing a tape carrier having a predetermined thickness;
(B) preparing a semiconductor chip thinner than the tape carrier and having an external terminal;
(C) After disposing a semiconductor chip thinner than the thickness of the tape carrier in the device hole formed in the tape carrier, joining the external terminal of the semiconductor chip and one end of the lead;
(D) a step of stacking a plurality of tape carriers after the joining step and then collectively sealing each semiconductor chip disposed in the device hole of each tape carrier with a sealing resin. Is. Thereby, it becomes possible to reduce the number of manufacturing steps of the laminated TCP. In addition, since the sealing resin for sealing a plurality of semiconductor chips is integrally formed, no gap is formed between the tape layers, so that the mechanical strength can be improved and the moisture resistance can be improved. Become.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  That is, a small, thin, and highly reliable semiconductor device having a TCP structure can be obtained.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof is omitted.

(Embodiment 1)
First, the structure of the semiconductor device according to the first embodiment will be described with reference to FIGS. 1 is a cross-sectional view taken along the line II of FIG. 2, and FIG. 3 is a cross-sectional view taken along the line III-III of FIG. 2 in the resin-sealed mold. In order to make the drawing easier to see, the solder resist and the sealing resin are not shown in FIG.

  The semiconductor device according to the first embodiment is suitable for use in an electronic device such as a computer, a mobile phone, a video camera, etc., a semiconductor device built in an IC (Integrated Circuit) card or a memory card, for example, a tape. The semiconductor chip 2 disposed in the device hole 1a1 of the carrier 1 is sealed with a sealing resin 3 and has a TCP (Tape Carrier Package) structure in which the electrodes of the semiconductor chip 2 are drawn out through the bump electrodes 4. .

  The tape carrier 1 has a tape substrate 1a, a plurality of leads 1c bonded to one surface thereof by an adhesive 1b, and a solder resist 1d that covers a portion of the lead 1c exposed from the sealing resin 3. ing. The total thickness of the tape carrier 1 can be expressed by the sum of the thicknesses of the constituent parts such as the tape base 1a described above and varies depending on the product. .

  The tape substrate 1a is made of, for example, a polyimide resin having a thickness of about 100 μm, and a flat square device hole 1a1 is formed in the center thereof. The device hole 1a1 is formed slightly larger than the chip size so that the semiconductor chip 2 can be accommodated.

  Further, on one short side of the device hole 1a1 in the tape substrate 1a, a communication port 1a2 for resin injection extending from the device hole 1a1 in the direction of the outer peripheral short side of the tape substrate 1a is formed. The communication port 1a2 for resin injection is formed, for example, in a plane T shape. As shown in FIG. 3, the communication port 1a2 for injecting the resin is an opening for communicating the gate 5a of the mold 5 and the device hole 1a1 of the tape substrate 1a, and the sealing resin injected into the gate 5a. Is injected into the device hole 1a1 (cavity) through the communication port 1a2. That is, the communication port 1a2 for resin injection functions as a part of the gate at the time of resin sealing. Thereby, since the sealing resin 3 can be uniformly injected onto both the main surface and the back surface of the semiconductor chip 2, the formation of voids and traps in the sealing resin 3 is greatly reduced. It is possible to do. Note that the arrows in FIG. 3 indicate the inflow direction of the sealing resin 3. Reference numeral 5b denotes a mold runner and 5c denotes a mold sub-runner.

  Further, in the vicinity of the communication port 1a2 for injecting the sealing resin in the tape carrier 1, the portion where the sealing resin contacts in the resin sealing step (the hatched portion in FIG. 2) is, for example, Au-plated copper. A foil layer (metal layer) 1a3 is formed. The copper foil layer 1a3 is formed by patterning the copper foil for forming the lead 1c at the same time when the lead 1c is formed, and the plating process is also performed at the same time when the lead 1c is plated. The plated copper foil layer 1 a 3 is formed at a position facing the sub-runner 5 c of the mold 5 when the tape carrier 1 is placed in the mold 5.

  This is a part where the plated part finally peels off the resin left on the sub-runner 5c, but if the part is not subjected to plating treatment, the adhesive between the resin left in that part and the tape carrier 1 This is because the tape carrier 1 cannot be favorably peeled off from the mold as a result of the high performance. That is, according to the first embodiment, since the plated copper foil layer 1a3 is provided, the adhesive force between the resin left on the sub-runner 5c and the tape carrier 1 can be reduced. The resin and the tape carrier 1 can be easily peeled off.

  A plurality of leads 1c are bonded to one side of the tape substrate 1a with an adhesive 1b having a thickness of about 12 μm, for example. The lead 1c is made of, for example, copper (Cu), and the thickness thereof is, for example, about 35 μm. One end of the lead 1c protrudes into the device hole 1a1, and the tip surface of the protrusion is plated with, for example, gold (Au). The tip of the lead 1c is electrically connected to the semiconductor chip 2 via the bump electrode 2a. As will be described later, the bump electrode 2a is made of, for example, Au. Therefore, the bump electrode 2a and the lead 1c are joined by Au-Au joining or the like. The bump electrode 2a is formed on each of a plurality of bonding pads 2b arranged on the main surface of the semiconductor chip 2 as will be described later, and is electrically connected to the semiconductor integrated circuit in the semiconductor chip 2 through this. ing.

  Further, a bump base pattern 1c1 is formed in a portion pasted to the tape base material 1a at a midway position between the protruding end and the other end of the lead 1c. The bump base pattern 1c1 is formed wider than the normal region of the lead 1c, and the bump electrode 4 is bonded to the upper surface thereof. That is, the electrode of the semiconductor chip 2 is electrically connected to the bump electrode 4 through the lead 1 c and is drawn out of the TCP through the bump electrode 4. The semiconductor device is mounted on the mounting board via the bump electrodes 4 and is electrically connected to the wiring of the mounting board. The bump electrode 4 is made of, for example, a lead (Pb) -tin (Sn) alloy.

  The surface of the lead 1c and the surface of the adhesive 1b excluding such a bump base pattern 1c1 are covered with a solder resist 1d. The thickness of the solder resist 1d is, for example, about 20 μm. In the first embodiment, since the coating layer of the lead 1c is composed of the solder resist 1d, the hole diameter of the connection hole for exposing the bump base pattern 1c1 can be made fine.

  On the other hand, the semiconductor chip 2 is made of a small piece of, for example, a planar quadrangular silicon (Si) single crystal, and a predetermined semiconductor integrated circuit is formed on the main surface thereof. In the first embodiment, the thickness of the semiconductor chip 2 is formed thinner than the thickness of the tape base 1a of the tape carrier 1, and the thickness is set to about 50 μm, for example. The thickness of the semiconductor chip 2 is set by grinding the back surface of the semiconductor wafer on which the plurality of semiconductor chips 2 are formed, and then polishing, for example, by a spin etching method. Thereby, the semiconductor chip 2 can be thinned to about 20 to 30 μm, for example. Moreover, since the back surface of the semiconductor chip 2 can be smoothed, it is possible to make the semiconductor chip 2 strong against bending stress and difficult to crack.

  The plurality of bonding pads 2b described above are arranged in the vicinity of the long side on the main surface of the semiconductor chip 2. The bonding pad 2b is an electrode for drawing out the electrode of the predetermined semiconductor integrated circuit described above to the outside of the semiconductor chip 2, and is made of, for example, aluminum (Al) or an Al alloy. As described above, the bump electrode 2a for lead connection is formed on the upper surface of the bonding pad 2b.

  The bump electrode 2a is formed by the wire bump method before the spin etching process described above. That is, the bump electrode 2a is formed by bonding the bonding wire to the bonding pad 2b by the wire bonding method, leaving the ball portion of the bonding wire bonding portion on the bonding pad 2b, and cutting and removing the other fine wire portions. Is formed. The bump electrode 2a is electrically connected to the end portion of the TCP lead 1c as described above. Note that the height of the bump electrode 2a after the inner lead bonding is, for example, about 21.5 μm.

  By the way, in the first embodiment, both the main surface and the back surface of the semiconductor chip 2 are covered with the sealing resin 3. The position of the semiconductor chip 2 in the thickness direction of the tape base 1a is set so that the stress neutral surface A of the entire TCP and the stress neutral surface of the semiconductor chip 2 are substantially coincident. That is, the semiconductor chip 2 is disposed at a position where the stress received from the TCP is the smallest. As a result, even if the external TCP is applied and the entire TCP is deformed, the stress received by the semiconductor chip 2 is small, and warping of the entire TCP due to the bimetal effect can be suppressed. It is possible to greatly reduce the incidence of defects.

  The stress neutral surface A is a surface parallel to the main surface of the semiconductor chip 2 and is a surface on which the stress applied to the semiconductor chip 2 is neutral in the thickness direction of the semiconductor chip 2. In FIG. 1, the stress neutral plane A is indicated by a line segment, which means a plane parallel to the main surface of the semiconductor chip 2 at a position on the line.

  The sealing resin 3 for sealing the semiconductor chip 2 is made of, for example, an epoxy-based resin, and is formed so that the positions of the upper and lower surfaces thereof coincide with the positions of the upper and lower surfaces of the tape carrier 1. That is, the thickness D1 of the sealing resin 3 and the thickness D2 of the tape carrier 1 are equal. Thereby, the total thickness of TCP can be made the thickness of the tape carrier 1. Therefore, it is possible to obtain a flat and thin semiconductor device having a TCP structure. The sealing resin 3 is molded by a transfer mold method or the like.

  Next, a method for manufacturing the semiconductor device according to the first embodiment will be described with reference to FIGS.

  First, as shown in FIG. 4, a device hole 1a1 is formed at a predetermined location of a strip-shaped tape base material 1a having an adhesive 1b attached on one side.

  Subsequently, after bonding, for example, a Cu foil to one side of the tape substrate 1a with the adhesive 1b applied to the one side, the Cu foil is patterned by an etching method or the like, as shown in FIG. A plurality of leads 1c are formed. At this time, the bump base pattern 1c1 is formed on a part of the lead 1c, and the copper foil layer 1c3 (see FIG. 2) is also formed.

  Thereafter, as shown in FIG. 6, a solder resist 1d is formed on one surface of the tape substrate 1a so that the bump base pattern 1c1 and the protruding inner lead 1c are exposed, and then the solder resist 1d is used as a mask in the lead 1c. For example, Au plating is applied to a portion exposed from the solder resist 1d. At the same time, for example, Au plating is applied to the surface of the bump base pattern 1c1 and the surface of the copper foil layer 1c3 (see FIG. 2). Thereby, the tape carrier 1 is manufactured.

  Subsequently, the semiconductor chip 2 is housed in the device hole 1a1 of the tape base 1a, the bump electrode 2a of the semiconductor chip 2 and the lead 1c are aligned, and then, as shown in FIG. Thus, the bump electrode 2a and the lead 1c are joined.

  Thereafter, as shown in FIG. 8, the tape carrier 1 on which the semiconductor chip 2 is mounted in this manner is accommodated in the mold 5, and then the molten sealing resin fed into the runner 5 b of the mold 5 is used. Then, it is injected into the cavity formed by the device hole 1a1 and the mold 5 of the tape substrate 1a through the sub-runner 5c, the gate 5a and the communication port 1a2 for injecting the sealing resin of the tape substrate 1a. The air in the cavity is exhausted through an air vent provided on the sealing resin outflow side in the mold 5.

  At the time of this sealing process, in the first embodiment, the sealing resin is allowed to flow evenly over the main surface and the back surface of the semiconductor chip 2 by providing the communication port 1a2 for injecting the sealing resin. Therefore, formation of voids and the like can be suppressed.

  Next, the TCP after the resin sealing step is taken out from the mold 5. At this time, in the first embodiment, by forming the plated copper foil layer 1a3 on the portion of the tape substrate 1a facing the subrunner 5c, the adhesive strength of the resin in the subrunner at that portion is reduced. Therefore, the resin in the sub runner adhering to the portion can be removed relatively easily.

  In this way, as shown in FIG. 9, the semiconductor chip 2 is sealed with the sealing resin 3 to manufacture the TCP. In the first embodiment, both the main surface and the back surface of the semiconductor chip 2 are covered with the sealing resin 3. Further, the height of the upper and lower surfaces of the sealing resin 3 is formed so as to coincide with the height of the upper and lower surfaces of the tape carrier 1.

  Then, after performing aging processing, selection inspection, and singulation processing on such TCP, as shown in FIG. 10, a bump electrode made of, for example, a Pb—Sn alloy is formed on the bump base pattern 1c1 of the lead 1c. 4 is joined.

Thus, according to the first embodiment, the following effects can be obtained.
(1) By covering both the main surface and the back surface of the semiconductor chip 2 with the sealing resin 3, it is possible to reduce the stress that the semiconductor chip 2 receives from the main surface and the back surface. In particular, by setting the position of the semiconductor chip 2 so that the stress neutral plane A of the entire TCP and the stress neutral plane of the semiconductor chip 2 substantially coincide, the stress that the semiconductor chip 2 receives from the TCP is the highest. Even if the entire TCP is deformed by an external force, the stress applied to the semiconductor chip 2 is small, and warping of the entire TCP due to the bimetal effect can be suppressed. It is possible to greatly reduce the incidence of connection failure during mounting.
(2) By providing the tape base 1a with the communication port 1a2 for injecting the sealing resin that functions as a gate during the resin sealing process, the sealing resin is formed on both the main surface and the back surface of the semiconductor chip 2. 3 can be injected uniformly, so that formation of voids and traps in the sealing resin 3 can be greatly reduced.
(3) By providing a plated copper foil layer 1a3 on the portion of the tape substrate 1a where the sealing resin contacts in the resin sealing step, the sealing resin 3 and the tape carrier 1 in this portion Since the adhesive force can be reduced, the resin remaining on the sub-runner and the tape carrier 1 can be easily peeled when the TCP is separated from the sub-runner after the resin sealing step.
(4) By polishing the back surface of the semiconductor chip 2 by a spin etching method or the like, the semiconductor chip 2 can be thinned to, for example, about 20 to 30 μm. In addition, since the back surface of the semiconductor chip 2 can be smoothed, the semiconductor chip 2 can be made to have a structure that is strong against bending stress and hardly cracked.
(5). By forming the sealing resin 3 so that the thickness D1 of the sealing resin 3 is equal to the thickness D2 of the tape carrier 1, the total thickness of the TCP can be made the thickness of the tape carrier 1. Become. Accordingly, a flat and thin semiconductor device having a TCP structure can be obtained.

(Embodiment 2)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIG.

  The structure of the semiconductor device of the second embodiment is basically the same as that of the above-described embodiment. The major difference is that the inner lead portion of the lead 1c is bent in the thickness direction, and the inner lead is bonded to the bump electrode 2a of the semiconductor chip 2 in a state offset by about 50 μm in the thickness direction. The stress neutral surface A1 of the chip 2 and the stress neutral surface A of the entire TCP are slightly shifted.

  However, from the viewpoint of ensuring reliability, the allowable range of relative deviation between the position of the stress neutral surface A of the entire TCP and the stress neutral surface A1 of the semiconductor chip 2 is, for example, within ± 60 μm. In the second embodiment, the deviation is about 47.5 μm, for example.

  The reason why the lead 1c is bent and the stress neutral planes A and A1 are displaced in this way is because of the difference in the thickness of the constituent members such as the tape base 1a and the height of the bump electrode 2a after the inner lead bonding. This is due to the difference and the setting value of the heat tool height during bonding. In the second embodiment, the entire thickness of the tape carrier 1 is, for example, about 250 μm, the thickness of the tape substrate 1 a is, for example, about 150 μm, and the thickness of the adhesive 1 b is, for example, about 20 μm. The thickness of the lead 1c is, for example, about 35 μm, the thickness of the solder resist 1d is, for example, about 25 μm, and the height of the bump electrode 4a after the inner lead bonding is, for example, about 20 μm.

  Further, the second embodiment is different from the first embodiment in that, for example, the end portion of the lead 1c is subjected to Sn plating, and the end portion of the lead 1c is bonded to the bump electrode 2a made of Au. It is a point. Therefore, the lead 1c and the bump electrode 2a are bonded by, for example, Au—Sn eutectic bonding.

  By the way, as an application of the second embodiment, for example, the following may be possible. As described above, when the stress neutral surface A1 of the semiconductor chip 2 and the stress neutral surface A of the entire TCP are slightly deviated due to differences in the thicknesses of the components of the TCP, the bending amount of the lead 1c is set. The deviation may be corrected by adjustment.

  That is, by changing the bending amount of the lead 1c, the stress neutral surface A1 of the semiconductor chip 2 and the stress neutral surface A of the entire TCP coincide with each other in the position of the semiconductor chip 2 in the thickness direction of the tape base 1a. You may make it set as follows. As a result, even if the dimensions and the like of each component of the TCP change variously, it is possible to set the semiconductor chip 2 at an optimal position, that is, a position where the stress applied to the semiconductor chip 2 is minimized. Become.

(Embodiment 3)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIG.

  The structure of the semiconductor device of the third embodiment is basically the same as that of the above embodiment. The main differences are as follows.

  The first is that the lead 1c is bent in the thickness direction and directly joined to the bonding pad. The end surface of the lead 1c is subjected to, for example, Au plating, and is bonded to a bonding pad made of, for example, Al by a single point ultrasonic thermocompression bonding method.

  The second point is that the other end of the lead 1c protrudes from the outer periphery of the tape base 1a, and the protruding portion is formed in a gull wing shape. In this case, the mounting height can be reduced as compared with the case where the external terminal is a bump electrode as in the semiconductor device of the first embodiment.

(Embodiment 4)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIG.

  The fourth embodiment is an example in which a so-called potting sealing method is used when the sealing resin 3 is formed as shown in FIG. 13 by dropping and curing a liquid resin.

  The sealing resin 3 in this case also covers both the main surface and the back surface of the semiconductor chip 2 so that the stress neutral surfaces A and A1 (see FIG. 11) coincide as described above. The thickness of the sealing resin 3 is as thick as the thickness D2 of the tape carrier 1 on the outer peripheral side (thickness D1a) of the semiconductor chip 2, and gradually decreases toward the center (thickness D1b side) of the semiconductor chip 2. ing.

  In the fourth embodiment, in addition to the effects obtained in the first embodiment, since resin sealing is possible without using a mold, it is relatively simpler than in the first to third embodiments. In addition, an effect that the semiconductor chip 2 can be sealed is obtained.

(Embodiment 5)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIGS.

  First, the structure of the semiconductor device according to the fifth embodiment will be described with reference to FIGS. 14 is a cross-sectional view taken along line XIV-XIV in FIG. In FIG. 15, the solder resist and the sealing resin are not shown in order to make the drawing easy to see.

  In the fifth embodiment, a plurality of TCPs described in the first embodiment are stacked to form a laminated TCP, and the same signal and power lead 1c of each TCP is passed through the tape base material 1a of each TCP. The connection portion 6 is electrically connected, and the connection portion 6 is connected to the bump electrode 4 on the back surface of the TCP in the lowermost layer so as to be drawn out of the laminated TCP.

  The stacked single TCPs are bonded by an adhesive 1e. The adhesive 1e is a member constituting a part of the single TCP tape carrier 1, and is made of, for example, a thermoplastic polyimide resin. However, the lead 1c of the single-layer TCP in the lowermost layer is covered with the solder resist 1d.

  The connection part 6 described above is constituted by a connection hole 6a and a conductor part 6b embedded in the connection hole 6a. The connection hole 6 a is formed at the position of the bump base pattern 1 c 1 of the lead 1 c in the tape carrier 1.

  However, in the connection hole 6a, the hole diameter of the connection hole 6a drilled in the bump base pattern 1c1 of the lead 1c is formed to be, for example, about 50 μm smaller than the hole diameter of the connection hole 6a drilled in the tape substrate 1a. This is because a part of the bump base pattern 1c1 of the lead 1c protrudes in the connection hole 6a, so that the conductor portion 6b embedded in the connection hole 6a is reliably brought into contact with the lead 1c. This is so that they are electrically connected to each other. The conductor 6b is made of, for example, a Pb—Sn alloy.

  With such a laminated TCP structure, the semiconductor chip 2 can be mounted at high density. For example, when a 64 Mbit DRAM is formed on one semiconductor chip 2 and if eight single TCPs having a thickness of about 167 μm are stacked, a stacked TCP having a total thickness of about 1.3 mm and a capacity of 64 Mbytes is obtained. Can be obtained.

  Next, a method for manufacturing the semiconductor device according to the fifth embodiment will be described with reference to FIGS.

  First, as shown in FIG. 16, a device hole 1a1 and a connection hole 6a are formed by a mechanical punching method or the like in a predetermined portion of a strip-shaped tape substrate 1a to which an adhesive 1b is attached.

  Subsequently, for example, after bonding a Cu foil to one side of the tape base 1a with the adhesive 1b applied to the one side, the Cu foil is patterned by an etching method or the like, as shown in FIG. A plurality of leads 1c are formed, and a connection hole 6a having a hole diameter smaller than that of the connection hole 6a in the tape base material 1a is formed in the bump base pattern 1c1.

  Then, as shown in FIG. 18, after providing an adhesive 1e made of, for example, a thermoplastic polyimide resin on the copper foil pattern side, a part of the adhesive 1e protrudes from the bump base pattern 1c1 portion of the lead 1c and the part. The lead 1c is removed so that the inner lead portion is exposed.

  Next, using the adhesive 1e as a mask, for example, Au plating is applied to the portion of the lead 1c exposed from the adhesive 1e. Thereby, the tape carrier 1 is manufactured.

  Subsequently, the semiconductor chip 2 is accommodated in the device hole 1a1 of the tape base 1a, the bump electrode 2a of the semiconductor chip 2 and the lead 1c are aligned, and then, as shown in FIG. Thus, the bump electrode 2a and the lead 1c are joined.

  After that, the tape carrier 1 on which the semiconductor chip 2 is mounted as described above is accommodated in the mold 5 as shown in FIG. 8 and then fed into the runner 5b of the mold 5 in a molten state. Is injected into a cavity formed by the device hole 1a1 of the tape substrate 1a and the mold 5 through the sub-runner 5c, the gate 5a and the communication port 1a2 for injecting the sealing resin of the tape substrate 1a. The air in the cavity is exhausted through an air vent provided on the sealing resin outflow side in the mold 5. At this time, also in the fifth embodiment, by providing the communication port 1a2 for injecting the sealing resin, the sealing resin can be evenly flowed on the main surface and the back surface of the semiconductor chip 2. It is possible to suppress the formation of voids and the like.

  Next, the TCP after the resin sealing step is taken out from the mold 5. At this time, also in the fifth embodiment, the resin and tape carrier remaining in the sub-runner 5c are formed by forming the plated copper foil layer 1a3 on the portion of the tape substrate 1a facing the sub-runner 5c. Since the adhesive force with 1 can be reduced, the resin in the sub-runner 5c adhering to that portion can be removed relatively easily.

  In this way, as shown in FIG. 20, the semiconductor chip 2 is sealed with the sealing resin 3 to manufacture a single TCP. Also in the fifth embodiment, both the main surface and the back surface of the semiconductor chip 2 are covered with the sealing resin 3. Further, the height of the upper and lower surfaces of the sealing resin 3 is formed so as to coincide with the height of the upper and lower surfaces of the tape carrier 1.

  Subsequently, after performing aging processing, sorting inspection, and singulation processing on such a single TCP, the fifth embodiment was manufactured as described above as shown in FIG. A plurality of single TCPs are stacked in a state where the positions of the connection holes 6a are aligned. However, not the adhesive 1e but the solder resist 1d is formed on the back surface of the lowermost unit TCP with the bump base pattern 1c1 exposed.

  Thereafter, the laminated TCP is formed by bonding the single TCPs by a thermocompression bonding method or the like using the adhesive 1e interposed between the single TCPs. That is, since the plurality of single TCPs are stacked and bonded using the adhesive 1e formed during the single TCP forming process, the laminated TCP can be manufactured without increasing the manufacturing process.

  Next, after filling the connection hole 6a of the laminated TCP with a solder paste made of, for example, Pb—Sn or the like, a reflow process is performed to form the conductor portion 6b shown in FIG. 14 in the connection hole 6a. As a result, the stacked single TCPs can be electrically connected together.

  Subsequently, the bump electrode 4 made of, for example, Pb-Sn is bonded to the bump ground pattern of the lead 1c in the single layer TCP in the lowermost layer of the laminated TCP, whereby the semiconductor device having the laminated TCP structure of the fifth embodiment is obtained. To manufacture.

As described above, according to the fifth embodiment, in addition to the effects obtained in the first embodiment, the following effects can be obtained.
(1) By stacking a plurality of thin single TCPs to form a laminated TCP, the mounting density of the semiconductor chip 2 can be greatly improved while being a thin and small laminated TCP.
(2). A laminated TCP can be manufactured without increasing the number of manufacturing steps by forming a part of the single TCP and joining the plurality of single TCPs with the adhesive 1e formed during the single TCP forming process. It becomes possible to do.

(Embodiment 6)
Next, another embodiment of the present invention will be described. In the sixth embodiment, the structure of the semiconductor device is almost the same as that of the fifth embodiment. Since the manufacturing method is largely different, the manufacturing method will be described below with reference to FIGS.

  First, as shown in FIG. 22, a single TCP is manufactured in the same manner as in the first embodiment. A connection hole 6a is formed in the single TCP so as to penetrate the upper and lower surfaces of the tape base 1a.

  Subsequently, as shown in FIG. 23, a solder paste 6b1 made of, for example, Pb-Sn or the like is formed in the connection hole 6a of the single TCP by a printing method. Thereafter, after preparing a plurality of such single TCPs, the single TCPs are stacked with their connection holes 6a aligned. Then, the stacked single TCPs are temporarily fixed using the adhesiveness of the solder paste 6b1 in the connection holes 6a of the single TCPs.

  Thereafter, a reflow process is performed on the plurality of single TCPs stacked and temporarily fixed in this manner, and the solder paste 6b1 in the connection hole 6a of each single TCP is melted.

  As a result, the solder paste 6b1 in the connection hole 6a of each single TCP is integrated to form the conductor portion 6b as shown in FIG. 24, and the laminated TCP is manufactured. As described above, in the sixth embodiment, the single TCPs can be joined together by the conductor portion 6b instead of being joined by the adhesive.

  Finally, as shown in FIG. 24, the bump electrode 4 made of, for example, Pb-Sn or the like is bonded to the bump base pattern 1c1 of the lead 1c in the single-layer TCP in the lowermost layer of the laminated TCP, thereby A semiconductor device having a laminated TCP structure is manufactured.

(Embodiment 7)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIGS.

  First, the structure of the semiconductor device according to the seventh embodiment will be described with reference to FIG. The plan view of the semiconductor device according to the seventh embodiment is the same as FIG. 15 used in the description of the fifth embodiment.

  In the seventh embodiment, the sealing resin 3 of the laminated TCP is not separated for each tape carrier 1 but has a structure in which a plurality of semiconductor chips 2 are sealed by being integrally formed. Also, the plated copper foil layer 1a3 is formed only in the vicinity of the communication port 1a2 for injecting the sealing resin in the lowermost tape substrate 1a (the same position as in the first and fifth embodiments). ing. Other structures are the same as those of the fifth embodiment.

  In such a semiconductor device according to the seventh embodiment, since no gap is formed between the sealing resins 3 for sealing the individual semiconductor chips 2, the mechanical properties of the stacked package compared with the fifth embodiment. In addition to improving the strength, it is possible to improve moisture resistance.

  Next, a method for manufacturing the semiconductor device according to the seventh embodiment will be described with reference to FIGS. The tape carrier manufacturing process in the seventh embodiment is the same as that described in the fifth embodiment with reference to FIGS. FIG. 29 is a sectional view taken along line XXIX-XXIX in FIG.

  First, as shown in FIG. 27, the semiconductor chip 2 is placed in the device hole 1a1 of the tape base 1a, the bump electrode 2a of the semiconductor chip 2 and the lead 1c are aligned, and then the inner lead bonding of the batch method is performed. Thus, the bump electrode 2a and the lead 1c are joined.

  Subsequently, as shown in FIG. 28, a plurality of tape carriers 1 on which the semiconductor chips 2 are mounted in this manner are stacked, and then temporarily fixed by a thermocompression bonding method using an adhesive 1e between the tape carriers 1.

  Here, in the seventh embodiment, the planar positions of the communication ports 1a2 for injecting the sealing resin of the stacked tape bases 1a coincide with each other and extend in the thickness direction of the stacked tape bases 1a. Is in a state of being formed. Also, not the adhesive 1e but the solder resist 1d is formed on the back surface of the lowermost single TCP, with the bump base pattern 1c1 exposed.

  Thereafter, as shown in FIG. 29, the stacked tape carriers 1 are accommodated in the mold 5. The mold 5 has a molding mold structure capable of sealing the semiconductor chips 2 in the stacked tape carriers 1 together.

  Next, the molten sealing resin fed into the runner 5b of the mold 5 is passed through the sub-runner 5c, the gate 5a, and the communication hole 1a2 for injecting the sealing resin into the tape substrate 1a, and the device hole 1a1 of the tape substrate 1a. And the mold 5 are injected into a cavity. The air in the cavity is exhausted through an air vent provided on the sealing resin outflow side in the mold 5.

  At this time, in the seventh embodiment, the molten sealing resin injected from the gate of the mold 5 is stacked through the sealing resin injection communication port 1a2 extending in the thickness direction of the tape substrate 1a. It is possible to flow evenly over the main surface and the back surface of the semiconductor chip 2 in each layer of the tape carrier 1 formed. Thereby, it is possible to suppress formation of voids or the like in the sealing resin 2 of the laminated TCP. That is, the semiconductor chips 2 of the stacked tape carriers 1 can be collectively sealed in a stable state. In addition, the arrow of FIG. 29 has shown the direction through which sealing resin of a molten state flows.

  Next, the TCP after the resin sealing step is taken out from the mold 5. At this time, in the seventh embodiment, the copper foil layer 1a3 plated on the portion facing the sub-runner 5c in the lowermost tape substrate 1a is formed, so that the sealing resin 3 in the portion is formed. Since the adhesive force can be reduced, the sealing resin 3 adhering to the portion can be removed relatively easily.

  In this way, as shown in FIG. 30, a plurality of semiconductor chips 2 are collectively sealed with a sealing resin 3 to manufacture a laminated TCP. Also in the seventh embodiment, both the main surface and the back surface of each semiconductor chip 2 are covered with the sealing resin 3. Further, the height of the upper and lower surfaces of the sealing resin 3 is formed so as to coincide with the height of the upper surface of the uppermost tape carrier 1 and the lower surface of the lowermost tape carrier 1.

  Subsequently, after aging inspection, sorting inspection, and the like are performed on such a laminated TCP, a solder paste made of, for example, Pb—Sn or the like is filled into the connection hole 6a of the laminated TCP.

  Thereafter, the conductor portion 6b shown in FIG. 26 is formed in the connection hole 6a by performing a reflow process on the laminated TCP, and then the bump foundation pattern 1c1 of the lead 1c in the lowermost tape carrier 1 of the laminated TCP. For example, the semiconductor device having the laminated TCP structure of the seventh embodiment is manufactured by bonding the bump electrodes 4 made of, for example, Pb—Sn.

As described above, according to the seventh embodiment, the following effects can be obtained in addition to the effects obtained in the fifth embodiment.
(1). Since the sealing resin 3 of the laminated TCP is integrally formed, no gap is formed between the sealing resins 3 for sealing the individual semiconductor chips 2. Therefore, the laminated TCP is laminated as compared with the fifth embodiment. The mechanical strength of the package can be improved and the moisture resistance can be improved. Therefore, the reliability of the semiconductor device can be improved.
(2) The number of manufacturing steps can be reduced by collectively molding the sealing resin 3 of the laminated TCP.

(Embodiment 8)
Next, a semiconductor device according to another embodiment 8 of the present invention will be described with reference to FIGS. FIG. 31 is a sectional view taken along line XXXI-XXXI in FIG. In FIG. 32, the sealing resin and the solder resist are not shown.

  In the eighth embodiment, the present invention is applied to, for example, a DRAM (Dynamic Random Access Memory), and the structure of the semiconductor device is almost the same as the structure described in the fifth embodiment. .

  In FIG. 32, VCC, VSS, I / O, RAS, CAS, WE, OE, Address means the power supply or signal assigned to each lead 1c, VCC is a high potential power supply voltage, and VSS is a low potential. , I / O is an input / output signal, RAS is a row address strobe signal, CAS is a column address strobe signal, WE is a write enable signal, OE is an output enable signal, and Address is an address signal.

  By the way, in the eighth embodiment, for example, four CAS bonding pads 2b1 functioning as chip select terminals are arranged substantially at the center of the semiconductor chip 2. These CAS bonding pads 2b1 are electrically connected in the semiconductor chip 2 by intra-chip wiring.

  One of the four CAS bonding pads 2b1 is provided with a bump electrode 2a, and is electrically connected to the lead 1c via the bump electrode 2a. That is, the bump electrode 2a is provided on the bonding pad 2b1 to be chip-selected, and the lead 1c is electrically connected.

  However, the bump electrodes 2a are not formed on the other CAS bonding pads 2b1 and are not electrically connected to the leads 1c. That is, in the eighth embodiment, the connection path is changed depending on whether or not the bump electrode 2a is provided on the bonding pad 2b. As a result, it is possible to flexibly cope with a change in the wiring route that occurs when the layered TCP structure is adopted, instead of remanufacturing another tape carrier 1 that can cope with the change, by using one type of the same tape carrier 1. It is possible to do. Therefore, it is not necessary to design, manufacture, and inspect the tape carrier 1 every time the connection path is changed, so that the manufacturing time of the product can be greatly reduced and the manufacturing cost of the product can be reduced. It has become.

  In the above example, the connection path is changed depending on the presence or absence of the bump electrode 2a. However, the present invention is not limited to this. For example, as described in the third embodiment, in the case of a structure in which the tip of the lead 1c plated with Au or the like and the bonding pad 2b are connected without the bump electrode 2a, the lead is formed by single point bonding. When bonding 1c and the bonding pad 2b, the bonding process should not be performed on the bonding pad 2b that is not chip-selected. That is, the connection path may be changed by a single point bonding operation.

As described above, according to the eighth embodiment, the following effects can be obtained in addition to the effects obtained in the fifth embodiment.
(1) By changing the connection path depending on whether or not the bump electrode 2a is provided on the bonding pad 2b, another tape carrier 1 that can cope with the change is newly manufactured in response to the change of the wiring path. Instead, the same type of tape carrier 1 can be used flexibly. Therefore, the manufacturing time of the product can be greatly shortened, and the manufacturing cost of the product can be reduced.

(Embodiment 9)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIG.

  In the ninth embodiment, the lead 1c protrudes from the side surface of each layer of the tape carrier 1 constituting the laminated TCP, is formed into a gull wing shape, and is electrically connected to the land 7a on the mounting substrate 7.

(Embodiment 10)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIG.

  In the tenth embodiment, the lead 1c protrudes from the side surface of the lowermost tape carrier 1 constituting the laminated TCP, is further formed into a gull wing shape, and is electrically connected to the land 7a on the mounting substrate 7. .

(Embodiment 11)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIG.

  In the eleventh embodiment, the conductor pin 6c inserted in the connection hole 6a formed in each tape carrier 1 of the laminated TCP is fixed by the conductor part 6b filled in the connection hole 6a and connected to the connection part 6. Is formed.

  The conductor pin 6c electrically connects the leads 1c1 having the same electrical function of the tape carrier 1 of each layer, and one end thereof protrudes from the lower surface of the laminated TCP to form an external terminal. That is, by inserting the protruding portion of the conductor pin 6c into the connection hole of the mounting substrate, the stacked TCP is mounted on the mounting substrate, and the semiconductor chip 2 in the stacked TCP and the wiring of the mounting substrate are electrically connected. Connected.

As described above, in the eleventh embodiment, in addition to the effects obtained in the fifth embodiment, the following effects can be obtained.
(1) By making the external terminal the conductor pin 6c, the cost of the product can be reduced as compared with the case where the external terminal is constituted by a bump electrode or a lead formed into a gull wing shape.
(2) The strength of the laminated TCP can be improved by inserting the strong conductor pin 6c into the connection hole 6a of the laminated TCP.

(Embodiment 12)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIGS.

  In the twelfth embodiment, as shown in FIG. 36, the lead 1c protruding from the side surface of the tape carrier 1 of each layer constituting the laminated TCP is bent downward in FIG. 36, and the tip of the lead 1c of each layer is formed. Are formed on the land 7a of the mounting substrate 7 so as to overlap each other.

  By bending the lead 1c, the mechanical strength of the lead 1c configuration can be improved relatively easily and at low cost, and stress caused by the difference in thermal expansion between the laminated TCP and the mounting substrate 7 can be absorbed. It has become. Therefore, it is possible to improve the reliability of the semiconductor device after mounting.

  Next, a method for manufacturing the semiconductor device according to the twelfth embodiment will be described with reference to FIGS.

  First, as shown in FIG. 37, a plurality of single TCPs are stacked and bonded in the same manner as in the fifth embodiment to form a laminated TCP. At this stage, the lead 1c extends linearly from the side surface of each tape carrier 1.

  Subsequently, as shown in FIG. 38, the leading ends of the leads 1c are overlapped by pressing a lead molding die from above the leads 1c protruding linearly from the side surface of each tape carrier 1 of the laminated TCP. A plurality of leads 1c are formed at once.

  Thereafter, by cutting the tips of the plurality of leads 1c bent in the molding process, as shown in FIG. 39, the leads of the stacked leads 1c are aligned, and the semiconductor device of the twelfth embodiment is manufactured. To do.

Thus, according to the twelfth embodiment, in addition to the effects obtained in the fifth embodiment, the following effects can be obtained.
(1) The mechanical strength of the lead configuration can be improved relatively easily and at low cost.
(2) By forming the outer lead portion of the lead 1c in a bent state, it becomes possible to absorb the difference in thermal expansion between the laminated TCP and the mounting substrate 7.

(Embodiment 13)
Next, a semiconductor device according to another embodiment of the present invention will be described with reference to FIGS. 41 is a cross-sectional view taken along line XXXXI-XXXXI in FIG. 40, and shows a cross-sectional view of the semiconductor chip and the molding die in the resin sealing step.

  In the thirteenth embodiment, as shown in FIGS. 40 and 41, in the tape substrate 1a, on the other short side of the device hole 1a1, the position facing the communication port 1a2 for injecting the sealing resin, An air discharge communication port 1a4 extending from the device hole 1a1 in the direction of the short side of the outer periphery of the tape substrate 1a is formed. The air discharge communication port 1a4 is formed, for example, in a plane T shape.

  The air discharge communication port 1a4 is an opening that communicates the air vent of the mold 5 and the cavity, and the excess molten resin in the cavity is allowed to flow therein, thereby discharging the air in the cavity to the outside of the cavity. It is provided for. That is, the communication port 1a4 for discharging air functions as a part of the air vent at the time of resin sealing. In the communication port 1a4 for discharging air, air may be mixed with the resin.

  As a result, air can be reduced from remaining in the sealing resin 3 that covers both the main surface and the back surface of the semiconductor chip 2, so that voids and traps are formed in the sealing resin 3. It can be greatly reduced.

  Note that the arrows in FIG. 41 indicate the inflow direction of the sealing resin 3. Further, when the laminated TCP described in the fifth embodiment or the like is configured using such a tape substrate 1a, the bump base pattern 1c1 of the lead 1c is located at the position of the lead 1c as in the fifth embodiment. It is good to drill a connection hole.

Thus, according to the thirteenth embodiment, in addition to the effects obtained in the first and fifth embodiments, the following effects can be obtained.
(1). An air discharge communication port 1a4 that extends from the device hole 1a1 toward the outer short side of the tape substrate 1a and functions as a part of an air vent on the other short side of the device hole 1a1 in the tape substrate 1a. Since it is possible to reduce the air remaining in the sealing resin 3 that covers both the main surface and the back surface of the semiconductor chip 2, voids and traps are formed in the sealing resin 3. Can be significantly reduced. Therefore, the reliability of the semiconductor device can be further improved.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the fifth embodiment and the like, the case where the solder paste is filled in the connection holes connecting the single TCPs of the laminated TCP has been described. However, the present invention is not limited to this, and various modifications can be made. A functional resin paste may be filled. In this case, after the conductive resin paste is filled into the connection holes, a thermosetting treatment is performed to form a cured conductive resin paste in the connection holes, and the individual TCPs are electrically connected.

  Further, for example, the conductor portion in the connection hole may be formed by plating. In this case, since the conductor portion is formed in the connection hole by a plating process conventionally used, it is possible to form the conductor portion relatively easily.

  The present invention can be applied to the semiconductor device industry.

It is sectional drawing of the semiconductor device which is one embodiment of this invention. FIG. 2 is a plan view of the semiconductor device of FIG. 1. It is sectional drawing at the time of sealing resin molding of the semiconductor device of FIG. FIG. 2 is a cross-sectional view during the manufacturing process of the semiconductor device of FIG. 1. FIG. 5 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 4; FIG. 6 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 5; FIG. 7 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 6; FIG. 8 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 7; FIG. 9 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 8; FIG. 10 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 9; It is sectional drawing of the semiconductor device which is other embodiment of this invention. It is sectional drawing of the semiconductor device which is other embodiment of this invention. It is sectional drawing of the semiconductor device which is other embodiment of this invention. It is sectional drawing of the semiconductor device which is other embodiment of this invention. FIG. 15 is a plan view of the semiconductor device of FIG. 14. FIG. 15 is a cross-sectional view during the manufacturing process of the semiconductor device of FIG. 14. FIG. 17 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 16; FIG. 18 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 17; FIG. 19 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 18; FIG. 20 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 19; FIG. 21 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 20; It is sectional drawing in the manufacturing process of the other semiconductor device of this invention. FIG. 23 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 22; FIG. 24 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 23; FIG. 25 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 24; It is sectional drawing of the semiconductor device which is other embodiment of this invention. FIG. 27 is a cross-sectional view during a manufacturing step of the semiconductor device of FIG. 26; FIG. 28 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 27; FIG. 29 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 28; FIG. 30 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 29; It is sectional drawing of the semiconductor device which is other embodiment of this invention. FIG. 32 is a plan view of the semiconductor device of FIG. 31. It is sectional drawing of the semiconductor device which is other embodiment of this invention. It is sectional drawing of the semiconductor device which is other embodiment of this invention. It is sectional drawing of the semiconductor device which is other embodiment of this invention. It is sectional drawing of the semiconductor device which is other embodiment of this invention. FIG. 37 is a cross-sectional view of the semiconductor device of FIG. 36 during a manufacturing step. FIG. 38 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 37; FIG. 39 is a cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 38; It is a top view of the semiconductor device which is other embodiments of the present invention. FIG. 41 is a cross-sectional view of the semiconductor device of FIG. 40 during a sealing resin molding step.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Tape carrier 1a Tape base material 1b Adhesive 1c Lead 1c1 Bump ground pattern 1d Solder resist 1e Adhesive 1a1 Device hole 1a2 Communication port 1a3 Copper foil layer 1a4 Communication port 2 Semiconductor chip 2a Bump electrode 2b, 2b1 Bonding pad 3 Sealing resin 4 Bump electrode 5 Mold 5a Gate 5b Runner 5c Sub runner 6 Connection portion 6a Connection hole 6b Conductor portion 6b1 Solder paste 6c Conductor pin 7 Mounting substrate 7a Land

Claims (10)

A semiconductor chip thinner than the thickness of the tape carrier is disposed in each device hole of a plurality of stacked tape carriers having an upper surface and a lower surface ,
One end of a lead provided on each of the plurality of stacked tape carriers;
The external terminals of the semiconductor chip in each device hole are electrically connected,
Each of the semiconductor chips is coated with a sealing resin on both the main surface and the back surface,
A part of the lower surface of the tape carrier is constituted by an adhesive,
The upper surface of the sealing resin covering the main surface of the semiconductor chip is located at the same height as the upper surface of the tape carrier,
The lower surface of the sealing resin covering the back surface of the semiconductor chip is located at the same height as the lower surface of the tape carrier,
A stacked package structure in which the common signal and power supply leads of each of the plurality of stacked tape carriers are electrically connected to each other and connected to the wiring of the mounting board as a connection terminal. A semiconductor device comprising:   2. The semiconductor device according to claim 1, wherein the stacked package structure is formed by stacking a plurality of single packages, and the single packages are arranged in a device hole of one tape carrier, one end of the lead and the outside of the semiconductor chip. A semiconductor device, wherein a semiconductor chip arranged in a state where the terminals are electrically connected is sealed with a sealing resin.   2. The semiconductor device according to claim 1, wherein the stacked package structure is formed by sealing each of the semiconductor chips with the same sealing resin formed in a lump.   The semiconductor device according to claim 1, wherein each of the plurality of stacked tape carriers is provided with a connection hole in which a part of the lead is exposed, and a conductive material is embedded in the connection hole. A semiconductor device, wherein the plurality of stacked tape carriers are electrically connected to each other common signal and power supply leads.   5. The semiconductor device according to claim 4, wherein a bump electrode is provided as the connection terminal at one end of the conductor material embedded in the connection hole.   5. The semiconductor device according to claim 4, wherein a part of the lead protrudes into the connection hole.   The semiconductor device according to claim 1, wherein each of the plurality of stacked tape carriers is provided with a connection hole in which a part of the lead is exposed, and a plating process is performed in the connection hole. A semiconductor device, wherein the plurality of stacked tape carriers are electrically connected to each other common signal and power supply leads.   In the semiconductor device according to claim 1, by drilling a connection hole such that a part of the lead is exposed in each of the plurality of stacked tape carriers, and inserting a conductor pin into the connection hole, The common signal and power leads of each of the plurality of stacked tape carriers are electrically connected to each other, and one end of the conductor pin is projected from the mounting surface side of the stacked package as the connection terminal. A semiconductor device characterized by the above.   2. The semiconductor device according to claim 1, wherein the other end of each lead of the plurality of tape carriers stacked is protruded from the outer periphery of each tape carrier, and the plurality of the stacked lead portions are stacked. A semiconductor device, wherein the common signal and power supply leads of each carrier are bent and overlapped so as to be electrically connected.   2. The semiconductor device according to claim 1, wherein a bump electrode is prohibited from being bonded to a predetermined external terminal of the semiconductor chip so as to change a connection path between the semiconductor chip and a lead.

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