JP3691732B2 - Image processing device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image processing apparatus that generates and outputs a pattern.
[0002]
[Prior art]
For example, a digital copying apparatus or the like not only reads an original image and records the image on a recording sheet, but also stores a preset pattern in a memory in the apparatus and reads the pattern from the memory. Output. An image signal indicating this pattern is input to a circuit in the apparatus and used for an operation test of the circuit. The pattern is an electronic seal or ruled line, and is combined with the read image and recorded on a recording sheet (see, for example, Japanese Patent Laid-Open No. 7-23208).
[0003]
Such a conventional apparatus is configured as shown in FIG. 17, for example. In this apparatus, a CCD 801 reads an image of a document and outputs an analog image signal indicating this image. The A / D converter 802 converts the analog image signal into a digital image signal, and transfers the image signal to the image processing unit 803 as image data. The image processing unit 803 performs various processes on the image data, and then sends the image data to the selector 804.
[0004]
On the other hand, when the central processing unit (CPU) 805 is instructed by the operation panel 806 to record a preset pattern, the central processing unit (CPU) 805 writes the address of the pattern in the ROM 807 into the register 809. As a result, image data indicating the pattern is read from the ROM 807 and the image data is sent to the selector 804.
[0005]
The selector 804 switches the image data (original image) from the image processing unit 803 and the image data (pattern) from the ROM 807 as appropriate and outputs them to the laser writing unit 808. The laser writing unit 808 scans a photosensitive member (not shown) with laser light and writes an electrostatic latent image on the photosensitive member. A toner image is attached to the electrostatic latent image, and the toner image is transferred to a recording sheet and fixed.
[0006]
The horizontal synchronization signal detector 810 receives the horizontal synchronization signal from the laser writing unit 808 and resets the pixel counter 811 at the start of main scanning in response to the horizontal synchronization signal. The pixel counter 811 counts pixel clock signals generated inside the apparatus during the main scanning period. Further, the page synchronization signal detection unit 812 receives the page synchronization signal from the CPU 805, and resets the line counter 813 at the start of the page in response to the page synchronization signal. The line counter 813 counts the horizontal synchronization signal, that is, each main scanning line during the period of this page.
[0007]
[Problems to be solved by the invention]
However, in the above-described conventional apparatus, a memory (for example, ROM) is used as a bit map memory for storing patterns, so that a memory having a large storage capacity is required.
[0008]
Therefore, the present invention has been made in view of the above-described conventional problems, and an object thereof is to provide an image processing apparatus capable of generating and outputting a pattern without storing the pattern in a memory. .
[0009]
[Means for Solving the Problems]
In order to solve the above problems, an image processing apparatus according to the present invention includes a pixel counter that sequentially counts pixels arranged on a main scan line in accordance with main scanning, and main scans arranged in the sub-scanning direction in association with sub scanning. A line counter that sequentially counts lines, a pixel counter and a storage means that stores a pixel count value counted by the line counter and a pattern generation rule for generating a pattern according to the line count value, and a pixel counter and a line counter Pattern generation means for generating and outputting a pattern based on the counted pixel count value and line count value and the pattern generation rule in the storage means is provided.
[0010]
According to the present invention having such a configuration, a pattern is generated and output based on a pixel count value, a line count value, and a pattern generation rule. Therefore, no memory for storing the pattern is required. Further, although a storage means for storing the pattern generation rule is required, since the data amount of the pattern generation rule is small, the storage capacity of the storage means can be kept small. Furthermore, since the pixel counter and the line counter are naturally provided in an image processing apparatus that performs main scanning and sub-scanning, it is not necessary to attach these counters specially. For this reason, it becomes possible to generate a pattern with an extremely small circuit scale.
[0011]
In the present invention, the pattern generation means selects and deselects the pixels forming the pattern every time the pixel count value counted by the pixel counter increases by a certain value width according to the pattern generation rules in the storage means. Switching.
[0012]
Here, for example, a pixel is selected every two pixels. If such processing is repeated for each main scanning line, a pattern in which a plurality of vertical lines are arranged at intervals of one pixel is generated.
[0013]
Further, in the present invention, the pattern generation means selects and cancels the main scanning line forming the pattern every time the line count value counted by the line counter increases by a certain value width according to the pattern generation rule in the storage means. The selection is switched.
[0014]
Here, for example, a main scanning line is selected every two main scanning lines. As a result, a pattern in which a plurality of horizontal lines are arranged at intervals of one main scanning line is generated.
[0015]
Further, in the present invention, the pattern generation means generates a pattern by a pixel count value and a line count value counted by the pixel counter and the line counter, a pattern generation rule in the storage means, and a predetermined calculation process. Generate and output.
[0016]
By adding this arithmetic processing, the generated patterns are diversified.
[0017]
Further, in the present invention, the pattern generation means adds or subtracts the pixel count value and the line count value counted by the pixel counter and the line counter for each pixel, and uses the calculated value as the value of the pixel forming the pattern. Output as.
[0018]
As described above, when the pixel value is obtained by adding or subtracting the pixel count value and the line count value for each image, the value of each pixel on the main scan line is determined according to the position of each main scan line. Changes. As a result, an oblique pattern is generated.
[0019]
In the present invention, the pattern generation means selects, for each pixel, a value of each digit set in advance from the pixel count value and the line count value counted by the pixel counter and the line counter. The logical sum of the digit values is obtained, and this logical sum is output as the value of the pixel forming the pattern.
[0020]
For example, for each pixel, selecting each value of the lowest digit (indicating a binary value of 0 or 1) from the pixel count value and line count value, and calculating the logical sum of these values as the pixel value, A plurality of vertical lines are arranged at intervals of one pixel, and a lattice pattern is formed by arranging a plurality of horizontal lines at intervals of one main scanning line.
[0021]
In the present invention, the pattern generation means selects, for each pixel, a value of each digit set in advance from the pixel count value and the line count value counted by the pixel counter and the line counter. The logical product of the digit values is obtained, and this logical product is output as the value of the pixel forming the pattern.
[0022]
For example, for each pixel, selecting each value of the lowest digit (indicating a binary value of 0 or 1) from the pixel count value and the line count value, and calculating the logical product of these values as the pixel value, A halftone dot pattern in which a plurality of dots are arranged at intervals of one pixel and at intervals of one main scanning line is formed.
[0023]
Further, the present invention further includes a pattern conversion unit that has a preset look-up table and converts the pattern based on the look-up table when the pattern is input from the pattern generation unit. Yes.
[0024]
The present invention further includes processing means for inputting a pattern from the pattern generating means and performing predetermined image processing on the pattern to output the pattern.
[0025]
By adding such pattern conversion means or processing means, the generated patterns are diversified.
[0026]
Furthermore, the present invention further includes changing means for changing a pattern generation rule referred to by the pattern generating means.
[0027]
As a result, the pattern can be changed on the user side.
[0028]
The present invention further includes a document reading unit that reads a document image and outputs the image, and a combining unit that combines the pattern output from the pattern generation unit and the image output from the document reading unit. .
[0029]
In this case, for example, a pattern can be combined with a document image as a background.
[0030]
Furthermore, in the present invention, the image forming apparatus further includes a specifying unit that specifies an arbitrary area in the image output from the document reading unit, and the synthesizing unit combines the pattern output from the pattern generating unit with the area specified by the specifying unit. are doing.
[0031]
In this case, for example, an underline or a frame line can be combined with the document image.
[0032]
On the other hand, the image processing apparatus according to the present invention includes a pixel counter that sequentially counts pixels arranged on the main scanning line in accordance with main scanning, and a pattern for generating a pattern according to the pixel count value counted by the pixel counter. Storage means for storing the generation rule, and pattern generation means for generating and outputting a pattern based on the pixel count value counted by the pixel counter and the pattern generation rule in the storage means are provided.
[0033]
The image processing apparatus according to the present invention also includes a line counter that sequentially counts the main scanning lines arranged in the sub-scanning direction along with the sub-scanning, and a pattern for generating a pattern according to the count value counted by the line counter. Storage means for storing the generation rule, and pattern generation means for generating and outputting a pattern based on the count value counted by the line counter and the pattern generation rule in the storage means are provided.
[0034]
That is, according to the present invention, it is possible to generate a pattern based on one of the pixel count value and the line count value counted by the pixel counter and the line counter and the pattern generation rule in the storage unit. For example, a vertical line pattern or a horizontal line pattern can be generated.
[0035]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0036]
FIG. 1 schematically shows the mechanism of a digital copying machine to which the first embodiment of the image processing apparatus of the present invention is applied. As shown in FIG. 1, the digital copying machine 30 includes a scanner unit 31 and a laser recording unit 32.
[0037]
The scanner unit 31 includes a document placing table 35 made of transparent glass, a double-sided automatic document feeder (RADF) 36 for automatically transporting a document to the document placing table 35, and an image of the document on the document placing table 35. Is provided with a scanner unit 40 for scanning and reading.
[0038]
When a plurality of documents are placed on a document tray (not shown), the double-sided automatic document feeder 36 automatically pulls out these documents one by one and conveys them to the document table 35. Further, although not shown in the figure, this double-sided automatic document feeder 36 includes a conveyance path switching unit that selectively switches between two conveyance paths, a sensor group that detects a document passing through these conveyance paths, and this apparatus. And a control unit for controlling 36. The two transport paths are selected by the operator, one is selected when reading only one side of the document, and the other is selected when reading both sides of the document.
[0039]
The scanner unit 40 includes a first scanning unit 40a, a second scanning unit 40b, an optical lens 43, and a CCD 44. The first scanning unit 40a includes a lamp reflector assembly 41 that exposes a document surface on the document placing table 35, and a first mirror 42a that reflects light reflected from the document. The second scanning unit 40b includes second and third mirrors 42b and 42c that further reflect the reflected light from the first mirror 42a. The optical lens 43 condenses the reflected light reflected by the first, second, and third mirrors 42 a, 42 b, 42 c and forms an optical image (original image) on the light receiving surface of the CCD 44. The CCD 44 reads this optical image and outputs an image signal indicating a document image.
[0040]
The scanner unit 40 and the double-sided automatic document feeder 36 operate in association with each other. Thus, each time a document is placed on the document placement table 35, the scanner unit 40 is moved along the lower surface of the document placement table 35, and an image of the document is read.
[0041]
The first scanning unit 40a moves at a constant speed V from the left to the right on the drawing along the document placement table 35, and the second scanning unit 40b moves in the same direction at a speed of 1 / 2V. Along with this, reading of each main scanning line by the CCD 44 is repeated, and image signals indicating document images are sequentially output from the CCD 44.
[0042]
This image signal is A / D converted and then sent as image data to an image processing unit, which will be described later. After various processing, the image signal is temporarily stored in the memory. Then, the image data is appropriately read from the memory and given to the laser printer unit 32. The laser printer unit 32 records an image indicated by the image data on a recording sheet.
[0043]
The laser printer unit 32 includes a transport mechanism 50 that transports recording paper, a laser writing unit 46, and an electrophotographic process unit 48.
[0044]
Although not shown, the laser writing unit 46 is a semiconductor laser light source that emits laser light, a polygon mirror that deflects the laser light at an equiangular speed, and the deflected laser light is used as a photosensitivity of the electrophotographic process unit 48. An f-θ lens or the like for correcting the deflection on the body drum 481 at a constant angular velocity is provided. The laser writing unit 46 receives image data read from the memory or image data transferred from an external device, and controls the intensity of the laser light emitted from the semiconductor laser light source according to the image data.
[0045]
The electrophotographic process unit 48 includes a photosensitive drum 481 that forms an electrostatic latent image, a charger 482 that uniformly charges the photosensitive drum 481, and a developer 483 that attaches toner to the electrostatic latent image on the photosensitive drum 481. , A transfer device 484 for transferring the toner image on the photosensitive drum 481 to the recording paper, a peeling device for peeling the recording paper from the photosensitive drum 481, a cleaning device 486 for removing residual toner on the photosensitive drum 481, and a photosensitive drum 481. It is equipped with a static eliminator and the like.
[0046]
The transport mechanism 50 that transports the recording paper includes cassette feeding devices 51, 52, and 53 that store the recording paper, a manual feeding device 54 that supplies manually fed recording paper, cassette feeding devices 51, 52, and 53, and A transport unit 56 that guides a recording sheet from any of the manual feeding devices 54 to a transfer unit of the electrophotographic process unit 48; a fixing unit 49 that fixes the toner image transferred to the recording sheet P by the electrophotographic process unit 48; When recording an image on the back side of the recording paper P, a refeeding unit 55 is provided for guiding the recording paper P to the electrophotographic process unit 48 again.
[0047]
Further, on the downstream side of the fixing device 49, a finisher 34 that receives the recording paper P on which an image is recorded and processes the recording paper P is disposed.
[0048]
Here, the laser writing unit 46 is given image data read out from the memory, and controls the intensity of the laser light in accordance with the image data, and the photoconductive drum 481 of the electrophotographic process unit 48 is controlled by this laser light. Is repeated for main scanning. As a result, an electrostatic latent image is formed on the photosensitive drum 481, and this electrostatic latent image is developed to become a toner image. This toner image is transferred to the recording paper P, and the toner image on the recording paper P is fixed. The The recording paper P is conveyed from the fixing device 49 to the finisher 34 via the paper discharge roller 57.
[0049]
FIG. 2 is a block diagram showing the configuration of the digital copying machine 30. In the digital copying machine 30, a main central processing unit (main CPU) 401 is mounted on the main image processing board 400, and each sub central processing unit (sub CPU) is mounted on each other unit.
[0050]
The digital copying machine 30 includes an operation panel board 100 for managing and controlling the operation panel 103, a machine control board 200 for managing and controlling each unit, a CCD board 300 on which a CCD 44 for reading an original image is mounted, and image data from the CCD 44. A main image processing board 400 that performs image processing on the image, a sub image processing board 500 that performs image processing on image data after image processing by the main image processing board 400, and a sub image processing board 500. The board includes a printer board 601, a FAX board 603, and an expansion board group 600 such as a function expansion board 602 connected via an interface.
[0051]
The operation panel board 100 is basically controlled by the sub CPU 101, controls the LCD display unit 104 arranged on the operation panel 103, and manages instruction inputs from the operation key group 105. The memory 102 stores various information displayed on the LCD display unit 104, instructions input from the operation key group 105, and the like.
[0052]
The sub CPU 101 transmits and receives control data to and from the main CPU 401 and instructs the operation of the digital copying machine 30. In addition, the sub CPU 101 receives control data indicating the operation state of the digital copying machine 30 from the main CPU 401 and displays this operation state on the LCD display unit 104 to notify the operator.
[0053]
The machine control board 200 is basically controlled by the sub CPU 201, and includes an automatic document feeder 36 that conveys an original, a scanner unit 40 that reads an image of the original, an electrophotographic process unit 48 that records an image on a recording sheet, and a recording. A conveyance mechanism 50 that supplies the sheet to the electrophotographic process unit 48, a refeed unit 55 that reverses the front and back of the recording sheet on which the image is recorded, and leads the recording sheet back to the electrophotographic process unit 48, The finisher 34 and the like for performing post-processing such as stapling on the recorded recording paper are managed.
[0054]
The CCD board 300 is a CCD 44 for reading a document, a CCD gate array 302 for driving the CCD 44, an analog circuit 303 for adjusting the gain of an analog image signal output from the CCD 44, and converting the analog image signal into a digital image signal. The A / D converter 304 outputs the image signal as image data. The control of the CCD board 300 is performed by the main CPU 401.
[0055]
The main image processing board 400 is controlled by the main CPU 401, and shading correction, density correction, area separation, filter processing, MTF correction, resolution conversion, electronic zoom (variation) for multi-value image data from the CCD board 300. A multi-value image processing unit 402 that performs processing such as doubling processing and gamma correction, a memory 403 that stores the processed image data, various control information, and the like, and transfers the processed image data to the laser writing unit 46. A laser controller 404 is provided.
[0056]
The main image processing board 400 includes a page synchronization signal detection unit 411 that detects a page synchronization signal from the CPU 401, a line counter 412 that counts the horizontal synchronization signal, and a horizontal synchronization signal that detects a horizontal synchronization signal from the laser writing unit 46. A detection unit 413, a pixel counter 414 that counts pixel clock signals, a register 415 that stores a preset pattern generation rule, and generates and outputs image data indicating a pattern, or from the multi-value image processing unit 402 Is provided with a self-printing control circuit 416 for outputting the image data.
[0057]
The sub image processing board 500 is connected to the main image processing board 400 and controlled by the main CPU 401, and includes a binary image processing unit 501, a memory 502 for storing binary image data, various control information, and the like. The gate array 502a includes a hard disk 503 and a hard disk gate array 503a for storing images of a plurality of documents, and an external interface SCSI 504 and SCSI gate array 504a. The binary image processing unit 501 includes a conversion processing unit that converts multi-valued image data into binary image data, a rotation processing unit that rotates an image, and a scaling processing unit that performs scaling processing of a binary image. And a fax interface for sending and receiving facsimile images.
[0058]
In the digital copying apparatus 30 having such a configuration, image data is processed in the following procedure when copying.
[0059]
First, when a document is conveyed to the document table 35 by the automatic document feeder 36, the scanner unit 40 reads an image of the document, and multi-valued image data indicating this image is 8 bits for each pixel. Are transferred to the main image processing board 400.
[0060]
In the main image processing board 400, the multi-value image data is input to the multi-value image processing unit 402, where various processes are performed, and then to the laser writing unit 46 via the laser control unit 404. Sent.
[0061]
The laser writing unit 46 receives multi-valued image data, and repeatedly performs main scanning on the photosensitive drum 481 of the electrophotographic process unit 48 with the laser light while controlling the intensity of the laser light according to the image data. As a result, a toner image is formed on the photosensitive drum 481, and the toner image is transferred to the recording paper P and fixed.
[0062]
Thus, the image recorded on the recording paper P has gradation.
[0063]
When the multi-value image data is once converted into a binary image and then the image is recorded on the recording paper P, the multi-value image data is converted by the multi-value image processing unit 402 in the main image processing board 400. After the processing, the processed multi-valued image data is transferred to the sub image processing board 500.
[0064]
In the sub-image processing board 500, the multi-valued image data is input to the binary image processing unit 501, where it is converted into binary image data together with processing such as error diffusion. This binary image data is obtained by forming 2-bit data for each pixel.
[0065]
The binary image data thus obtained is stored and managed in a disk memory 503 such as a hard disk for each document.
[0066]
The reason why the multi-value image data is converted into binary image data after the multi-value image data is processed by the multi-value image processing unit 402 is that the multi-value image data is not processed. This is because, when this multi-valued image data is immediately converted into binary image data, the image quality is greatly deteriorated. On the other hand, when multi-valued image data is processed and then converted into binary image data, image quality degradation can be reduced.
[0067]
The reason why multi-valued image data (8-bit data) is converted to binary image data (2-bit data) is to keep the storage capacity of the memory for storing images small.
[0068]
Thereafter, 2-bit image data is read from the disk memory 503, transferred to the multi-value image processing unit 402 of the main image processing board 400, and subjected to processing such as gamma correction, and then the laser controller. It is transferred to the laser writing unit 46 via the unit 404. The laser writing unit 46 repeatedly performs main scanning on the photosensitive drum 481 with the laser light while controlling the intensity of the laser light according to the binary image data. As a result, a toner image is formed on the photosensitive drum 481, and the toner image is transferred to the recording paper P and fixed.
[0069]
Thus, the image recorded on the recording paper P has gradation.
[0070]
Since binary image data is stored in the disk memory 503, it is possible to repeatedly read out and record the same image on a plurality of recording papers P. It is also possible to store respective image data indicating a plurality of images in the disk memory 503 and record these images on a plurality of recording papers P, or repeat the recording of these images.
[0071]
When the same image is repeatedly recorded, binary image data is formed, and at the same time, the binary image data is stored in the disk memory 508, and the binary image data is transferred to the laser writing unit 46. You can forward it.
[0072]
FIG. 3 is a block diagram showing the image processing apparatus according to the first embodiment applied to the digital copying machine 30. In FIG. 3, the image processing apparatus 11 is extracted from the digital copying machine 30 shown in FIG.
[0073]
Compared with the conventional apparatus of FIG. 17, the image processing apparatus 11 of the first embodiment does not have a ROM for storing patterns. Instead, a register 415 for storing pattern generation rules and a self-printing control circuit are provided. 416. The self-printing control circuit 416 generates and outputs a preset pattern based on the line count value counted by the line counter 412, the pixel count value counted by the pixel counter 414, and the pattern generation rule in the register 415. Or the image data from the multi-valued image processing unit 402 is output.
[0074]
Now, when recording of a preset pattern is instructed by operating the operation panel 103, in response to this, the CPU 401 writes a pattern generation rule for generating this pattern in the register 415.
[0075]
At this time, the CPU 401 generates a page synchronization signal Pa as shown in FIG. 4 and outputs this page synchronization signal to the page synchronization signal detector 411. In response to the page synchronization signal Pa, the page synchronization signal detection unit 411 resets the line counter 412 at the start of the page. The line counter 412 receives the horizontal synchronization signal Sy from the laser writing unit 46 during the period of this page, and counts this horizontal synchronization signal Sy. Since the horizontal synchronization signal Sy indicates the synchronization timing of each main scanning line, the line counter 412 counts the number of each main scanning line. Further, the horizontal synchronization signal detector 413 resets the pixel counter 414 at the time of disclosure of main scanning in response to the horizontal synchronization signal Sy from the laser writing unit 46 as shown in FIG. The pixel counter 414 counts the pixel clock signal Clk generated inside the apparatus during the main scanning period. Since the pixel clock signal Clk indicates the synchronization timing of each pixel, the pixel counter 414 counts the number of each pixel.
[0076]
As shown in FIG. 6, the recording paper P is sub-scanned while being repeatedly main-scanned. At the start of scanning of the recording paper P, the line counter 412 is reset, the main counter lines are sequentially counted by the line counter 412, and the pixel counter 414 is reset for each main scan, and the pixel counter 414 is reset. Thus, each pixel on the main scanning line is sequentially counted. Therefore, based on the line count value counted by the line counter 412 and the pixel count value counted by the pixel counter 414, the recording area P1, the margin area P2, or an arbitrary area on the recording paper P can be specified. .
[0077]
Here, the pattern generation rule in the register 415 is a rule for generating a pattern in which vertical lines are arranged at equal intervals, or a pattern in which gradation gradually changes in the horizontal direction (horizontal gradation). is there. The operation of each selector A, C, E, F and distributor AV in the self-print control circuit 416 is set by this pattern generation rule.
[0078]
For example, the selector A inputs 16-bit data indicating the pixel count value from the pixel counter 414, selects the lower 8 bits of this data, and provides the lower 8 bits to the selector C. The selector C selects the lowest 1 bit from the lower 8 bits and supplies this lowest 1 bit to the distributor AV. The least significant 1 bit given to the distributor AV repeats “0” and “1” alternately in response to the pixel clock signal.
[0079]
The distributor AV outputs 8-bit data indicating “0” to the selector E when this bit is “0”, and 8-bit data indicating “255” when this bit is “1”. To the selector E. The selector E selects one of the distributors AV and BV. When the distributor AV is selected, 8-bit data from the distributor AV is supplied to the selector F.
[0080]
The selector F selects either the multi-value image processing unit 402 or the selector E. When the selector E is selected, 8-bit data from the selector E is given to the laser writing unit 46.
[0081]
FIG. 7A schematically shows the arrangement of each pixel and each main scanning line, FIG. 7B shows the change in the value of the lower 8 bits selected by the selector A, and FIG. 7C shows the selector. A change in the value of the least significant 1 bit selected by C is shown, and FIG. 7D shows a change in the value of the 8-bit data output from the distributor AV. As is apparent from FIG. 7D, the 8-bit data from the distributor AV shows a pattern in which the vertical lines are arranged with an interval of one pixel. Accordingly, when the 8-bit data from the distributor AV is given to the laser writing unit 46, the vertical line pattern is recorded on the recording paper P.
[0082]
For example, when the second bit from the least significant bit is selected by the selector C, the selected bit indicates “0” for two consecutive pixels, and “1” for the next two consecutive pixels. Show and repeat. In response to this, the distributor AV outputs 8-bit data indicating “0” for two consecutive pixels, and 8-bit data indicating “255” for the next two consecutive pixels. Is output. When such 8-bit data is supplied to the laser writing unit 46 via the selectors E and F, a vertical line pattern formed by arranging vertical lines having a width of 2 pixels with an interval of 2 pixels is formed on the recording paper P. To be recorded. Therefore, various vertical line patterns can be generated depending on which bit is selected by the selector C.
[0083]
Further, for example, when the lower 8 bits data selected by the selector A is supplied to the laser writing unit 46 via the selectors E and F without being processed by the selector C and the distributor AV, the lower 8 bits. Since the data is as shown in FIG. 7B, a horizontal gradation pattern is recorded on the recording paper P. For example, when the upper 8 bits are selected by the selector A, a gradation pattern in which the gradation changes every 256 pixels is recorded on the recording paper P. Therefore, various gradation patterns can be generated depending on which bit is selected by the selector A.
[0084]
On the other hand, as a pattern generation rule in the register 415, a rule for generating a pattern in which horizontal lines are arranged at equal intervals or a pattern in which gradation gradually changes in the vertical direction (vertical gradation) is set. be able to. The operation of each selector B, D, E, F and distributor BV in the self-print control circuit 416 is set by this pattern generation rule.
[0085]
For example, the selector B inputs 16-bit data indicating the line count value from the line counter 412, selects the lower 8 bits of this data, and supplies it to the selector D. The selector D selects the lowest 1 bit from the lower 8 bits and supplies it to the distributor BV. The least significant 1 bit alternately repeats “0” and “1” in response to the line synchronization signal.
[0086]
Distributor BV outputs 8-bit data indicating “0” when this bit is “0”, and outputs 8-bit data indicating “255” when this bit is “1”. . The 8-bit data is given to the laser writing unit 46 through the selectors E and F.
[0087]
8A schematically shows the arrangement of each pixel and each main scanning line, FIG. 8B shows the change in the value of the lower 8 bits selected by the selector B, and FIG. 8C shows the selector. The change of the value of the least significant 1 bit selected by D is shown, and FIG. 8D shows the change of the value of the 8-bit data output from the distributor BV. Here, the 8-bit data from the distributor BV shows a horizontal line pattern in which each horizontal line is arranged with an interval of one pixel. Therefore, when the 8-bit data from the distributor BV is given to the laser writing unit 46, the horizontal line pattern is recorded on the recording paper P.
[0088]
For example, when the second bit from the least significant bit is selected by the selector D, the selected bit indicates “0” in the case of two consecutive main scan lines, and “0” in the case of the next two main scan lines. This is repeated. In response to this, the distributor BV outputs 8-bit data indicating “0” in the case of two consecutive main scan lines, and indicates “255” in the case of the next two consecutive main scan lines. Outputs 8-bit data. When such 8-bit data is supplied to the laser writing unit 46, a horizontal line pattern in which horizontal lines having the width of the two main scanning lines are arranged at intervals of the two main scanning lines is recorded on the recording paper P. Therefore, various horizontal line patterns can be generated depending on which bit is selected by the selector D.
[0089]
Further, for example, when the lower 8 bits of data selected by the selector B are supplied to the laser writing unit 46 through the selectors E and F without being processed by the selector D and the distributor BV, the lower 8 bits. Since the data is as shown in FIG. 8B, a gradation pattern in the vertical direction is recorded on the recording paper P. Further, for example, when the upper 8 bits are selected by the selector B, a gradation pattern whose gradation changes every 256 pixels is recorded on the recording paper P. Therefore, various gradation patterns can be generated depending on which bit is selected by the selector B.
[0090]
In this way, each selector A, C and distributor AV can form a vertical line pattern or a horizontal gradation pattern, and each selector B, D and distributor BV can form a horizontal line pattern or a vertical gradation pattern. can do. Further, the selector E can select a pattern from one of the distributors AV and BV. If this selection is performed appropriately, a frame line can be recorded.
[0091]
Further, the selector F can select either the multi-value image processing unit 402 or the selector E. In the selector F, a predetermined area of the recording paper P is determined based on the pixel count value of the pixel counter 414 and the line count value of the line counter 412, and a pattern is recorded in this predetermined area or other areas are recorded. An image from the multi-value image processing unit 402 can be recorded. Alternatively, the selector F can obtain the logical sum of the pattern from one of the distributors AV and BV and the image from the multi-value image processing unit 402, and record the combination of the pattern and the image. For example, a character string can be recorded, and an underline or ruled line can be drawn on the character string, or a pattern can be synthesized as a background of the character string.
[0092]
Further, the pattern generation rule stored in the register 415 may be changed by operating the operation panel 103. That is, the bit selected by each selector A, B, C, D is changed, the pixel density set by each distributor AV, BV is changed, the selection timing of each distributor AV, BV by selector E Or the recording area of the pattern determined by the selector F may be changed. This makes it possible to set a pattern and its recording area according to the user's needs.
[0093]
Instead of giving the pattern or image from the selector F to the laser writing unit 46, these may be temporarily stored in the memory 403 (shown in FIG. 2).
[0094]
FIG. 9 shows a self-printing control circuit in the image processing apparatus of the second embodiment. The image processing apparatus according to the second embodiment is applied to the digital copying machine 30 in the same manner as the image processing apparatus 11 in FIG. 3, and is shown in FIG. 9 instead of the self-printing control circuit 416 in FIG. A self-printing control circuit 421 is provided.
[0095]
Also in the image processing apparatus of the second embodiment, the CPU 401 writes the pattern generation rule in the register 415 in response to the operation of the operation panel 103. This pattern generation rule is a rule for generating a pattern in which oblique lines are arranged at equal intervals, or a pattern in which gradation gradually changes diagonally (oblique gradation).
[0096]
First, the selector G inputs 16-bit data indicating the pixel count value from the pixel counter 414, selects the lower 8 bits of this data, and provides the lower 8 bits to the addition / subtraction circuit 422. The selector H receives 16-bit data indicating the line count value from the line counter 412, selects the lower 8 bits of this data, and supplies the selected data to the addition / subtraction circuit 422.
[0097]
The addition / subtraction circuit 422 subtracts the value indicated by the lower 8 bits of the line count value data from the value indicated by the lower 8 bits of the pixel count value data, and supplies the selector I with 8-bit data indicating the difference. . The selector I selects the second least significant bit among the 8 bits and supplies this bit to the distributor CV.
[0098]
When this bit is “0”, distributor CV outputs 8-bit data indicating “0” to selector J, and when this bit is “1”, 8-bit data indicating “255”. Is output to the selector J. The selector J selects either the multi-value image processing unit 402 or the selector J. When the selector J is selected, 8-bit data from the selector J is given to the laser writing unit 46.
[0099]
10A schematically shows the arrangement of each pixel and each main scanning line, FIG. 10B shows the change in the 8-bit value output from the addition / subtraction circuit 422, and FIG. 10C shows the selector. The change in the value of the second least significant bit selected by I is shown, and FIG. 10D shows the change in the value of the 8-bit data output from the distributor CV. As is apparent from FIG. 10D, the 8-bit data from the distributor CV shows a pattern in which diagonal lines that are lowered on the right side are arranged at equal intervals. Since the second bit from the least significant bit is selected by the selector I, the width and interval of each diagonal line are 2 pixels. Therefore, when the 8-bit data from the distributor CV is supplied to the laser writing unit 46, the oblique line pattern is recorded on the recording paper P.
[0100]
In this case as well, various oblique lines can be generated depending on which bit is selected by the selector I.
[0101]
For example, when the 8-bit data output from the adder / subtractor circuit 422 is supplied to the laser writing unit 46 via the selector J without being processed by the selector I and the distributor CV, the 8-hit data is shown in FIG. 10 (b), an oblique gradation pattern that is lowered on the right side is recorded on the recording paper P.
[0102]
Depending on which bit is selected by the selector G, various gradations can be generated.
[0103]
Further, instead of obtaining the difference by the addition / subtraction circuit 422, the value indicated by the lower 8 bits of the pixel count value data and the value indicated by the lower 8 bits of the line count value data are added to indicate this sum. When 8-bit data is supplied to the selector I, an oblique line pattern and an oblique gradation pattern that are lowered on the left side are generated.
[0104]
In this manner, each selector G, H, I, addition / subtraction circuit 422 and distributor CV can form a diagonal line pattern or a diagonal gradation pattern.
[0105]
Further, the selector J can select either the multi-value image processing unit 402 or the selector J, and records a pattern in a predetermined area or records an image from the multi-value image processing unit 402 in another area. can do.
[0106]
Instead of giving the pattern or image from the selector J to the laser writing unit 46, these may be temporarily stored in the memory 403 (shown in FIG. 2).
[0107]
FIG. 11 shows a self-printing control circuit in the image processing apparatus according to the third embodiment. The image processing apparatus according to the third embodiment is applied to the digital copying machine 30 in the same manner as the image processing apparatus 11 in FIG. 3, and is shown in FIG. 11 instead of the self-printing control circuit 416 in FIG. A self-printing control circuit 431 is provided.
[0108]
Also in the image processing apparatus of the third embodiment, the CPU 401 writes the pattern generation rule in the register 415 in response to the operation of the operation panel 103. This pattern generation rule is a rule for generating a lattice pattern or a dot pattern.
[0109]
First, the selector K inputs 16-bit data indicating the pixel count value from the pixel counter 414, selects the third bit from the least significant bit of this data, and gives this bit to the logic circuit 432. The selector L also receives 16-bit data indicating the line count value from the line counter 412, selects the third bit from the least significant bit of this data, and supplies it to the logic circuit 432.
[0110]
The logic circuit 432 calculates a logical sum of the value of the bit from the selector K and the value of the bit from the selector L, and gives a bit indicating this logical sum to the distributor DV.
[0111]
The distributor DV outputs 8-bit data indicating “0” to the selector M when this bit is “0”, and 8-bit data indicating “255” when this bit is “1”. Is output to the selector M. The selector M selects either the multi-value image processing unit 402 or the distributor DV, and when the distributor DV is selected, the 8-bit data from the distributor DV is given to the laser writing unit 46.
[0112]
12A schematically shows the arrangement of each pixel and each main scanning line, FIG. 12B shows the change in the value of each bit output from each selector K, L, and FIG. Indicates a change in the logical sum obtained by the logic circuit 432, and FIG. 12D shows a change in the value of 8-bit data output from the distributor DV. As is clear from FIG. 12D, the 8-bit data from the divider DV indicates a lattice pattern. Since the selector K selects the third bit from the least significant bit, the width and interval of each vertical line of this lattice pattern is 3 pixels, and similarly, the selector L selects the third bit from the least significant bit, The width and interval of each horizontal line are 3 pixels.
[0113]
Various grid patterns can be generated depending on the number of bits selected by the selectors K and L, respectively.
[0114]
Further, for example, when the second least significant bit is selected by the selectors K and L, the change of the value of each bit output from the selectors K and L is as shown in FIG. When the logical product 432 calculates the logical product of the bit value from the selector K and the bit value from the selector L instead of calculating the logical sum, the change in the logical product is shown in FIG. Thus, the change in the value output from the distributor DV is as shown in FIG. As is clear from FIG. 13D, the value output from the distributor DV indicates a halftone dot pattern. Since the second bit from the least significant bit is selected by the selector K, the horizontal width and the horizontal interval of each dot of this halftone dot pattern are two pixels, and the second bit from the least significant bit is selected by the selector L as well. Therefore, the vertical width and vertical interval of each point are two pixels.
[0115]
In this manner, a lattice pattern or a halftone dot pattern can be generated depending on whether a logical sum or a logical product is obtained by the logic circuit 432.
[0116]
Furthermore, the selector M can select either the multi-value image processing unit 402 or the distributor DV, and records a pattern in a predetermined area or images from the multi-value image processing unit 402 in another area. Can be recorded.
[0117]
Instead of giving the pattern or image from the distributor DV to the laser writing unit 46, these may be temporarily stored in the memory 403 (shown in FIG. 2).
[0118]
FIG. 14 shows an image processing apparatus according to the fourth embodiment. The image processing apparatus 14 of the fourth embodiment is applied to the digital copying machine 30 in the same manner as the image processing apparatus 11 of FIG.
[0119]
The self-print control circuit 441 of the image processing apparatus 14 generates a pattern in the same manner as the self-print control circuit 416 in FIG. 3, the self-print control circuit 421 in FIG. 9, and the self-print control circuit 431 in FIG. The pattern is not given directly to the laser writing unit 46 or the memory 403, but this pattern is given to the multi-value image processing unit 402.
[0120]
The multi-value image processing unit 402 performs filter processing, scaling processing, error diffusion processing, and the like on the pattern, and gives the processed pattern to the laser writing unit 46 and the memory 403.
[0121]
For example, a self-printing control circuit 441 generates a lattice pattern in which each vertical line has a width and interval of 10 pixels and each horizontal line has a width and interval of 10 pixels, and the multi-value image processing unit 402 multiplies the lattice pattern by 10 times. The enlarged lattice pattern is recorded on the recording paper P by the laser writing unit 46. Then, by measuring the size of the lattice pattern on the recording paper P, it is checked whether the circuit for enlarging the multi-value image processing unit 402 operates normally.
[0122]
Similarly, a pattern is generated by the self-printing control circuit 441, and the pattern is filtered or error diffusion processed by the multi-value image processing unit 402, and then this pattern is recorded on the recording paper P. By measuring the above pattern, it is inspected whether or not the circuits performing the respective processes in the multi-value image processing unit 402 operate normally.
[0123]
If the patterns thus generated by the self-printing control circuit 421 are input to various circuits in the multi-value image processing unit 402 and processed, and these processed patterns are recorded on the recording paper P and measured, these patterns can be obtained. It can be checked whether the circuit operates normally.
[0124]
On the other hand, the multi-value image processing unit 402 performs density conversion correction, gamma correction, and the like on the pattern, and gives the corrected pattern to the laser writing unit 46 and the memory 403.
[0125]
For example, the self-printing control circuit 441 forms the pattern 451 shown in FIG. 15, and the multi-value image processing unit 402 converts the density of the pattern 451 according to the density conversion lookup table 452 shown in FIG. A pattern 453 shown is generated.
[0126]
Alternatively, the self-printing control circuit 441 forms the pattern 461 shown in FIG. 16, and the multi-value image processing unit 402 converts the density of the pattern 461 according to the density conversion lookup table 462 shown in FIG. A pattern 463 shown is generated.
[0127]
If the pattern is generated by the self-printing control circuit 441 and the pattern is processed by the multi-value image processing unit 402, the existing functions of the multi-value image processing unit 402 can be used to further diversify the patterns. .
[0128]
As described above, in each of the above embodiments, various patterns are generated by the register for storing the pattern generation rule and the self-printing control circuit without having the ROM for storing the pattern as in the conventional apparatus of FIG. can do.
[0129]
In addition, this invention is not limited to said each embodiment, A various deformation | transformation is possible. For example, each selector, distribution circuit, addition / subtraction circuit, logic circuit, etc. in the self-printing control circuit may be appropriately increased / decreased and combined to generate a wide variety of patterns. The image processing apparatus of the present invention is not only used in a digital copying machine but also incorporated in other types of equipment, or used alone to generate and provide a pattern in response to access from other equipment. It doesn't matter.
[0130]
【The invention's effect】
As described above, according to the present invention, a pattern is generated and output according to a pixel count value, a line count value, and a pattern generation rule. Therefore, no memory for storing the pattern is required. Further, although a storage means for storing the pattern generation rule is required, since the data amount of the pattern generation rule is small, the storage capacity of the storage means can be kept small. Furthermore, since the pixel counter and the line counter are naturally provided in an image processing apparatus that performs main scanning and sub-scanning, it is not necessary to attach these counters specially. For this reason, it becomes possible to generate a pattern with an extremely small circuit scale.
[0131]
Further, according to the present invention, selection and non-selection of a pixel forming a pattern are switched every time the pixel count value counted by the pixel counter increases by a certain value width according to the pattern generation rule. For example, a pixel is selected every two pixels. If such processing is repeated for each main scanning line, a pattern in which a plurality of vertical lines are arranged at intervals of one pixel is generated.
[0132]
Further, according to the present invention, the main scanning line forming the pattern is switched between selection and non-selection every time the line count value counted by the line counter increases by a certain value width according to the pattern generation rule. For example, the main scanning line is selected every two main scanning lines. As a result, a pattern in which a plurality of horizontal lines are arranged at intervals of one main scanning line is generated.
[0133]
Further, according to the present invention, a pattern is generated and output by a pixel count value and a line count value, a pattern generation rule, and arithmetic processing. By adding this arithmetic processing, the generated patterns are diversified.
[0134]
Further, according to the present invention, the pixel count value and the line count value are added or subtracted for each pixel, and the calculated value is output as the value of the pixel forming the pattern. As a result, the value of each pixel on the main scan line changes regularly according to the position of each main scan line, and as a result, an oblique pattern is generated.
[0135]
Further, according to the present invention, for each pixel, a value of each digit set in advance is selected from the pixel count value and the line count value, and a logical sum of these digit values is obtained, and this logical sum is calculated. Output as the value of the pixel forming the pattern. For example, for each pixel, selecting each value of the lowest digit (indicating a binary value of 0 or 1) from the pixel count value and line count value, and calculating the logical sum of these values as the pixel value, A plurality of vertical lines are arranged at intervals of one pixel, and a lattice pattern is formed by arranging a plurality of horizontal lines at intervals of one main scanning line.
[0136]
Further, according to the present invention, for each pixel, a value of each digit set in advance is selected from the pixel count value and the line count value, and a logical product of these digit values is obtained, and this logical product is calculated. Output as the value of the pixel forming the pattern. For example, for each pixel, selecting each value of the lowest digit (indicating a binary value of 0 or 1) from the pixel count value and the line count value, and calculating the logical product of these values as the pixel value, A halftone dot pattern in which a plurality of dots are arranged at intervals of one pixel and at intervals of one main scanning line is formed.
[0137]
Furthermore, according to the present invention, a lookup table is provided, and a pattern is converted and output based on the lookup table. Alternatively, predetermined image processing is performed on the pattern and output. As a result, the patterns to be generated are diversified.
[0138]
Furthermore, according to the present invention, it is possible to change the pattern generation rule, which makes it possible to change the pattern on the user side.
[0139]
Further, according to the present invention, the pattern and the document image are synthesized. Thereby, for example, a pattern can be combined with a document image as a background.
[0140]
Furthermore, according to the present invention, a pattern is synthesized in a designated area. Thereby, for example, an underline or a frame line can be synthesized with respect to the document image.
[Brief description of the drawings]
FIG. 1 is a side view schematically showing a mechanism of a digital copying machine to which a first embodiment of an image processing apparatus of the present invention is applied.
2 is a block diagram showing a configuration of the digital copying machine of FIG. 1. FIG.
FIG. 3 is a block diagram illustrating an image processing apparatus according to the first embodiment.
FIG. 4 is a timing chart showing counting timings by a page synchronization signal, a horizontal synchronization signal, and a line counter.
FIG. 5 is a timing chart showing a counting timing by a horizontal synchronization signal, a pixel clock signal, and a pixel counter.
FIG. 6 is a diagram used for explaining main scanning and sub-scanning on a recording sheet.
7A schematically shows an arrangement of each pixel and each main scanning line, and FIG. 7B is a lower 8-bit value selected by the selector A of the self-print control circuit in the image processing apparatus of FIG. (C) shows the change in the value of the least significant 1 bit selected by the selector C of the self-printing control circuit, and (d) shows 8-bit data output from the distributor of the self-printing control circuit. The change of the value of is shown.
8A schematically shows an arrangement of each pixel and each main scanning line, and FIG. 8B is a lower 8-bit value selected by the selector B of the self-print control circuit in the image processing apparatus of FIG. (C) shows the change in the value of the least significant 1 bit selected by the selector D of the self-printing control circuit, and (d) shows 8-bit data output from the distributor of the self-printing control circuit. The change of the value of is shown.
FIG. 9 is a block diagram illustrating a self-printing control circuit in the image processing apparatus according to the second embodiment.
10A schematically shows an arrangement of each pixel and each main scanning line, FIG. 10B shows a change in 8-bit value output from the addition / subtraction circuit of FIG. 9, and FIG. 9 shows changes in the value of the second least significant bit selected by the selector I of FIG. 9, and (d) shows changes in the value of the 8-bit data output from the distributor of FIG.
FIG. 11 is a block diagram illustrating a self-printing control circuit in the image processing apparatus according to the third embodiment.
12A schematically shows the arrangement of each pixel and each main scanning line, FIG. 12B shows the change in the value of each bit output from each selector K, L in FIG. 11, and FIG. ) Shows the change of the logical sum obtained by the logic circuit of FIG. 11, and (d) shows the change of the value of 8-bit data output from the distributor of FIG.
13A schematically shows the arrangement of each pixel and each main scanning line, shows the change in the value of each bit output from each selector K, L in FIG. 11, and FIG. 13C shows FIG. (D) shows the change in the value of 8-bit data output from the distributor of FIG. 11.
FIG. 14 is a block diagram illustrating an image processing apparatus according to a fourth embodiment.
15 is a diagram showing a processing process by the multi-value image processing unit of FIG. 14;
FIG. 16 is a diagram illustrating another process performed by the multi-value image processing unit of FIG. 14;
FIG. 17 is a block diagram illustrating a conventional apparatus.
[Explanation of symbols]
11 Image processing device
30 Digital copier
44 CCD
46 Laser writing unit
103 Operation panel
304 A / D converter
411 Page synchronization detector
412 line counter
413 Horizontal sync detector
414 pixel counter
415 registers
416 Self-printing control circuit

Claims (14)

A pixel counter that sequentially counts the pixels arranged on the main scan line along with the main scan,
A line counter that sequentially counts the main scanning lines arranged in the sub-scanning direction along with the sub-scanning;
Storage means for storing a pattern generation rule for generating a pattern in accordance with the pixel count value and the line count value counted by the pixel counter and the line counter;
A pattern generation unit that generates and outputs a pattern according to a pixel count value and a line count value counted by the pixel counter and the line counter and a pattern generation rule in the storage unit ;
The pattern generation means selects a first pixel selector that selects at least one value from the pixel count value counted by the pixel counter, and a first pixel selector that selects at least one value from the value selected by the first pixel selector. A two-pixel selector, a first line selector that selects at least one value from the line count value counted by the line counter, and a first line selector that selects at least one value from the value selected by the first line selector. One of the first and second pixel selectors, which sets the operations of the first and second pixel selectors and the first and second line selectors according to the pattern generation rule in the storage means. Or a pattern corresponding to the value selected by one of the first and second line selectors. The image processing apparatus characterized by force.   The pattern generation means switches between selection and non-selection of pixels forming a pattern each time the pixel count value counted by the pixel counter increases by a certain value width according to a pattern generation rule in the storage means. Item 8. The image processing apparatus according to Item 1.   The pattern generation means switches between selection and non-selection of a main scanning line forming a pattern every time the line count value counted by the line counter increases by a certain value width according to a pattern generation rule in the storage means. The image processing apparatus according to claim 1. A pixel counter that sequentially counts the pixels arranged on the main scan line along with the main scan,
A line counter that sequentially counts the main scanning lines arranged in the sub-scanning direction along with the sub-scanning;
Storage means for storing a pattern generation rule for generating a pattern in accordance with the pixel count value and the line count value counted by the pixel counter and the line counter;
A pattern generation unit that generates and outputs a pattern according to a pixel count value and a line count value counted by the pixel counter and the line counter and a pattern generation rule in the storage unit;
The pattern generation means includes a calculation means for calculating the pixel count value counted by the pixel counter and the line count value counted by the line counter, and a value at least one position from the calculation value obtained by the calculation processing of the calculation means The selector has a selector for selecting the calculation means and the operation of the selector according to the pattern generation rule in the storage means, and corresponds to the calculation value obtained by the calculation processing of the calculation means or the value selected by the selector. An image processing apparatus that generates and outputs a pattern to be output .   The pattern generation means adds or subtracts the pixel count value and the line count value counted by the pixel counter and the line counter for each pixel, and outputs the calculated value as the value of the pixel forming the pattern. The image processing apparatus according to claim 4.   For each pixel, the pattern generation means selects each digit value set in advance from the pixel count value and the line count value counted by the pixel counter and the line counter, and performs a logical sum of these digit values. 5. The image processing apparatus according to claim 4, wherein the logical sum is obtained and output as a value of a pixel forming a pattern.   For each pixel, the pattern generation means selects each preset digit value from the pixel count value and the line count value counted by the pixel counter and the line counter, and calculates the logical product of these digit values. 5. The image processing apparatus according to claim 4, wherein the logical product is obtained and output as a value of a pixel forming a pattern.   2. The apparatus according to claim 1, further comprising a pattern conversion unit that has a preset look-up table and converts and outputs the pattern based on the look-up table when a pattern is input from the pattern generation unit. The image processing apparatus according to any one of 1 to 7.   9. The image processing apparatus according to claim 1, further comprising a processing unit that, when a pattern is input from the pattern generation unit, performs predetermined image processing on the pattern and outputs the processed pattern.   The image processing apparatus according to claim 1, further comprising a changing unit that changes a pattern generation rule referred to by the pattern generation unit. An original reading means for reading an original image and outputting the image;
11. The image processing apparatus according to claim 1, further comprising a combining unit that combines the pattern output from the pattern generation unit and the image output from the document reading unit. A specifying unit for specifying an arbitrary area in the image output from the document reading unit;
The image processing apparatus according to claim 11, wherein the synthesizing unit synthesizes the pattern output from the pattern generating unit with the area specified by the specifying unit. A pixel counter that sequentially counts the pixels arranged on the main scan line along with the main scan,
Storage means for storing a pattern generation rule for generating a pattern in accordance with the pixel count value counted by the pixel counter;
Pattern generation means for generating and outputting a pattern according to the pixel count value counted by the pixel counter and the pattern generation rule in the storage means ,
The pattern generation means selects a first pixel selector that selects at least one value from the pixel count value counted by the pixel counter, and a first pixel selector that selects at least one value from the value selected by the first pixel selector. A two-pixel selector, which sets the operation of the first and second pixel selectors according to the pattern generation rules in the storage means and corresponds to the value selected by either the first or second pixel selector An image processing apparatus that generates and outputs a pattern . A line counter that sequentially counts the main scanning lines arranged in the sub-scanning direction along with the sub-scanning;
Storage means for storing a pattern generation rule for generating a pattern according to the line count value counted by the line counter;
Pattern generation means for generating and outputting a pattern according to the line count value counted by the line counter and the pattern generation rule in the storage means ,
The pattern generating means selects a first line selector that selects at least one place value from the line count value counted by the line counter, and a first line selector that chooses at least one place value from the values selected by the first line selector. A two-line selector, which sets the operation of the first and second line selectors according to the pattern generation rules in the storage means and corresponds to the value selected by either the first or second line selector An image processing apparatus that generates and outputs a pattern.

Images