JP3497179B2 - Bus management method for data processing system - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus control system in a data processing system in which a plurality of information processing units are configured to transfer data via a system bus under the bus usage right control by a bus management device. .

[0002]

2. Description of the Related Art FIG. 4 shows a conventional data processing system in which a plurality of units for performing data processing are connected to each other via a system bus so that data can be transferred to each other. The operation of this system will be described with reference to the time chart of FIG. 5, which conceptually shows the operation at the time of detecting an exception in the transferred data, taking the case of transferring the data as an example. It should be noted that the system clock shown is merely for indicating the period and does not coincide with the execution timing of each process shown.

[0003] When the data to be transferred from unit -1 unit -2 occurs, this unit -1 sends a bus request signal BRQ ₁ from time t ₀ to the bus request line RQ, the bus request signal BRQ ₁ bus The signal is received by the handler B and input to the arbitration circuit A in the bus handler B.

If the bus is not used, that is,
When neither unit is performing data transfer, the bus use signal BK asserted by the unit in use of the bus does not exist on the bus use signal line BU. Therefore, the unit-1 outputs the arbitration circuit A. In response to the bus request signal BRQ _1, which is present, the bus use permission signal BGR ₁ for the unit-1 is continuously transmitted to the unit- ₁ from the period t ₁ through the bus use permission signal line BG. In addition, this FIG.
In order to facilitate understanding, the bus use signal line BU is shown as an independent line, but a line in the sub bus can be used, for example.

Unit-1 uses the bus use permission signal BGR ₁
When the signal is received, the bus use signal BK ₁ is asserted and sent to the bus use signal line BU, and the transmission data D ₁ including the address data for designating the receiving unit is transmitted for the period t ₂
To the system bus SB.

The transmission data D ₁ on the system bus SB is received by the unit-2 which is the receiving unit designated by the above address data, and the receiving data D ₁ is indicated by the mark X in this receiving unit. When an exception such as a protocol error or a data error is detected by the exception detection means E ₂ , the response circuit C ₂ generates an exception signal ER that codes the type and content of this exception, and outputs this exception signal ER to the response line RL. Send to. This exception signal ER
Is received by a higher-level device (not shown), and a process of determining the type and content of the exception and a process corresponding to the type and content of the exception that occurred are performed.

[0007] Unit-1 in transmission interrupts the transmission of data D ₁ receives the exception signal ER from the unit -2 on the response line RL, so blocking the bus signal BK ₁ simultaneously, the unit - Bus usage signal B from 1
The bus handler monitoring the presence or absence of the bus use signal BK from each unit including K ₁ judges that the data transfer from the unit-1 is completed in the period t ₄ in FIG. Performs processing to permit use of the system bus to other requesting units.

That is, the bus handler B determines that the system bus SB is not in use, and as shown in FIG. 5, the bus request signal BRQn from the unit-n arrives. since the bus handler B sends a bus grant signal BGRn this unit -n, data whereby unit -n is to be transferred from the time t ₆ Dn
Is sent to the system bus SB and the bus use signal
BKn is output to the bus use signal line BU.

[0009]

In the above-mentioned conventional example, the address data indicating the receiving unit included in the transmission data is broken on the system bus, and a unit which does not exist due to this broken address data is detected. In the specified state, the reception response signal returned from the receiving unit to the transmitting unit when the reception is completed does not return to the transmitting unit as a natural result of the absence of the receiving unit.

The transmission unit determines that the unit designated by the transmitted address data (uncorrupted address data) does not exist due to the absence of this reception response, and the transmission unit has a learning function in particular. In this case, there is a problem that the data transfer to the unit having this address is not performed thereafter.

Further, when an exception is detected in the receiving unit, the receiving unit generates and sends an exception signal, and the transmitting unit receives the exception signal and the bus use signal is stopped. Since the bus handler recognizes that the bus is available, it takes a long time for the bus handler to send the bus use permission signal to the unit waiting for the use of the bus, which causes the problem of reducing the bus use efficiency. is there.

According to the present invention, an exception on the system bus can be detected so that recovery processing can be performed promptly and appropriately, and the time from the detection of the exception to the bus use permission for the unit waiting for data transfer. It is an object of the present invention to provide a bus control method in a data processing system in which the use efficiency of the bus is improved by shortening.

[0013]

[Means for Solving the Problem] Information processing unit P1, ...
... When Pn receives a bus use permission signal from the bus use management means A of the bus management device B via the control bus, data transfer is performed via the system bus SB common to a plurality of information processing units. Of the information processing unit on the system bus SB in the specified data processing system.
Exception detection means E for detecting the exception of the address data to be constant
Is provided in the bus management device B, and the bus use management means A is provided.
When the exception detecting means B detects an exception on the system bus SB, it interrupts the bus use permission signal for the information processing unit that is transferring data, and sends the bus request signal to another information processing unit. The bus use permission signal is transmitted to the terminal.

Further, in the above data processing system, exception detecting means E for detecting an exception on the system bus SB, and when the exception detecting means E detects an exception, it generates and sends exception information about this exception. By providing the exception information generating means T to the bus management device B,
Enables improved bus utilization and appropriate recovery processing.

[0015]

The exception detecting means E provided in the bus management device B constantly monitors the system bus SB, and when an exception is found, the bus use permission signal for the information processing unit during data transfer is cut off and this information processing unit is shut off. Interrupts data transfer from. At this time, if a bus request signal arrives from one of the other information processing units, a bus use permission signal is sent to this information processing unit, and a bus request signal comes from a plurality of information processing units. If so, the bus use permission signal is transmitted to the information processing unit having the highest priority determined in advance.

As a result, the use of the system bus by the information processing unit in which an abnormality is found in the data being transferred is immediately interrupted, and the use of the system bus by the other information processing units waiting for the use of the bus becomes possible promptly. Therefore, a special effect that the waiting time for the system bus in the information processing unit is remarkably shortened and the system bus usage efficiency is improved is obtained.

In consideration of the delay from the arrival of the bus use permission signal to the information processing unit to the start of data transfer, the bus management device B determines the unit in which the data in which the exception is found is being transferred. It is possible to further improve the bus use efficiency by transmitting the bus use permission signal to another information processing unit which is waiting for use of the bus immediately upon detection of an exception without waiting for transfer interruption.

Further, by providing the bus management device B with exception information generating means T for generating / transmitting exception information in which types / contents of exceptions on the system bus detected by the exception detecting means E are coded, Since the information processing unit itself in which an exception is found in the data being transferred can know the content of the exception, it is possible to perform recovery processing such as protocol switching or data resend including the address of the information processing unit. it can.

As in the conventional example, the exception information is received by the host device or the like so that not only the judgment of the state of each information processing unit and the recovery processing but also the function of the entire information processing system can be performed. Monitoring and recovery processing can be performed.

[0020]

FIG. 2 shows an embodiment of a data processing system to which a bus management system according to the present invention is applied. A bus handler B corresponding to the bus management device shown in the principle diagram of FIG.
An arbitration circuit A corresponding to the bus use managing means, an exception detecting circuit E corresponding to the exception detecting means, an exception information generating circuit T corresponding to the exception information generating means, and a triangular buffer for input / output. .

The elements and signals corresponding to the elements and signals in FIG. 1 including the above-mentioned elements are denoted by the same reference numerals, and the "information processing unit" is described in order to avoid redundancy. Hereafter, simply referred to as "unit". Similar to FIG. 5 of the conventional example, FIG. 3 shows an information processing unit during data transfer from unit-1 to unit-2.
FIG. 3 is a time chart showing an operation example of this embodiment by taking as an example the case where an exception occurs in the address data designating the address and the bus use permission is given to the unit-n. The operation of the second embodiment will be described. The system clock shown in the figure is for indicating the period and does not necessarily coincide with the timing of each process shown in the figure.

When data to be transferred to the unit-2 is generated in the unit-1, the unit-1 sends a bus request signal.
BRQ ₁ is sent to the bus request line BR ₁ , and the bus handler B determines that the bus request signal BGR _{1 by} the presence of this bus request signal and the absence of the bus use signal BK on the bus use signal line BU.
From period t ₁ through bus enable signal line BG ₁
Send to 1.

Unit-1 uses this bus use permission signal BGR ₁
When it receives, the transfer data D ₁ including the address data indicating the address of the unit-2 is sent to the system bus SB and the bus use signal BK ₁ is sent to the bus use signal line BU. When the exception data D ₁ being transferred from the unit -1 on the system bus SB is an exception detecting circuit E bus handler B detects a period t _3, as well as immediately shut off the bus grant signal BGR ₁ for unit -1 , The bus request signal BRQn is sent to the bus handler B via the bus request signal line BRn, and the bus use enable signal BGRn for the unit-n is sent out via the bus use enable signal line BGn.

As described above, considering the delay between each unit receiving the bus use permission signal and outputting the transfer data to the system bus, the transfer data from the unit-1 is output to the system bus. Even if it is set, the bus use permission signal can be transmitted to the unit-n, and by using such a configuration, the use efficiency of the system bus can be further improved.

As described above, the exception detected by the exception detection circuit E of the bus handler B is sent to the response line RL after the content of the exception is encoded by the exception information generation circuit T. The unit-1 on the transmission side can know the content of the exception by receiving this exception information in the response circuit, and can quickly perform the recovery processing such as the switching of the protocol and the retransmission of the transfer data.

Furthermore, by receiving the exception information on the response line RL by a higher-level device (not shown),
Recovery processing of the entire data processing system and warning / display of system abnormality can be performed by the host device. As is clear from comparison between FIG. 3 showing the operation of this embodiment and FIG. 5 showing the operation of the conventional apparatus, the data transfer from the unit -n is started.
The period from the period t _{6 in the} conventional apparatus is from the period t _{4 in} this embodiment, and the two periods are shortened. As a result, it is clear that the usage efficiency of the system bus is significantly improved.

[0027]

As described above, according to the present invention, another information processing unit that promptly detects the occurrence of an exception on the system bus, interrupts the transmission of this transfer data, and waits for bus use. Since the use of the system bus can be permitted, the use efficiency of the bus is significantly improved.

Further, since the content of this exception is also sent from the bus management device, the information processing unit on the transmission side can receive the exception information from this bus management device and execute the recovery processing properly and promptly. The effect of is achieved.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a diagram showing an example of the present invention.

FIG. 3 is a time chart showing an operation example of the embodiment of the present invention.

FIG. 4 is a diagram showing an example of a conventional data processing system.

FIG. 5 is a time chart showing an operation example of a conventional data processing system.

[Explanation of symbols]

P _1, ... Pn Information processing unit B Bus management device A Bus use management means SB System bus E Exception detection means T Exception information generation means BR Bus request signal line BG bus use enable signal line BU bus use signal line RL Response line

   ─────────────────────────────────────────────────── ─── Continued front page       (56) Reference JP-A-2-158854 (JP, A)                 JP 62-219149 (JP, A)                 JP-A-57-168318 (JP, A)                 JP-A-2-188852 (JP, A)                 Actual development Sho 63-63852 (JP, U)

Claims (2)

(57) [Claims] 1. An information processing unit sends a bus use permission signal from a bus use management means of a bus management device via a control bus.
In configured data processing system to perform data transfer via a common system bus to a plurality of information processing units upon receipt Te, address <br/> data specifying the information processing unit on the system bus Exception detection means for detecting an exception is provided in the bus management device, and the bus use management means, when the exception detection means detects an exception on the system bus, sends the bus use permission signal to the information processing unit during data transfer. A bus management method for a data processing system, characterized in that a bus use permission signal is transmitted to another information processing unit that is transmitting a bus request signal. 2. Exception information generating means for generating / transmitting exception information about an exception detected when the exception detecting means detects the exception, and the exception information generated by the exception information generating means is used as the exception information. 2. The bus management system for a data processing system according to claim 1, wherein the bus management system transfers data to an information processing unit during data transfer and performs a corresponding recovery process.