JP3411230B2 - Semiconductor manufacturing jig and semiconductor element mounting method using the same - Google Patents

Semiconductor manufacturing jig and semiconductor element mounting method using the same

Info

Publication number
JP3411230B2
JP3411230B2 JP02510499A JP2510499A JP3411230B2 JP 3411230 B2 JP3411230 B2 JP 3411230B2 JP 02510499 A JP02510499 A JP 02510499A JP 2510499 A JP2510499 A JP 2510499A JP 3411230 B2 JP3411230 B2 JP 3411230B2
Authority
JP
Japan
Prior art keywords
semiconductor element
semiconductor
corners
collet
manufacturing jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP02510499A
Other languages
Japanese (ja)
Other versions
JP2000223508A (en
Inventor
高 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP02510499A priority Critical patent/JP3411230B2/en
Publication of JP2000223508A publication Critical patent/JP2000223508A/en
Application granted granted Critical
Publication of JP3411230B2 publication Critical patent/JP3411230B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To realize a semiconductor manufacturing jig contributing to the downsize of semiconductor elements and a method of mounting the semiconductor elements, using the jig. SOLUTION: A semiconductor manufacturing jig for gripping and carrying a square semiconductor element 101 has four grips having corners, corresponding to the side faces of the four corners of the element 101, so that the grips engage with the four corners. According to such a constitution, the top end of a collet 102 enters into facings at only the four corners of the element 101 and in the vicinity thereof and it suffices to consider only regions, corresponding to the four corners periphery of the element 101 where the top end of the collet 102 enters. Hence there is no need for forming larger facings over the entire periphery of the element 101, such as in prior art, the element 101 may be disposed nearer a pad 106 on a circuit board, and a semiconductor device can be greatly downsized.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体製造治具及びそれ
を用いた半導体素子の実装方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing jig and a semiconductor element mounting method using the same.

【0002】[0002]

【従来の技術】半導体素子を吸着等で杷持し移送する治
具として、角錐型コレットが知られている。この種のコ
レットは、例えば、実開平7ー10940号に示されて
いる。このようなコレットでは、半導体素子を吸着する
ための凹部がコレットの内部に形成され、この凹部内を
真空にすることにより半導体素子が吸着される。
2. Description of the Related Art A pyramid collet is known as a jig for holding and transferring a semiconductor element by suction or the like. This type of collet is shown, for example, in Japanese Utility Model Laid-Open No. 7-10940. In such a collet, a recess for adsorbing the semiconductor element is formed inside the collet, and the semiconductor element is adsorbed by creating a vacuum in the recess.

【0003】このようなコレットを用いて、半導体素子
を基板上に実装する方法について説明する。
A method of mounting a semiconductor element on a substrate using such a collet will be described.

【0004】まず、図2(A)に示されるように半導体
ウエハから周知の方法で個片に分割された半導体素子2
01をコレット202を用いて杷持する。この杷持は、
コレット202の内部に形成された凹部203内を真空
にすることにより行われる。すなわち、コレットの中心
部に設けられた孔204を通して凹部203を真空にす
ることにより、半導体素子201をコレット202に吸
着する。
First, as shown in FIG. 2A, a semiconductor element 2 is divided into individual pieces from a semiconductor wafer by a known method.
01 is held using the collet 202. This holding is
This is performed by applying a vacuum to the inside of the recess 203 formed inside the collet 202. That is, the semiconductor element 201 is attracted to the collet 202 by applying a vacuum to the recess 203 through the hole 204 provided in the center of the collet.

【0005】その後、コレット202により半導体素子
203を吸着したまま、半導体素子203を回路基板2
05上に移送する。この回路基板205の半導体素子搭
載領域は、基板を所定の深さだけ削ること(ミーリング
技術)により凹部状になっている。この凹部のことをザ
グリ206と呼ぶ。このザグリ206の底部には、半導
体素子206を固定する為、半導体素子201が移送さ
れる前に接着剤207が配置されている。このようなザ
グリ206内に図2(B)に示されるように半導体素子
201が移送され、接着剤207上に載置される。
Thereafter, the semiconductor element 203 is attached to the circuit board 2 while the semiconductor element 203 is adsorbed by the collet 202.
05 Transfer to above. The semiconductor element mounting region of the circuit board 205 is recessed by cutting the board to a predetermined depth (milling technique). This recess is called a counterbore 206. To fix the semiconductor element 206, an adhesive 207 is placed on the bottom of the counterbore 206 before the semiconductor element 201 is transferred. As shown in FIG. 2B, the semiconductor element 201 is transferred into the counterbore 206 and placed on the adhesive 207.

【0006】接着剤207上に半導体素子201を載置
した後、半導体素子201の裏面に接着剤207を均一
に接触させる為、半導体素子201を微弱な振動(スク
ラブ)を半導体素子201に与えて、半導体素子201
を回路基板205に固定する。
After the semiconductor element 201 is placed on the adhesive 207, the semiconductor element 201 is given a slight vibration (scrub) in order to bring the adhesive 207 into uniform contact with the back surface of the semiconductor element 201. , Semiconductor element 201
Are fixed to the circuit board 205.

【0007】この後、半導体素子201上の電極208
と回路基板上205上のパッド209が金等の金属細線
210により接続される。その後、半導体素子201等
は図2(C)に示されるように樹脂等の封止材211に
より封止され、半導体装置が完成する。
After that, the electrode 208 on the semiconductor element 201 is formed.
And a pad 209 on the circuit board 205 are connected by a metal thin wire 210 such as gold. After that, the semiconductor element 201 and the like are sealed with a sealing material 211 such as a resin as shown in FIG. 2C, and the semiconductor device is completed.

【0008】[0008]

【発明が解決しようとする課題】近年、半導体装置はま
すます小型化が要求されている。この小型化の為には、
半導体素子の小型化に加え、回路基板のザグリも小さく
する必要がある。すなわち、回路基板上に配置されるパ
ッドは、図2(C)に示されるようにザグリから所定距
離だけ離間して配置されているので、このザグリを小さ
くできなければ、半導体装置自体の小型化は望めない。
In recent years, semiconductor devices have been required to be smaller and smaller. For this miniaturization,
In addition to miniaturization of the semiconductor element, it is necessary to reduce the counterbore of the circuit board. That is, since the pads arranged on the circuit board are arranged apart from the counterbore by a predetermined distance as shown in FIG. 2C, if the counterbore cannot be reduced, the semiconductor device itself can be downsized. Can't hope

【0009】上述の従来の例におけるザグリ206は、
半導体素子201の大きさ及びコレット202の大きさ
を考慮して決められるが、図3に示されるようにコレッ
ト202は半導体素子201より非常に大きいので、コ
レット202の大きさによりザグリの大きさが支配され
る。
The counterbore 206 in the above-mentioned conventional example is
The size is determined in consideration of the size of the semiconductor element 201 and the size of the collet 202, but since the collet 202 is much larger than the semiconductor element 201 as shown in FIG. 3, the size of the counterbore depends on the size of the collet 202. Be dominated.

【0010】この種のコレット202は角錐型であるた
め、図3の上面図及び図4の断面図に示されるようにコ
レット202の先端部が半導体素子の周囲全体に渡って
ザグリ内まで進入する。従って、ザグリの大きさは、コ
レットの進入する部分を考慮して大きめに設定する必要
がある。この大きめに設定されたザグリの周囲に図3に
示されるようにパッド209が配置される。従って、半
導体装置自体の小型化は望めない。
Since this type of collet 202 is a pyramid type, the tip of the collet 202 penetrates into the counterbore over the entire periphery of the semiconductor element as shown in the top view of FIG. 3 and the sectional view of FIG. . Therefore, it is necessary to set the size of the counterbore to be large considering the part where the collet enters. Pads 209 are arranged around the counterbore set to a larger size as shown in FIG. Therefore, miniaturization of the semiconductor device itself cannot be expected.

【0011】単に、ザグリのみを小さくしても図5に示
されるようにコレットがザグリ内に進入できなくなるの
で、回路基板上への半導体素子の実装が不可能となる。
Even if only the counterbore is made small, the collet cannot enter the counterbore as shown in FIG. 5, so that the semiconductor element cannot be mounted on the circuit board.

【0012】また、そのような問題を解決する為、特開
平6ー120269号に示されるように半導体素子の回
路面を吸着して移送するという提案も成されているが、
このような手法では回路表面の一部が損傷する可能性が
ある。
In order to solve such a problem, it has been proposed to adsorb and transfer the circuit surface of the semiconductor element as disclosed in Japanese Patent Laid-Open No. 6-120269.
Such an approach may damage a part of the circuit surface.

【0013】[0013]

【課題を解決するための手段】本発明の目的は、半導体
装置の小型化に寄与できるような半導体製造治具及びそ
れを用いた半導体素子の実装方法を提供することであ
る。
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor manufacturing jig which can contribute to miniaturization of a semiconductor device and a semiconductor element mounting method using the same.

【0014】この目的を達成するため、本願発明の代表
的な発明は、方形状の半導体素子を挟持して移送する半
導体製造治具において、この半導体素子の四隅の側面に
対応する角部を有する4つの杷持部を有し、これらの杷
持部と前記四隅を係合するようにしたものである。
To achieve this object, a typical invention of the present invention is a semiconductor manufacturing jig for sandwiching and transferring a rectangular semiconductor element, which has corners corresponding to the side surfaces of the four corners of the semiconductor element. It has four gripping parts, and these gripping parts are engaged with the four corners.

【0015】また、本願の他の代表的な発明は、このよ
うな半導体製造治具を用いて前記半導体素子の四隅及び
その近傍の側面を挟持し、外部基板に形成された凹部内
に移送した後、その半導体素子を凹部の底部に固定する
ようにした半導体素子の実装方法である。
In another typical invention of the present application, such a semiconductor manufacturing jig is used to sandwich the four corners of the semiconductor element and side surfaces in the vicinity thereof, and the side surfaces are transferred into a recess formed in an external substrate. After that, the semiconductor element mounting method is such that the semiconductor element is fixed to the bottom of the recess.

【0016】このような構成によれば、コレットの先端
部は半導体素子の四隅及びその近傍においてのみザグリ
内に進入するので、半導体素子の四隅周辺に対応する領
域においてのみコレットの先端が進入する領域を考慮す
ればよい。従って、上述の従来例のように半導体素子の
周囲全体に渡って、大きめなザグリを形成する必要がな
い。
According to this structure, the tips of the collets enter the counterbore only at the four corners of the semiconductor element and in the vicinity thereof, so that the tips of the collets enter only in the areas corresponding to the four corners of the semiconductor element. Should be considered. Therefore, it is not necessary to form a large counterbore over the entire periphery of the semiconductor element as in the conventional example described above.

【0017】従って、回路基板上に配置されるパッドと
半導体素子とを従来より近接して配置することができ
る。すなわち、半導体装置が大幅に小型化できる。
Therefore, the pads arranged on the circuit board and the semiconductor element can be arranged closer to each other than before. That is, the semiconductor device can be significantly downsized.

【0018】[0018]

【発明の実施の形態】本発明の実施の形態が図面を参照
しながら以下に説明される。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

【0019】図1(A)は、本発明のコレットを用いて
半導体素子を回路基板のザグリ内に載置する工程を示す
上面図であり、図1(B)は図1(A)の要部を拡大し
た部分断面図である。図1(A)、図1(B)には、説
明の理解を容易にする為、コレットの下部のみが示され
る。図6にはコレットの全体図の半分のみが示される。
コレットは左右対象形であるので、省略された部分は図
示されている部分及びその説明を参酌すれば容易に理解
されるであろう。
FIG. 1A is a top view showing a step of placing a semiconductor element in the counterbore of a circuit board using the collet of the present invention, and FIG. 1B shows the main part of FIG. 1A. It is the fragmentary sectional view which expanded the part. 1 (A) and 1 (B), only the lower part of the collet is shown to facilitate understanding of the description. Only half of the overall view of the collet is shown in FIG.
Since the collet has a symmetrical shape, the omitted parts will be easily understood by referring to the illustrated parts and the description thereof.

【0020】まず、従来例と同様に半導体ウエハから個
片に分割された半導体素子101をコレット102を用
いて杷持する。この杷持は、コレット102の把持部1
02ー1乃至102ー4より半導体素子101の四隅及
びその近傍の側面を挟持することにより行われる。
First, similarly to the conventional example, a semiconductor element 101 divided into individual pieces from a semiconductor wafer is held using a collet 102. This gripping is performed by the grip portion 1 of the collet 102.
This is performed by sandwiching the four corners of the semiconductor element 101 and the side surfaces in the vicinity thereof from 02-1 to 102-4.

【0021】この把持部102ー1乃至102ー4は図
6に示されるようにコレット102の本体から伸縮自在
の軸102ー1A、102ー3Aにより支持されてい
る。この軸が伸縮自在なのは、このコレット102が種
々のサイズの半導体素子に対応するためであり、また、
把持部102ー1乃至102ー4により半導体素子を確
実に挟持するためである。
As shown in FIG. 6, the gripping portions 102-1 to 102-4 are supported by shafts 102-1A and 102-3A which are extendable from the main body of the collet 102. The shaft is expandable and contractable because the collet 102 can accommodate semiconductor elements of various sizes.
This is for surely sandwiching the semiconductor element by the grip portions 102-1 to 102-4.

【0022】コレット102の先端の把持部102ー1
乃至102ー4は、半導体素子101の四隅の側面に対
応するように角型形状を有する。この場合、半導体素子
101の四隅がそれぞれほぼ直角であるので、把持部1
01ー1乃至102ー4の角型形状も実質的に直角であ
る。
The grip portion 102-1 at the tip of the collet 102
Reference numerals 104-2 to 104-2 have a rectangular shape so as to correspond to the four side surfaces of the semiconductor element 101. In this case, since the four corners of the semiconductor element 101 are substantially right angles, the gripping portion 1
The rectangular shapes 01-1 to 102-4 are also substantially right angles.

【0023】把持部102ー1乃至102ー4と半導体
素子101の四隅(各角部)の側面とは係合することに
より、把持部102ー1乃至102ー4により半導体素
子101が挟持され、移送される。
The semiconductor elements 101 are held by the gripping sections 102-1 to 102-4 by engaging the gripping sections 102-1 to 102-4 with the side surfaces of the four corners (each corner) of the semiconductor element 101. Be transferred.

【0024】その後、コレット102により半導体素子
101を挟持したまま、半導体素子101を回路基板1
03上に移送する。
After that, the semiconductor element 101 is sandwiched by the collet 102, and the semiconductor element 101 is mounted on the circuit board 1.
03.

【0025】この回路基板103の半導体素子搭載領域
は、基板を所定の深さだけ削る(ミーリング技術)こと
により凹部状になっている。この凹部のことをザグリ1
04と呼ぶ。このザグリ104の底部には、半導体素子
101を固定する為、半導体素子101が移送される前
に接着剤105が配置されている。このようなザグリ1
04内に半導体素子101が移送され、接着剤105上
に載置される。
The semiconductor element mounting region of the circuit board 103 has a recessed shape by grinding the substrate to a predetermined depth (milling technique). This recess is counterbore 1
Call 04. In order to fix the semiconductor element 101, an adhesive 105 is placed on the bottom of the counterbore 104 before the semiconductor element 101 is transferred. Counterbore 1
The semiconductor element 101 is transferred into the semiconductor device 04 and placed on the adhesive 105.

【0026】ここで、本発明のコレット102では、ザ
グリ104内に進入する部分は、把持部102ー1乃至
102ー4のみである。
Here, in the collet 102 of the present invention, the only parts that enter the counterbore 104 are the gripping parts 102-1 to 102-4.

【0027】把持部102ー1乃至102ー4は、半導
体素子101の四隅及びその近傍においてのみザグリ1
04内に進入するので、半導体素子101の四隅周辺に
対応する領域においてのみコレットの先端が進入する領
域を確保すればよい。すなわち、半導体素子101の四
隅周辺においてのみ、ザグリ104を拡大して進入領域
104ー1乃至104ー4を確保すればよい。
The gripping portions 102-1 to 102-4 are provided with counterbore 1 only at the four corners of the semiconductor element 101 and in the vicinity thereof.
Since it enters inside 04, it suffices to secure a region where the tip of the collet enters only in the regions corresponding to the four corners of the semiconductor element 101. That is, the counterbore 104 may be enlarged only around the four corners of the semiconductor element 101 to secure the entry regions 104-1 to 104-4.

【0028】この進入領域104ー1乃至104ー4以
外は、コレット102の進入を考慮する必要がないの
で、半導体素子101が格納される大きさで十分であ
る。
Since it is not necessary to consider the entrance of the collet 102 except for the entrance areas 104-1 to 104-4, the size in which the semiconductor element 101 is stored is sufficient.

【0029】このように本発明では、上述の従来例のよ
うに半導体素子の周囲全体に渡って、大きめなザグリを
形成する必要がない。従って、回路基板103上に配置
されるパッド106と半導体素子101とを従来より近
接して配置することができる。すなわち、半導体装置全
体の大きさが大幅に小さくすることができる。
As described above, according to the present invention, it is not necessary to form a large counterbore over the entire periphery of the semiconductor element as in the conventional example described above. Therefore, the pad 106 arranged on the circuit board 103 and the semiconductor element 101 can be arranged closer to each other than before. That is, the size of the entire semiconductor device can be significantly reduced.

【0030】接着剤105上に半導体素子101を載置
した後、半導体素子101の裏面に接着剤105を均一
に接触させる為、コレット102の本軸102Xが微振
動する。これにより半導体素子101に微弱な振動が伝
わり、半導体素子201が回路基板103に確実に固定
される。
After the semiconductor element 101 is placed on the adhesive agent 105, the main axis 102X of the collet 102 vibrates slightly in order to bring the adhesive agent 105 into uniform contact with the back surface of the semiconductor element 101. As a result, weak vibration is transmitted to the semiconductor element 101, and the semiconductor element 201 is securely fixed to the circuit board 103.

【0031】この後、半導体素子101上の電極と回路
基板上103上のパッド106が金等の金属細線により
接続される。その後、半導体素子101等は樹脂等の封
止材により封止され、半導体装置が完成する。
After that, the electrodes on the semiconductor element 101 and the pads 106 on the circuit board 103 are connected by a fine metal wire such as gold. After that, the semiconductor element 101 and the like are sealed with a sealing material such as resin to complete the semiconductor device.

【0032】このような構成によれば、コレットの先端
部は半導体素子の四隅及びその近傍においてのみザグリ
内に進入するので、半導体素子の四隅周辺に対応する領
域においてのみコレットの先端が進入する領域を考慮す
ればよい。従って、上述の従来例のように半導体素子の
周囲全体に渡って、大きめなザグリを形成する必要がな
い。
According to this structure, the tip of the collet enters the counterbore only at the four corners of the semiconductor element and in the vicinity thereof, so that the tip of the collet enters only in the areas corresponding to the four corners of the semiconductor element. Should be considered. Therefore, it is not necessary to form a large counterbore over the entire periphery of the semiconductor element as in the conventional example described above.

【0033】従って、回路基板上に配置されるパッドと
半導体素子とを従来より近接して配置することができ
る。すなわち、半導体装置が大幅に小型化できる。
Therefore, the pads arranged on the circuit board and the semiconductor element can be arranged closer to each other than in the conventional case. That is, the semiconductor device can be significantly downsized.

【0034】上述の形態では、接着剤105上に半導体
素子101を載置した後、把持部102ー1乃至102
ー4を外方に拡げて挟持を解除し、ザグリ104の進入
領域104ー1乃至104ー4から把持部102ー1乃
至102ー4を抜き出す必要がある。すなわち、把持部
102ー1乃至102ー4は、半導体素子101に対し
て外方に一旦、拡がった後、上方に移動する。
In the above-described embodiment, after the semiconductor element 101 is placed on the adhesive 105, the grip portions 102-1 to 102-2 are provided.
-4 needs to be expanded outward to release the grip, and the gripping portions 102-1 to 102-4 need to be pulled out from the entry areas 104-1 to 104-4 of the counterbore 104. That is, the grip portions 102-1 to 102-4 once expand outward with respect to the semiconductor element 101 and then move upward.

【0035】その為、進入領域104ー1乃至104ー
4は、把持部102ー1乃至102ー4の外方への拡が
り分を考慮して形成されなければならない。
Therefore, the entrance areas 104-1 to 104-4 must be formed in consideration of the outward expansion of the grip portions 102-1 to 102.4.

【0036】そこで、本発明の他の実施の形態では、図
7に示されるように把持部102’ー1乃至102’ー
4の内側、すなわち、半導体素子101の側面と接する
側に吸着孔107ー1乃至107ー4(図7には把持部
102’ー3、102’ー4のみが示されている)。
Therefore, in another embodiment of the present invention, as shown in FIG. 7, the suction holes 107 are provided inside the grip portions 102'-1 to 102'-4, that is, on the side in contact with the side surface of the semiconductor element 101. -1 to 107-4 (only the grippers 102'-3, 102'-4 are shown in FIG. 7).

【0037】この吸着孔107ー1乃至107ー4を介
して半導体素子101の側面は真空に吸着される。すな
わち、上述の例では把持部102ー1乃至102ー4に
よる挟持のみで半導体素子を把持していたが、ここで
は、真空吸着を挟持の代わりに用いている。真空吸着は
図示しないコレット内部に形成されたパイプを通して行
われる。
The side surface of the semiconductor element 101 is sucked into a vacuum through the suction holes 107-1 to 107-4. That is, in the above-mentioned example, the semiconductor element is gripped only by sandwiching by the gripping portions 102-1 to 102-4, but here, vacuum suction is used instead of sandwiching. Vacuum suction is performed through a pipe formed inside a collet (not shown).

【0038】このような真空吸着を利用すれば、把持部
102ー1乃至102ー4の外方への拡がりは最小限に
抑えられる。すなわち、吸着を停止すれば、把持状態は
解除されるので、その後、半導体素子と把持部とのマー
ジンの為、把持部が微小に外方へ拡がったとしても、そ
の移動距離は極めて微小で十分である。
By utilizing such vacuum suction, the outward expansion of the gripping portions 102-1 to 102-4 can be suppressed to the minimum. In other words, if the suction is stopped, the gripping state is released, so even if the gripping part slightly expands outward due to the margin between the semiconductor element and the gripping part, the movement distance is extremely small. Is.

【0039】このような構成によれば、上述の形態によ
り得られる効果に加え、ザグリの形成が上述の形態に比
べて容易であるので、半導体装置の製造コストを低減す
ることができる。
According to this structure, in addition to the effect obtained by the above-described embodiment, the counterbore is formed more easily than in the above-described embodiment, so that the manufacturing cost of the semiconductor device can be reduced.

【0040】本発明は、例証的な実施態様を用いて説明
されたが、この説明は限定的な意味に受け取られてはな
らない。この例証的実施態様の様々な変更、並びに本発
明のその他の実施態様が当業者にはこの説明を参考にす
ることによって明らかになるであろう。従って、特許請
求の範囲はそれらのすべての変更または実施態様を本発
明の真の範囲に含むものとしてカバーするであろうと考
えられている。
Although the present invention has been described using illustrative embodiments, this description should not be taken in a limiting sense. Various modifications of this illustrative embodiment, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to this description. It is therefore contemplated that the appended claims will cover all such modifications or embodiments as fall within the true scope of the invention.

【0041】[0041]

【発明の効果】本発明よれば、コレットの先端部は半導
体素子の四隅及びその近傍においてのみザグリ内に進入
するので、半導体素子の四隅周辺に対応する領域におい
てのみコレットの先端が進入する領域を考慮すればよ
い。従って、上述の従来例のように半導体素子の周囲全
体に渡って、大きめなザグリを形成する必要がない。
According to the present invention, since the tip of the collet enters into the counterbore only at the four corners of the semiconductor element and in the vicinity thereof, the area where the tip of the collet enters only in the areas corresponding to the four corners of the semiconductor element. You should consider it. Therefore, it is not necessary to form a large counterbore over the entire periphery of the semiconductor element as in the conventional example described above.

【0042】従って、回路基板上に配置されるパッドと
半導体素子とを従来より近接して配置することができ
る。すなわち、半導体装置が大幅に小型化できる。
Therefore, the pad and the semiconductor element arranged on the circuit board can be arranged closer to each other than in the conventional case. That is, the semiconductor device can be significantly downsized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のコレットを用いて半導体素子を回路基
板のザグリ内に載置するする工程を示す上面図及び上面
図の要部を拡大した部分断面図である。
FIG. 1 is a top view showing a step of placing a semiconductor element in a counterbore of a circuit board using a collet of the present invention, and an enlarged partial cross-sectional view of a main part of the top view.

【図2】従来のコレットを用いて半導体素子を基板上に
実装する方法を説明する工程断面図である。
FIG. 2 is a process sectional view illustrating a method of mounting a semiconductor element on a substrate using a conventional collet.

【図3】従来のコレットの問題点を説明するための上面
図である。
FIG. 3 is a top view for explaining the problems of the conventional collet.

【図4】従来のコレットの問題点を説明するための断面
図である。
FIG. 4 is a cross-sectional view illustrating a problem of a conventional collet.

【図5】従来のコレットの問題点を説明するための断面
図である。
FIG. 5 is a cross-sectional view for explaining a problem with a conventional collet.

【図6】コレットの全体構成を説明する部分側面図であ
る。
FIG. 6 is a partial side view illustrating the overall configuration of the collet.

【図7】本発明の他の形態を説明する部分断面図であ
る。
FIG. 7 is a partial cross-sectional view illustrating another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

101 半導体素子 102 コレット 102ー1〜102ー4 コレットの把持部 103 回路基板 104 ザグリ 104ー1〜104ー4 進入領域 105 接着剤 106 パッド 101 Semiconductor element 102 collet 102-1 to 102-4 Collet grip 103 circuit board 104 counterbore 104-1 to 104-4 entry area 105 adhesive 106 pads

Claims (5)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】方形状半導体素子の四隅の側面に対応する
角部を有する4つの杷持部を有し、これらの杷持部と前
記四隅を係合することにより前記半導体素子を挟持して
移送する半導体製造冶具において、前記把持部は前記半
導体素子の側面に対応する位置にそれぞれ開口部を有
し、この開口部を通して前記半導体素子の側面を吸着し
て前記半導体素子を挟持することを特徴とする半導体製
造治具。
1. A square semiconductor device having four holding parts having corners corresponding to side faces of four corners, and the semiconductor device is sandwiched by engaging these holding parts with the four corners. In the semiconductor manufacturing jig to be transferred, the gripping portion has an opening at a position corresponding to a side surface of the semiconductor element, and the side surface of the semiconductor element is sucked through the opening to sandwich the semiconductor element. A semiconductor manufacturing jig.
【請求項2】 表面に集積回路が形成された方形状の半
導体素子の四隅及びその近傍の側面を挟持する工程と、
前記挟持したまま前記半導体素子を外部基板に形成され
た凹部内に移送する工程と、前記移送の後、前記半導体
素子を前記凹部の底部に固定する工程とを有することを
特徴とする半導体素子の実装方法。
2. A step of sandwiching the four corners of a rectangular semiconductor element having an integrated circuit formed on the surface and side surfaces in the vicinity thereof,
A semiconductor element, comprising: a step of transferring the semiconductor element into the recess formed in the external substrate while holding it; and a step of fixing the semiconductor element to the bottom of the recess after the transfer. How to implement.
【請求項3】 前記凹部の底部には接着剤が導入され、
その後、前記接着剤の上に前記半導体素子が移送され、
その後、前記半導体素子に振動を与えながら前記半導体
素子を固定することを特徴とする請求項2記載の半導体
素子の実送方法。
3. An adhesive is introduced at the bottom of the recess,
Then, the semiconductor device is transferred onto the adhesive,
After that, the semiconductor element is fixed while the semiconductor element is fixed while vibrating the semiconductor element.
【請求項4】 請求項2記載の挟持する工程に用いられ
る半導体製造治具は、前記方形状の半導体素子の四隅に
係合する角部をそれぞれ有する4つの把持部を有し、こ
れらの把持部を前記半導体素子の四隅に接触させて前記
半導体素子を挟持することを特徴とする半導体製造治
具。
4. The semiconductor manufacturing jig used in the sandwiching step according to claim 2, has four gripping portions each having a corner portion that engages with the four corners of the rectangular semiconductor element. A semiconductor manufacturing jig, wherein the semiconductor element is sandwiched by bringing parts into contact with the four corners of the semiconductor element.
【請求項5】 請求項4記載の半導体製造治具の前記把
持部は前記半導体素子の側面に対応する位置にそれぞれ
開口部を有し、この開口部を通して前記半導体素子の側
面を吸着して前記半導体素子を挟持することを特徴とす
る半導体製造治具。
5. The semiconductor manufacturing jig according to claim 4, wherein the gripping portion has an opening at a position corresponding to the side surface of the semiconductor element, and the side surface of the semiconductor element is sucked through the opening. A semiconductor manufacturing jig characterized by sandwiching a semiconductor element.
JP02510499A 1999-02-02 1999-02-02 Semiconductor manufacturing jig and semiconductor element mounting method using the same Expired - Fee Related JP3411230B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP02510499A JP3411230B2 (en) 1999-02-02 1999-02-02 Semiconductor manufacturing jig and semiconductor element mounting method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP02510499A JP3411230B2 (en) 1999-02-02 1999-02-02 Semiconductor manufacturing jig and semiconductor element mounting method using the same

Publications (2)

Publication Number Publication Date
JP2000223508A JP2000223508A (en) 2000-08-11
JP3411230B2 true JP3411230B2 (en) 2003-05-26

Family

ID=12156627

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3411230B2 (en)

Also Published As

Publication number Publication date
JP2000223508A (en) 2000-08-11

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