JP3339422B2 - Wiring board and manufacturing method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a wiring board suitable for mounting an IC chip and a method for manufacturing the same.

[0002]

2. Description of the Related Art A wiring board having a structure shown in FIG. 4 has been proposed as a wiring board intended for chip size packaging of an IC chip (Japanese Patent Publication No. 07-60840,
See Example 1). This wiring board is made of a polyimide substrate 41
And a copper pattern 42 formed on the back surface thereof, and a copper bump 43 provided on the polyimide substrate 41 and filling the through hole A reaching the copper pattern 42 and protruding from the surface of the polyimide substrate 41. I have.

[0003] This wiring board is manufactured as shown in FIG.

First, a copper foil adhered to the back surface of a polyimide base material 41 is patterned in a conventional manner to form a copper pattern 4.
2 is formed (FIG. 5A).

Next, a through hole A reaching the copper pattern 42 is formed from the surface of the polyimide substrate 41 by laser processing (FIG. 5B).

Next, the copper pattern 42 is masked with a masking tape, electrolytic copper plating is performed using the copper pattern 42 as a cathode, and the through holes A formed in the polyimide base material 41 are formed.
The wiring board is obtained by forming a copper bump 43 by projecting from the surface of the polyimide base material 41 while filling with copper, and then removing the masking tape (FIG. 5).
(C)).

According to this wiring board, it is not necessary to excessively increase the positioning accuracy when forming the through holes A, and it is said that copper bumps can be introduced at low cost.

[0008]

However, when the through holes A are provided in the polyimide substrate 41 by laser processing, the use of an excimer laser causes a problem that the processing cost becomes too high. Also, if a normal laser such as a YAG laser whose processing cost is relatively lower than an excimer laser is used, the polyimide powder will adhere to the exposed surface of the copper pattern 42 at the bottom of the through hole A,
There is a problem that complicated desmear treatment with an aqueous solution of permanganate is required to remove it.

Further, when mounting an IC chip on the wiring board shown in FIG. 4, an anisotropic conductive adhesive film, an anisotropic conductive paste, or the like must be sandwiched between them to perform thermocompression bonding. In order to simplify the process and reduce the cost, it has been demanded that the wiring substrate and the IC chip can be directly joined.

[0010] The present invention is to solve the problems of the prior art, and is a wiring board suitable for mounting an IC chip, using an anisotropic conductive adhesive film or an anisotropic conductive paste. It is an object of the present invention to provide a wiring board on which electronic components such as an IC chip can be directly bonded and mounted.

[0011]

SUMMARY OF THE INVENTION The present inventors have provided an adhesive layer on the bump-side surface of a wiring board so that an IC chip and a wiring board can be directly bonded to each other. When forming a hole, after forming a hole in the insulating layer by chemical etching using photolithography, filling the hole with a metal plug by electrolytic plating, further growing the metal plug on a metal bump and bonding By forming a layer on the whole surface and chemically etching back the adhesive layer, the hole precisely formed with the hole formed in the insulating layer is not formed on the adhesive layer, and the hole is formed by laser processing. The present inventors have found that bumps can be formed on the surface of a wiring board at low cost, and have completed the present invention.

That is, according to the present invention, an insulating layer is formed on both sides of a conductive layer and an adhesive layer is formed thereon, and the adhesive layer and the insulating layer are provided with holes reaching the conductive layer. A metal board is formed in the hole by an electrolytic plating method, and a tip of the metal plug forms a metal bump protruding from an adhesive layer.

Further, the present invention provides an insulating layer and an insulating layer on a conductive layer.
An adhesive layer is formed on the adhesive layer, the adhesive layer and the insulating layer,
A hole reaching the conductive layer is provided.
Metal plugs are formed by the unplating method.
Metal bumps with metal plug protruding from adhesive layer
A method for manufacturing a wiring board, comprising the steps of: (a) forming a hole in a dielectric layer on a conductive layer by chemical etching using a photolithographic method; (B) forming a metal plug in the hole of the insulating layer by electrolytic plating using the conductive layer as a cathode, and further continuously growing the metal plug by electrolytic plating, and insulating the tip of the metal plug; Forming a metal bump protruding from the surface of the layer; (c) forming an adhesive layer on the surface of the insulating layer on which the metal bump is formed so that the metal bump is buried; and (d) surface of the adhesive layer. The tip of the metal bump is
Provided is a manufacturing method, which comprises a step of chemically etching back so as to protrude .

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail.

FIG. 1 is a schematic sectional view of a wiring board 10 according to the present invention. This wiring board 10 has an insulating layer 2 on a conductive layer 1.
And an adhesive layer 3 formed thereon. Here, a hole A reaching the conductive layer 1 is formed in the adhesive layer 3 and the insulating layer 2.
The metal plug 4 is formed in the hole A by electrolytic plating, and the tip of the metal plug 4 projects from the adhesive layer 3 to form a metal bump 5.

When bonding the wiring board 10 and the IC chip, the pads of the IC chip and the metal bumps 5 of the wiring board 10 are bonded together.
Are pressed to face each other, and the pad and the metal bump 5
Are deformed and crushed, and accordingly, the adhesive layer 3 comes into contact with and adheres to the IC chip surface. Therefore, the wiring board 10 of the present invention
By using the method, the IC chip can be directly joined to the wiring substrate without using an anisotropic conductive adhesive film, an anisotropic conductive paste, or the like.

At the time of joining, an anisotropic conductive adhesive film or an anisotropic conductive paste may be used.

The conductive layer 1 is generally made of copper foil, but may be made of other metals, such as gold, silver, aluminum, solder, nickel, or alloys thereof.

The thickness of the conductive layer 1 can be appropriately determined according to the purpose of use of the wiring board. In addition, the conductive layer 1 may be patterned as necessary.

In the present invention, the insulating layer 2 can have the same structure as the insulating layer of a general wiring board, and is preferably a polyimide having excellent insulating properties, heat resistance, moisture resistance and voltage resistance. Layers can be used preferably. Particularly preferably, a polyimide layer obtained by imidizing a polyamic acid can be used. This is because holes can be easily and accurately formed by chemical etching before imidization.

The thickness of the insulating layer 2 can be appropriately determined according to the intended use of the wiring board.

As the adhesive layer 3, an adhesive layer made of an adhesive used for manufacturing a general wiring board can be used. Preferably, an insulating thermoplastic polyimide layer having excellent affinity with the insulating layer 2, insulating properties, heat resistance, moisture resistance and withstand voltage properties can be preferably used.

The thickness of the adhesive layer 3 can be appropriately determined according to the purpose of use of the wiring board.

The metal plug 4 filled in the hole A and the metal bump 5 at the tip protruding from the adhesive layer 3 include:
It is a metal material formed by an electrolytic plating method, and preferably, an electrolytic copper plating plug (electrolytic copper plating bump) can be used.

The diameter and height of the metal plug 4 and the diameter and height of the metal bump 5 can be appropriately determined according to the purpose of use of the wiring board.

A noble metal plating layer such as gold may be appropriately formed on the surface of the metal bump 5 as needed to improve conduction reliability.

Next, a method of manufacturing a wiring board according to the present invention will be described step by step with reference to the drawings.

Step (a) A hole A reaching the conductive layer 1 is formed in the insulating layer 2 on the conductive layer 1 by chemical etching using photolithography (FIG. 2C). More specifically, a polyamic acid is applied on the conductive layer 1 and dried to form an insulating layer precursor layer 6 (FIG. 2A). Then, a photosensitive resist is applied thereon and dried to form a photosensitive resist layer 7, and a protective film 8 is further laminated thereon (FIG. 2B). Then, the photosensitive resist layer 7 is exposed and exposed through a photomask corresponding to the hole to be opened, developed and patterned, and the insulating layer precursor layer 6 is chemically etched using the patterned photosensitive resist layer 7 as an etching mask. I do. After the etching is completed, the insulating layer 2 having the holes A is formed by removing the photosensitive resist layer 7 and the protective film 8 by imidization according to a conventional method (FIG. 2C).

The conditions of the chemical etching are as follows.
And the size of the hole to be opened, and the like.

Here, if there is a variation in the opening diameter of the hole A formed by the chemical etching, a variation occurs not only in the diameter of the metal bump formed in the hole A but also in the bump height.
Connection reliability may be reduced. Therefore, in order to suppress the variation, the aspect ratio between the layer thickness of the insulating layer 2 and the opening diameter of the hole A is preferably 1:20 to 50,
More preferably, it is set to 1:30 to 40. This is because if the thickness of the insulating layer 2 is relatively too thin, insulation failure may occur, and if it is too thick, the variation in the opening diameter of the hole A becomes too large, which is not preferable.

Step (b) Next, while forming the metal plug 4 in the hole A of the insulating layer 2 by the electrolytic plating method using the conductive layer 1 as a cathode, the metal plug 4 is further continuously formed by the electrolytic plating method. The metal bump 5 is grown, and its tip is formed as a metal bump 5 protruding from the surface of the insulating layer 2 (FIG. 2D). In this case, it is preferable to cover the outer surface 1a of the conductor layer 1 with a masking tape (not shown). Further, this masking tape may be removed prior to the step (c), and may be kept in that state until the final step (not shown).

The electroplating conditions can be appropriately determined according to the type of plating metal, the hole diameter, the size of the plug to be formed, and the like.

Step (c) Next, on the surface of the insulating layer 2 on which the metal bumps 5 are formed,
The adhesive layer 3 is formed so that the metal bumps 5 are buried (FIG. 2E).

The adhesive layer 3 can be formed, for example, by applying a thermoplastic polyimide solution with a knife coater and drying.

Step (d) Next, the surface of the adhesive layer 3 is chemically etched back so that the metal bumps 5 have a predetermined height. As a result, FIG.
The wiring board shown in (f) is obtained.

The conditions for the chemical etch-back of the adhesive layer 3 can be appropriately determined according to the material of the adhesive layer 3, the material of the metal bump 5, the necessary amount of etch-back, and the like. For example, when the adhesive layer 3 is a thermoplastic polyimide layer, an alkaline aqueous solution can be used as an etchant.

In the example of FIG. 2, an example is shown in which metal bumps are formed on one side of the conductive layer. However, as shown in FIG. 3A, the insulating layers 2 formed on both sides of the conductive layer 1 are formed. And a double-sided wiring board comprising an adhesive layer 3 thereon, wherein each of the adhesive layer 3 and the insulating layer 2 has a hole A reaching the conductive layer 1.
The present invention also includes a double-sided wiring board in which metal plugs 4 are formed in the holes by electrolytic plating, and the metal plugs 4 constitute metal bumps 5 protruding from the adhesive layer 3. It is.

A double-sided wiring board as shown in FIG.
After masking the metal bump 5 side of the wiring board in FIG. 2F, the steps (a) to (c) are performed on the outer surface 1a of the conductive layer 1.
It can be manufactured by removing the masking tape after repeatedly performing (f). Step (a)
To (f) may be simultaneously applied to both surfaces of the conductive layer 1 to produce the conductive layer.

By using such a double-sided wiring board, an IC chip (IC) can be mounted on both sides (FIG. 3B). Further, as shown in FIG. 3C, it is possible to easily form a multilayer.

[0040]

The present invention will be described below in more detail with reference to examples.

Example 1 On one side of a copper foil having a thickness of 18 μm, 1.01 mol of pyromellitic dianhydride and 1.0 mol of 4,4′-diaminodiphenyl ether were added with N-methyl-2-solvent as a solvent. The polyamic acid solution obtained by dissolving in pyrrolidone is dried to a thickness of 1
It was applied to a thickness of 0 μm and dried.

On this polyamic acid layer, a photosensitive resist (NR-41 (nylon-oligoester based resist), manufactured by Sony Chemical Co., Ltd.) is applied so as to have a dry thickness of 8 μm, and dried. A protective film (polyester film, manufactured by Toray Industries, Inc.) having a thickness of 12 μm was laminated.

The photosensitive resist was exposed from the protective film side by irradiating it with light having a wavelength of 365 nm using a negative film as a photomask, and developed with water to pattern the photosensitive resist.

Using the patterned photosensitive resist as an etching mask, the polyamic acid layer was chemically etched with an alkaline solution (etching temperature 25 ° C., etching time 15 seconds) to form holes in the polyamic acid layer. Copper foil is exposed at the bottom of the hole, and the diameter of the bottom is 50μ.
m, and the diameter of the pores on the surface of the polyamic acid layer was 80 μm.

Next, the polyamic acid layer in which the holes were formed was imidized to form an insulating layer (an imidization heating temperature of 350
° C, imidization heating time 10 minutes).

Next, after covering the outer surface of the copper foil with a masking tape, electrolytic copper plating (copper sulfate plating bath, plating bath temperature of 30 ° C., plating current density) was performed using the copper foil as a cathode.
15A / dm2 ^, plating time 30 minutes). As a result, a copper bump protruding from the surface of the insulating layer to a height of 20 μm could be formed.

Next, 3,4,3 ', 4'-biphenyltetracarboxylic acid was formed on the entire surface of the insulating layer on the copper bump side so that a thermoplastic polyimide layer (adhesive layer) having a dry thickness of 20 μm could be formed. A polyamic acid solution obtained by dissolving 1.01 mol of dianhydride and 1.0 mol of 1,3-bis (3-aminophenoxy) benzene in N-methyl-2-pyrrolidone as a solvent is used as a knife coater. And dried.

Next, the surface of the adhesive layer was chemically etched back (etching temperature: 25 ° C., etching time: 15 seconds) using an alkaline aqueous solution so that the exposed height of the copper bump became 10 μm. Thus, a thermoplastic polyimide layer was completed, whereby a wiring board as shown in FIG. 1 was obtained.

When an IC chip was flip-chip mounted on the wiring board (bonding temperature: 260 ° C., bonding time: 10 seconds), bonding having high adhesive strength and high conduction reliability was possible.

Example 2 On one side of a copper foil having a thickness of 18 μm, 1.01 mol of pyromellitic dianhydride and 1.0 mol of 4,4′-diaminodiphenyl ether were added with N-methyl-2-solvent as a solvent. The polyamic acid solution obtained by dissolving in pyrrolidone was applied to a thickness of 2 μm after imidization and dried.

On this polyamic acid layer, a photosensitive resist (NR-41 (nylon-oligoester based resist), manufactured by Sony Chemical Co., Ltd.) is applied to a dry thickness of 12 μm and dried (heating temperature: 100 ° C., heating temperature: 100 ° C.) Time 2
And a protective film (polyester film, manufactured by Toray Industries, Ltd.) having a thickness of 12 μm was further laminated thereon.

The photosensitive resist is exposed to light (12 mJ) from the protective film side by irradiating it with light having a wavelength of 365 nm using a negative film as a photomask, and is developed with water (developing temperature 25 ° C., developing time 2 minutes). Patterned photosensitive resist (artwork 40 μm
□).

Using the patterned photosensitive resist as an etching mask, the polyamic acid layer was chemically etched with an alkaline solution (etching temperature 35 ° C., etching time 1.5 minutes) to form holes in the polyamic acid layer. The copper foil was exposed at the bottom of the hole.

Next, the polyamic acid layer in which the holes were formed was imidized to form an insulating layer (an imidization heating temperature of 280).
° C, imidization heating time 10 minutes). The hole diameter of the formed holes was as small as 60 μm ± 5 μm, and the aspect ratio between the layer thickness of the insulating layer 2 and the hole diameter was 1:30.

Next, after covering the outer surface of the copper foil with a masking tape, electrolytic copper plating (a copper sulfate plating bath, a plating bath temperature of 30 ° C., a plating current density) was performed using the copper foil as a cathode.
15 A / dm ² , plating time 30 minutes). As a result, a copper bump protruding from the surface of the insulating layer to a height of 10 μm could be formed.

Next, a 10 μm-thick thermoplastic polyimide layer (adhesion layer) after imidization was formed on the entire surface of the insulating layer on the copper bump side.
Is formed by adding 1.01 mol of 3,4,3 ', 4'-biphenyltetracarboxylic dianhydride and 1.0 mol of 1,3-bis (3-aminophenoxy) benzene as a solvent. The polyamic acid solution obtained by dissolving in N-methyl-2-pyrrolidone was applied using a knife coater and dried (drying temperature 70 ° C., drying time 10 minutes).

Next, after the surface of the adhesive layer is soft-etched using an alkaline aqueous solution to expose the surface of the bump,
The polyamic acid was imidized to complete a thermoplastic polyimide layer, whereby a wiring board as shown in FIG. 1 was obtained.

After gold flash plating was performed on the surface of the metal bumps of the wiring board, the IC chip was flip-chip mounted (bonding temperature: 260 ° C., bonding time: 10 seconds). It was possible.

Moreover, the wiring board of this embodiment is the same as that of the first embodiment.
Since the insulating layer is thinner than that of the wiring board, the aspect ratio between the thickness of the insulating layer and the hole diameter of the hole can be increased,
Therefore, it was possible to reduce the degree of variation in the opening diameter. In addition, since the height of the metal bumps can be suppressed, the manufacturing cost can be reduced.

[0060]

According to the present invention, an IC chip and a wiring substrate can be directly joined without using an anisotropic conductive adhesive film or an anisotropic conductive paste. Therefore, by using the wiring board of the present invention, a chip size package of an IC chip becomes possible. In addition, a multilayer substrate and a rigid-flexible substrate can be manufactured from these substrates.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of a wiring board of the present invention.

FIG. 2 is a manufacturing process diagram of the wiring board of the present invention.

FIG. 3 is a schematic cross-sectional view (FIG. 3 (a)) of a wiring board of the present invention having metal bumps formed on both surfaces, and an explanatory view of the preferred use thereof (FIG. 3 (b) and (c)).

FIG. 4 is a schematic sectional view of a conventional wiring board.

FIG. 5 is a manufacturing process diagram of a conventional wiring board.

[Explanation of symbols]

Reference Signs List 1 conductive layer, 2 insulating layer, 3 adhesive layer, 4 metal plug, 5 metal bump, 10 wiring board

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Akira Tsutsumi 12-3 Satsukicho, Kanuma City, Tochigi Prefecture Inside Sony Chemical Corporation (72) Inventor Hirozen Ota 12-3 Satsukicho, Kanuma City, Tochigi Prefecture Inside Sony Chemical Corporation (72) Inventor Susumu Kumakura 12-3 Satsuki-cho, Kanuma-city, Tochigi Prefecture Inside Sony Chemical Corporation (72) Inventor Satoshi 12-3 Satsuki-cho, Kanuma-shi, Tochigi Prefecture Inside Sony Chemical Corporation (56) References JP 3-177034 (JP, A) JP-A-4-328890 (JP, A) JP-A-10-270505 (JP, A) JP-A-9-148479 (JP, A) JP-A-9-162246 (JP, A A) JP-A-2000-12731 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/60 H01L 23/12

Claims (10)

(57) [Claims] An insulating layer is formed on both sides of a conductive layer , and an adhesive layer is formed on the insulating layer. The adhesive layer and the insulating layer are provided with holes that reach the conductive layer. A wiring board, wherein a metal plug is formed by an electrolytic plating method, and a tip of the metal plug forms a metal bump protruding from an adhesive layer. 2. The wiring board according to claim 1, wherein the insulating layer is a polyimide layer, the adhesive layer is an insulating thermoplastic polyimide layer, and the metal plug is an electrolytic copper plated plug. 3. The wiring substrate according to claim 2, wherein the insulating layer is obtained by imidizing polyamic acid. 4. The wiring board according to claim 1, wherein the conductive layer is patterned. The aspect ratio between the pore size of 5. A hole provided in the thickness of the insulating layer and the insulating layer is from 1: 20 to 50 wiring board according to any one of claims 1 to 4. 6. An insulating layer on the conductive layer and an adhesive layer on the insulating layer.
Formed, the adhesive layer and the insulating layer reach the conductive layer
Hole is provided in the hole by electrolytic plating.
Metal plug is formed, and the tip of this metal plug is
In a method for manufacturing a wiring board having metal bumps protruding from an adhesive layer , the following steps (a) to (d) are performed: (a) Chemically applying photolithography to an insulating layer on a conductive layer; Forming a hole reaching the conductive layer by etching; (b) forming a metal plug in the hole of the insulating layer by electrolytic plating using the conductive layer as a cathode, and further continuously forming the metal plug by electrolytic plating. (C) forming an adhesive layer on the surface of the insulating layer on which the metal bumps are formed such that the metal bumps are buried; And (d) the tip of the metal bump is located on the surface of the adhesive layer from the adhesive layer.
A manufacturing method, comprising a step of chemically etching back so as to protrude . 7. The method according to claim 6 , wherein in the step (a), an insulating layer is formed by applying a polyamic acid on the conductive layer, forming holes by a photolithographic method, and then imidizing the holes. 8. The method according to claim 6 , wherein in step (d), the surface of the adhesive layer is etched back with an aqueous alkali solution. 9. The method according to claim 6, wherein steps (a) to (d) are performed on both surfaces of the conductive layer. 10. A step (a), the aspect ratio between the opening diameter of the hole provided on the layer thickness and the insulating layer of the insulating layer is 1: any of claims 6-9 20-50 The production method described in 1.