JP3270054B2 - Field emission device with internal structure for aligning phosphor pixels with corresponding field emitters - Google Patents

Abstract

A field emission display device has a faceplate and a backplate. The faceplate includes a faceplate interior side with an active region made of a plurality of phosphor pixel elements; and the backplate has a backplate interior side with a plurality of field emitters. Sidewalls are positioned between the faceplate and the backplate, to form an enclosed sealed envelope between the sidewalls, backplate interior side and the faceplate interior side. At least one spacer wall in the envelope supports the backplate and the faceplate against forces acting in a direction toward the envelope. At least one internal structure fixes and constrains the faceplate and the backplate, and aligns a plurality of phosphor pixels with corresponding field emitters. Additonally, the faceplate can include at least one faceplate fiducial, and the backplate include a corresponding backplate fiducial. The faceplate fiductial is optically aligned with the backplate fiducial. First, the spacer wall is positioned in the wall gripper. The faceplate and backplate fiducials are then optically aligned, and the spacer wall then introduced into the locator. Phosphor pixels are aligned with their corresponding field emitters. There is no need for external fixturing devices in the high temperature bonding and sealing processes of the display.

Description

DETAILED DESCRIPTION OF THE INVENTION Cross Reference to Related Applications To the extent not repeated herein, it is assigned a serial number 08 / 188,856 assigned February 1, 1993, assigned to the assignee of the present invention.
And US Patent No. 5,424,605.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates generally to field emission devices, and more particularly, to at least one internal structure including fiducials for optically aligning a faceplate and a backplate. At least one internal structure for securing and constraining a faceplate and a backplate to align a plurality of phosphor pixels with a corresponding field emitter.

2. Description of the Prior Art A field emission device includes a faceplate forming a sealed vacuum envelope, a backplate, and a connecting wall located at the periphery of the faceplate and the backplate. Generally, the inside of the outer periphery of the field emission device is held at a vacuum pressure and the CRT
In the case of a display device, it is about 1 × 10 ⁻⁷ Torr or less. The inner surface of the faceplate is coated with a light emitting element such as a phosphor or phosphor pattern that defines the active area of the display. When the cathode (field emitter) placed in contact with the back plate is excited, the electrons are released, and the electrons are accelerated toward the phosphor on the face plate and collide with the phosphor to emit light to the phosphor. Let it. The viewer sees this light from outside the faceplate. The electrons emitted for each set of cathodes are intended to strike only a few target phosphors. Generally, there is a one-to-one correspondence between each emitter and one phosphor.

Farm factor of flat display device (form-facto
Flat panel displays are used for applications where r) is required. These applications are typically weight-constrained like aircraft or portable computers,
This is the case where the space available for installation is limited.

Field emission devices require some level of color purity and contrast. Contrast is the difference between dark and shining areas. The higher the contrast, the better. Resolution, color purity,
The parameters of contrast and contrast are determined by the precise communication between the selected electron emitter and its corresponding phosphor pixel.
ion). Further, increasing the brightness (lumen) of the image requires increasing power consumption or increasing the phosphor efficiency (lumen / watt).

In many applications, high power consumption is undesirable. The efficiency of many phosphors improves with increasing anode operating voltage. Also, as shown in FIG. 1, the required operating luminance can be achieved with high voltage and low power consumption. To operate satisfactorily using a high anode voltage (eg, 4 kV or higher), the back plate containing the emitter array is removed from the face plate containing the phosphor pixels,
They must be spatially separated by a distance sufficient to prevent unwanted electrical events from occurring. This distance, depending on the quality of the vacuum and the topology of the substrate, is typically greater than about 2 mm.

Due to restrictions on the area and thickness of the glass of the face plate and the back plate, the vacuum envelope cannot withstand an external pressure of 1 atmosphere or more without spacer walls. If the spacer wall is not provided, the face plate and the back plate may be crushed. For a rectangular display device having a diagonal line greater than about 1 inch, the face plate and back plate may have the above-mentioned aspect ratio because the aspect ratio, defined as the larger dimension of the display device divided by the thickness of the face plate or back plate, is large. Are particularly susceptible to mechanical failures of the type By using a spacer wall inside the field emission device, this mechanical obstacle is substantially eliminated.

No. 4,900,981 regarding the use of spacer walls
No. 5,170,100, EPO 464 938 Al, EPO 436
997 Al, EPO 580 244 Al, and EPO 496 450 Al.

The faceplate and backplate of the desired flat, lightweight portable display is typically about 1 mm thick. The spacer wall should be hidden behind a suitable structure, such as a black matrix, so that the spacer wall is not visible from outside the faceplate.

In addition, but not limited to, existing flat panel displays and standard CRTs, including plasma addressed liquid crystal (PALC), require assembly at elevated temperatures, and alignment during assembly requires that the phosphor And mechanically aligning the faceplate and the backplate from the outside such that the correspondence with the associated cathode emitter is within tolerance. These external fixation devices move with the field emission display through the required high temperature bonding and sealing processes. It is difficult to maintain highly accurate alignment of external fixation devices due to their different coefficients of thermal expansion from field emission displays. The resulting misalignment impairs the color purity and resolution of the field emission display. Another disadvantage of using external tools is the cost of a separate fixed tool required for each field emission display during display sealing and heat treatment.

(I) a field emission display that does not use an external fixation device for the high temperature bonding and sealing process; (ii) formed inside the faceplate, made of row and column guards, and formed in the row or column guards. Wall location (locator)
(Iii) a self-aligned focusing grating for a field emission display, and (iv) a sub-pixel for reducing electron escape in a high voltage display. It is desirable to have a plurality of scattering shields that limit

SUMMARY Accordingly, it is an object of the present invention to provide a field emission display device that does not use an external fixation device to align a plurality of phosphors with a corresponding field emitter during a high temperature bonding and sealing process.

It is another object of the present invention to provide a face plate of a field emission display device including a black matrix formed on an inner surface of the face plate, and a wall positioning formed in the black matrix.

It is yet another object of the present invention to minimize electron beam misalignment in a field emission display and consequently loss of color purity.

It is a further object of the present invention to provide a flat panel display having a faceplate surrounding each phosphor sub-pixel and including a plurality of scattering shields therein defining a volume of the sub-pixel.

These and other objects are achieved in a field emission display device including a faceplate and a backplate. The inside of the faceplate has an active area formed by a plurality of phosphor pixel elements. The inside of the back plate has a plurality of field emitters, each of which defines a sweet spot. A side wall is positioned between the face plate and the back plate to form a sealed enclosure surrounded by the side wall, the inside of the back plate, and the inside of the face plate. At least one spacer wall positioned within the enclosure supports the backplate and faceplate against forces acting in a direction toward the enclosure. Additionally, at least one internal structure is included that secures and constrains the faceplate and backplate to each other and aligns the phosphor pixels with the corresponding field emitters.

This internal structure includes a spacer wall sandwicher (gripper) having a receiving groove formed inside the face plate,
Positioning formed on the inside of the back plate. The spacer wall is inserted into the receiving groove and held in position. The wall sandwich is flexible enough to receive the spacer wall in a substantially straight configuration so that it is easy to maintain through sealing and heat treatment of the display.
Each receiving groove has a trapezoidal geometry that is very effective for sandwiching or gripping the spacer wall. The width of the receiving groove is the same as or smaller than the width of the spacer wall.

The face plate and the back plate may each include alignment criteria. Insert the spacer wall into the wall sandwich. The fiducials on the faceplate and backplate are then optically aligned and the spacer wall is positioned within the locator. this is,
Essentially eliminating the need for external fixation devices during the coupling and sealing steps, aligning the phosphor pixels with the corresponding field emitters.

One end of the spacer wall is secured in the receiving groove, for example, by using a frit. The spacer wall may have a different coefficient of thermal expansion than the face plate or back plate. This is because the receiving groove can grab and position the spacer wall, even if there is a difference in the thermal expansion of the face plate, back plate, and spacer wall during the heat and sealing process.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a graph of luminous efficiency versus voltage curve for a typical cathodoluminescent phosphor.

 FIG. 2 is a perspective view of the field emission display device.

FIG. 3 is a sectional view of the field emission display device of FIG.

FIG. 4 is a cross-sectional view of a portion of a flat panel display according to one embodiment of the present invention, including a field emitter, a phosphor sub-pixel, and a scattering shield.

FIG. 5 is a schematic diagram of the backscattered electrons in the display device when there is no scattering shield.

FIG. 6 is a schematic diagram showing the effect of scattering shielding and backscattered electrons.

FIG. 7 is a graph showing the fraction of the current impinging on another phosphor sub-pixel versus the height of the scattering shield in a typical display device operating at 4 kV.

FIG. 8 is an enlarged view of a field emission device having a reference formed in a black matrix and a focusing grating.

FIG. 9 is an enlarged view of a field emission device having a reference formed in a faceplate substrate and a focusing grating.

FIG. 10 is an enlarged perspective view of a spacer wall sandwiched inside a face plate.

FIG. 11 is a perspective view of a spacer wall and a plurality of phosphor pixels.

FIG. 12 shows that the spacer wall is being introduced into the receiving groove,
FIG. 12 is a perspective view similar to FIG.

FIG. 13 is a perspective view of a spacer wall positioned in a receiving groove formed in the black matrix.

FIG. 14 is a perspective view of the inside of the face plate having the spacer wall positioned in the receiving groove formed in the black matrix.

FIG. 15 is a cross-sectional view of the spacer wall in the receiving groove, showing that the receiving groove has a trapezoidal shape and their ends are widened.

FIG. 16 is a diagram illustrating a process of creating a wall sandwich structure.

FIG. 17 is a diagram showing a process of creating a positioning formed inside the back plate.

 FIG. 18 is a perspective view of the back plate.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In the following, embodiments of the present invention will be described with reference to a field emission device, more specifically a flat cathode ray tube display.

A flat panel display device is a display device in which a face plate and a back plate are substantially parallel, and the thickness of the display device is smaller than the thickness of a normal beam deflection type CRT display device. The thickness of the display is measured in a direction substantially perpendicular to the face plate and the back plate. The thickness of the flat panel display is often substantially less than about 2.0 inches, and in one embodiment is about 4.5 to 7.0 mm.

The flat panel display 10 shown in FIG. 2 includes a face plate 12, a back plate 14, and side walls 16, which together form a sealed enclosure 18. The interior of the envelope 18 is maintained at a vacuum pressure of, for example, about 1 × 10 ⁻⁷ Torr or less. Spacer walls 20 can include electrodes positioned along their longitudinal length. For purposes of explanation, spacer wall 20 will include walls, struts, and wall segments.

Further, the thickness of the spacer wall 20 is sufficiently thin so that it does not substantially interfere with the operation of the cathode (field emitter) and the phosphor of the flat panel display device 10, particularly the device.
The spacer wall 20 may be made of ceramic, glass, glass-ceramic, ceramic tape, ceramic reinforced glass, frosted glass, amorphous glass in a flexible matrix, metal with an electrically insulating coating, titanium aluminum
Made of bulk resistive material such as chromium oxide, high temperature / vacuum compatible polyimide, or insulator such as silicon nitride. The thickness of the spacer wall 20 is about 20 to 60 μm, and the center-to-center spacing is about 8 to 10 mm. Spacer wall 20
Supports the spacing between the face plate 12 and the back plate 14 to maintain a substantially uniform value over the active area of the display formed on the inner surface of the face plate 12.

A plurality of field emitters 22 are formed on the surface of the back plate 14 within the enclosure 18. For convenience of description, it is assumed that field emitter 22 can include multiple field emitters or a single field emitter. Row and column electrodes control the emission of electrons from field emitter 22. Electronic faceplate 12
Is accelerated toward the phosphor coated on the inner surface of the substrate. The integrated circuit chip 24 includes a drive circuit that controls the voltage of the row and column electrodes so as to regulate the flow of electrons to the faceplate 12. Conductive traces are used to electrically connect circuits on chip 24 to row and column electrodes.

Please refer to FIG. The face plate 12 and the back plate 14 are
It is made of glass about 1.1 mm thick. A solder glass hermetic seal 26 including, but not limited to, Owens-Illinois CV 120, secures sidewall 16 to face plate 12 and back plate 14 to form a sealed enclosure 18. Solder glass must withstand a sealing temperature of 450 ° C. Outer circumference 18
The pressure within is typically 10 ^-8 Torr or less. This high level of vacuum is achieved by evacuating the enclosure 18 at a high temperature through the pump port 28 to absorb any gas expelled from the interior surface. Next, the outer periphery 18 is hermetically sealed by the pump port patch 30.

The face plate 12 includes a plurality of pixels. In order to obtain good color purity and high resolution, the electrons emitted from the field emitter 22 are directed toward the corresponding pixels and only hit them. The electron beam from the field emitter 22 is focused by a focusing grating 36 and directed to a color picture element comprising a plurality of phosphors 32 and a black matrix 37 formed inside the face plate 12.

Various parameters are involved in directing electrons from the field emitter 22 to the associated plurality of phosphor pixels 32. These include, but are not limited to, (i) the precision of the location of the field emitter 22 relative to the focusing grating 36, (ii) the precision of the location of the plurality of phosphor pixels 32 relative to the black matrix 37,
And (iii) the alignment of the focusing grating 36 with the black matrix 37. A light-reflective layer including, but not limited to, aluminum is deposited on the black matrix 37 and the phosphor pixels 32 to a thickness of about 200-600 °.

In the case of a 10-inch diameter screen having a color resolution of 640 (× 3) × 480 pixels, the area ratio of the plurality of phosphor pixels 32 to the black matrix 37 is about 50%. Therefore, the minimum width of the black matrix 37 is about 0.001 inches. This means that the maximum misalignment of the electron beam 34 (by all involved) and the corresponding phosphor pixel 32 will result in a maximum black matrix width (0.0005) at any location on the field emission device 10.
Inches).

The field emission display 10 includes a face plate 12 and a back plate 14.
The plurality of phosphor pixels 32 are fixed to and constrained within a predetermined tolerance of 0.0005 inches or less.
Included in the outer enclosure 18 is at least one internal structure that aligns with a corresponding sweet spot associated with the inner spot. This internal structure is a wall sandwich 42 formed inside the face plate 12 and a positioning 44 formed inside the back plate 14. Conversely, it is clear that the wall sandwich 42 can be formed on the back plate 14 and the positioning 44 can be formed on the faceplate 12. The spacer wall 20 is mounted in a wall clip 42 and held in a positioning 44. The most important parameter in the alignment problem is to align the faceplate 12 (eg, black matrix 37 and phosphor pixels 32) with the back plate (eg, focusing grating 36 and field emitter 22) and then move it during the thermal assembly process. Precision in holding in place without any This is achieved with the internal structure within the enclosure 18 without using external fixation devices.

The black matrix 37 is made of a material that can be patterned by light including, but not limited to, black chrome, polyimide, black frit, and the like. Black matrix
Both 37 and focusing grating 36 are constructed by photolithography. The light tools that make up the black matrix 37 are substantially the same as the light tools used to make the focusing grating 36, wall sandwich 42, and positioning 44.

First, the spacer wall 20 is mounted in the wall sandwich 42. The face plate 12 and back plate 14 are then locked together within acceptable tolerances by positioning the spacer wall 20 in the corresponding positioning 44.

Please refer to FIG. The face plate 12 and the back plate 14 are
It is made of glass about 1.1 mm thick. A solder glass hermetic seal 26 including, but not limited to, Owens-Illinois CV 120, secures sidewall 16 to face plate 12 and back plate 14 to create a sealed outer envelope 18. Display device 10
The whole must withstand a sealing temperature of 450 ° C. Surround 1
The pressure in 8 is typically 10 ^-7 Torr or less. This high level of vacuum is achieved by evacuating the enclosure 18 at an elevated temperature through the pump port 28 to absorb any gas expelled from the interior surface. Then, surround
Seal 18 with pump port patch 30.

The face plate 12 includes a plurality of phosphor sub-pixels 32.
including. Electrons that define the electron beam are accelerated from the field emitters with energies in the range of 1 kV to 10 kV. The electron beam 34 is focused by a focusing grating 36 and impinges on the corresponding phosphor sub-pixel 32. A set of field emitters 22 positioned within a section of the focusing grating 38
And the phosphor sub-pixel 32 has a one-to-one correspondence. Each phosphor sub-pixel 32 is surrounded by a plurality of scattering shields 38 defining a sub-pixel volume 40.

FIG. 5 shows the result when the black matrix is used but the scattering shield 38 is not used. The electrons in the electron beam 34 are accelerated from the plurality of field emitters 22 and impinge on their corresponding phosphor subpixels 32. Line 35
Some of these electrons are backscattered from the area near the phosphor subpixel or internal support 20, as shown at. Other electrons are backscattered as shown by line 39 and strike unmatched phosphor subpixels. Backscattered electrons can strike other insulating elements in enclosure 18. Electrons backscattered on a resistive surface, such as internal support 20, affect the brightness-to-power ratio of the display to limit the amount of current available. In addition, internal support
Backscattering onto 20 limits the height of the internal support 20, and thus the high voltage. Backscattering of electrons to uncorresponding phosphor sub-pixels reduces the contrast and color purity of the display device 10. Black matrices typically have a small aspect ratio. Also, it is difficult to create a structure having a sufficient aspect ratio to prevent electrons from escaping from the subpixel volume 40.

FIG. 6 shows the effect of the scattering shield 38. The backscattered electrons, shown by lines 41 and 43, impinge on the scattering shield 38 and do not exit their scattering shielding volume 40. The electrons remain essentially trapped in their scattering shielding volume 40. Even if the backscattered electrons escape from their scattering shielding volume 40, as in the case shown by line 45, the scattering shield 38 captures the backscattered electrons and causes the uncorresponding phosphor subpixel to Prevent collision.

FIG. 7 shows a portion of the current impinging on another phosphor subpixel as a function of the height of the scattering shield 38. Preferably, the height of the scattering shield 38 is 12 μm, 25 μm, 25 μm,
50 μm, 75 μm, and 100 μm or more.
However, the actual height and size will vary depending on the dimensions of the display. The scattering shield 38 is about 20 to 200 μm, 2
0-100 μm, and 50-100 μm,
The scattering shield 38 improves the contrast by a factor of five.

The scattering shield 38 is made of a material that can be patterned by light, including but not limited to polyimide. At least a portion of the scattering shield can include a black matrix material.

Please refer to FIG. 8 and FIG. Face plate 12 and back plate 14
Alignment with optical matrices 45 and 47, which can be integral with black matrix 37 and focusing grating 36, respectively.
Is achieved using Further, the mask for fiducials 45 and 47 is integral with the light tool, creating a geometric relationship between fiducial 45 and black matrix 37 and fiducial 47 and focusing grating 36. Although optional, the fiducials 45 and 47 may be formed on the respective substrates of the face plate 12 and the back plate 14 and not be part of the black matrix 37. In each case, fiducials 45 and 47 optically align faceplate 12 and backplate 14, and field emitter 22 and corresponding phosphor pixel 32. When the fiducials 45 and 47 are optically aligned, for example, when parallel light is irradiated on the face plate 12 transparent to light, an image of the face plate alignment fiducial 45 is placed on the back plate fiducial 47. Projected,
Is mapped. A shadow mask is provided to allow light to pass through fiducials 45 and 47.

The attached spacer wall 20 is physically strong and rugged enough to withstand the atmospheric pressure to maintain alignment between the faceplate 12 and the backing plate 14 during sealing and heat treatment of the display. As will be described in more detail below, the shape of the wall sandwich 42 is designed to securely grip the spacer wall 20 and prevent its movement.

As shown in FIG. 10, the black matrix 37 includes a column and a row protective band. Wall sandwich 42 is black matrix
Formed on 37. Preferably, the wall sandwich 42 is formed in a row or row guard band. A second layer 37 (a) of black matrix is formed, essentially consisting of a pair of raised structures 42.
(A) and (b), making a wall sandwich 42 which forms a receiving groove 46 for the spacer wall 20. The wall sandwich 42 is formed in a direction substantially perpendicular to a series of row protection bands 48. Wall sandwich 42
Cannot be distinguished from the row protection band 51 that does not include the wall sandwich. When viewed from the outside of the face plate 12,
The wall sandwich 42 cannot be distinguished from the row protection zone 51 and is therefore optically integral. That is, as if the row protection band 51 does not include the wall sandwich 42, the row protection band 51 and the wall sandwich 42 look the same.

In FIG. 11, a first layer 37 of the black matrix is formed, and then a second layer 37 (a) of the black matrix is formed.
Is created. The second layer 37 (a) forms a wall sandwich 42,
The corresponding raised structures 42 (a) and 42 (b) define the receiving groove 46. As shown, the plurality of phosphor pixels 32 are formed by a black matrix 37 and a second layer 37 of the black matrix.
Limited by (a). FIG. 12 shows that the spacer wall 20 is to be introduced into the groove 46.

FIG. 13 shows the spacer wall 20 positioned in the receiving groove 46. FIG. 14, which is a perspective view of the inside of the face plate 12, shows a black matrix 37 and five spacer walls 20 positioned in the wall sandwich 42.

The material forming the wall sandwich 42 is vacuum compatible because it does not decompose or generate gaseous contaminants at processing temperatures. Processing temperatures range from about 300 to 450 ° C. The wall clip 42 is designed to allow the thickness of the spacer wall 20 to be larger than the receiving groove 46, and still
Flexible enough to be inserted into 46 (deformable locally). The wall sandwich 42 also has the effect of strengthening the spacer wall 20. The wall sandwich 42 is sufficiently locally deformable to strengthen the spacer wall 20.

As shown in FIG. 15, the receiving groove 46 formed by the wall
Has a shape in which the opening at the point for receiving the spacer wall 20 is narrower than the bottom of the receiving groove 46. In one embodiment, the depth of the receiving groove 46 can be about 0.002 inches.

Hereinafter, an embodiment of a process of forming the wall sandwich 42 will be described with reference to FIG.

Preferred materials for the wall sandwich 42 can be limited by light, for example, OCG Probimide 7020 available from DuPont, Hitachi, etc.
Or other similar polymers.

The black matrix 37 is formed from black chrome and is patterned by light on the face plate 12 by conventional lithography. Probimide with the number 54
7020 first layer, normal spin deposition (750 rpm, 30 seconds)
To deposit on the black matrix 37. Next, place face plate 12 on a hot plate at 70 ° C for 6 minutes.
It is then baked at 100 ° C. for 20 minutes to drive off the solvent.

Depositing a second layer of Probimide 7020, numbered 56,
Bake under the same conditions as for layer 54. Next, the soft-baked Probimide 56 was placed on a mask 58 that was close to the Probimide layer 56.
Through 405 nm at a dose of 250 mJ / cm ² . Then
The exposed Probimide 56 is baked at 100 ° C. for 3 minutes and then stabilized at room temperature for 15 minutes. At this point, the Probimide 56 has an exposure energy profile that forms the trapezoidal shape shown in FIG.

Then paddle / spray cycle with Probimide in OCG QZ3501 (3 minutes paddle / 1 minute spray, repeat 1
X), followed by a one minute rinse of solvent (OCG QZ3512). The developed wall sandwich 42 is placed in a nitrogen atmosphere using a thermal gradient of 3 ° C./min.
Hard bake at C for 1 hour.

Next, as shown in FIG. 13, the spacer wall 20 is inserted into the wall sandwich. As shown, the insertion axis is the face plate 12
At right angles to the plane. The spacer wall 20 can be inserted parallel to the face of the face plate 12 (that is, the spacer wall 20 can be slid into the groove 46 from one end). Spacer wall 20
The substrate 12 is made of solder glass 60 at both ends.
The black matrix 37 extends from the black matrix 37 by an amount sufficient to adhere to the black matrix. The receiving groove 46 has one or more widened ends to facilitate insertion of the spacer wall 20.

FIG. 13 shows the spacer wall 20 secured in place with only one end secured by a solder glass 60 or other high temperature adhesive. Other suitable adhesives include, but are not limited to, polyimides and the like. The solder glass 60 may include, but is not limited to, the OI
CV 120. Next, the assembly shown in FIG. 14 was baked at 450 ° C. for one hour,
Drive out. A suitable thermal gradient is 3 ° C / min. By securing one end of the spacer wall 20, mechanical stability of the spacer wall 20 is obtained during subsequent processing. Furthermore,
Since there is a difference in expansion and contraction during the heat treatment, fixing or pinning the spacer wall 20 at both ends causes the spacer wall 20 to distort. By securing the spacer wall 20 at one end only, any differential movement of the spacer wall 20 will be along the axis of the receiving groove 46, so that a material having a substantially different coefficient of thermal expansion will be applied to the spacer wall 20, It can be used for the face plate 12 and the back plate 14.

It will be clear that the invention is not limited to the example process cycle described above. The invention is applicable to various variants of this process cycle.

As shown in FIG. 8, the spacer wall 20 is fixed and constrained by wall sandwiches 42 and positioning 44. Then, after the face plate 12 and the back plate 14 are optically aligned, the spacer wall 20 is fixed and restrained in the positioning 44. The back plate 14 of the display device 10 is associated with the faceplate 12 so that the field emitter 22 is associated with a corresponding plurality of phosphor pixels 32 and the wall sandwich 42 is optically aligned with the positioning 44. . The wall positioning 44 is formed by a light tool that is compatible with the tool set used to form the wall sandwich 42, the black matrix 37, and the focusing grid 36. The focusing grating 36 is self-aligned with the field emitter 22.

Thus, the face plate 12 on which the spacer wall 20 is mounted is brought closer to the back plate 14, the spacer wall 20 is aligned with the wall positioning 44, and the associated phosphor pixels 32 are aligned with the corresponding sweet spot 36. (X,
y, O) Can be operated in the axis. Next, the face plate 12 is translated in the z-axis, and the spacer wall 20 is inserted into the wall positioning 44. This assembly is precisely aligned in the (x, y, O) axis and is held in place by a mechanically robust structure formed by the spacer wall 20, the wall clip 42, and the positioning 44, Will be maintained. The structure can then be transported through a standard cycle of hot sealing and evacuation. Solder glass can be used for the sealing process. This is done using a thermal gradient of 3 ° C / min.
Performed by baking at 450 ° C. for 1 hour. Only tools that apply enough force to keep face plate 12 and back plate 14 in contact are needed. No tools for external positioning and alignment are required during the heat treatment.

The process of forming the positioning 44 on the back plate 14 shown in FIGS. 17 and 18 begins with the back plate 14, row electrodes 50 and column electrodes 49. Row and column metallization, as well as gate oxide, electron emitter, and gate metal (not shown) are formed on the inner surface of backing plate 14.

At a spin speed of 750 rpm by ordinary spinning means
OCG Probimid 45 micron dry thickness for 10 seconds
e. Deposit a first layer 64 of 7020 polyimide on backing plate 14.

The first layer 64 is formed at 79 ° C. for 6 minutes, followed by 100 ° C. for 1 minute.
Soft bake in a two minute process for 0 minutes. Then
Exposure is performed through a photomask 68 to define the column focusing electrodes 70. The exposure parameter is ultraviolet light having a wavelength of 350 to 450 nm, and the exposure dose is 250 mJ / cm ² . Next, the exposed pattern is developed in a QCG QZ3501 developer for 3 minutes to form a row focusing electrode 70.
Is formed.

A second layer 72 of polyimide is deposited to a dry thickness of 20 microns and exposed through a second photomask 64 using the same exposure and development parameters as the first layer 64 to provide row focusing electrodes 76 and positioning. Form 44.

The polyimide is imidized by baking at 460 ° C. for 1 hour in a nitrogen atmosphere.

The back plate structure is positioned proximate to the electrically insulating back plate, the base electrode, the electrically insulating layer, the metal gate electrode, the field emitter positioned within the gate electrode, and the gate electrode. Including a focusing ridge.

The gate electrode exists on the insulating layer. The gate electrode is in the form of a strip running at right angles to the base electrode.

The field emitter extends through an opening in the insulating layer in contact with the base electrode. The tip of the field emitter is exposed through a corresponding opening in the gate electrode. Field emitters can take a variety of shapes, including but not limited to cones, filament structures, and the like. The focusing ridge extends a significant distance above the insulating layer beyond the gate electrode. Preferably, the average height of the focusing ridge is at least 10 times the average height of the gate electrode. Typically, the height of the focusing ridge is about 20-50 μm.

When a suitable positive voltage is applied to the gate electrode (relative to the field emitter voltage), the field emitter emits electrons at an off-normal emission angle. The emitted electrons move toward the phosphor pixels. When these electrons collide, the phosphor pixels emit light.

The focusing ridge affects the trajectory to maintain a one-to-one correspondence between the phosphor pixels and the field emitter. Substantially all the emitted electrons collide with the phosphor.

The height of the scattering shield 38 is high enough to reduce the number of scattered electrons that escape from the sub-pixel volume 40.

The foregoing description of a preferred embodiment of the invention is by way of example only. The present invention is not intended to, nor is it limited to, other than the precise shapes described. Many modifications and variations will be apparent to those skilled in the art. The embodiments described have been chosen to illustrate the principles of the invention and its practical applications, and make it possible to devise various embodiments and modifications that are suitable for a particular application. It was adopted for. It is intended that the scope of the invention be limited by the claims and their dependent claims.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI H01J 29/87 H01J 29/87 (31) Priority claim number 343,803 (32) Priority date November 21, 1994 (1994) .11.21) (33) Priority Country United States (US) (72) Inventor Field John E. United States of America 94062, California 94062 Redwood City, Maryland Street 1692 (72) Inventor Heaven Dewein A United States of America 95014 Coupertino Portal PLAZA 19968 (72) Inventor Pon Chundy, California 95014 Coupertino Burnhart Avenue 18951 (56) Reference JP-A-6-332384 (JP, A) JP-A-62-22362 (JP, A) Hei 2-50 0065 (JP, A) Tokuhyo Hei 8-506686 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01J 31/12 H01J 9/14 H01J 9/24 H01J 29/32 H01J 29/62 H01J 29/87

Claims (8)

(57) [Claims] 1. A field emission display device, comprising: a faceplate including an inside of a faceplate having an active area including a plurality of phosphor pixels; a backplate including an inside of a backplate having a plurality of field emitters; A side wall positioned between the back plate and the side wall, the side wall forming a hermetically sealed enclosure surrounded by the inside of the back plate and the inside of the face plate; and a force acting in the direction toward the outer enclosure within the outer enclosure. At least one spacer wall for supporting the back plate and the face plate, and at least one interior for fixing and constraining the face plate and the back plate to align the plurality of phosphor pixels and the corresponding field emitters. An internal structure having a spacer wall receiver inside the face plate. Chair. 2. A back plate structure for a field emission display, comprising: a transparent back plate substrate; at least two opaque electrodes; a plurality of transparent electrodes orthogonal to the opaque electrodes; A plurality of field emitters formed thereon, an outer surface, and a conductive layer positioned substantially on the outer surface, aligned with the opaque and transparent electrodes,
A back plate structure, comprising: the transparent electrode and a focusing grating that is electrically insulated from the opaque electrode. 3. A field emission display device, comprising: a face plate substrate defining an inside of a face plate; a plurality of phosphor pixels deposited inside the face plate; a transparent back plate substrate; A side wall defining an inner periphery of the display device which can be held in vacuum in combination with the plate substrate and the back plate substrate; a plurality of opaque electrodes; and a plurality of transparent electrodes orthogonal to the opaque electrodes. And a plurality of field emitters formed on the transparent electrode, an outer surface, and a conductive layer positioned substantially on the outer surface, aligned with the opaque electrode and the transparent electrode,
A field emission display device comprising: a focusing grating electrically insulated from the transparent electrode and the opaque electrode; and a drive circuit for supplying a current to the display device. 4. A method for forming a backing structure for a field emission device, comprising: a transparent substrate, a plurality of opaque electrodes having an outer surface and an inner surface, and a plurality of field emitters formed on the opaque electrodes. Providing a backing plate including an active area defined by: an inner surface; depositing a photopatternable material on substantially the entire inner surface; and a row focusing pattern and columns of the inner surface to ultraviolet radiation through the outer surface. Creating a deformable wall location by exposing the focusing pattern differently; developing and curing the photopatternable material;
forming a cured photopatternable material having a row focusing pattern of h1 and a column focusing pattern of height h2; coating the cured photopatternable material with a conductive layer; Creating a focusing electrode that is electrically insulated from the opaque electrode. 5. A face plate of a field emission display device, comprising: a substrate defining the inside of the face plate; a plurality of phosphor pixels deposited on the inside of the face plate; and a plurality of columns on the inside of the face plate. And a black matrix formed by a row protection band, and a wall sandwich formed in the column or row protection band, receiving a spacer wall and attaching it to the plurality of phosphor pixels. Face plate. 6. A flat panel display device, comprising: a face plate including an inside of a face plate; a back plate including an inside of a back plate facing the inside of the face plate; and between the face plate and the back plate. A side wall that is positioned and forms a sealed envelope surrounded between the side wall, the inside of the back plate, and the inside of the face plate; a plurality of phosphor sub-pixels positioned inside the face plate; A plurality of field emitters for directing the sub-pixels to corresponding sub-pixels; and defining a sub-pixel region surrounding each of the sub-pixels to reduce escape of a large number of scattered electrons in the sub-pixel region from the sub-pixel region. A plurality of scattering shields, wherein the height of the scattering shield surrounding the sub-pixels is A flat panel display device, which is sufficient to reduce the number of scattered electrons exiting the pixel area and impacting incorrect sub-pixels. 7. A flat panel display device, comprising: a face plate including an inside of a face plate; a back plate including an inside of a back plate facing the inside of the face plate; and between the face plate and the back plate. A side wall positioned to define a sealed enclosure enclosed between the side wall, the inside of the back plate and the inside of the face plate, and defining a display enclosure having the face plate, the back plate, and the side wall having at least one internal support. A plurality of phosphor sub-pixels positioned inside the face plate; a plurality of field emitters that emit electrons to direct them to corresponding sub-pixels; and a sub-pixel region surrounding each of the sub-pixels. Limiting the large number of scattered electrons in the sub-pixel area to escape from the sub-pixel area. The height of the scattering shield surrounding the sub-pixels reduces the number of scattered electrons exiting their corresponding sub-pixel area and charging the inner insulating surface within the outer enclosure. Sufficient, also provided with a positioning groove formed in a column or row guard band, receiving an internal support and mounting it to the phosphor sub-pixel. Flat panel display. 8. A method of forming a backing structure for a field emission device, comprising: a transparent substrate, a plurality of opaque electrodes, a plurality of opaque electrodes orthogonal to the opaque electrodes, and a plurality of transparent electrodes having an outer surface and an inner surface. Providing a backing plate including an active area defined by a plurality of field emitters formed on the electrodes; depositing a photopatternable material substantially entirely on the inner surface; and Exposing the inner surface to ultraviolet radiation; developing and curing the photopatternable material to form a cured photopatternable material; and applying the cured photopatternable material to a conductive layer. And forming a focusing electrode that is electrically insulated from the opaque electrode and aligned with the plurality of opaque electrodes. Way.