JP3252878B2 - Synthesizer receiver - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synthesizer receiver.

[0002]

2. Description of the Related Art In a synthesizer type receiver,
By changing the frequency division ratio of the variable frequency divider of the PLL,
Since the reception frequency is changed, the reception frequency changes stepwise. Generally, the frequency interval of the broadcast wave signal of the medium wave broadcast is 9 kHz, and the frequency interval of the broadcast wave signal of the short wave broadcast is 5 kHz. Therefore, in the synthesizer receiver, when the scan key is pressed, the reception frequency changes in 9 kHz steps in the medium wave band and 5 kHz in the short wave band.
It changes in kHz steps.

[0003] Some high-end machines are provided with a rotary encoder having a dial knob so that a dial operation similar to that using a so-called variable condenser can be performed.

[0004]

As described above, in a synthesizer receiver, the reception frequency generally changes in 9 kHz steps in the medium wave band, and changes in 5 kHz steps in the short wave band. For steps,
Especially in the short wave band, it is not possible to fine-tune the reception frequency in order to reduce adjacent interference.

[0005] Even if a rotary encoder is provided so that the reception frequency can be changed by a dial operation, the reception frequency changes in a stepwise manner. Need to be able to change the frequency step.

That is, when the dial is turned, it usually changes in 9 kHz steps in the medium wave band and 5 kHz in the short wave band.
It changes in kHz steps, but when you switch it,
It is necessary to change the frequency in steps of 1 kHz in both the medium wave band and the short wave band. However, changing the frequency step by operating the switch in this way would be inconvenient.

[0007] The present invention is to solve the above problems.

[0008]

According to the present invention, there is provided, for example, a PLL, which converts a frequency of a received signal by an output signal of the PLL and changes a frequency dividing ratio of a variable frequency dividing circuit in the PLL. In the synthesizer-type receiver that changes the reception frequency, a first up key and a down key and a second up key and a down key are provided, and the first up key or the down key is pressed. Is currently being received
Frequency interval of the broadcast wave signal in the frequency band and the current reception
The reception frequency is adjusted in accordance with the reception frequency according to the reception frequency.
The frequency is set to several times, then the frequency division ratio is changed by a predetermined value, and the reception frequency is raised or lowered by a frequency step equal to the frequency interval of the broadcast wave signal.
When the up key or the down key is pressed, the frequency division ratio is changed by a predetermined value, and the reception frequency is increased or decreased by a frequency step smaller than the frequency interval of the broadcast wave signal. Is what you do.

[0009]

The coarse tuning is performed by the first up key KUP and the down key KDWN, and the fine tuning is performed by the second up key K + and the down key K-.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the synthesizer receiver shown in FIG.
In this case, it is possible to receive the medium-wave broadcast and the short-wave broadcast, the reception band of the medium-wave broadcast is 531 kHz to 1620 kHz, and the reception band of the short-wave broadcast is 1621 kHz to 30 MHz. The frequency step is 9 kHz or 1 kHz when receiving medium-wave broadcasting, and 5 kHz or 1 kHz when receiving short-wave broadcasting.

In FIG. 1, reference numeral 10 denotes a receiving circuit. A receiving signal from an antenna 11 is supplied to an antenna tuning circuit 12 of an electronic tuning system, and a target frequency f
Twelve AM broadcast wave signals S12 are extracted.

The signal S12 is supplied to the high-frequency amplifier 1
3 to the mixer circuit 14 and
From O21, the frequency f21 is, for example, f21 = f12 + f14 [kHz] (1) f14 is an intermediate frequency, and an oscillation signal S21 of, for example, f14 = 450 kHz is extracted, and this signal S21 is supplied to the mixer circuit 14 as a local oscillation signal. The signal S12 is frequency-converted into an intermediate frequency signal S14 (intermediate frequency f14).

Further, the intermediate frequency signal S14 is supplied to an AM detection circuit 17 through, for example, a ceramic filter 15 and an amplifier 16 which constitute an intermediate frequency filter to demodulate an audio signal, and this signal is supplied to a speaker 19 through an amplifier 18. Is done. Further, a detection circuit 51 is connected to the amplifier 16, and a reception detection signal S51 indicating whether the reception level of the reception signal S12 is equal to or higher than a specified value is extracted.

At this time, the VCO 21 is connected to the circuit 2
Together with 2 to 25, the PLL 20 is configured. That is, the signal S21 from the VCO 21 is supplied to the variable frequency dividing circuit 22 and divided into a frequency of 1 / N, and this frequency-divided signal is supplied to the phase comparing circuit 23 and the oscillation circuit 24
An oscillation signal having a reference frequency, for example, a frequency of 1 kHz, is taken out from the comparator, the oscillation signal is supplied to the comparison circuit 23, and the comparison output is supplied to the VCO 21 through the low-pass filter 25 as the control voltage. The output voltage of the filter 25 is supplied to the tuning circuit 12 as a tuning voltage.

Therefore, in a steady state, the frequency of the frequency-divided signal from the frequency-dividing circuit 22 and the frequency of the oscillation signal of the oscillation circuit 24 are equal, and the frequency f21 of the oscillation signal S21 at this time is f21 = N × 1 [KHz] (2) and f12 = f21−f14 = N−450 [kHz] from the equations (1) and (2).

Therefore, if the frequency division ratio N is changed by "9" between 981 and 2070, the local oscillation frequency f21
However, since the frequency changes between 981 kHz and 2070 kHz at intervals of 9 kHz, the reception frequency f12 changes stepwise in the frequency band of 531 kHz to 1620 kHz in steps of 9 kHz in accordance with the frequency division ratio N.

If the frequency division ratio N is changed by 5 between 2071 and 30450, the local oscillation frequency f21 becomes
Since the frequency changes between 2071 kHz and 30450 kHz at intervals of 5 kHz, the reception frequency f12 changes stepwise in the frequency band of 1621 kHz to 30 MHz in steps of 5 kHz in accordance with the frequency division ratio N.

Further, if the frequency division ratio N is changed by "1" between 981 and 30450, similarly, the reception frequency f12 corresponds to the frequency band of 531 kHz to 30 MHz corresponding to the frequency division ratio N. Therefore, it changes stepwise by 1 kHz.

Reference numeral 30 denotes a microcomputer for controlling the system, 31 denotes its CPU, 32
Is a ROM in which various processing routines are written, 33
Is a RAM for a work area, and 34 is a memory for storing various data. These memories 32 to 34 are connected to the CPU 31 through a system bus 39.

In this case, the ROM 32 is provided with, for example, a scan routine 100 and a channel selection routine 200 shown in FIGS. Also,
The memory 34 is a ROM capable of electrically erasing and writing data, or a RAM (not shown) backed up by a battery, that is, the memory 34 is a nonvolatile memory, Even when turned off, the written data can be retained. The memory 34 holds the frequency division ratio N supplied to the variable frequency dividing circuit 22 as data indicating the current reception frequency f12 together with various data.

Further, 41 is an output port, 42 is an input port, 43 is a key interface circuit, and these circuits 41 to 43 are connected to the CPU 31 through a system bus 39. The port 41 is connected to the frequency dividing circuit 22, and the frequency dividing ratio N from the CPU 31 is set in the frequency dividing circuit 22 through the port 41. Further, a detection signal S51 from the detection circuit 51 is taken into the CPU 31 through the port.

Various operation keys KTS to K9 are connected to the interface circuit 43. In this case, each of the keys KTS to K9 is constituted by a non-locking type push switch. Of the keys KTS to K9, the up keys KUP, K + and the down keys KDWN, K-
Are arranged close to each other as shown in FIG. 5, for example.

Reference numeral 44 denotes a clock circuit for measuring time, which is also connected to the CPU 31 through the system bus 39. Reference numeral 52 denotes a display for digitally displaying a reception frequency, time, and the like. In this example, the display is an LCD. And this LCD 52
System bus 3 through the display controller 45
9 and a memory 46 for buffering display data is connected to the controller 45.

In such a configuration, each process or operation is performed, for example, as follows.

<Display of Time and Reception Frequency> Clock circuit 4
4 interrupts the CPU 31 every minute, for example. When the interrupt occurs, the CPU 31 converts the data of the time measured by the clock circuit 44 into the clock circuit 44.
, And the data at the read time is converted into display data, supplied to the controller 45, and written into the memory 46. Also, when the reception frequency f12 is changed, the data indicating the reception frequency f12 is converted into display data, supplied to the controller 45, and written into the memory 46.

The display data written in the memory 46 is repeatedly read at a predetermined cycle by the controller 45 and supplied to the LCD 52. The LCD 52 displays a time corresponding to the display data written in the memory 46. And the received frequency are displayed digitally.

<Rough tuning and high-speed scan reception of medium-wave broadcasting> This corresponds to the up key KUP or the down key KDWN.
By pressing, the reception frequency f12 is changed in the broadcast wave band of the medium wave broadcast in 9 kHz steps. In this example, when the broadcast can be received, the scanning is stopped there.

That is, when the key KUP or KDWN is pressed, the processing of the CPU 31 proceeds to step 10 of the routine 100.
Starting from 1 and then in step 102, by checking the frequency division ratio N held in the memory 34, it is checked whether the current reception frequency f12 is in the medium wave band or the short wave band. And, in this case, since it is the medium wave band, the processing is performed from step 102 to step 103.
In this step 103, it is checked whether or not the frequency division ratio N held in the memory 34 is an integral multiple of 9, and when it is an integral multiple, the processing is terminated at step 103.
To step 111.

However, if it is not an integral multiple, the process proceeds from step 103 to step 104, where the frequency division ratio N of the memory 34 is set to the integral multiple of 9 closest to the original value. However, in this case, when the up key KUP is pressed and the routine 100 is executed, an integer multiple of 9 smaller than the original dividing ratio N and closest to the original dividing ratio N is set. When the down key KDWN is pressed and the routine 100 is executed, the frequency is set to an integral multiple of 9 which is larger than the original frequency dividing ratio N and is closest to the original frequency dividing ratio N. Then, the process proceeds to step 111.

Then, in step 111, similarly to step 102, it is checked whether the current reception frequency f12 is in the medium wave band or short wave band. From step 112, the frequency division ratio N of the memory 34 is incremented or decremented by "9" corresponding to the key KUP or KDWN.

Subsequently, the process proceeds from step 112 to step 114, in which the frequency division ratio N of the memory 34 (in this case, updated in step 112) is stored in the PLL 20 through the port 41. It is set in the circuit 22. Therefore, the reception frequency f
12 is 9kHz corresponding to the pressed key KUP or KDWN
Ascend or descend by z.

Next, the process proceeds to step 115. In this step 115, it is checked whether or not the key KUP or KDWN has been pressed. If not, the process proceeds from step 115 to step 131.
Proceed to.

Therefore, if the key KUP or KDWN is pressed and released immediately, every time the key is pressed, step 112,
Since step 114 is executed, the reception frequency f12 rises or falls by 9 kHz in accordance with the pressed key KUP or KDWN. That is, each time the key KUP or KDWN is pressed, the reception frequency f12 rises or falls in a frequency step equal to the frequency interval of the medium wave broadcast.

However, if the key KUP or KDWN is kept depressed, this is detected in step 115,
The process proceeds from step 115 to step 116, where it is checked whether a predetermined time, for example, 2 seconds, has elapsed since the start of the routine 100. That is, the key KUP or KDW
It is checked whether two seconds have elapsed since N was held down. If two seconds have not elapsed, the process returns from step 116 to step 111.

Therefore, if the key KUP or KDWN is kept depressed, steps 111 to 116 are repeated, so that the reception frequency f12 continuously increases or decreases in 9 kHz steps in accordance with the key KUP or KDWN being pressed. Descends.

If two seconds have elapsed after the key KUP or KDWN has been kept pressed, this is detected in step 116, and the process proceeds from step 116 to step 121. In this step 121, as in step 102, the current reception frequency is set. It is checked whether f12 is a medium wave band or a short wave band, and since it is a medium wave band in this case,
The process proceeds from step 121 to step 122, in which the frequency division ratio N of the memory 34 is incremented or decremented by "9" corresponding to the key KUP or KDWN.

Subsequently, the process proceeds from step 122 to step 124, in which the frequency division ratio N of the memory 34 (in this case, updated in step 122) is divided by the frequency dividing circuit through the port 41. Set to 22. Therefore, the reception frequency f12 rises or falls by 9 kHz corresponding to the pressed key KUP or KDWN.

Next, the process proceeds to step 125. In this step 125, it is checked whether or not a broadcast is received by checking the detection signal S51. If no broadcast is received, the process proceeds to step 1
From 25, the process returns to step 121. Step 125
In step, when a broadcast is being received, the process proceeds from step 125 to step 131, where the routine 1
End 00.

Therefore, the key KUP or KDWN is set to 2
If you press and hold for more than a second,
Steps 121, 122, 12 until the broadcast is received
Steps 4 and 125 are repeated, and the reception frequency f12 increases or decreases in steps of 9 kHz corresponding to the pressed key KUP or KDWN. When the broadcast is received, the reception state of the broadcast is thereafter continued.

When the key KUP or KDWN is kept depressed in this way, the reception frequency f12 in the medium wave band increases or decreases by 9 kHz in accordance with the pressed key KUP or KDWN. That is, the reception frequency f12 changes in a frequency step equal to the frequency interval of the medium wave broadcast.

<Coarse tuning and high-speed scan reception of short-wave broadcasting> This is a mode in which the reception frequency f12 is changed in 5 kHz steps in the short-wave broadcasting by pressing the key KUP or KDWN. In this example, when the broadcast can be received, the scanning is stopped there.

That is, when the up key KUP or the down key KDWN is pressed, as described above, the processing of the CPU 31 starts from step 101 of the routine 100. In step 102, whether the current reception frequency f12 is in the medium wave band is determined. It is checked whether or not the frequency band is in the short wave band. In this case, since the signal is in the short wave band, the process proceeds from step 102 to step 105. In this step 105, the frequency division ratio N held in the memory 34 is 5 It is checked whether it is an integral multiple of .times., And if it is, the process proceeds from step 105 to step 111.

However, if it is not an integral multiple, the process proceeds from step 105 to step 106, where the frequency division ratio N of the memory 34 is set to the integral multiple of 5 closest to the original value. However, in this case, when the up key KUP is pressed and the routine 100 is executed, an integer multiple of 5 smaller than the original dividing ratio N and closest to the original dividing ratio N is set. When the down key KDWN is pressed to execute the routine 100, the frequency is set to an integral multiple of 5 which is larger than the original dividing ratio N and is closest to the original dividing ratio N. Then, the process proceeds to step 111.

Then, in step 111, similarly to step 102, it is checked whether the current reception frequency f12 is in the medium wave band or the short wave band. Proceeding to step 113, in which the frequency division ratio N of the memory 34 is incremented or decremented by "5" corresponding to the key KUP or KDWN.
The process proceeds from step 113 to step 114.

Therefore, similarly to the reception of the medium wave broadcast, when the key KUP or KDWN is pressed and released immediately, each time the key is pressed, steps 113 and 114 are executed. KUP or KDWN
Rises or falls by 5 kHz in accordance with. That is,
Each time the key KUP or KDWN is pressed, the reception frequency f12
Rises or falls at a frequency step equal to the frequency interval of shortwave broadcasting.

Further, if the key KUP or KDWN is kept depressed for 2 seconds or more, the process proceeds from step 116 to step 121, and in this step 121, the current reception frequency f12 is in the middle wave band or short wave band. Is checked, and in this case, since it is a short wave band, the process proceeds from step 121 to step 123,
At 3, the frequency division ratio N of the memory 34 is incremented or decremented by "5" corresponding to the key KUP or KDWN.

After that, the process proceeds to step 124, and even if the user stops pressing the key KUP or KDWN, steps 121, 123 to 125 until the broadcast is received.
Is repeated, and the reception frequency f12 rises or falls in steps of 5 kHz corresponding to the pressed key KUP or KDWN. When the broadcast is received,
The reception state of the broadcast is continued.

When the key KUP or KDWN is kept depressed, the reception frequency f12 in the short-wave band rises or falls by 5 kHz in accordance with the pressed key KUP or KDWN. That is, the reception frequency f12 changes in frequency steps equal to the frequency interval of short-wave broadcasting.

<Fine tuning of medium-wave broadcasting and short-wave broadcasting> This is a mode in which the reception frequency f12 is changed in 1 kHz steps each time the key K + or K- is pressed.

That is, when the up key K + or the down key K- is pressed, the processing of the CPU 31 is switched to the routine 200.
Starting from step 201 of step
In the above, the frequency division ratio N held in the memory 34 is incremented or decremented by "1" corresponding to the key K + or K-.

Subsequently, the process proceeds from step 202 to step 203, in which the frequency division ratio N of the memory 34 (in this case, updated in step 202) is stored in the PLL 20 through the port 41. It is set in the circuit 22. Therefore, the reception frequency f
Numeral 12 raises or lowers by 1 kHz corresponding to the pressed key K + or K-. Then, the process proceeds to step 204, and this routine 200 ends.

When the key K + or K- is pressed,
Since the routine 200 is executed each time the key is pressed, the reception frequency f12 increases or decreases by 1 kHz in accordance with the pressed key K + or K-. That is, each time the key K + or K- is pressed, the reception frequency f12 rises or falls in a frequency step smaller than the frequency interval of the medium wave broadcast or the short wave broadcast.

<Direct tuning> This is the reception frequency f
This is a channel selection performed by directly designating the numeral indicating 12 with the numeric keys K0 to K9 among the operation keys KTS to K9.

That is, in this case, the operation keys KTS ~
Of the K9, the direct key KDRCT is pressed, and then the numeric keys K0 to K9 are pressed according to the number indicating the reception frequency f12, and finally the execution key KEXE is pressed. Then, the frequency division ratio N corresponding to the received frequency f12 of the number input by the numeric keys K0 to K9 is calculated, and this frequency division ratio N is stored in the memory 34 and set in the frequency dividing circuit 22. Therefore, the frequency f12 of the number input by the number keys K0 to K9 is selected.

<Preset of reception frequency f12>
This is a case where an arbitrary reception frequency f12 is preset in the numeric keys K0 to K9.

That is, in this case, channel selection is performed by any of the above-described methods, and thereafter, while pressing the registration key KREG among the operation keys KTS to K9, the numeric keys K0 to K9 are selected.
Press any one of the numeric keys Ki (i = 0 to 9). Then, of the registration areas A0 to A9 prepared in the memory 34, in the area Ai corresponding to the pressed numeric key Ki, the frequency division ratio N of the frequency f12 received at this time is the data indicating the reception frequency f12. Is written as

Therefore, an arbitrary reception frequency f12 can be preset in the numeric keys K0 to K9.

<Preset selection> This is the number key K0
This is a case where a frequency f12 preset to K9 is selected.

That is, in this case, the numeric keys K0 to
Press any key Ki of K9. Then, the memory 34
Of the registered area A0 to A9, the pressed numeric key K
The frequency dividing ratio N of the area Ai corresponding to i is read, and the read frequency dividing ratio N is set in the frequency dividing circuit 22. Therefore, when the numeric key Ki is pressed, the frequency f12 preset for the pressed numeric key Ki is selected.

<Correction of time "hour"> This correction is made by pressing the up key KUP or the down key KDWN while pressing the time set key KTS among the operation keys KTS to K9.

That is, when the key KUP or KDWN is pressed while pressing the time set key KTS, the time measured by the clock circuit 44 is incremented or decremented by one hour in correspondence with the key KUP or KDWN. Then, after that, the data of the time measured by the clock circuit 44 is converted into display data, and then supplied to the memory 46.

Therefore, by pressing the key KUP or KDWN while pressing the time set key KTS, the "hour" order of the time measured by the clock circuit 44 can be corrected in units of one hour.

<Correction of Time Minute> This correction is performed by pressing the up key K + or the down key K- while pressing the time set key KTS among the operation keys KTS to K9.

That is, when the key K + or K- is pressed while pressing the time set key KTS, the time counted by the clock circuit 44 is incremented or decremented by one minute in correspondence with the key K + or K-. And then
The data of the time measured by the clock circuit 44 is converted into display data and supplied to the memory 46.

Therefore, by pressing the key K + or K- while pressing the time set key KTS, the "minute" order of the time measured by the clock circuit 44 can be corrected in units of one minute.

<Timer Function (Standby Receiving Function)> This is a case where the radio is sounded by operating the receiving circuit 10 at a preset time.
The setting of the time to sound the radio is also the same as the above <correction of time "hour" and "correction of time" minute ">
"Hour" and "Minute" by key KUP, KDWN and K +, K-
Can be set respectively.

<Others> In the above description, the keys K +, K-
Each time is pressed, the reception frequency f12 changes in steps of 1 kHz. However, like the keys KUP and KDWN, the keys K + and K-
For example, if the key is pressed for two seconds or longer, the reception frequency f12 is kept at 1 k until the broadcast is received even if the user stops pressing the key.
It can be made to change in Hz steps.

[0068]

According to the present invention, the key KUP or K
When DWN is pressed, the reception frequency f12 can be raised or lowered in frequency steps equal to the frequency interval of the broadcast wave signal, and the desired broadcast station can be easily and quickly selected.

When the key K + or K- is pressed, the reception frequency f12 can be raised or lowered by a frequency step smaller than the frequency interval of the broadcast wave signal. This can be easily performed when fine tuning the reception frequency. Moreover, in this case, a switch operation for switching the frequency step is not required, and the operation is simple.

Further, the time of the clock circuit 44 can be corrected easily and quickly.

[Brief description of the drawings]

FIG. 1 is a system diagram showing an example of the present invention.

FIG. 2 is a flowchart showing a part of an example of a first channel selection routine.

FIG. 3 is a flowchart showing an example of a continuation of a first channel selection routine.

FIG. 4 is a flowchart illustrating an example of a second channel selection routine.

FIG. 5 is a diagram showing an example of the arrangement of operation keys.

[Explanation of symbols]

 Reference Signs List 10 receiving circuit 12 antenna tuning circuit 14 mixer circuit 17 AM detecting circuit 20 PLL 21 VCO 22 variable frequency dividing circuit 30 microcomputer 31 CPU 32 ROM 34 memory 43 key interface circuit 44 clock circuit 45 display controller 52 LCD 100 first channel selection Routine 200 Second tuning routine KTS to K9 Operation keys

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H03J 5/00-7/28 H04B 1/26

Claims (3)

(57) [Claims] 1. A synthesizer having a PLL, wherein a frequency of a received signal is converted by an output signal of the PLL, and a receiving frequency is changed by changing a dividing ratio of a variable frequency dividing circuit in the PLL. In the receiver of the system, a first up key and a down key, and a second up key and a down key are provided, and when the first up key or the down key is pressed, the frequency band in the currently received frequency band is Broadcast wave signal
The above reception frequency according to the frequency interval and the current reception frequency
The number is set to an integral multiple of the frequency interval, then the reception frequency by changing the frequency division ratio by a predetermined value is raised or lowered in equal frequency step to the frequency interval of the broadcast wave signal, the second A synthesizer receiver wherein when the up key or the down key is pressed, the frequency division ratio is changed by a predetermined value to raise or lower the reception frequency in a frequency step smaller than the frequency interval of the broadcast wave signal. 2. The synthesizer receiver according to claim 1, wherein any one of the first up key or the down key or the second up key or the down key is kept pressed for longer than a predetermined period. A synthesizer receiver configured to raise or lower the receiving frequency until the broadcast wave signal is received in the frequency step corresponding to the pressed key. 3. The synthesizer receiver according to claim 1, further comprising a clock circuit, wherein when setting the time of said clock circuit, when the first up key or down key is pressed. When the time counted by the clock circuit is incremented or decremented by one hour, and when the second up key or down key is pressed, the time counted by the clock circuit is incremented by one minute. Or a synthesizer receiver that is decremented.