JP3175974B2 - Memory card device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a memory card device using an EEPROM (Electrically Eraseable and Programmable Read Only Memory) as a semiconductor memory.

[0002]

2. Description of the Related Art As is well known, EEPROMs are currently
An SRAM (Static Random Access Memory), which has attracted attention as a data recording medium that replaces a magnetic disk, does not require a backup battery for retaining data, and can reduce the cost of the chip itself. ) And D (Dynamic) RAM have particular advantages, and therefore, developments especially for use in memory cards have been actively conducted.

The memory card converts an optical image of a photographed subject into an electrical image signal using a solid-state image sensor, converts the image signal into digital image data, and records the digital image data in a semiconductor memory. It is suitable for use in a still camera or the like. By configuring a memory card in which an EEPROM is built in a card-shaped case so that it can be attached to and detached from the camera body, handling equivalent to a film in a normal camera is achieved. Is made possible.

FIG. 4 shows a memory map of an EEPROM built in such a memory card. That is, the address space of the EEPROM is divided into an attribute area and a data area. Among them, in the attribute area, various attribute information for notifying the electronic still camera on the host side of the type of the memory card, the total recording capacity of the data area, and the like are recorded.
In this attribute area, an address A for storing data indicating the remaining recording capacity of the data area is set, and the address A now has data a indicating that the remaining recording capacity of the data area is a. 'Is recorded.

In an EEPROM, a memory cell deteriorates in accordance with the number of times of writing, reading, erasing, and the like of data, and the number of times of use (tens of thousands to several million times) is shorter than that of an SRAM or the like. In addition, there is an inconvenience that a data writing failure is likely to occur. Therefore, conventionally, a remedy has been considered in which data to be written in a memory cell in which a write failure has occurred is remedied by writing the data in another normal memory cell (for example, Japanese Patent Application No. 3-3171).
No. 69). This remedy is specifically described in FIG.
As shown in FIG. 7, when a write failure occurs at address B in the data area, data b to be written to address B is written to address C having another normal memory cell.

In this case, in the memory card, since the writing of the data b to the address B is requested, the content of the address A, that is, the remaining recording capacity of the data area is subtracted from the capacity b 'of the address B from a'. The operation is performed so as to rewrite a′-b ′. However, in practice, the data b is rescued to the address C because a write failure has occurred in the address B, so the capacity b '+ c' obtained by adding the capacity b 'of the address B and the capacity c' of the address C. Is the remaining recording capacity a of the data area.
', The remaining recording capacity a'-b' recorded in the attribute area differs from the actual remaining recording capacity a '-(b' + c ') of the data area. Problems arise.

[0007]

As described above, in the conventional memory card, when data to be written to a memory cell in which a write failure has occurred has been subjected to a remedy for writing data to another normal memory cell, the attribute area cannot be changed. And the actual remaining recording capacity of the data area is different.

Therefore, the present invention has been made in consideration of the above circumstances, and is intended to make the remaining recording capacity of the attribute area coincide with the remaining recording capacity of the actual data area even when a remedy for write failure is taken. It is an object of the present invention to provide a very good memory card device.

[0009]

A memory card device according to the present invention has a semiconductor memory in which attribute information including a remaining recording capacity is recorded, and can output the remaining recording capacity in response to an external request. It is intended for. Then, in a state where a write failure has been detected in the area of the semiconductor memory to which data write has been requested, rescue means for writing data to be written to the defective write area to another free area, and an area in which data has been written by the rescue means Control means for reducing the remaining recording capacity of the attribute information based on the capacity of the write failure area and the capacity of the write failure area.

[0010]

According to the above arrangement, the remaining recording capacity of the attribute information is reduced based on the capacity of the area where data has been written by the rescue means and the capacity of the writing failure area. , The remaining recording capacity of the attribute information can be made to match the actual remaining recording capacity.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a memory card of an electronic still camera will be described below in detail with reference to the drawings. In FIG. 1, reference numeral 11 denotes a memory card main body, which is connected to an electronic still camera main body (not shown) via a connector 12 provided at one end of the memory card main body. The connector 12 is supplied with data to be written to the memory card main body 11, address data indicating a writing location, and the like from the electronic still camera main body side.

The data supplied to the connector 12 is taken in via a bus line 13 into a data input / output control circuit 14 incorporating a CPU (not shown). The data input / output control circuit 14 has a built-in buffer memory (not shown) capable of high-speed writing and reading of data, and temporarily records the fetched data in the buffer memory. After that, the data input / output control circuit 14 transmits the data recorded in the buffer memory to a plurality of chips (four chips in the illustrated case) of the EEPROM via the bus line 15.
The data is read out at a timing corresponding to 16 write cycles and recorded in the EEPROM 16.

In this case, the data input / output control circuit 14
Each time data is written to the EEPROM 16 in page units, for example, the data written in page units is read from the EEPROM 16 and write verification is performed to determine whether or not the data matches the data recorded in the buffer memory. Then, the data input / output control circuit 14
If the data read from the EEPROM 16 does not match the data recorded in the buffer memory,
The data is again transferred from the buffer memory to the EEPROM 16 for writing. When the data read from the EEPROM 16 completely matches the data recorded in the buffer memory while this operation is repeated a predetermined number of times, the data is written. Writing is completed.

Next, when data is read from the EEPROM 16 to the outside of the memory card main body 11, an address designating data to be read from the electronic still camera main body via the connector 12 is stored in the data input / output control circuit 1.
4 is supplied. Then, the data input / output control circuit 14
Reads data from the EEPROM 16 based on the input address and temporarily records the data in the buffer memory.
Thereafter, the data input / output control circuit 14 derives the data recorded in the buffer memory to the outside via the read connector 12, and the data is read there.

Therefore, according to the above configuration,
Since data transfer between the electronic still camera main body and the memory card main body 11 is always performed via the buffer memory, the speed of writing and reading data to and from the memory card main body 11 as viewed from the main body of the electronic still camera is improved. Can be done.

Here, the data input / output control circuit 14
Performs a rescue process of writing data b to be written to address B to address C having another normal memory cell when a write failure occurs in address B of the data area, as shown in FIG. In this case, the data input / output control circuit 14 determines whether the data area recorded at the address A of the attribute area is based on the occurrence of a write failure at the address B and the use of the address C as its rescue area. Remaining capacity a '
Is subtracted from the value obtained by adding the capacity b 'of the address B and the capacity c' of the address C, and the subtraction result a '-(b' + c ') is set as the remaining recording capacity of the actual data area, It operates to record at address A.

Therefore, according to the configuration as in the above embodiment, the remaining recording capacity of the attribute area can be matched with the remaining recording capacity of the actual data area. By reading the contents of the address A, the remaining recording capacity of the data area can be accurately detected, and as in the conventional case, the result of the electronic still camera reading the contents of the address A of the attribute area shows that the remaining recording capacity is still small. However, it is possible to prevent the inconvenience that data cannot be actually recorded in the data area.

FIG. 3 shows a modification of the above embodiment. That is, a case is shown in which the remaining recording capacity of the entire storage area including the attribute area and the data area is written to the address A of the attribute area, instead of the remaining recording capacity of the data area.
Even in this case, since the capacity of the attribute area is fixed in advance, this is substantially equivalent to writing the remaining recording capacity of the data area at the address A of the attribute area. In the example of FIG. 3, in a state where d ′ is recorded at the address A of the attribute area,
This shows a state in which a write failure has occurred at address B and data b to be written to address B has been written to address C. The contents of address A are, as is clear from the above description, d '.
− (B ′ + c ′). It should be noted that the present invention is not limited to the above-described embodiment, and can be implemented with various modifications without departing from the scope of the invention.

[0019]

As described in detail above, according to the present invention,
It is possible to provide an extremely good memory card device in which the remaining recording capacity of the attribute area matches the remaining recording capacity of the actual data area even when a remedy measure against a writing failure is taken.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a memory card device according to the present invention.

FIG. 2 is a view for explaining the operation of the embodiment.

FIG. 3 is an exemplary view for explaining the operation of a modification of the embodiment.

FIG. 4 is a diagram showing a memory map of an EEPROM incorporated in a memory card.

FIG. 5 is a diagram shown to explain a conventional problem.

[Explanation of symbols]

11: memory card body, 12: connector, 13: bus line, 14: data input / output control circuit, 15: bus line, 16: EEPROM.

──────────────────────────────────────────────────続 き Continuing from the front page (72) Koji Maruyama, Inventor Koji Maruyama 8 in Shinsugita-cho, Isogo-ku, Yokohama, Kanagawa Prefecture (72) Inventor Tomoyuki Maekawa 8 Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Stock (72) Inventor: Tomoaki Sato 3-3-9, Shimbashi, Minato-ku, Tokyo Inside Toshiba AV EE Co., Ltd. (56) References JP-A-59-71200 (JP, A) JP-A-4-40588 (JP, A) JP-A-63-247883 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 12/16 G06F 12/02 G06K 17 / 00 G11C 5/00 G11C 29/00

Claims (1)

(57) [Claims] 1. In a memory card device having a semiconductor memory in which attribute information including a remaining recording capacity is recorded and capable of outputting the remaining recording capacity in response to an external request, data writing to the semiconductor memory is requested. Rescue means for writing data to be written to the defective write area to another free area in a state where a write error is detected in the written area;
A memory card device comprising: control means for reducing the remaining recording capacity of the attribute information based on the capacity of the area where data has been written by the rescue means and the capacity of the writing failure area. .