JP3101689B2 - Synchronous signal generation circuit for video signal processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronizing signal generating circuit for a video signal processing apparatus, and more particularly, to a so-called TV or V
The present invention relates to a synchronizing signal generating circuit for generating a pseudo horizontal synchronizing signal and a pseudo vertical synchronizing signal such that pulses do not overlap in a video signal processing device such as a TR.

[0002]

2. Description of the Related Art Video signal processing apparatuses represented by so-called TVs and VTRs generally handle video signals conforming to video signal standards such as the NTSC system and the PAL system. Such a video signal, which is called a composite video signal, includes not only a video information signal but also a synchronization signal corresponding to a horizontal synchronization signal, a vertical synchronization signal, and the like. Since the compatibility is guaranteed by following the standard, a normal video signal processing device
Processing such as recording / reproduction and screen display is performed on the composite video signal or based on a video signal similar thereto.

In performing such video signal processing, the horizontal synchronizing signal and the vertical synchronizing signal included in the composite video signal serve as a reference for processing timing, and are usually separated from the composite video signal and become independent. Also used as a synchronization signal. Generally, a differentiating circuit is used to separate and generate a horizontal synchronizing signal from a composite video signal, and an integrating circuit is used to separate and generate a vertical synchronizing signal. Also, the raw horizontal synchronizing signal, which is simply separated, fluctuates greatly in the case of poor reception conditions on a TV or in the case of high-speed reproduction on a VTR, and cannot be used. A stable pseudo horizontal synchronizing signal is generated by control (AFC), and this is used as a timing signal for video signal processing.

FIG. 3 shows an example of a synchronizing signal generating circuit of a conventional video signal processing device for generating a pseudo horizontal synchronizing signal and a vertical synchronizing signal. The composite video signal A is differentiated by the synchronization signal separation circuit, and the synchronization signal B corresponding to only those synchronization signal components is separated from the composite video signal A. The synchronization signal B does not include a luminance signal, a chroma signal, and the like, mainly includes a pulse in a horizontal synchronization period serving as a horizontal synchronization signal, and further includes an equivalent pulse and a pulse in a vertical synchronization period. I have. The synchronization signal B is sent to the AFC circuit 2 to generate a pseudo horizontal synchronization signal D, and is also sent to another pulse generation circuit 4 to generate a vertical synchronization signal.

The AFC circuit 2 receives a synchronization signal B as an input,
This is an automatic frequency control circuit that generates a triangular wave oscillation signal. This is mainly composed of a so-called PLL circuit, and generates an oscillation signal whose phase follows the input signal by the frequency control of the PLL system. Furthermore, by charging / discharging for switching between charging and discharging at a timing corresponding to the oscillation signal,
Generate a triangular wave signal. Thus, a triangular wave signal C that follows the synchronization signal B is generated. This is output to the pulse generation circuit 3.

The pulse generating circuit 3 receives the triangular wave signal C as an input and generates a pseudo horizontal synchronizing signal D as a pulse signal. This circuit includes a comparator, a flip-flop, and the like.
By extracting the timing at which the positive slope portion and the negative slope portion of the triangular wave signal C coincide with the threshold value by comparing the threshold value with the threshold value, the flip-flop further extracts any of the positive slope portion and the negative slope portion of the triangular wave signal C. Only one of the timings is extracted, and a pulse is generated at this timing.

As a result, a pulse of the pseudo horizontal synchronizing signal D is generated at a timing when the positive slope portion or the negative slope portion of the triangular wave signal C matches a predetermined first threshold value. The pseudo-horizontal synchronization signal D generated in this manner has stable frequency fluctuations. The pseudo-horizontal synchronization signal D is used as a signal indicating a reference timing of horizontal scanning in screen display.

The pulse generation circuit 4 receives the synchronization signal B as input and generates a pulse-separated vertical synchronization signal E. This circuit mainly includes an integrating circuit and a comparator, and generates a signal obtained by integrating the synchronizing signal B by charging / discharging in which charging and discharging are switched at a timing according to the synchronizing signal B, and compares the signal by a comparator. By generating a value, a pulse signal is generated. Thereby, the vertical synchronization signal E is separated.
The pseudo-horizontal synchronization signal E thus separated is used as a signal or the like indicating a reference timing of vertical scanning in screen display.

[0009]

In such a synchronizing signal generating circuit of a conventional video signal processing apparatus, a pseudo horizontal synchronizing signal is generated from a composite video signal, and a vertical synchronizing signal is separated to separate these signals into another. It is used as a processing timing signal. Here, the pseudo-horizontal synchronization signal is stabilized by the AFC, but the vertical synchronization signal is a raw signal which is kept separated. For this reason, depending on the degree of fluctuation or disturbance of the composite video signal, the vertical synchronizing signal fluctuates, and the start and end of the pulse may overlap the pulse of the pseudo horizontal synchronizing signal. In such a case, the order of these timing signals may be slightly out of order. Then, processing such as horizontal scanning or the like is excessively performed, or conversely, shortage occurs, and eventually, the image is disturbed such as the screen fluctuating up and down.

In order to eliminate such inconvenience, it is conceivable to synchronize a low-stability vertical synchronizing signal with a high-stability pseudo-horizontal synchronizing signal. This is not easy because the timing of the horizontal synchronizing signal switches every frame and the number of so-called equivalent pulses in a half cycle of the horizontal synchronizing signal changes. An object of the present invention is to solve such a problem of the prior art, and a simple circuit is used to convert a pseudo vertical synchronizing signal, which is synchronized with the pseudo horizontal synchronizing signal and whose phase difference is accurately maintained, with a simple circuit. An object of the present invention is to realize a synchronizing signal generating circuit of a video signal processing device that generates a signal.

[0011]

In order to achieve this object, a video signal processing apparatus according to the present invention has a configuration of a synchronizing signal generating circuit which includes a horizontal synchronizing signal and a vertical synchronizing signal in accordance with a video signal standard such as NTSC system or PAL system. In a video signal processing device such as a TV or VTR that performs video signal processing such as recording / reproduction and screen display, a composite video signal including a synchronization signal corresponding to the composite video signal is separated from the composite video signal using a differentiating circuit or the like. A synchronizing signal including at least a horizontal synchronizing signal or a horizontal synchronizing signal separated from the composite video signal by using a differentiating circuit or the like is input, and a triangular wave signal which is phase-followed to the input signal by frequency control such as PLL is generated. An automatic frequency control circuit for receiving and outputting the triangular wave signal, and comparing the triangular wave signal with a predetermined first threshold value which is set in advance as a comparison partner thereof. A pulse of a pseudo-horizontal synchronization signal (which is used as a timing signal in the video signal processing) is generated at a timing when the positive slope portion or the negative slope portion of the triangular wave signal matches the first threshold value. A first pulse generating circuit, and a vertical synchronizing signal separated from the composite video signal by charging / discharging using an integrating circuit or the like, and receiving the triangular wave signal and receiving positive and negative slope portions of the triangular wave signal. This is compared with a predetermined second threshold value which is set in advance as a comparison partner, and a timing at which these coincide with each other is set as a synchronization reference timing. A pulse corresponding to the input vertical synchronization signal, A pulse whose end coincides with the reference timing is a pulse of a pseudo vertical synchronizing signal (also used as a timing signal in the video signal processing). A second pulse generation circuit which generates the first threshold value and the second threshold value so that the start and end of the pulse of the pseudo vertical synchronization signal do not overlap the pulse of the pseudo horizontal synchronization signal. Are set to different values.

[0012]

In the synchronizing signal generating circuit of the video signal processing apparatus of the present invention having such a configuration, the raw vertical synchronizing signal is synchronized with the triangular wave signal which is the source of the pseudo horizontal synchronizing signal. A pseudo vertical synchronization signal is generated. Then, a pseudo vertical synchronizing signal is output instead of the raw vertical synchronizing signal. Therefore, the synchronization between the pseudo horizontal synchronizing signal and the pseudo vertical synchronizing signal is obtained, and the phase difference between these signals is accurately maintained. . That is, the mutual timing relationship between these signals is always stable.

Further, in the synchronization processing, the pseudo-horizontal synchronizing signal is composed of pulses corresponding to only one of the positive slope portion and the negative slope portion of the triangular wave signal, so that the period of the pseudo horizontal synchronizing signal is Since the start and end of the pseudo vertical sync signal correspond to both the positive slope portion and the negative slope portion of the triangular wave signal, It is determined according to the half cycle. This makes it possible to cope with an equivalent pulse having a half cycle of the horizontal synchronizing signal in terms of timing. Therefore, even if the timing of the horizontal synchronizing signal with respect to the vertical synchronizing signal is switched for each frame in relation to the interlace display, the pulse end of the pseudo vertical synchronizing signal does not overlap with the pseudo horizontal synchronizing signal.

The second pulse generating circuit newly added for synchronizing the pseudo vertical synchronizing signal is almost the same as the existing first pulse generating circuit and is slightly expanded. is there. In each circuit, a pulse is generated at a timing based on the comparison between the triangular wave signal and the threshold. From these facts, it is possible to easily adjust the phase relationship between the pseudo vertical synchronizing signal and the pseudo horizontal synchronizing signal simply by setting the threshold values in both circuits to sufficiently different values. Thus, it can be embodied by a simple circuit,
Adjustment is also easy.

Therefore, the synchronizing signal generating circuit of the video signal processing apparatus of the present invention can generate a pseudo vertical synchronizing signal whose pulse ends are synchronized with the pseudo horizontal synchronizing signal and do not overlap with the pseudo horizontal synchronizing signal, though it is a simple circuit. it can. As a result, video signal processing performed using such a pseudo horizontal synchronization signal and a pseudo vertical synchronization signal is stabilized.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a synchronizing signal generating circuit of a video signal processing device according to the present invention will be described below with reference to the drawings. FIG. 1 shows the same components as those in FIG. 3 with the same reference numerals. Therefore, these descriptions will be omitted, and the description will be focused on the newly added pulse generation circuit 50. The pulse generation circuit 50 receives the triangular wave signal C and the vertical synchronization signal E as inputs, and generates a pseudo vertical synchronization signal G as a pulse signal.
The pseudo vertical synchronizing signal G is generated by synchronizing the pulse end of the vertical synchronizing signal E with the triangular wave signal C. This circuit is
It is composed of a comparator and a counter circuit.

The pulse generating circuit 50 includes two comparators.
However, these are almost the same as those of the pulse generation circuit 3 except for the threshold value and the normal / inverse of the input, and the triangular wave signal C is input. By comparing the triangular wave signal C with a predetermined second threshold value by the comparator, the timing at which the positive slope portion and the negative slope portion of the triangular wave signal C match the threshold value is extracted as the signal F. This second threshold is
A value different from the first threshold value in the pulse generation circuit 3 is set. As a result, the period of the pulse of the signal F is half the period of the pseudo-horizontal synchronization signal D, and does not overlap with the pseudo-horizontal synchronization signal D.

In particular, when the first threshold value is set at approximately the center between the upper limit and the lower limit of the value of the triangular wave signal C, and when the second threshold value is set to a value close to the upper limit and the lower limit of the value of the triangular wave signal C, the margin becomes large. Very good. In this example, since there are two comparators, there are also two second thresholds. However, it is also possible to perform pulse generation by combining only one comparator with one shot, so that the second threshold is essentially 1 One. This is the same for the first threshold in the pulse generation circuit 3.

The pulse generation circuit 50 includes the pulse generation circuit 3
Has a counter circuit for receiving the horizontal synchronizing signal E and the signal F. this is,
Although the count value is reset in accordance with the start end of the horizontal synchronization signal E, the counter value is not reset immediately at the start end of the horizontal synchronization signal E, but is reset in synchronization with the signal F. . The signal F is counted as a clock input. It counts until it reaches a certain number corresponding to the pulse width of the vertical synchronization signal defined by the standard, and outputs one pulse corresponding to this period.
As a result, a pulse having a pulse width conforming to the standard is generated.

As described above, the synchronization is performed by using the signal F whose clock is half and whose pulse does not overlap with the pseudo-horizontal synchronization signal D as a clock.
It is located at a timing which is half the cycle of the pseudo horizontal synchronization signal D, and does not overlap with the pseudo horizontal synchronization signal D. A pulse satisfying such a condition is suitable as a timing signal used for video signal processing. Therefore, the pulse generation circuit 50 outputs this pulse as a pseudo vertical synchronization signal G to a processing circuit at a subsequent stage.

The operation of the synchronizing signal generating circuit of the video signal processing device having such a configuration will be described with reference to the waveform example of FIG. In FIG. 2, (a) is a waveform example of the synchronization signal B separated from the composite video signal A, and particularly relates to a vertical synchronization signal and an equivalent pulse portion. (B) is a triangular wave signal C generated by automatic frequency control for this. As described above, the first
Is set at substantially the center between the upper limit and the lower limit of the value of the triangular wave signal C. Therefore, the pseudo horizontal synchronizing signal D generated by the pulse generation circuit 3 has the pulse substantially at the center of the right-upward inclined portion of the triangular wave signal C. To position. (C) shows this triangular wave signal C.

On the other hand, since the second threshold value in the pulse generation circuit 50 is set to a value close to the upper limit or the lower limit of the value of the triangular wave signal C, the signal F generated by the pulse generation circuit 50 Occurs at both the upper and lower limits of signal C. In other words, the pulse is located at the end of the upward-sloping (positive) inclined portion and at the end of the downward-sloping (negative) inclined portion. (D) shows this signal F. As is clear from the waveform example, the period of the signal F is the pseudo horizontal synchronization signal D.
And they do not overlap.

On the other hand, (e) shows a raw vertical synchronizing signal E generated by charging and discharging in the pulse generating circuit 4. This remains generated from the synchronization signal B, and the synchronization relationship with the pseudo horizontal synchronization signal D is not always good. On the other hand, the vertical synchronizing signal E
Are synchronized with the signal F to generate a pseudo vertical synchronization signal G. (F) shows the pseudo vertical synchronizing signal G. As is apparent from this waveform example, the pulse end of the pseudo vertical synchronizing signal G does not overlap the pulse of the pseudo horizontal synchronizing signal D.

[0024]

As can be understood from the above description, in the synchronizing signal generating circuit of the video signal processing apparatus according to the present invention, the automatic frequency for outputting a triangular wave signal that follows the horizontal synchronizing signal from the composite video signal. A control circuit, a first pulse generation circuit that generates a pulse of the pseudo horizontal synchronization signal at a timing when the positive or negative slope portion of the triangular wave signal matches the first threshold value, and a vertical synchronization signal from the composite video signal. A second pulse generation circuit that generates a pulse of a pseudo vertical synchronization signal that starts and ends at a timing at which the positive and negative slope portions of the triangular wave signal and the second threshold value coincide with each other, The first threshold and the second threshold are different.
Thus, there is an effect that a pseudo vertical synchronizing signal synchronized with the pseudo horizontal synchronizing signal and whose phase difference is accurately maintained can be generated by a simple circuit.

[Brief description of the drawings]

FIG. 1 is an embodiment of a synchronizing signal generation circuit of a video signal processing device having a configuration according to the present invention.

FIG. 2 is a waveform example of the signal.

FIG. 3 is an example of a synchronization signal generation circuit of a conventional video signal processing device.

[Explanation of symbols]

 1 Synchronous signal separation circuit 2 Automatic frequency control circuit (AFC) 3, 4, 50 Pulse generation circuit

──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-51-828 (JP, A) JP-A-59-92676 (JP, A) JP-A-4-57479 (JP, A) JP-A 63-92 254867 (JP, A) JP-A-62-81174 (JP, A) JP-A-57-190480 (JP, A) JP-A-2-143777 (JP, A) JP-A-63-250282 (JP, A) (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N ^5/ 04-5/12

Claims (1)

(57) [Claims] A video signal processing apparatus for performing processing such as recording and reproduction on a composite video signal including a synchronization signal such as a horizontal synchronization signal, and inputs a horizontal synchronization signal or a synchronization signal separated from the composite video signal to the video signal processing apparatus. An automatic frequency control circuit for outputting a phase-triggered triangular wave signal; and a first generating a pseudo horizontal synchronizing signal pulse at a timing when a positive or negative slope portion of the received triangular wave signal matches a predetermined first threshold value. And a pulse generator circuit for inputting a vertical synchronizing signal separated from the composite video signal, and comparing a positive and negative slope portion of the triangular wave signal with a predetermined second threshold value as a pulse corresponding thereto. And a second pulse generating circuit for generating a pulse of the pseudo vertical synchronizing signal which starts and ends by the pseudo horizontal synchronizing signal. Synchronizing signal generating circuit of the video signal processing apparatus according to claim wherein the first threshold and the second threshold value are different enough not overlapping the signal of the pulse.