JP3053493B2 - Learning type video signal time axis correction device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time axis error correction device for correcting a signal fluctuation error accompanied by a time axis fluctuation.

[0002]

2. Description of the Related Art FIG. 28 is a block diagram showing the configuration of a conventional video signal time axis correction device (hereinafter abbreviated as TBC). In FIG. 28, reference numeral 1 denotes a CCD circuit as a variable delay circuit;
Reference numeral 2 denotes a synchronization separation circuit connected to the CCD circuit 1. Reference numeral 3 denotes a crystal oscillator serving as a reference clock of the TBC circuit. Reference numeral 4 denotes a reference signal generation circuit connected to the crystal oscillator 3. Reference numeral 5 denotes a synchronization separation circuit 2 and reference signal generation. A phase comparison circuit 6 connected to the circuit 4 and a V comparison circuit 6 connected to the phase comparison circuit 5 and the CCD circuit 1
CO.

FIG. 29 is a block diagram showing the configuration of another conventional TBC circuit. In FIG. 29, reference numeral 7 denotes a color burst extraction circuit, and 8 denotes a phase comparison circuit connected to the color burst extraction circuit 7 and the reference signal generation circuit 4. The circuit 9 is a motor drive circuit.

FIG. 30 is a block diagram showing the configuration of another conventional TBC circuit. In FIG. 30, reference numeral 10 denotes a compensation circuit connected to a burst phase comparison circuit 8, and 11 denotes a CCD circuit 1
Is a phase modulation circuit connected to the CCD circuit 1, the synchronization separation circuit 2 and the burst phase comparison circuit 8.

FIG. 31 is a block diagram showing the configuration of another conventional TBC circuit. In FIG. 31, reference numeral 13 denotes a variable delay circuit connected to the horizontal phase error detection circuit 5, and reference numeral 14 denotes a variable delay circuit connected to the variable delay circuit 13. A variable delay circuit, 15 is a synchronization / burst removal circuit connected to the variable delay circuit 14, 16 is a synchronization / burst shaping circuit connected to the synchronization / burst removal circuit 15, 17 is a synchronization / burst removal circuit 15 and synchronization / burst. An output amplifier circuit connected to the shaping circuit 16.

Next, the operation will be described. The video input signal with a time axis error is supplied to the sync separation circuit 2 via the CCD circuit 1. The reference signal generation circuit 4 divides the reference clock of the crystal oscillator 3 by an appropriate number to generate a reference H whose frequency is the same as the horizontal synchronization signal in the video signal format. The synchronization separation circuit 2 separates a horizontal synchronization signal from the video signal supplied from the CCD circuit 1 and supplies the horizontal synchronization signal to the phase comparison circuit 5. The phase comparison circuit 5 compares the phase of the horizontal synchronization signal supplied from the synchronization separation circuit 2 with the reference H supplied from the reference signal generation circuit 4 to detect a phase error voltage e _H as a time axis variation of the input video signal. I do. CCD in VCO6
A clock for operating the circuit 1 is generated, and a signal for voltage control includes a phase error signal e output from the phase comparison circuit 5.
The operation of the CCD circuit 1 is controlled by using _H.
The CCD circuit 1 controls the delay time using the clock supplied from the VCO 6 to suppress the time axis fluctuation and output the video signal.

[0007] The video signal output from the CCD circuit 1 is supplied to a color burst extraction circuit 7. The reference signal generating circuit 4 frequency by appropriately frequency division of the reference clock of the crystal oscillator 3 to generate a reference SC is identical to the color burst signal of the video signal format. The color burst extraction circuit 7 extracts a color burst signal from the video signal supplied from the CCD circuit 1 and supplies the color burst signal to the phase comparison circuit 8. The phase comparison circuit 8 compares the phase of the burst signal supplied from the color burst extraction circuit 7 with the reference SC supplied from the reference signal generation circuit 4 to detect a phase error voltage e _SC as a time axis variation of the input video signal. I do. The VCO 6 uses a signal obtained by adding the phase error signal e _H output from the phase comparison circuit 5 and the phase error signal e _SC output from the phase comparison circuit 8 for voltage control. The motor drive circuit 9 performs motor drive control using a signal obtained by adding the phase error signal e _H and the phase error signal e _SC .

The compensating circuit 10 amplifies the phase error signal e _SC supplied from the phase comparing circuit 8, and the compensating circuit 11 outputs the phase error signal e _H output from the phase comparing circuit 5 and the output of the compensating circuit 10. The signal obtained by adding the phase error signal e _SC 'is amplified and supplied to the CCD circuit. Phase modulation circuit 12
Then, the amount of phase shift of the video signal supplied from the CCD circuit 1 is changed by the phase error signal e _SC supplied from the phase comparison circuit 8 to feed-forward correct high frequency time axis fluctuation.

A video signal with a time axis error is applied to a variable delay circuit 13. In the variable delay circuit 14, the speed error signal e _V generated when the frequency component of the time axis error is relatively high.
And the phase error signal e _SC supplied from the phase comparison circuit 8 is delayed by the added signal. Since the variable delay circuit 14 has a narrow variable range, the reference signal H, which is an input signal, is shifted by the phase error signal e _SC supplied from the phase comparison circuit 8 in the phase modulation circuit 12 so that the variable delay circuit 14 always operates near the center of the variable range. The phase amount is adjusted and supplied to the phase comparison circuit 5. The synchronization / burst removal circuit 15 removes a synchronization signal and a color burst signal from the video signal supplied from the variable delay circuit 14. The synchronization / burst shaping circuit 16 shapes the synchronization / burst signal supplied from the synchronization / burst removal circuit 15 based on the reference SC. The output amplifier 17 outputs a video signal from the video signal supplied from the synchronization / burst removal circuit 15 and the synchronization / burst signal supplied from the synchronization / burst shaping circuit 16.

[0010]

SUMMARY OF THE INVENTION Conventional analog TB
Since the C circuit is configured as described above and has a negative feedback loop with a delay inside the circuit, there is a problem that it is difficult to obtain a stable suppression characteristic.

A video signal time axis correction apparatus that does not use a large-scale image memory can be configured at a very low cost as compared with a system that uses a large-scale image memory. Since a closed loop is formed by the phase error compared with the reference signal, the control band of the closed loop is limited by the sampling frequency of the horizontal synchronizing signal, and there is a problem that it is not possible to take a large suppression gain for time axis fluctuation. Was.

In particular, in a video signal recording device (VTR or video disk), the video signal time is required in the rotation period of the rotary motor and an integral multiple of the rotation period necessary to increase the relative speed of the recording medium or the recording / reproducing head. An axis fluctuation occurs, and it is necessary to secure as much servo gain of the closed loop as possible at the rotation cycle and an integer multiple thereof.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a learning-type video signal time axis correction apparatus capable of obtaining a stable suppression characteristic.

[0014]

According to a first aspect of the present invention, there is provided a time axis correcting apparatus for storing a time axis error of a video signal obtained from a horizontal synchronizing signal included in a video signal of one cycle before in a memory for one cycle. And controls the amount of delay of the variable delay circuit based on a signal obtained by positively feeding back the output of the memory.

A time axis correcting apparatus according to a second aspect of the present invention compares a horizontal synchronizing signal and a color burst signal included in a video signal one cycle before with each reference signal, and adds each of them to a video signal. The signal time axis error is stored in a memory for one cycle, and the delay amount of the variable delay circuit is controlled based on a signal obtained by positively feeding back the output of the memory.

A time axis correcting apparatus according to a third aspect of the present invention compares a horizontal synchronizing signal and a color burst signal included in a video signal one cycle before with each reference signal, and adds a video signal obtained by adding each of them. The signal time axis error is stored in a memory for one cycle, and the low frequency component of the signal obtained by positively feeding back the output of the memory is transferred to a motor control circuit for rotating a recording medium or a recording / reproducing head on which the video signal is recorded. The component is controlled as a delay amount of the variable delay circuit.

According to a fourth aspect of the present invention, there is provided a time axis correcting apparatus for storing a video signal time axis error in a memory for one cycle, and delaying a variable delay circuit based on a signal obtained by positively feeding back the output of the memory. When controlling the amount, the correlation of each periodic component is detected by comparing before and after the memory, and if the correlation is strong, the positive feedback amount is increased, and if the correlation is weak, the positive feedback amount is reduced. It was done.

According to a fifth aspect of the present invention, there is provided a time axis correcting apparatus for storing a time axis error of a video signal in a memory for one cycle, and delaying a variable delay circuit based on a signal obtained by positively feeding back the output of the memory. When controlling the amount, the input signal to the memory is configured so that the DC component is removed by a high-pass circuit, so that only the AC component is learned.

A time axis correcting apparatus according to a sixth aspect of the present invention converts the time axis error of the video signal from analog to digital, delays it by a constant feedback by a shift register, and converts the output of the shift register from digital to analog. When the delay amount of the variable delay circuit is controlled based on the positive feedback signal, the bit shift of the shift register is performed by the clock from the encoder of the motor.

A time axis correcting apparatus according to a seventh aspect of the present invention stores a time axis error of a video signal in a memory for one cycle, and delays a variable delay circuit based on a signal obtained by positively feeding back the output of the memory. When controlling the amount, the switch is turned on when the output signal from the memory is synchronized with the reference phase or reaches a predetermined speed by the motor for rotating the information recording medium or the recording / reproducing head via the switch circuit or the attenuator. Or the attenuator gain is increased.

According to an eighth aspect of the present invention, there is provided a time axis correcting apparatus for removing a direct current component of a video signal time axis error by a high-pass filter, then performing an analog-to-digital conversion, performing a constant feedback delay using a memory, and then performing the above-described memory operation. When digital-to-analog conversion of the output is performed and the delay amount of the variable delay circuit is controlled based on the signal that is positively fed back, the accuracy of the analog-to-digital converter and the digital-to-analog converter is increased by increasing the central portion of the entire dynamic range. The periphery is reduced.

According to a ninth aspect of the present invention, there is provided a time axis correcting apparatus for delaying a video signal time axis error by a constant feedback delay using a memory, and adjusting a delay amount of a variable delay circuit based on a signal obtained by positively feeding back the output of the memory. At the time of control, the bit shift of the above memory is performed by the clock from the motor encoder by PLL.
This is performed by a clock multiplied by a circuit.

[0023]

In the operation of the first invention, the time axis error is learned via the memory, and the periodic component of the time axis fluctuation one cycle before is learned and added to the time axis error of the current cycle. The time axis error of the periodicity can be greatly suppressed without increasing the frequency band of the loop to be fed back.

The operation of the second invention is that the time axis error obtained from the color burst signal is passed through a memory, so that the periodic component of the time axis fluctuation one cycle before is learned and added to the time axis error of the next cycle. Therefore, without increasing the frequency band of the loop that feeds back the time axis error,
By greatly suppressing the phase fluctuation of the periodicity in the color burst signal, it is possible to extremely reduce color unevenness in the reproduced signal.

The operation of the third invention is that the time axis error is learned via the memory, and the periodic component of the time axis fluctuation one cycle before is learned, and the high frequency component is calculated based on the output added to the time axis error of the current cycle. To the variable delay circuit, the low frequency is fed back to the rotary motor, so that the control amount can be within the dynamic range without excessively increasing the delay amount of the variable delay circuit, that is, the dynamic range. Periodic uneven rotation of the motor can also be suppressed.

The operation of the fourth invention is to detect the periodicity of the input video signal and perform a learning operation when the input video signal has the periodicity. As in the case of a disk recorder, it is possible to arbitrarily handle not only a case in which a time-axis variation due to a rotation cycle is included but also a video signal which does not include a periodic time-axis variation.

The operation of the fifth invention is that, when the time axis error is learned via the memory, the periodic component of the time axis fluctuation one cycle before is learned and added to the time axis error of the current cycle. Input to the memory through a filter that does not exist, so that the DC component is not circulated in the positive feedback loop including the learning memory, thereby preventing circuit drift and accumulation of quantization error of the digital signal and allowing the learning operation to operate normally. It became possible.

According to the sixth aspect of the invention, the learning memory is composed of a shift register, and the bit shift of the shift register is obtained from the encoder of the rotary motor, so that the periodicity can be learned with a very simple configuration. It became possible to realize it at low cost.

The operation of the seventh invention is that a positive feedback loop including a learning memory has a switch circuit or a variable gain attenuator, and after the reproduced video signal in the recording / reproducing circuit has been output normally, the switch is turned on or off. By making the variable attenuator gain close to 1, the learning operation is performed without impairing the rising characteristic of the time axis correction loop.

The operation of the eighth invention is as follows. The video signal time axis error is subjected to analog-digital conversion after removing the DC component by a high-pass filter, and after a constant feedback delay by a memory, the output of the memory is converted to a digital-analog conversion. When controlling the delay amount of the variable delay circuit based on the positive feedback signal, the accuracy of the analog-to-digital converter and the digital-to-analog converter is increased by increasing the central portion of the entire dynamic range and decreasing the peripheral portion. The learning accuracy during normal operation is increased, and the learning ability is improved.

The operation of the ninth invention is that the video signal time axis error is delayed by a constant feedback by a memory and the delay amount of the variable delay circuit is controlled based on a signal obtained by positively feeding back the output of the memory. Since the bit shift is performed using a clock obtained by multiplying the clock from the encoder of the motor by the PLL circuit, the learning accuracy in the time axis direction is thereby improved.

[0032]

[Embodiment 1] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a learning type TBC circuit according to a first embodiment of the present invention. In the drawing, reference numeral 18 denotes an analog-to-digital converter (hereinafter, A / D converter).
A learning memory 19 connected to the A / D converter 18, a learning loop stabilizing filter 20 connected to the learning memory 19, and a digital-analog converter 21 connected to the learning stabilizing filter 20 (referred to as a converter). Hereinafter, referred to as a D / A converter). FIG. 2 is a diagram showing a control stability condition of the learning compensator in the learning TBC circuit according to one embodiment of the present invention. FIG. 3 is a diagram showing the frequency characteristics of the learning compensator in the learning TBC circuit according to one embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a learning TBC circuit according to a second embodiment of the first invention of the present invention. In the above embodiment, the learning loop is inserted into the line of the error output of the synchronization signal in the TBC circuit configured to feed back only the phase error of the synchronization signal. However, the feedback is performed by adding the phase errors of both the synchronization signal and the color burst signal. In the TBC circuit having such a configuration, a learning loop may be inserted only into the phase error output line of the synchronization signal.

FIG. 5 is a block diagram showing a configuration of a learning type TBC circuit according to a third embodiment of the first invention of the present invention. In the second embodiment, a TBC having a configuration in which the phase error between the synchronization signal and the color burst signal is added and fed back
Although the learning loop is inserted into the phase error output line of the synchronization signal in the circuit, the learning loop may be inserted only into the phase error output line of the synchronization signal in a TBC circuit configured to feed forward the phase error of the color burst signal. .

FIG. 6 is a block diagram showing a configuration of a learning type TBC circuit according to a fourth embodiment of the first invention of the present invention.
In TBC circuit configuration using a phase error both synchronous signal and color burst signal may be inserted learning loop only in the phase error output lines of the color burst signal.

FIG. 7 shows a fifth embodiment of the first invention of the present invention, and is a diagram showing an algorithm of a learning-type TBC when performing a learning operation on a microcomputer.

FIG. 8 is a block diagram showing a configuration of a learning type TBC circuit according to the first embodiment of the second invention of the present invention, in which a phase error of both a synchronization signal and a color burst signal is added and fed back. Is configured to insert a learning loop into a line to be fed back.

FIG. 9 is a block diagram showing a configuration of a learning type TBC circuit according to a second embodiment of the second invention of the present invention. In the first embodiment, a T signal having a configuration in which the phase error signal between the synchronization signal and the color burst signal is added and fed back.
In the BC circuit, a learning loop is inserted in the feedback line. In the TBC circuit configured to feed forward the phase error of the color burst signal, a learning loop is added to a line for adding the phase error of the synchronization signal and the color burst signal and feeding back the error. May be inserted.

FIG. 10 is a block diagram showing a configuration of a learning type TBC circuit according to an embodiment of the third invention of the present invention.
When the feedback is performed by adding the phase error between the synchronization signal and the color burst signal, a learning loop is inserted into the EE system line in the TBC circuit configured to feed back also to the motor.

FIG. 11 is a block diagram showing the configuration of a learning type TBC circuit according to the first embodiment of the fourth invention of the present invention. In the drawing, reference numeral 22 denotes a correlation detector, and 23 denotes a correlation detector. An absolute value circuit, 24 is a low-pass filter connected to the absolute value circuit 23, and 25 is a variable gain amplifier connected to the low-pass filter 24.

FIG. 12 is a block diagram showing a configuration of a learning type TBC circuit according to a second embodiment of the fourth invention of the present invention. In the first embodiment, in the TBC circuit configured to feed back the phase error of the synchronization signal, a learning loop is inserted into the phase error output line. However, the phase error signal of both the synchronization signal and the color burst signal is added and fed back. In the TBC circuit configured to feed forward only the phase error of the color burst signal, a learning loop is inserted into a line for feeding back the added phase error.

FIG. 13 is a block diagram showing the configuration of the learning type TBC circuit according to the first embodiment of the fifth invention of the present invention.
6 and 27 are high-pass filters.

FIG. 14 is a block diagram showing a configuration of a learning type TBC circuit according to a second embodiment of the fifth invention of the present invention. TB configured to feed back to the motor
In the C circuit, a learning loop may be inserted into the feedback line of the EE system.

FIG. 15 is a block diagram showing a configuration of a learning type TBC circuit according to a third embodiment of the fifth invention of the present invention. In the TBC circuit configured to feed forward only the phase error of a signal, the learning loop of the fourth invention is inserted into the feedback line, and the fifth invention is further combined.

FIG. 17 is a block diagram showing the configuration of a learning type TBC circuit according to a first embodiment of the sixth invention of the present invention. TB configured to feed back to the motor
A motor encoder is connected to the learning memory 19 of the C circuit.

FIG. 18 is a diagram showing a configuration of a learning memory in a learning type TBC circuit according to an embodiment of the sixth invention of the present invention. Reference numerals 28, 29, 30, and 31 denote shift registers.

FIG. 19 is a configuration diagram of a shift register in a learning memory of a learning type TBC circuit according to an embodiment of the sixth invention of the present invention.

FIG. 20 is a block diagram showing the configuration of a learning type TBC circuit according to a second embodiment of the sixth invention of the present invention. TB that feeds back only the phase error of the color burst signal to the motor and feeds forward only the phase error of the color burst signal
In the C circuit, the learning loop according to the fourth invention is inserted into the added phase error signal line, and the sixth invention is further combined.

FIG. 21 is a block diagram showing a configuration of a learning type TBC circuit according to a third embodiment of the sixth invention. In the second embodiment, the feedback to the motor is only the phase error of the synchronization signal. However, a configuration may be used in which the added phase error signal is fed back to the motor.

FIG. 22 is a block diagram showing a configuration of a learning type TBC circuit according to a fourth embodiment of the sixth invention of the present invention. to the configuration implemented by combining the fourth invention and the fifth invention in the TBC circuit configured to feed back to the motor only the phase error of the phase error only feedforward synchronization signal of the signal, configurations and further combining the sixth invention Has become.

FIG. 16 is a block diagram showing a configuration of a learning type TBC circuit according to a fifth embodiment of the sixth invention of the present invention. TBC with feedback to
The circuit is a configuration obtained by further combining the sixth invention with the configuration implemented by combining the fourth and fifth inventions.

FIG. 23 is a configuration diagram of a learning memory in the learning type TBC circuit of FIG. 16, and 32 and 33 are capacitors.

FIG. 24 is a block diagram showing a configuration of a learning type TBC circuit according to the first embodiment of the seventh invention of the present invention, and 34 is a variable gain attenuator.

FIG. 25 is a block diagram showing a configuration of a learning type TBC circuit according to a second embodiment of the seventh invention of the present invention, and 35 is a switching circuit.

FIG. 26 shows an A / D converter and a D in a learning type TBC circuit according to an eighth embodiment of the present invention.
FIG. 4 is a diagram illustrating conversion accuracy of the / A converter.

FIG. 27 is a block diagram showing a configuration of a learning type TBC circuit according to an embodiment of the ninth invention of the present invention, and 36 is a PLL circuit.

Next, the operation will be described. FIG. 1 shows an example in which a learning control loop is inserted in a general TBC circuit. In FIG. 1, a horizontal synchronizing signal of a video signal passing through a CCD circuit 1 is separated and compared with a reference clock to obtain a synchronizing signal. Time axis fluctuation is detected. General TB
In the C circuit, VC
The time axis correction is performed by adjusting the oscillation frequency of O and controlling the amount of delay of the CCD.

However, since this is a closed loop system, the time axis fluctuation can be corrected only up to the control band of the closed loop, and the suppression rate of the time axis fluctuation due to the open loop gain at each frequency in the control band. Will be fixed. However, time axis fluctuation included in a reproduced video signal of a video signal recording device such as a general video disk recorder or a VTR has a strong correlation with the rotation period of the disk or the rotation of the drum. This is because the time axis fluctuation of the reproduced video signal is mainly caused by the eccentricity of the disk, the uneven rotation of the disk motor, and the uneven rotation of the drum motor.

Therefore, the time axis fluctuation is learned in the memory 19 for one rotation of the disk or one rotation of the drum, and the learned time axis fluctuation is continuously added to the time axis fluctuation suppression loop in a feedforward manner. The suppression rate can be improved irrespective of the open loop gain of the time axis fluctuation suppression loop. Therefore, the eccentricity of the disk and the rotation fluctuation of the motor are stored in the memory.

At this time, there is a method of learning only once at the first time. However, since it is possible to change the system in the middle of the operation or change the shape of the eccentricity and the shape of the motor wow and flutter, the A / D converter is always used. There is a method of increasing the accuracy by inputting the time axis fluctuation amount from 18 and updating the contents of the memory.

By configuring the cyclic loop including the memory in this manner, the learning content in the learning control is updated even if the periodicity of the time axis fluctuation gradually changes, so that the effect of the learning control can be maintained. Further, in the learning control theory, it is necessary to satisfy the stability condition of the learning control shown in FIG. This requires that the Nyquist diagram of the control system from which the cyclic loop including the learning memory 19 is removed does not step into the unstable region of the learning control in FIG.

At this time, in a circle centered on (−1, 0) in the Nyquist diagram representing the stable region, the radius of the circle is represented by the open loop gain of the recurring loop including the memory, In order to reduce the radius of the circle representing the unstable region, a filter 20 exhibiting a low-pass filter characteristic is inserted in a recursive loop including a memory to stabilize the learning control system.

The stabilizing filter is inserted in series with the learning memory. At this time, the order of the stabilizing filter and the learning memory may be switched.
The effect of improving the deviation suppression rate by applying the learning control is determined by the gain of the stabilizing filter. The suppression rate increases as the open loop gain of the recurring loop including the learning memory in FIG. . For example, if the open loop gain of the above-described cyclic loop is 0.9
Then, since 1-0.9 = 0.1, about 20 dB
There is an improvement effect.

The actual TBC circuit does not apply the time base correction only from the synchronization signal as shown in FIG. 4, but extracts the color burst signal and sets a more accurate time so that the phase error from the reference burst signal is eliminated. By applying axis correction, color unevenness and the like of the video signal are removed. In this case, similarly, by inserting a cyclic memory including the learning memory into the output of the phase comparator 5 of the synchronization signal, the periodic time axis fluctuation included in the synchronization signal can be compared with a conventional method using a simple feedback. Can be greatly improved.

Also, as shown in FIG. 5, by inserting the above-mentioned cyclic loop into the output obtained by comparing the phases of the color burst signals,
It is possible to improve the suppression rate of the periodic component in the color burst phase variation. At this time, the time-axis fluctuation obtained from the color burst signal has a smaller dynamic range for a large time-axis fluctuation than the time-axis fluctuation obtained from the synchronization signal, but can also detect a high-frequency time-axis fluctuation. On the other hand, in the conventional feedback method, the suppression gain on the high frequency side is reduced due to the limitation by the control band in the suppression of the time axis fluctuation. On the other hand, in this method, a large suppression gain on the high frequency side can be secured. In a system having a large time axis variation, the suppression rate of a large time axis variation can be improved by employing the system shown in FIG.

As described above, it is possible to suppress a wide-band time-axis variation. However, in a video disk recorder or the like, a delay circuit as shown in FIG. 13 and another delay circuit 14 is provided, and by controlling the second delay circuit 14 in a feedforward manner based on the burst phase error signal,
There is a system that absorbs even small time axis fluctuations. Even in this case, if the time axis fluctuation amount in the input video signal is large,
The amount of residual deviation suppressed by the feedback loop increases.

At this time, in the above-mentioned feed forward control system, since it does not rely on feed forward,
Due to various estimation errors, time axis fluctuation cannot be completely suppressed. In particular, as the time axis fluctuation of the video signal input to the feedforward control system increases, the suppression error due to the feedforward increases. In order to prevent this, it is important to increase the deviation suppression ratio of the feedback system at the preceding stage of the feedforward system. As shown in FIG. 6, the learning control system is inserted after the burst phase comparator, and the feedback control is performed. It is effective to increase the deviation suppression rate of the system.

Also, as shown in FIG. 8, the learning control system is configured to output the error signal of the time axis fluctuation obtained by adding the output of the burst phase comparator and the output of the synchronization signal phase comparator.
It is possible to suppress a time axis fluctuation of a video signal having a periodic component from a time axis fluctuation from a low frequency to a high frequency.

Furthermore, by inserting a compensating circuit 10 for frequency separation into the output of the burst phase comparator of FIG. 8, for example, as shown in FIG. Add the output and correct the time axis fluctuation in the feedback loop including learning control,
There is also a method in which learning control is inserted only for a low-frequency, relatively periodic, time-axis fluctuation component by using the output of the burst phase comparator, which is not subjected to the filtering process, as it is for feedforward correction.

The learning control system as described above can also be configured by using software in an arithmetic element such as a microcomputer or a DSP (digital signal processor). FIG. 7 is a flowchart when the learning control system is configured by software, in which the input time axis fluctuation amount is output via an adder. At this time, the output of the adder is stored in a memory for one cycle, filtered, and then added by the original adder. Naturally, even with such a software configuration, it is possible to obtain the same effect as that of a configuration using an analog circuit or a digital circuit.

Up to this point, the method of removing the time axis fluctuation by only the signal processing circuit has been described. However, in a general video information recording / reproducing apparatus, a recording medium is rotated by a motor, or a recording / reproducing head is used. It is common to scan. At this time, it is general to control the rotation of the motor so that the time axis fluctuation of the reproduced video signal is constant and the time axis fluctuation is eliminated to some extent.

When the TBC system including the above-described learning control system is combined with a system for controlling rotation fluctuation of the motor, the learning control system has a reduced stability margin as shown in FIG. Therefore, for example, as shown in FIG. 10, in the case of a system configuration in which the stability margin in the motor control system is not desired to be degraded, the time axis fluctuation error signal is branched to the motor drive 9 system and the CCD 1 side, and then the learning memory 19 is operated. CC loop
Insert before the VCO 6 to drive D1 and TBC
This learning control can be operated only in the feedback loop of.

Further, learning control is inserted into both the motor control system and the TBC control system to change from a very low frequency time axis fluctuation due to the motor control to a high frequency time axis fluctuation due to the burst signal phase comparison. When the learning control is operated in a wide band and it is desired to improve the suppression effect on the periodicity component more than the suppression of the deviation by a simple feedback loop, as shown in FIG. Can be realized by inserting In this case, it is necessary that the Nyquist diagram of the motor control system does not fall into the unstable region in FIG.

As described above, a method has been described in which the deviation suppression rate can be improved by inserting the learning control system even in the case where the motor control system is included. This is performed only when the video signal contains many periodic time-axis fluctuation components. However, a general video signal necessarily includes not only a video signal from a recording / reproducing apparatus by disk rotation or reproduction head scanning but also an on-air signal. In this on-air received video signal, there may be more random time axis fluctuations rather than periodic time axis fluctuations.

In this case, the periodicity of the time axis fluctuation included in the video signal is detected, and the learning control is operated only when there is periodicity, and when there is no periodicity, the open loop gain in the cyclic loop of the learning control system is obtained. It is possible to respond adaptively by lowering. Figure 12 is a block diagram of a TBC circuit including an adaptive learning control therefor, comparing before and after drawing the learning memory 19 in differential amplifier, by taking the absolute value, detecting the periodicity of the time base fluctuation I do. In other words, before and after the learning memory represent the current time axis fluctuation and the time axis fluctuation one cycle before, the absolute value of the difference indicates the periodicity of the time axis fluctuation.

Here, the periodicity of the time-axis fluctuation is removed by a low-pass filter 24 to remove high-frequency components. For example, the periodicity of the time-axis fluctuation in several cycles is averaged, and the output of the low-pass filter 24 is inverted by a variable gain amplifier. By changing the gain, when the periodicity is strong, the output of the absolute value circuit approaches zero, and as a result, the inversion of the output of the low-pass filter approaches 1, and the gain of the variable gain amplifier approaches 1 so that the learning memory is reduced. , The open loop gain of the recurring loop approaches 1, and the learning control operates.

When the periodicity of the time axis fluctuation is small, the output of the absolute value circuit 23 increases, and the signal obtained by inverting the output of the low-pass filter 24 approaches zero. As a result, the open loop gain of the cyclic loop including the learning memory 19 decreases, and the learning control does not operate much.

When the learning control system is applied to the TBC circuit as described above, a difference occurs in the learning accuracy depending on the number of bits of the D / A converter 21 or the A / D converter 18 used in the learning control system, or the detection is not performed. If the DC offset is included in the time axis fluctuation, a problem of the dynamic range occurs. Therefore, as shown in FIG.
In the recursive loop including
By inserting 27 and removing the DC component, it becomes possible to always bring the time axis fluctuation amount learned before and after the learning memory to the center of the dynamic range.

The DC component removal in the learning loop can also be applied to a TBC system used in combination with a motor control system. For example, in FIG. 14, a DC component is removed only for time axis correction in a signal processing circuit, and a dynamic range is always secured. Learning control in a state where it can
It is inserted in the C circuit.

Similarly, as shown in FIG. 15, in the adaptive learning control system having a variable gain amplifier in the learning loop, the dynamic range of the learning memory 19 is increased by removing the DC component. In addition to always ensuring the maximum, periodicity detection is performed without including a DC component, so that periodicity detection accuracy can be increased.

As shown in FIG. 16, a method for switching between the motor control shown in FIG. 14 and the adaptive learning control shown in FIG. 15 is combined to correct the time axis fluctuation in the DC to low frequency region by the motor control, and the TBC circuit. It is also possible to apply adaptive learning control to both the correction of the time axis fluctuations in the high frequency region by.

Here, if the bit shift of the learning memory is performed according to the rotation angle information of the motor as shown in FIG. 20, not only in the case of CAV (constant angular speed rotation) where the rotation speed of the motor is always constant, but also in the case of the disk, Even if the rotational speed of the motor constantly changes, such as CLV (constant linear speed rotation) in which the linear velocity of the written information is constant, the rotational fluctuation of the motor (torque ripple, etc.) and the eccentricity of the disk may occur. The learning control can be applied in the time axis fluctuation correction of the reproduced video signal caused by this.

Further, as shown in FIG. 22, by passing a high-pass filter for removing a DC component in the learning loop of FIG. 20, a signal can always be brought to the center with respect to the dynamic range of the learning control loop.

Here, as shown in FIG. 27, if the rotation angle signal pulse obtained from the motor encoder is multiplied by the PLL circuit 36 and the bit shift of the learning memory is performed,
Improves the resolution in the time axis direction in one rotation of the motor, for example, even if the number of teeth of the motor encoder is small,
The above resolution can be secured.

Of course, even when the learning control system is applied to the time axis correction method including the motor control system as shown in FIG. 21, if the bit shift of the memory is performed based on the motor rotation angle information as in FIG. Learning control can be applied to the rotation of the motor.

As described above, the cyclic loop including the learning memory can be configured by software, but can be configured at low cost by using hardware of a digital circuit. FIG. 18 is a block diagram showing a hardware configuration for this purpose. When a TBC error, that is, a time-axis fluctuation detection amount is input, when outputting as a TBC error via an analog operational amplifier or the like, a TBC error output is input by an A / D converter. Then, the data is input to the shift register circuits 28, 29, 30, and 31.

In this shift register, bit shift is sequentially performed by a pulse indicating a rotation angle signal from a motor encoder.
Time axis fluctuation is stored for each bit for each rotation. The stored time axis fluctuation is delayed by the shift register for a time corresponding to one rotation of the motor, converted into an analog signal by a D / A converter, and then passed through an analog filter including an operational amplifier. Is added to the TBC error.

At this time, the D / A converter can be constituted by a resistor array or the like, and the number of shift registers is set according to the number of bits of the A / D converter. This shift register can be realized by, for example, a configuration in which flip-flop circuits as shown in FIG. Further, even if the number of bits of the A / D converter is small, FIG.
By increasing the bit precision in the vicinity of the dynamic range center as described above, the precision can be improved in a range in which the time-axis variation generally learned is used.

Further, since the signal is always brought near the center with respect to the dynamic range of the learning control loop, it is possible to effectively use the dynamic range by removing the DC component by the capacitors 32 and 33.

TBC including learning control loop as described above
When the circuit is operated, the gain of the variable gain attenuator 34 is gradually increased from the start of the TBC operation as shown in FIG.
The pull-in operation in the closed loop of the C circuit can be performed smoothly.

By providing the switch circuit 35 in FIG. 25, first, after the closed loop in the TBC circuit is pulled in, the switch circuit 35 is turned on so that the learning control loop does not affect the pull-in of the TBC circuit. You can do so.

[0092]

As described above, according to the present invention, the periodic component contained in the time axis fluctuation of the video signal is obtained from the synchronizing signal, this is learned, and the periodic residual deviation is removed. Therefore, there is an effect that an image with little time axis fluctuation can be obtained.

According to the second aspect of the present invention, the periodic component included in the time axis fluctuation amount of the video signal is obtained from the synchronization signal and the color burst signal, and this is learned to remove the periodic residual deviation. There is an effect that an image with stable color reproduction can be obtained.

According to the third aspect of the present invention, the periodic component included in the time axis fluctuation amount of the video signal is learned, and the signal processing system is composed of the high frequency component, the rotation control system is composed of the low frequency component, and the periodic residual deviation is reduced. The removal is effective in obtaining a stable image with less rotation unevenness.

According to the fourth aspect, the learning operation is adaptively performed depending on the presence or absence of the periodicity of the video signal, so that the video signal which does not include the periodic time axis fluctuation can be handled, and the time axis fluctuation can be handled. This has the effect of obtaining an image with less noise.

According to the fifth aspect, when learning the periodic component included in the time axis fluctuation amount of the video signal, only the AC component is learned and a stable learning operation is always performed. This has the effect of obtaining a stable image with less noise.

According to the sixth aspect, the memory in the learning device for learning the periodic component included in the time axis fluctuation amount of the video signal is constituted by the shift register, and the operation clock is obtained from the motor encoder. There is an effect that the apparatus can be made inexpensive and an image with little time axis fluctuation can be obtained.

According to the seventh aspect of the present invention, a switch circuit or a variable gain attenuator is added to a learning device for learning a periodic component included in a time axis variation of a video signal so as not to impair the rising characteristic of the time axis correction loop. In this case, there is an effect that a stable image with less time axis fluctuation can be obtained.

According to the eighth aspect, the conversion accuracy of the A / D converter and the D / A converter of the learning device that learns the periodic component included in the time axis fluctuation amount of the video signal is adjusted at the center and the periphery of the dynamic range. Since the learning ability is improved by changing the above, there is an effect that a stable image with less time axis fluctuation can be obtained.

According to the ninth aspect, the operating clock of the learning device that learns the periodic component included in the time axis fluctuation amount of the video signal is obtained by multiplying the clock obtained from the motor encoder by the time axis. Since the learning accuracy of is improved, there is an effect that a stable image with little time axis fluctuation can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a learning TBC circuit according to a first embodiment of the first invention of the present invention.

FIG. 2 is a diagram showing a control stability condition of a learning compensator in a learning type TBC circuit according to one embodiment of the present invention.

FIG. 3 is a diagram illustrating frequency characteristics of a learning compensator in a learning TBC circuit according to one embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a learning TBC circuit according to a second embodiment of the first invention of the present invention.

FIG. 5 is a block diagram showing a configuration of a learning TBC circuit according to a third embodiment of the first invention of the present invention.

FIG. 6 is a block diagram showing a configuration of a learning TBC circuit according to a fourth embodiment of the first invention of the present invention.

FIG. 7 is a diagram showing an algorithm of a learning type TBC circuit according to a fifth embodiment of the first invention of the present invention.

FIG. 8 is a block diagram showing a configuration of a learning TBC circuit according to the first embodiment of the second invention.

FIG. 9 is a block diagram showing a configuration of a learning TBC circuit according to a second embodiment of the second invention.

FIG. 10 is a block diagram showing a configuration of a learning TBC circuit according to one embodiment of the third invention of the present invention.

FIG. 11 is a block diagram showing a configuration of a learning-type TBC circuit according to the first embodiment of the fourth invention;

FIG. 12 is a block diagram showing a configuration of a learning type TBC circuit according to a second embodiment of the fourth invention of the present invention.

FIG. 13 is a block diagram showing a configuration of a learning-type TBC circuit according to the first embodiment of the fifth invention;

FIG. 14 is a block diagram showing a configuration of a learning TBC circuit according to a second embodiment of the fifth invention of the present invention.

FIG. 15 is a block diagram showing a configuration of a learning TBC circuit according to a third embodiment of the fifth invention of the present invention.

FIG. 16 is a block diagram showing a configuration of a learning TBC circuit according to a fourth embodiment of the fifth invention of the present invention.

FIG. 17 is a block diagram showing a configuration of a learning-type TBC circuit according to the first embodiment of the sixth invention;

FIG. 18 is a diagram showing a configuration of a learning compensator in a learning-type TBC circuit according to one embodiment of the sixth invention of the present invention.

FIG. 19 is a diagram showing a configuration of a shift register of a learning compensator in a learning-type TBC circuit according to an embodiment of the sixth invention of the present invention.

FIG. 20 is a block diagram showing a configuration of a learning TBC circuit according to a second embodiment of the sixth invention;

FIG. 21 is a block diagram showing a configuration of a learning TBC circuit according to a third embodiment of the sixth invention;

FIG. 22 is a block diagram showing a configuration of a learning TBC circuit according to a fourth embodiment of the sixth invention;

FIG. 23 is a diagram illustrating a configuration of a learning compensator used in a learning-type TBC circuit according to a fourth embodiment of the sixth invention;

FIG. 24 is a block diagram showing a configuration of a learning TBC circuit according to the first embodiment of the seventh invention;

FIG. 25 is a block diagram showing a configuration of a learning TBC circuit according to a second embodiment of the seventh invention of the present invention.

FIG. 26 is a diagram showing conversion accuracy of an analog-digital converter and a digital-analog converter in a learning type TBC circuit according to an eighth embodiment of the present invention.

FIG. 27 is a block diagram showing a configuration of a learning TBC circuit according to a ninth embodiment of the present invention;

FIG. 28 is a block diagram showing a configuration of a conventional TBC circuit.

FIG. 29 is a block diagram showing a configuration of another conventional TBC circuit.

FIG. 30 is a block diagram showing a configuration of another conventional TBC circuit.

FIG. 31 is a block diagram showing a configuration of another conventional TBC circuit.

[Explanation of symbols]

 1, 13, 14 Variable delay circuit 2 Sync separation circuit 4 Reference signal generation circuit 5 Phase comparison circuit 7 Color burst separation circuit 8 Burst phase comparison circuit 9 Rotation control circuit 12 Phase modulation circuit 15 Synchronization / burst separation circuit 18 Analog-digital conversion Unit 19 Memory 20 Learning loop stabilizing filter 21 Digital-to-analog conversion circuit 22 Correlation detector 23 Absolute value circuit 24 Low-pass filter 25 Variable attenuator 26, 27 High-pass filter 34 Variable gain attenuator 35 Signal switch 36 PLL circuit

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/91-5/956 H04N 9/79-9/898

Claims (9)

(57) [Claims] A variable delay circuit that receives a video signal, delays the video signal for an arbitrary time, and outputs the delayed video signal; a synchronization separation circuit that separates a synchronization signal included in the video signal output from the variable delay circuit;
A reference signal generation circuit, and a phase comparison circuit that detects a phase difference between a reference signal output from the reference signal generation circuit and a synchronization signal output from the synchronization separation circuit, wherein the delay time is controlled by the variable delay circuit. Based on the synchronization signal included in the video signal output from the variable delay circuit, the time delay of the variable delay circuit is reduced so that the phase difference, which is the output of the phase comparison circuit, is reduced. A time axis correction device for controlling the amount of delay, comprising a memory for storing a phase difference of one cycle in a periodic variation component included in the time axis variation, and a time from the phase comparator to the variable delay circuit. An axis control signal line is configured to add the output of the memory and the output of the phase comparison circuit, and then input the result to the memory. By the time axis control of circuit,
A learning-type video signal time axis correction device, wherein a periodic component of the time axis fluctuation is learned and a periodic residual deviation of the time axis correction loop is removed. 2. A variable delay circuit which receives an NTSC video signal, delays the video signal by an arbitrary time and outputs the video signal, and separates a horizontal synchronizing signal included in the video signal which is also an output of the variable delay circuit. Horizontal sync separation circuit,
A color burst separation circuit for separating a color burst signal included in the NTSC signal, a reference signal generation circuit, and a phase difference between a reference signal output from the reference signal generation circuit and a synchronization signal output from the synchronization separation circuit. A phase comparison circuit for detecting, and a burst phase detection circuit for detecting a phase difference between the reference signal and the color burst signal, wherein the time axis fluctuation amount of the video signal which is the output of the variable delay circuit is determined by the delay time. Time to control the delay amount of the variable delay circuit so that the phase difference, which is the added output of the two phase comparison circuits, is reduced based on the synchronization signal and the burst signal included in the video signal output from the variable delay circuit so as to reduce the delay. The axis correction device has a memory for storing a phase difference for one cycle in a periodic variation component included in the time axis variation, The time axis control signal line from the phase comparator to the variable delay circuit is added to the output of the memory, the output of the phase comparison circuit and the output of the burst phase comparator, and then input to the memory. A learning-type video signal characterized in that the information is a time-axis control amount of the variable delay circuit, thereby learning a periodic component of the time-axis fluctuation, and removing a periodic residual deviation of the time-axis correction loop. Time axis correction device. 3. A recording medium for recording a video signal,
A head for recording and reproducing a video signal on and from the recording medium, a motor for rotating the recording medium or the head for increasing a relative speed between the recording medium and the head, and an encoder for detecting a rotation angle of the motor When,
A rotation control circuit for controlling the rotation of the motor, a variable delay circuit that receives the video signal, delays the video signal for an arbitrary time, and outputs the video signal, and a video signal that is an output of the variable delay circuit A synchronization separation circuit for separating the synchronization signal included in the reference signal generation circuit, a reference signal generation circuit, and a phase comparison for detecting a phase difference between a reference signal output from the reference signal generation circuit and a synchronization signal output from the synchronization separation circuit. A delay circuit, wherein the delay time is reduced based on a synchronization signal included in a video signal output from the variable delay circuit so that a time axis fluctuation amount in a video signal output from the variable delay circuit is reduced. In a time axis correction device for controlling a delay amount of a variable delay circuit so that a phase difference as an output is reduced, an order of one cycle in a periodic variation component included in the time axis variation amount is provided. A memory for storing the difference, wherein a time axis control signal line from the phase comparator to the variable delay circuit is input to the memory after adding the output of the memory and the output of the phase comparison circuit. ,
The AC component in the input information of the memory is used as the time axis control amount of the variable delay circuit, and the DC component in the input information of the memory is used as the rotation phase reference of the motor control circuit, so that the period of the time axis fluctuation is A learning-type video signal time axis correction apparatus, wherein a learning component is learned and a periodic residual deviation of the time axis correction loop is removed. 4. A variable delay circuit for correcting a time axis variation of a video signal, a time axis variation detecting means for detecting a time axis variation in a signal output of the variable delay circuit, and the detected time axis variation. a memory for time learning to one period of the periodic fluctuation component in a variable attenuator and be calculated or absolute value after differential amplification before and after memory, or the absolute value is taken differential amplifier before and after each of the memory And a time axis control signal line from the time axis fluctuation amount detection means to the variable delay circuit is input to the memory after adding the output of the memory and the output of the phase comparison circuit. When the input information of the memory is used as the time axis control amount of the variable delay circuit, the correlation detector detects the correlation of the fluctuation pattern of the time axis fluctuation in each cycle. When the detected correlation is strong, the gain of the attenuator is varied, and the low-frequency gain of the positive feedback loop including the memory is brought close to 1, and when the correlation is weak, the positive feedback loop is controlled by the attenuator. A learning-type video signal time axis correction apparatus, characterized in that only the periodic residual deviation is always removed by bringing the gain of the learning approach to zero. 5. A variable delay circuit for correcting a time axis variation of a video signal, a time axis variation detecting means for detecting a time axis variation in a signal output of the variable delay circuit, and the detected time axis variation. A memory for learning the periodic fluctuation component for one period of time, and a high-pass filter, and extracting only the AC component from the output from the time-axis fluctuation detection means through the high-pass filter. , The output of the memory, the signal after the addition is input to the memory, the input information of the memory is input to a second high-pass circuit, and the output of the second high-pass circuit is output. And correcting the time axis of the video signal as a delay time control amount of the variable delay circuit. 6. A variable delay circuit for correcting a time axis variation of a video signal, a time axis variation detecting means for detecting a time axis variation in an output signal of the variable delay circuit, and the detected time axis variation. An analog-to-digital converter for converting analog to digital data, a shift register circuit for delaying each bit of the digital information, a digital-to-analog conversion circuit for digital-to-analog conversion of the output of the shift register circuit, and a low-pass filter The output from the time axis fluctuation amount detecting means is analog-
After the digital conversion, each bit of the digital information is input to a shift register circuit, and then converted from digital to analog, and added to the output of the original time axis fluctuation amount detection means via a low-pass circuit. A learning-type video signal time axis correction device that suppresses a time axis variation of the video signal by using an input signal of a digital converter as a delay amount control signal of the variable delay circuit. 7. A variable delay circuit for correcting a time axis variation of a video signal, a time axis variation detecting means for detecting a time axis variation in an output signal of the variable delay circuit, and the detected time axis variation. A variable gain attenuator or a signal switch, a motor for rotating a recording medium or a recording / reproducing head, and a control circuit for the motor, and the time axis fluctuation amount. The output from the detection means is added to the output of the memory, and the signal after the addition is input to the memory. The input of the memory is used as a delay amount control signal of the variable delay circuit, and the time axis of the video signal is In a video signal time axis correction device that suppresses fluctuation,
Until the rotation of the motor in the motor control circuit approaches the target reference rotational speed, or confirms that the phase has been synchronized with the target rotational phase, the gain of the variable gain attenuator approaches 0, or the signal switch is turned off. After learning that the rotation of the motor approaches the target reference rotation speed or is synchronized with the target rotation phase, the gain of the variable gain attenuator approaches 1 or the signal switch is turned on. Video signal time axis correction device. 8. A variable delay circuit for correcting a time axis fluctuation of a video signal, a time axis fluctuation amount detecting means for detecting a time axis fluctuation amount in an output signal of the variable delay circuit, a high-pass filter, The above detection time axis fluctuation amount is analog-
An analog-to-digital converter in which the central part of the entire dynamic range is more accurate than the peripheral part by digital conversion, and the periodic fluctuation component in the detection time axis fluctuation amount of the digital information is learned for one period. A memory, and a digital-to-analog conversion circuit in which the output of the memory is digital-to-analog-converted so that the center of the entire dynamic range is more accurate than the periphery thereof. After removing the DC component through a band-pass filter, analog-to-digital conversion is performed, the digital information is delayed by one cycle, digital-to-analog converted, and added to the output of the original time-axis fluctuation detection means via a low-pass circuit. The input signal of the analog-to-digital converter is used as a delay amount control signal of the variable delay circuit. The increase learning accuracy during operation,
A learning-type video signal time axis correction device, wherein the time axis fluctuation of the video signal is suppressed. 9. A recording medium for recording a video signal,
A head for recording and reproducing a video signal on and from the recording medium, a motor for rotating the recording medium or the head for increasing a relative speed between the recording medium and the head, and an encoder for detecting a rotation angle of the motor When,
A PLL circuit for multiplying the encoder output frequency, a rotation control circuit for controlling the rotation of the motor, and a variable for inputting the video signal and delaying the video signal for an arbitrary time and then outputting the video signal A delay circuit, and a time-axis fluctuation amount detecting means for the video signal, wherein the delay time is reduced so that the time-axis fluctuation amount in the video signal output from the variable delay circuit is reduced. In a time axis correction device for controlling a delay amount of a variable delay circuit based on time axis fluctuation amount detection information as an output, a time axis fluctuation amount for one cycle in a periodic fluctuation component included in the time axis fluctuation amount is stored. It has a memory, a time axis control signal line from the time axis fluctuation amount detection means to the variable delay circuit, the output of the memory and the output of the time axis fluctuation amount detection circuit In the video signal time axis correction device configured to be added to the memory after the addition, the clock for bit transfer in the memory for learning the periodic component of the time axis fluctuation amount or the bit shift of the shift register circuit is shifted by the PLL circuit. A learning-type video signal time-axis correction device, which operates with a clock obtained by multiplying the frequency of the motor encoder, which is the output of the learning-type video signal, to improve the learning accuracy in the time-axis direction.