JP3043209B2 - Spindle control circuit for optical disk drive - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spindle control circuit for an optical disk drive, and more particularly to a spindle control circuit for an optical disk drive that enables stable spindle control.

[0002]

2. Description of the Related Art A spindle control circuit of a conventional optical disk apparatus has a configuration as shown in FIG. 3, and performs spindle control using a wobble signal obtained from a pre-groove of an optical disk.

In FIG. 3, return light from the optical disk 1 is detected by a pickup 3, and a wobble detection circuit 4 detects a wobble signal. The optical disk has a carrier wave of 22.05 KHz and a signal that is FM-modulated with a frequency shift of ± 1 kHz. The FM-modulated signal is 3150 bi with a 6.3 kHz biphase clock.
t / s data is included. 7 at the beginning of each data
There is an ATIP synchronization signal with a frequency of 5 Hz. When recording on an unrecorded disk, there is a format in which the subcode synchronization signal must be recorded in synchronization with the ATIP synchronization signal in a predetermined phase relationship. Therefore, at the time of recording, control is performed with the frequency component of 22.05 KHz of the wobble signal, and phase control is performed with the subcode synchronization signal and the ATIP synchronization signal. The detected wobble signal is sent to a CLV (constant linear velocity) control circuit 8 to generate a CLV control speed error. Also,
This signal is sent to the ATIP synchronization signal detection circuit 5,
An ATIP synchronization signal is detected. The CLV control circuit 8
A band-pass filter for extracting a frequency component of 22.05 KHz from the wobble signal; and a frequency divider for dividing the reference clock generated by the reference clock generation circuit 6, based on the frequency-divided signal and the wobble signal. Output a speed error signal to perform constant linear speed control.

[0004] The subcode synchronization signal generation circuit 7 outputs a subcode synchronization signal based on the reference clock from the reference clock generation circuit 6. The phase control circuit 9 uses the ATIP
The phase control is performed based on the ATIP synchronization signal from the synchronization signal detection circuit 5 and the subcode synchronization signal from the subcode synchronization signal generation circuit 7, and the obtained phase signal is output. The addition circuit 10 adds the signals from the CLV control circuit 8 and the phase control circuit 9 and supplies the addition signal to the spindle motor 2 to control the rotation of the optical disc 1.

[0005]

In the spindle control circuit of the optical disk apparatus as described above, the EF to be recorded at the time of recording is used.
The light amount of the pickup is switched between write power and read power based on the M signal. Pits are formed at the time of write power, return light is detected at the time of read power, various controls are performed, and the detection of the ATIP synchronization signal is also performed. For this reason, at the time of recording, the detection rate of the ATIP synchronization signal deteriorates. Also, if there is a scratch or the like on the disk surface, it may not be possible to detect the ATIP synchronization signal. Thus, ATI
If the P synchronization signal detection is temporarily missed, the phase control error is disturbed until the detection is performed normally, and the linear velocity greatly changes. When playing back a disc recorded in this way, control is performed using the recorded EFM.
At the time of reproducing a portion where the linear velocity is disturbed, there are problems that an error rate is deteriorated and worst noise is generated.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a spindle control of an optical disk apparatus capable of performing stable control by minimizing a change in linear velocity even if a temporary ATIP synchronization signal is not detected for some reason. It is to provide a circuit.

[0007]

In order to solve the above-mentioned problems, a spindle control circuit of an optical disk device according to the present invention is provided with a wobble signal obtained from an optical disk.
A spindle control circuit of an optical disc apparatus for outputting a velocity error signal for performing constant linear velocity control and performing phase control based on an ATIP synchronizing signal detected from the optical disc and a subcode synchronizing signal.
A first clock circuit and a second clock circuit, each of which is reset by a P synchronization signal and operates at a shorter period and a longer period than the synchronization of the subcode synchronization signal, respectively, and the subcode synchronization signal and the ATIP synchronization signal A phase control circuit that outputs a phase error signal based on the first and second clock circuits; a first switch circuit that is controlled by an output of the first timing circuit and controls transmission of the ATIP synchronization signal to the phase control circuit; A second switch circuit that is controlled by the output of the timing circuit and controls the output of a phase error signal from the phase control circuit; the speed error signal; and a phase output through the second switch circuit. And an addition circuit for adding the error signal and outputting the result as a spindle control signal.

[0008]

According to the present invention, the first clock circuit and the second clock circuit, which are reset by the ATIP synchronization signal detected from the optical disk using the reference clock and operate in a cycle shorter and longer than the cycle of the subcode synchronization signal, respectively. A timing circuit is provided, and to a phase control circuit that outputs a phase error signal obtained based on a subcode synchronization signal and an ATIP synchronization signal by a switching circuit controlled by outputs of the first timing circuit and the second timing circuit. The output of the ATIP synchronization signal is controlled, the output of the output signal from the phase control circuit is controlled, and an addition signal obtained by adding the speed error signal and the phase error signal is output as the spindle control signal.

[0009]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a configuration block diagram showing an embodiment of a spindle control circuit of an optical disk device according to the present invention. In the figure, components denoted by the same reference numerals as those in FIG. 3 have the same functions. FIG. 2 also shows FIG.
3 is a timing chart of signals of the respective parts.

In FIG. 1, a subcode synchronization signal generation circuit 7 outputs a subcode synchronization signal a based on a reference clock from a reference clock generation circuit 6. The ATIP synchronization signal detection circuit 5 detects the ATIP synchronization signal b from the wobble signal output from the wobble detection circuit 4 using the reference clock output from the reference clock generation circuit 6.

The timing circuits 13 and 14 operate with a period shorter and longer than the period of the subcode synchronization signal (usually 75 Hz). The timing circuit 13 has a counter configuration for counting the reference clock from the reference clock generation circuit 6, and is reset at the falling edge of the ATIP synchronization signal output from the ATIP synchronization signal detection circuit 5, and the timing circuit 14 is similarly reset. , And has a counter configuration for counting the reference clock, and is reset at the rising edge of the ATIP synchronization signal. The ATIP synchronization signal is sent to the phase control circuit 9 via the switch 11 that is controlled to open and close by the output signal c of the timing circuit 13.

The phase control circuit 9 includes a sub code synchronization signal a from the sub code synchronization signal generation circuit 7 and a switch 11.
And outputs the comparison result as a phase error signal. The phase error signal output from the phase control circuit 9 is output to the adder circuit 10 via the switch 12 that is controlled to open and close by the output signal d of the clock circuit 14. The addition circuit 10 adds the speed error signal from the CLV control circuit 8 and the phase error signal transmitted via the switch, and supplies the addition signal to the spindle motor 2 to control the spindle motor.

The operation of this embodiment will be described with reference to FIG. In FIG. 2, a synchronization signal (abnormal synchronization signal) is usually generated at a timing (a) at which an ATIP synchronization signal cannot be detected.
Is detected. In this case, as shown in the figure, since the switch 11 is open, the abnormal synchronization signal is not input to the phase control circuit 9, and no phase error occurs.

If the ATIP synchronizing signal cannot be detected for a certain period of time as shown in FIG.
As a result, the open state is quickly established, and the disturbance of the phase error can be suppressed to a minimum.

In the above-described embodiment, the operation time of the clock circuit 13 is, for example, 12.0 msec while the period of 75 Hz of the ATIP synchronization signal is 13.3 msec, and the operation time of the clock circuit 14 is about 14.7 msec. Is set. In addition, these time counting circuits 13 and 14
A retriggerable mono-multi configuration that operates on the rising edge (time counting circuit 14) and falling edge (time counting circuit 15) of the IP synchronization signal may be used.

[0016]

As described above, the spindle control circuit of the optical disk apparatus according to the present invention is used for controlling the ATIP during recording.
Even if it becomes temporarily impossible to detect the ATIP synchronization signal due to a deterioration in the detection rate of the synchronization signal or a scratch on the disk surface, an operation to quickly add the phase control error signal to the spindle control loop is performed. Since the recording is stopped, deterioration of the error rate during reproduction can be suppressed to a minimum.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram showing an embodiment of a spindle control circuit of an optical disk device according to the present invention.

FIG. 2 is a diagram for explaining the operation of the embodiment shown in FIG. 1;

FIG. 3 is a block diagram showing a configuration of a spindle control circuit of a conventional optical disc device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Optical disk 2 Spindle motor 3 Pickup 4 Wobble detection circuit 5 ATIP synchronization signal detection circuit 6 Reference clock generation circuit 7 Subcode synchronization signal generation circuit 8 CLV control circuit 9 Phase control circuit 10 Addition circuit 11, 12 Switch 13, 14 Timing circuit

Claims (1)

(57) [Claims] 1. A speed error signal for performing a constant linear velocity control based on a wobble signal obtained from an optical disc, and an ATIP detected from the optical disc.
In a spindle control circuit of an optical disc device that performs phase control based on a synchronization signal and a subcode synchronization signal, the spindle control circuit is reset by the ATIP synchronization signal and operates at a shorter cycle and a longer cycle than the synchronization of the subcode synchronization signal. A first timing circuit and a second timing circuit, a phase control circuit that outputs a phase error signal based on the subcode synchronization signal and the ATIP synchronization signal, and controlled by an output of the first timing circuit; A first switch circuit for controlling transmission of the ATIP synchronization signal to the phase control circuit; a second switch circuit for controlling output of a phase error signal from the phase control circuit, the second switch being controlled by an output of the second timing circuit; The speed error signal and the phase error signal output through the second switch circuit, and Spindle control circuit of an optical disk device comprising an addition circuit for outputting as a dollar control signal, in that it comprises an.