JP2878400B2 - Multi-window display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] [Overview] A multi-window display device that window-displays image information obtained by synthesizing a video of a participant in a video conference on a part of a screen in each terminal device. For the purpose of multi-window display that makes effective use of the display space, the system is configured to divide the received splittable image information, such as the divided composite moving image, into windows on the periphery other than the center of the display screen for each window. .

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-window display device that displays one piece of moving image information obtained by synthesizing a participant image of a video conference or the like on a part of a screen of each terminal device.

In recent years, in telecommunication services such as video conferencing that make use of the features of ISDN, video of multiple conference participants is sent to each terminal workstation and displayed on the screen, but at the same time, the workstation is required for the conference. In order to display the information, a moving image window is set in a part of the screen, and conference participants are displayed in the moving image window.

However, in order to obtain an appropriate moving image resolution, a window area of 1/4 of the screen is usually required, so that the setting of the moving image window restricts a terminal's original display.
It is desired to display a moving image window so that the display space can be effectively used without hiding the terminal display.

[Prior Art] The content of a moving image displayed on a conventional multi-window display device is meaningful on one screen, and there is no need to divide and display it, which is sufficient.

However, in recent years, desktop conference services using multimedia such as still images such as moving images, documents, and audio, which show video conference participants, and voices are expected as communication services utilizing the features of ISDN. The main video information in this service is the video of multiple participants, and in order to reduce the transmission band of huge video information, the video signal showing the participants in the desktop conference service is once sent to each participant's terminal. In general, the video signal is transmitted to a center, and the center combines a plurality of video signals into one video signal and transmits the video signal to each terminal of each participant.

In each terminal, as shown in FIG. 8, a moving image window 30 received from the center device and divided and displayed, for example, by four participants, is displayed at the upper right corner of the terminal display 28.

A conventional multi-window display device for displaying such a moving image window has a configuration shown in FIG. This conventional apparatus has a function of synthesizing NTSC signals and RGB signals on a computer display as, for example, 60 Hz non-interlaced RGB signals, and can display a moving image in a window set at an arbitrary position.

In FIG. 1, reference numeral 12 denotes a frame memory. The frame memory 12 is provided with a writing system for writing data and a reading system for reading data. First, the writing system includes an AD converter 3 that converts a first input analog video signal i1 in which one screen is composed of a plurality of moving images into digital video data Di.
4, a synchronization separation circuit 36 for separating the horizontal and vertical synchronization signals SY1 from the video signal Ai1, a PLL circuit 38 for generating a clock CKi synchronized with the vertical synchronization signals SY1, an address signal defined by the vertical synchronization signals SY1 and the clock CKi, Write control signals such as sampling signals are stored in the frame memory.
12 and a write control circuit 40 to be supplied to the AD converter 34.

The frame memory 12 is a memory having a two-dimensional data array or an address configuration substantially corresponding to a television screen, and stores, for example, RGB data.

The AD converter 34 converts the input analog video signal Ai into digital video data Di by the sampling clock supplied from the writing control circuit 40. The frequency of the sampling clock is generally the color subcarrier (3.58
MHz) is used. Input video signal Ai1
Is desirably a component signal format such as RGB. N
In the case of a TSC composite signal, it is necessary to provide a decoder at the preceding stage and convert it to a component signal, or convert the composite signal to an AD and then convert it to a component signal by digital signal processing. As a method of AD-converting a component signal, there is a method of providing an AD converter for each color component, or a method of operating a high-speed AD converter in a time-division manner.

The write control circuit 40 is regulated by the synchronization signal SY1, manages and controls the relationship between the two-dimensional address of the input data and the two-dimensional address of the frame memory 12, controls the flow of data to the frame memory 12, and controls the frame memory 12.
It generates an address signal and a write control signal to the address 12.

The PLL circuit 38 includes a clock oscillator (VCO) 42, a frequency divider 4
4. It is composed of a phase comparison circuit 46 and a loop filter (LPF) 48, and the other input of the phase comparison circuit 46 is supplied with the synchronization signal SY1 of the write video signal Ai1 separated by the synchronization separation circuit 36. The output CKi of the clock oscillation circuit 42 is supplied to the write control circuit 40. The control signal output from the write control circuit 40 is phase-controlled by the clock signal CKi synchronized with the input synchronization signal SY1.

The read system includes a read control circuit 50 for reading digital video data Do from the frame memory 12, a sync separation circuit 52 for separating the horizontal and vertical sync signals SY2 from the video signal Ai2 output from the personal computer or workstation, and a sync signal S.
PLL circuit 54 that creates clock CCo synchronized with Y2, DA that converts digital video data Do to analog video signal Ao
The converter 56 comprises a screen synthesizing circuit 58 for switching and synthesizing the analog video signal Ao and the video signal Ai2.

The read control circuit 50 manages and controls the relationship between the two-dimensional address of the frame memory 12 and the two-dimensional address of the read signal synchronizing signal, processes the flow of data from the frame memory 12, To generate a display address signal and a control signal.

The PLL circuit 54 includes a clock oscillation circuit (VCO) 60, a frequency divider 62,
A phase comparison circuit 64 and a loop filter (LPF) 66 are provided.
The synchronization signal SY2 of the video signal Ai2 separated at 52 is supplied,
The output CCo of the clock oscillation circuit 60 is connected to the read control circuit 50.
Supplied to The control signal output from the read control circuit 50 is subject to phase regulation by the clock signal CCo synchronized with the input synchronization signal SY2. Since the synchronization signal SY2 that regulates the synchronization phase of the read control circuit 50 is a synchronization signal of the video signal Ai2, the two video signals Ao and Ai2 in a synchronized state can be combined in the screen composition circuit 58. . That is, the screen synthesizing circuit 58 switches the video signal between the horizontal scanning period and the vertical scanning period desired to be displayed on the display, so that the moving image window 30 can be displayed on the display of the personal computer or workstation as shown in FIG. it can.

FIG. 10 shows the moving picture information divided into four in the conventional apparatus of FIG. 9, that is, the frame memory 1 of the input analog video signal Ai1.
2 and a read control for reading from the frame memory 12 and displaying the moving image window 30 on the terminal display 28.

[Problems to be Solved by the Invention] However, in the conventional apparatus in which a plurality of moving picture screens are combined into one screen and a combined moving picture signal is displayed in a moving picture window set as a part of the terminal display, There was a problem.

The resolution of a typical workstation display is
Although it is 1000 × 1000 pixels, the resolution required as a moving image window is generally about 640 × 480 dots,
It is equivalent to 1/4 area of the display. For this reason, when a moving image window 30 is set and a plurality of divided moving images are displayed as shown in FIG. 4, the area for displaying the information of the workstation itself is restricted by the moving image window, and particularly the corner of the moving image window occupies the center of the screen. As a result, there is a disadvantage that other information is hidden as a result.

The present invention has been made in view of such a conventional problem, and displays a terminal screen when displaying moving image information obtained by synthesizing a video of a participant such as a video conference on a part of the screen in each terminal device. It is an object of the present invention to provide a multi-window display device capable of displaying a window in which space is effectively used.

[Means for Solving the Problems] FIGS. 1A, 1B, and 1C are explanatory diagrams of the principle of the present invention.

First, according to the present invention, a plurality of moving image screens or the like are assigned to a divided screen to receive a first input video signal constituting one screen, and combine the first input video signal with a second input image signal to obtain a screen. Is a multi-window display device for window-displaying an image based on a first input video signal in a part of the multi-window display device.

In such a multi-window display device, according to the present invention, first, as shown in FIG. 1A, a writing means 10 for converting a first input video signal into a writing video signal and writing it into a frame memory means 12 Reading means 14 for reading the video signal written in the frame memory means 12 in synchronization with the second input video signal; and combining the read video signal of the reading means 14 with the second input video signal. Signal synthesizing means 16 for displaying on one screen; and the writing means 10 further comprises: writing control means 18-1 to 18-n independent of the number n of divided display windows; The write control means 18-1 to 18-n are switched according to the regulation of the synchronization signal of the first input video signal, and the video signal is written to the area of the frame memory means 12 corresponding to the divided window divided and arranged around the display screen. Is written for each divided window Characterized by comprising a; and selecting means 20 for.

Also, as shown in FIG. 1B, the present invention comprises: a writing means 10 for converting a first input video signal into a writing video signal and writing it into a frame memory means 12; Readout means 14 for reading out in synchronization with the second input video signal; and signal synthesizing means 16 for synthesizing the readout video signal of the readout means 14 and the second input video signal to display them on one screen; Further, the reading means 14 comprises: independent reading control means 22-1 to 22-n having a number equal to the number n of divided display of the window; Read-out selecting means 24 for switching the image signal in accordance with the restriction of the synchronizing signal and reading out the video signal in each divided window from the area of the frame memory means 12 corresponding to the divided window divided and arranged around the display screen. It is characterized by.

Further, as shown in FIG. 1C, the present invention comprises: a writing means 10 for converting a first input video signal into a writing video signal and writing the converted video signal into a frame memory means 12; Readout means 14 for reading out in synchronization with the second input video signal; and signal synthesizing means 16 for synthesizing the readout video signal of the readout means 14 and the second input video signal to display them on one screen; Further, each of the writing means 10, the frame memory means 12, and the reading means 14 has a number of independent writing control means 18-1 to 18-n equal to the number n of divided displays of the window divided and arranged around the display screen. , Memory units 26-1 to 26-n and read control means 22-1 to 22-n, and separately writes and reads the video signal converted from the first input video signal for each divided window. It is characterized by the following.

Furthermore, the first input video signal to the writing means 10 is obtained by combining moving images transmitted from a plurality of terminal devices via a communication line in a center device, and combining moving image information transmitted to each terminal by the combining. And

The writing means 10 converts the first input video signal into a primary color signal (R, G, B) or a signal (RY, GY, BY) obtained by subtracting a luminance component from the primary color signal. Writing to the frame memory means 12.

[Operation] According to the multi-window display device of the present invention having such a configuration, the following operation can be obtained.

First, one video signal is divided and stored according to the window position at the time of writing at a screen display position of a frame memory having at least one screen, and read out is stored in the frame memory at the time of window position operation according to scanning of the output screen. By switching and reading, divided window display in which divided moving images are dispersedly arranged around the screen can be performed.

Further, by writing a video signal to a frame memory having a memory capacity equivalent to one screen in accordance with the scanning of the video signal, and by switching to the frame memory when a scanning line comes to a divided window position of the output screen at the time of reading, reading is performed.
A divided window display in which divided moving images are dispersedly arranged around the screen can be displayed.

Further, at the time of writing a video signal, the video signal is divided into divided windows and written into a corresponding independent memory unit. At the time of reading, a scanning line is read from the corresponding memory unit when a scanning line comes to the position of the divided window on the output screen. A divided window display in which divided moving images are dispersedly arranged in the periphery can be displayed.

[Embodiment] FIG. 2 is a block diagram showing a first embodiment of a multi-window split display device according to the present invention, in which four moving picture screens are assigned to four divided screens to form one screen. Is shown.

In FIG. 2, a writing system 10 for writing data to the frame memory 12 and a reading system 14 for reading data from the frame memory 12 are provided.

First, the writing system 10 includes a first analog video signal (first input video signal) Ai that composes one screen with moving images divided into four parts.
AD converter 34 that converts 1 into digital video data Di,
Horizontal and vertical synchronizing signal SY1 from analog video signal Ai1
, A PLL circuit 38 that creates a clock CKi synchronized with the synchronization signal SY1, an address signal defined by the synchronization signal SY1 and the clock CKi, and a write control signal such as a sampling signal. Number of divided display windows n = 4 supplied to converter 34
Write control circuits 18-1, 18-2, 18-3, 18-
4 and a selection control circuit 20 for switching the over-existence nationality control circuits 18-1 to 18-4 for each writing memory area corresponding to the divided moving image window of the display of the frame memory 12.

The frame memory 12 is a memory having a two-dimensional data array or address configuration having at least the capacity of a display screen, and stores RGB data.

The AD converter 34 receives the input analog video signal Ai by the sampling clock supplied from the write control circuit 18-1.
Is converted into digital video data Di.

The write control circuits 18-1 to 18-4 are controlled by the synchronization signal SY1, and manage and control the relationship between the two-dimensional addresses of the memory areas in the frame memory 12 corresponding to the moving image windows set in the four corners of the display screen. At the same time, it controls the flow of data to the frame memory 12, and generates an address signal and a write control signal to the frame memory 12.

The selection control circuit 20 switches signals from the write control circuits 18-1 to 18-4 so that the write data Di is stored in the frame memory area corresponding to the moving image window display position on the display.

The configuration and operation of the PLL circuit 38 are the same as those of the conventional device shown in FIG.

The reading system 14 reads a digital video data Do from the frame memory 12, and outputs a horizontal and vertical synchronizing signal SY2 from a second analog video signal (second input video signal) Ai2 output from a personal computer or a workstation. A synchronization separation circuit 52 for separation, a PLL circuit 54 for creating a clock CCo synchronized with the synchronization signal SY2, a DA converter 56 for converting digital video data Do into an analog video signal Ao,
Is provided.

The read control circuit 50 manages and controls the relationship between the two-dimensional address of the frame memory 12 and the two-dimensional address of the read signal synchronizing signal, processes the flow of data from the frame memory 12, A signal and a read control signal are generated. The configuration and operation of the PLL circuit 54 are the same as those of the conventional device shown in FIG.

Further, a screen synthesizing circuit 1 for switching and synthesizing the analog video signal Ao read from the frame memory 12 and the analog video signal Ai2 output from a personal computer or a workstation.
6 is provided.

Here, the control signal output from the read control circuit 50 is subject to the phase shift regulation by the clock signal CCo synchronized with the input synchronization signal SY2. Since the synchronization signal SY2 that regulates the synchronization phase of the read control circuit 50 is a synchronization signal of the video signal Ai2, the two video signals Ao and Ai2 in a synchronized state can be combined in the screen composition circuit 16. .

FIG. 3 shows the writing control and the reading control of the four-divided moving picture screen to the frame memory 12 according to the embodiment of FIG. Write to the frame memory area corresponding to the position of the video window set in the four corners of
In the read control from step 12, the switching of the moving image signal is made effective in the horizontal scanning period and the vertical scanning period in which the moving image window is to be displayed on the display. Distributed display is possible.

FIG. 4 is a block diagram of an embodiment showing the second embodiment of the present invention, and shows an example in which four moving picture screens are assigned to four divided screens to make one screen.

4, a writing system 10 for writing data to the frame memory 12 and a reading system 14 for reading data from the frame memory 12 are provided. Of these, the writing system 10 is different from the conventional system shown in FIG. It has the same configuration.

On the other hand, the readout system 14 has four readout control circuits 22-1, 22 and 22 for reading out the digital video data Do from the frame memory 12.
A selection control circuit 24 for switching the read control signals generated from the read control circuits 22-1 to 22-4 in accordance with the scanning of the display screen; Synchronization separation circuit 52 for separating the horizontal and vertical synchronization signals SY2 from the analog video signal Ai2, and a PLL circuit 5 for generating a clock CKo synchronized with the synchronization signals SY2
4. It comprises a DA converter 56 for converting the digital video data Do into an analog video signal Ao, and a screen synthesizing circuit 16 for switching and synthesizing the analog video signal Ao from the AD converter 56 and the second analog video signal Ai2.

The plurality of read control circuits 22-1 to 22-4 are provided with a two-dimensional read address of the frame memory 12 and a read signal synchronization signal 2.
It manages and controls the relationship with the dimensional addresses, processes the flow of data from the frame memory 12, and generates address signals and control signals for the frame memory 12.
The configuration and operation of the PLL circuit 54 are the same as those in FIG.

FIG. 5 shows write control and read control of the four-part divided moving image screen according to the second embodiment of FIG. 4 with respect to the frame memory 12. The four-part divided moving image screen written in the frame memory 12 is shown in FIG. By enabling the switching selection of the moving image signal read from the frame memory 12 at the display timing of the moving image window set at the four corners of the terminal display 28, the moving image is divided into four parts and the corners around the terminal display 28 are divided. Distributed display is possible.

FIG. 6 is a block diagram of an embodiment showing the third embodiment of the present invention, and shows an example in which four moving picture screens are assigned to four divided screens to make one screen.

In FIG. 6, this embodiment has four frame memories 26-1, 26- corresponding to the division number n = 4 of the moving image window.
2, 26-3, 26-4, a writing system 10 for writing data to the frame memories 26-1 to 26-4 for each window, and a frame memory
The reading system 14 reads data from the windows 26-1 to 216-4 for each window.

The writing system 10 includes an AD converter 34 for converting the first input analog video signal Ai1 into digital video data Di, a sync separation circuit 36 for separating the horizontal and vertical sync signals SY1 from the analog video signal Ai1, and a sync signal SY1. Synchronized clock C
PLL circuit 38 for creating Ki, synchronization signal SY1 and clock CK
i, and write control signals such as an address signal and a sampling signal.
26-4 and a write control circuit 18-1, supplied to the AD converter 34,
It consists of 18-2, 18-3, 18-4.

The frame memories 26-1 to 26-4 are memories having a two-dimensional data array or address configuration, and store RGB data.

The AD converter 34 receives the input analog video signal Ai by the sampling clock supplied from the write control circuit 18-1.
1 is converted to digital video data Di.

The write control circuits 18-1 to 18-4 are regulated by the synchronizing signal SY1, and a plurality of
-1 to 26-4, manage and control the relationship of the two-dimensional addresses corresponding to the moving image windows distributed in the four corners of the terminal display, and control the flow of data to the frame memories 26-1 to 26-4, Frame memories 26-1 to 26-4
To generate an address signal and a write control signal. In addition, PLL
The configuration and operation of the circuit 38 are the same as those of the conventional device shown in FIG.

The read system 14 includes four read control circuits 22-1, 22-2, 22-3, 22-4 for reading digital video data Do from the frame memories 26-1 to 26-4 in a time-division manner, and a personal computer or a workstation. The output second analog video signal Ai2
Synchronization separation circuit 52 for separating the horizontal and vertical synchronization signals SY2 from the PL, generating a clock CCo synchronized with the synchronization signals SY2
An L circuit 54, a DA converter 56 for converting digital video data Do to an analog video signal Ao, and a screen synthesizing circuit 16 for switching and synthesizing the analog video signal Ao from the DA converter 56 and the second analog video signal Ai2. .

Readout control circuit corresponding to moving image window to be divided and displayed
22-1 to 22-4 include a plurality of corresponding frame memories 26-
The two-dimensional address of 1 to 26-4 and the synchronization signal 2 for the read signal
It manages and controls the relationship with the dimensional addresses, processes the flow of data from the frame memories 26-1 to 26-4, and generates address signals and read control signals for the frame memories 26-1 to 26-4. The configuration and operation of the PLL circuit 54 are the same as those of the conventional device shown in FIG.

The read control signals output from the read control circuits 22-1 to 22-4 are phase-controlled by the clock signal CCo synchronized with the input synchronization signal SY2. Thus, the read control circuits 22-1 to 22-
Since the synchronizing signal SY2 for regulating the synchronizing phase of No. 4 is a synchronizing signal of the second analog video signal Ai2, the two analog video signals Ao and Ai2 in a synchronized state can be switched and synthesized by the screen synthesizing circuit 16. .

FIG. 7 shows write control and read control for the frame memories 26-1 to 26-4 of the 4-part moving image screen according to the third embodiment of FIG. 6, and shows four frame memories 26-1 to 26-26.
-4 are read out from the frame memories 26-1 to 26-4 at the display timing of the moving image window set at the four corners of the terminal display 28, thereby dividing the moving image into four. Can be dispersedly displayed at corners around the terminal display 28.

The data stored in the frame memory in the above three embodiments may be an RGB primary color signal as shown in the embodiment, or a luminance component may be subtracted from the primary color signal (G-
Y), (RY), and (BY). Further, the frame memory may be divided into even / odd fields.

Further, the description of the above embodiment is based on the assumption that the number n of divided moving images is n = 4.
However, it goes without saying that the present invention is not limited to the number of divisions.

[Effects of the Invention] As described above, according to the present invention, a video signal of one screen obtained by synthesizing a plurality of screens such as moving images is divided into a plurality of meaningful windows by dividing the number of synthesized screens and the like. Thus, even if a window is displayed, the display area of the original screen display can be secured at the center even when the window is displayed, and a divided window display that can effectively utilize the display space can be performed.

[Brief description of the drawings]

 FIGS. 1A, 1B and 1C are diagrams for explaining the principle of the present invention; FIG. 2 is a block diagram of the first embodiment of the present invention; FIG. 3 is a diagram for explaining the processing of FIG. 2; FIG. 5 is a diagram for explaining the process of FIG. 4; FIG. 6 is a diagram for explaining the process of the third embodiment of the present invention; FIG. 7 is a diagram for explaining the process of FIG. 6; FIG. 9 is a configuration diagram of a conventional device; FIG. 10 is a process explanatory diagram of a conventional device. In the drawing, 10: writing means (writing system) 12: frame memory means (frame memory) 14: reading means (reading system) 16: screen combining means (screen combining circuit) 18-1 to 18-4: writing Control means (circuit) 20: Write selection means (write selection control circuit) 22-1 to 22-4: Read control means (circuit) 24: Read selection means (read selection control circuit) 26-1 to 26-4 : Memory part (frame memory) 28: Terminal display device 30: Video window 34: AD converter 36, 52: Synchronization separation circuit 38, 54: PLL circuit 42, 60: Clock oscillator (VCO) 44, 62: Divider 46,64: Phase comparator 48,66: Loop filter (LPF)

────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Katsutoshi Yano 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (58) Fields investigated (Int.Cl. ⁶ , DB name) G09G 5/14 G06F 3 /14

Claims (5)

(57) [Claims] 1. A method of allocating a plurality of moving image images and the like to a divided screen.
A multi-display that receives a first input video signal forming a screen, combines the first input video signal with a second input image signal, and window-displays an image based on the first input image signal on a part of the screen. A window display device, wherein the first input video signal is converted into a write video signal and written into a frame memory means (12); and a writing means (10) is written into the frame memory means (12). Reading means (14) for reading a video signal in synchronization with the second input video signal; and synthesizing the read video signal of the reading means (14) and the second input video signal to display them on one screen Signal synthesizing means (16)
And the writing means (10) further includes: independent writing control means (18-1 to 18-n) having a number equal to the number n of divided windows of the window; and the plurality of writing control means ( 18-1 to 18-n) are switched according to the regulation of the synchronization signal of the first input video signal, and the writing is performed in the area of the frame memory means (12) corresponding to the divided window which is divided and arranged around the display screen. And a write selection means (20) for writing the input video signal separately for each divided window. 2. A method according to claim 1, wherein a plurality of moving images are assigned to the divided screen.
A multi-display that receives a first input video signal forming a screen, combines the first input video signal with a second input image signal, and window-displays an image based on the first input image signal on a part of the screen. A window display device, wherein the first input video signal is converted into a write video signal and written into a frame memory means (12); and a writing means (10) is written into the frame memory means (12). Reading means (14) for reading a video signal in synchronization with the second input video signal; and synthesizing the read video signal of the reading means (14) and the second input video signal to display them on one screen Signal synthesizing means (16)
And the reading means (14) further comprises: independent reading control means (22-1 to 22-n) having a number equal to the number n of divided display windows; and the plurality of reading control means (22-1). To 22-n) are switched according to the regulation of the synchronization signal of the second input video signal, and are divided for each divided window from the area of the frame memory means (12) corresponding to the divided window divided and arranged around the display screen. Selecting means (24) for reading a video signal by reading
And a multi-window display device comprising: 3. A method of allocating a plurality of moving images to a divided screen and
A multi-display that receives a first input video signal forming a screen, combines the first input video signal with a second input image signal, and window-displays an image based on the first input image signal on a part of the screen. A window display device, wherein the first input video signal is converted into a write video signal and written into a frame memory means (12); and a writing means (10) is written into the frame memory means (12). Reading means (14) for reading a video signal in synchronization with the second input video signal; and synthesizing the read video signal of the reading means (14) and the second input video signal to display them on one screen Signal synthesizing means (16)
And the writing means (10), the frame memory means (12) and the reading means (14) each have a number of independent displays equal to the number n of divided windows of the window divided and arranged around the display screen. Write control means (18-1 to 18-n), memory units (26-1 to 26-n) and read control means (22-1 to 22-n)
n), wherein the video signal converted from the first input video signal is separately written and read for each divided window. 4. A first input video signal to said writing means (14) is synthesized moving image information sent after a moving image transmitted from a plurality of terminal devices via a communication line is synthesized by a center device. 4. The multi-window display device according to claim 1, wherein: 5. The writing means (10) comprises: a primary color signal (R, G, B) or a signal (RY, GY, B) obtained by subtracting a luminance component from a primary color signal. 4. The multi-window display device according to claim 1, wherein said multi-window display device is converted into -Y) and written into said frame memory means (12).