JP2861697B2 - Decryption device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding device, and more particularly to a decoding device for coded moving picture data.

[0002]

2. Description of the Related Art As shown in FIG. 4, a conventional decoding device 1 reads a frame code data sequence 101 supplied as a bit stream (stream) BS, and codes data of each frame with header portion data H and data. A reading section 11 for separating the data section data D from the header section data H; a decoding section 12 for decoding the data section data D and outputting the decoded data DD;
And a header interpreter 13 for controlling the decoding unit 12 by analyzing
An output buffer 14, which is an interface for outputting the decoded data DD to the outside in units of frames F, and buffers 15 and 16 for storing reference frames were provided.

FIG. 4 is a block diagram showing the relationship between a conventional decoding apparatus 1 of this type and an encoding apparatus 5. The encoding device 5 includes a data frame sequence 201 including frames F1 to F7 as moving image data.
Input in the order of F7 and encode as follows. First, the frames F1, F4, and F7 are encoded only within the frame, and are hereinafter referred to as I-frames, and the code data thereof is referred to as intra-frame code data I. Next, frames F2 and F
4 are compared with the frame F1 or F4 as a reference frame, and the frames F5 and F4
6 is coded by comparing the frame F4 or the frame F7 with the reference frame. These frames F2 and F4 and frames F5 and F6 are hereinafter referred to as P frames, and the code data thereof is referred to as interframe code data P.

The coded data includes header data H having control information and the like and data data D which is coded data of moving image data. The header data H includes identification data indicating whether the data is intra-frame code data I or inter-frame code data P, and currently unused spare bits.

[0005] As a result of the above encoding process, the encoding device 5
Are frame code data L1, L4, L2, L3, L
A frame code data sequence 202 arranged in the order of 7, L5, L6 is output.

On the other hand, the decoding procedure of the code data of the decoding device 1 is as follows. First, the frame code data sequence 20
2 is input to the decoding device 1 as a frame code data sequence 101. In the decoding device 1, first, the reading unit 11 reads the frame code data L1, separates the data into header data H and data data D, decodes the header data H to the header interpreter 13, and decodes the data data D. To the unit 12. The header interpreter 13 analyzes the header data H using the identification data, and obtains the frame code data L1.
Is the intra-frame code data, the decoding unit 12 decodes the frame data as it is into the frame F1. The frame F1 is output from the decoding device 1 via the output buffer 14, and is stored and registered in the buffer 15. Next, the reading unit 11 reads the frame code data L4 and decodes it into a frame F4 in the same procedure. This frame F4 is not output from the decoding device 1, but is stored and registered in the buffer 16. Next, the frame code data L2 and the frame code data L3 are read, and as a result of analysis of the header data H by the header interpretation unit 13, the frame code data L2 and L3 are read.
Since L3 is the inter-frame code data, the decoding unit 12 outputs the frame F registered in the buffers 15 and 16 respectively.
1 and frame F4, respectively.
And into frame F3. These frames F2 and F3 are output from the decoding device 1 via the output buffer 14, respectively. Here, the buffer 16
Are output from the decoding device 1 via the output buffer 14. Next, the reading unit 11
Represents frame code data L7 which is intra-frame code data
Is read and decoded into a frame F7 in the same procedure as the frame code data L1 and L4. This frame F7 is not output from the decoding device 1, but is stored and registered in the buffer 15 instead of the frame F1. Next, the reading unit 11 reads the frame code data L5 and the frame code data L6, which are the inter-frame code data,
2 and L3, are decoded into frames F5 and F6, respectively, with reference to the frames F7 and F4 registered in the buffers 15 and 16, respectively. These frames F5 and F6 are output from the decoding device 1 via the output buffer 14, respectively. Finally, the frame F registered in the buffer 15
7 is output from the decoding device 1 via the output buffer 14.

As described above, the conventional decoding apparatus discriminates whether the input code data is the above-described intra-frame code data or inter-frame code data, and simply performs the reverse of the coding. It was decrypted in a procedure.

[0008] Therefore, as shown in FIG. 6, when editing is performed such that the order of some frames is changed or added to a frame-encoded data sequence obtained by encoding a data frame sequence, the inter-frame code Even if a reference frame for decoding data is replaced with another frame, a problem of erroneous decoding occurs.

Hereinafter, when it is necessary to distinguish between I / P frames, frames FI1, FP2,... Are described, and frame code data are described as LI1, LP2,. Also,
When the distinction between the frame and the frame code data is obvious, F and L are omitted.

In FIG. 6, an encoding device 5 encodes an input data frame sequence 211 by arranging two P frames between a pair of I frames. Here, P12 is a P frame that refers to the frames FI1 and FI2. As a result, the frame code data sequence 2
12 is generated. Next, as an example, it is assumed that the frame code data sequence 213 is generated by editing the frame code data sequence 212 to remove the frame code data I3 and the two frame code data P23. When the frame code data sequence 213 is decoded by the conventional decoding device 1, the frame code data P34 of the frame code data sequence 213 is erroneously decoded as the frame P24 like the data frame sequence 111, and is output as it is. I will. This is because the decoded frame FI2 of the remaining frame code data LI2 was decoded as a reference frame because the frame code data LI3 of the frame FI3 as the reference frame was lost. Similar erroneous decoding occurs by similar editing of another frame code data.

The erroneously decoded data frame sequence 111
Is displayed on a display or the like, the edited portion is displayed as noise, which causes deterioration in image quality.

[0012]

The above-described conventional decoding apparatus identifies whether the input code data is code data within the frame or between the frames, and according to the result, simply reverses the coding. Since the decoding was performed according to the procedure, if the editing was performed such that the order of some frames was changed or added to the encoded frame of data to be decoded, the reference frame for decoding the inter-frame code data was changed. There is a disadvantage that the decoding is erroneously performed even if the frame is replaced with another frame.

Further, when the erroneously decoded data frame sequence is displayed on a display or the like, there is a disadvantage that the edited portion is displayed as noise and the image quality is deteriorated.

[0014]

The decoding device of the present invention comprises:
Pixel data of a moving image input as time-series data is encoded in frame units, and intra-frame encoded data encoded only within the encoding target frame, and the previous and next frames of the encoding target frame And the inter-frame coded data coded according to the comparison result as a reference frame, wherein each of the intra-frame and inter-frame coded data is control information including identification of the intra-frame and inter-frame coded data. The frame code data sequence for decoding a frame code data sequence including a header portion and a data portion which is encoded data of the pixel data is sequentially read, and the header portion and the data portion of each frame code data are separated. Receiving the header portion and identifying the code data Header interpreting means for supplying encoding control information, decoding means for receiving the data portion, decoding the intra-frame and inter-frame encoded data according to the decoding control information, and outputting decoded frame data, In a decoding apparatus comprising: output buffer storage means for outputting data in frame units; and first and second reference buffer storage means for storing the reference frame, the reference frame added to the header portion. Reference prohibition information detecting means for detecting reference prohibition information and supplying a reference prohibition signal, and decoding using the reference frame read from the first and second reference buffer storage means in response to the reference prohibition signal Decoding frame output prohibition means for prohibiting output of decoded frame data of the inter-frame coded data thus generated. And it is configured to include and.

[0015]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the decoding apparatus of the present invention.

As shown in FIG. 1, the decoding device 2 of this embodiment includes a conventional header interpreting unit 13 in addition to a reading unit 11, a decoding unit 12, and buffers 15 and 16 which are the same as the conventional one. Instead, a header interpretation unit 23 having a reference prohibition bit detection circuit 25 for detecting a reference prohibition bit R for setting the use of a reference frame and supplying a reference prohibition signal RS in addition to the identification data I / P detection circuit, Output buffer 2 including a switch circuit 26 for cutting off the input of the decoded data DD in response to the reference prohibition signal RS in place of the output buffer 14 of FIG.
4 is provided.

Next, the operation of this embodiment will be described.

In the present embodiment, the header data H of the code data includes, in addition to the identification data of the intra-frame code data I or the inter-frame code data P, a spare bit which has not been used in the past and whether or not the reference frame can be used. Is used as a reference prohibition bit R for setting.

First, the decoding of a normal frame code data string as shown in FIG. 5 is the same as in the prior art, and a description thereof will be omitted.

Next, as shown in FIG. 2, a frame code data sequence 21 arranged and encoded so that two P frames are inserted between a pair of I frames described in the conventional example.
2, a case where the frame code data sequence 213 generated by editing to delete the frame code data I3 and the two frame code data P23 as in the related art will be described.

First, in the reading unit 11, the frame code data I
1 is read and separated into header part data H and data part data D, and the header part data H is supplied to the header interpretation part 23 and the data part data D is supplied to the decoding part 12. The header interpreting section 23 analyzes the header section data H using the identification data. Since the frame code data I1 is intra-frame code data, the decoding section 12 directly outputs the frame FI.
1 (hereinafter I1) and output as decoded data DD. The frame I1 is output from the decoding device 2 via the output buffer 24, and is stored in the buffer 15 and registered as a reference frame. Next, the reading unit 1
In step 1, the frame code data I2 is read, decoded into the frame I2 in the same procedure as the frame code data I1, and stored and registered in the buffer 16 without outputting to the output buffer 24.

Next, two normal frame code data P
12 are sequentially read. The header interpreter 23 analyzes the header data H, recognizes the data as a P frame, and checks the value of the reference prohibition bit R by the reference prohibition bit detection circuit 25. When the reference prohibition bit R is "0", it indicates that the reference frame can be used for this P frame, and when it is "1", it indicates that the reference frame cannot be used. Here, since the reference prohibition bit R is “0”, the reference prohibition bit detection circuit 2
5 sets the value of the reference prohibition signal RS to the switch circuit 26 of the output buffer 24 to “0”. On the other hand, the decoding circuit 12 decodes these two frame code data P12 into a decoded frame P12 using the frames I1 and I2 read from the buffers 15 and 16 as reference frames, and supplies them to the output buffer 24 in the same procedure as in the prior art. Switch circuit 26
Responds to the value “0” of the reference prohibition signal RS, passes the decoded frame P12 input to the output buffer 24, and outputs it from the decoding device 2. Here, the frame I2 registered in the buffer 16 is registered in the buffer 15 instead of the frame I1, and is output from the decoding device 2 via the output buffer 24.

Next, the reading unit 11 sets the frame code data I
4 is read, decoded into a frame I4 in the same procedure as the frame code data I1, and stored and registered in the buffer 16 without outputting to the output buffer 24. Next, edit 2
One frame code data P34 is sequentially read. Similarly to the frame code data P12, the header interpreter 23 analyzes the header data H to recognize it as a P frame, and the reference prohibition bit detection circuit 25 checks the value of the reference prohibition bit R. Since the reference prohibition bit R is “1”, the reference prohibition bit detection circuit 25 sets the value of the reference prohibition signal RS to the switch circuit 26 of the output buffer 24 to “1”. The decoding circuit 12 erroneously decodes the two frame code data P34 as a decoded frame P24 using the frames I2 and I4 as reference frames in the same procedure as the frame code data P12, and supplies the decoded data to the output buffer 24. Switch circuit 2
6 prohibits the passage of the decoded frame P24 input to the output buffer 24 in response to the value "1" of the reference prohibition signal RS, and blocks the output from the decoding device 2. Instead, the previous output decoded frame I2 held by the output buffer 24 is repeatedly output for two frames. Here, the frame I4 registered in the buffer 16 is the frame I2
Instead of being registered in the buffer 15 and output from the decoding device 2 via the output buffer 24.

Next, the reading unit 11 sets the frame code data I
5 is read, decoded into a frame I5 in the same procedure as the frame code data I1, and stored and registered in the buffer 16 without outputting to the output buffer 24. Next, two normal frame code data P45 are sequentially read. Hereinafter, similarly to the decoding procedure of the frame code data P12, the decoded frame P4
5 and output from the decoding device 2. Finally, the frame I5 registered in the buffer 16 is output from the decoding device 2 via the output buffer 24.

As a result, a decoding frame data sequence F121 is output from the decoding device 2.

Next, a second embodiment of the present invention will be described.

FIG. 3 is a block diagram showing a second embodiment of the present invention.

The difference of the decoding device 3 of the present embodiment from the first embodiment described above is that the data unit data D is supplied to the decoding unit 12 in response to the reference prohibition signal RS instead of the reading unit 11. The reading unit 31 including the blocking switch circuit 36 is
That is, each of the conventional output buffers 14 is provided instead of the output buffer 24.

As a result, the reading section 21 reads the frame code data P34 of the frame code data sequence 213 similar to that of the first embodiment, and outputs the value "1" of the reference prohibition signal RS from the header interpreting section 23. In response to the value “1” of the RS, the switch circuit 27 prevents the data portion data D separated by the reading portion 21 from being output to the decoding portion 12. Therefore, since the frame code data P34 is not supplied to the decoding unit 12, there is no occurrence of an erroneously decoded frame due to decoding of unnecessary data as in the first embodiment. Further, since unnecessary decoding processing of unnecessary data is not required, there is an advantage that it is possible to efficiently take in required data and to shorten a blank period due to repetition of previous data.

[0031]

As described above, the decoding apparatus of the present invention detects reference prohibition information of a reference frame and supplies a reference prohibition signal, and generates a reference prohibition signal in response to the reference prohibition signal. Means for prohibiting output of decoded frames of inter-frame coded data decoded using the first and second reference frames, whereby the order of some frames is exchanged with respect to the frame of coded data to be decoded. In the case of editing such as correction or correction, even if the reference frame for decoding the inter-frame code data is replaced with another frame, output of erroneously decoded frame data is suppressed, and deterioration of image quality due to this is prevented. This has the effect.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a decoding device of the present invention.

FIG. 2 is a diagram showing a frame code data sequence and a decoded data frame sequence showing an example of an operation in the decoding device of the present embodiment.

FIG. 3 is a block diagram showing a first embodiment of the decoding device of the present invention.

FIG. 4 is a block diagram illustrating an example of a conventional decoding device.

FIG. 5 is a block diagram showing a relationship between a conventional decoding device and an encoding device.

FIG. 6 is a diagram showing a frame code data sequence and a decoded data frame sequence showing an example of the operation of the conventional decoding device.

[Explanation of symbols]

 1, 2, 3 decoding device 5 encoding device 11, 31 reading unit 12 decoding unit 13, 23 header interpreting unit 14, 24 output buffer 15, 16 buffer 25 reference prohibition bit detecting unit 26, 36 switch circuit

Claims (3)

(57) [Claims] 1. Intra-frame encoded data obtained by encoding pixel data of a moving image input as time-series data in frame units, and encoding only in a frame to be encoded.
A frame preceding the frame to be coded and a next frame as a reference frame, and inter-frame coded data coded according to the comparison result, wherein each of the intra-frame and inter-frame coded data is within the frame and the For decoding a frame code data sequence consisting of a header portion which is control information including identification of encoded data between the data portion and a data portion which is encoded data of the pixel data, sequentially reading the frame code data sequence Data reading means for separating the header part and the data part of frame code data; header interpreting means for receiving the supply of the header part, identifying the code data and supplying decoding control information; and supplying the data part The intra-frame and inter-frame coded data according to the decoding control information. Decoding means for respectively decoding and outputting decoded frame data; output buffer storing means for outputting the frame data in frame units; and first and second reference buffer storing means for storing the reference frame. In the decoding device, reference prohibition information detecting means for detecting reference prohibition information of the reference frame added to the header portion and supplying a reference prohibition signal; and the first and second reference prohibition signals in response to the reference prohibition signal. A decoding apparatus comprising: a decoding frame output prohibition unit that prohibits output of decoded frame data of the inter-frame coded data decoded using the reference frame read from the reference buffer storage unit. 2. The switch circuit according to claim 1, wherein said decoded frame output prohibiting means is configured to stop supplying said decoded frame data to said output buffer storing means in response to said reference prohibiting signal. Item 2. The decoding device according to Item 1. 3. The switch circuit according to claim 1, wherein said decoded frame output prohibiting means is a switch circuit provided to stop supplying said data portion to said decoding means in response to said reference prohibiting signal. Decoding device.