JP2803800B2 - Wiring method for semiconductor integrated circuit device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring processing method for a semiconductor integrated circuit device.

[0002]

2. Description of the Related Art In recent years, as the scale of digital / analog ICs has increased, shortening the development period has become an important issue, and semiconductor integrated circuit devices in which mask layout is automatically performed have been developed and used.

A conventional wiring processing method for a semiconductor integrated circuit device will be described below. FIG. 4 shows a mask layout diagram obtained by a conventional wiring processing method for a semiconductor integrated circuit device. In FIG. 4, 1 is a semiconductor substrate, 2 is a rectangular block row formed on the semiconductor substrate 1 at a predetermined interval, 3 is a rectangular channel row which is a space sandwiched between the rectangular block rows 2, and 4 is each rectangle. A functional mask block adjacently arranged in the block row 2, a functional mask block outer frame 5 defining the outline of the functional mask block 4, a wiring prohibited area 6 in the functional mask block 4, and a rectangular block row 7 2, a feed-through wiring passing vertically on 2, 8 a channel wiring in a rectangular channel row 3,
Reference numeral 9 denotes a schematic position of the feed-through wiring 7 determined by the general wiring processing.

[0004] Referring to FIG. 4, a wiring processing method for a semiconductor integrated circuit device will be described below. A plurality of rectangular block rows 2 are formed on a semiconductor substrate 1 at predetermined intervals (rectangular channel rows 3
), And a functional mask block 4 is arranged adjacent to each rectangular block row 2. The setting of the feed-through wiring 7 passing vertically through the rectangular block row 2 is performed together when the designer designs the functional mask block 4 or automatically set on the functional mask block 4 first by computer processing. Generate it. In this state, a wiring processing method of selecting the feed-through wiring 7 near the approximate position 9 of the feed-through wiring 7 determined by the general wiring processing and performing the channel wiring 8 between the feed-through wirings selected by the channel wiring. Had been taken.

[0005]

However, in the above-described conventional wiring processing method, since the feedthrough wiring 7 is first set on the functional mask block 4, the space between the opposing rectangular block rows 2 (within the rectangular channel rows 3) is set. The position of the feedthrough wiring 7 selected in the above is shifted, and when the channel wiring 8 is performed, the wiring (hereinafter, referred to as the horizontal direction) in the rectangular channel row 3 in the direction parallel to the rectangular block row 2 (hereinafter, referred to as the horizontal direction). (Referred to as a main line). Therefore, a direction perpendicular to the rectangular block row 2 of the rectangular channel row 3 (hereinafter, referred to as a vertical direction).
Has a problem that the chip size in the vertical direction increases as a result.

The present invention solves the above-mentioned conventional problems. By matching feed-through wiring positions between opposed rectangular block rows (within rectangular channel rows), the generation of a trunk line when performing channel wiring is minimized. West,
It is an object of the present invention to provide a wiring method for a semiconductor integrated circuit device capable of reducing a vertical chip area.

[0007]

In order to achieve this object, a wiring method for a semiconductor integrated circuit device according to the present invention comprises a general wiring process for determining a general wiring position of a feed-through wiring passing over a plurality of rectangular block rows. And if the general wiring position is in a wiring prohibited area on a first rectangular block row that is one of the plurality of rectangular block rows, the feedthrough wiring is bypassed to avoid the wiring prohibited area. A first detailed wiring processing step of resetting the position to a first position which is the shortest distance from the position, and the general wiring position of at least one second rectangular block row facing the first rectangular block row is set to the first position. A general wiring position changing step of changing the setting to a second position opposite to the second position, and a second detailed wiring for resetting the general wiring position on the second rectangular block row passing through the second position And management step, the schematic wiring position changing step and the detailed routing process, and a step of performing all of the plurality of rectangular block row.

[0008]

With this configuration, the feed-through wiring can set the same coordinate in the vertical direction between the opposing rectangular block rows, so that the generation of the trunk line when the channel wiring is performed is minimized, and the chip in the vertical direction is formed. The area can be reduced.

[0009]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a mask layout diagram obtained by a wiring method of a semiconductor integrated circuit device according to an embodiment of the present invention. In FIG. 1, 1 is a semiconductor substrate, 2 is a rectangular block row formed on the semiconductor substrate 1 at a predetermined interval, 3 is a rectangular channel row in a space sandwiched between the rectangular block rows 2, and 4 is each rectangular block row Function mask blocks 2 and 5 are disposed adjacent to each other, 5 is a function mask block outer frame defining an outline of the function mask block 4, and 6 is a wiring prohibited area in the function mask block 4 and 1
Reference numeral 7 denotes a feed-through wiring that passes over the rectangular block row 2 in the vertical direction, and reference numeral 18 denotes a channel wiring in the rectangular channel row 3.

FIG. 2 is a process chart showing a wiring method of the feedthrough wiring. 2, reference numerals 21, 22, and 23 denote rectangular block rows formed on the semiconductor substrate 1, reference numeral 19 denotes a general wiring position of the feed-through wiring 17 determined by general wiring, and reference numeral 10 denotes a general wiring position 19 of the feed-through wiring 17. Are feedthrough wiring pin positions which are intersections intersecting the rectangular block rows 21, 22, and 23. The numbers of the other components of the semiconductor circuit device are all the same as in FIG.

[0012] Regarding a wiring method of a semiconductor integrated circuit device,
This will be described with reference to FIG. Rectangular block rows 21, 22, and 23 are formed on the semiconductor substrate 1, and each rectangular block row 21,
The functional mask blocks 4 are arranged adjacent to each other in the insides 22 and 23 (not shown). At this time, each rectangular block row 21, 2
Arrangement coordinates of 2, 23, rectangular block rows 21, 22, 23
The information such as the arrangement coordinates of the functional mask block 4 in the device and the wiring prohibited area 6 in the functional mask block 4 is registered in the semiconductor integrated circuit device.

Next, the schematic wiring processing of the feed-through wiring 17 causes the wiring as shown in FIG. 2A to pass through the rectangular block rows 21, 22, and 23 in the vertical direction. Is determined. Based on the approximate wiring position 19 of the feedthrough wiring 17,
The feedthrough wiring 17 is set for each rectangular block row.

Next, as shown in FIG. 2B, first, a first rectangular block row to be subjected to the feed-through wiring processing is first selected from a plurality of rectangular block rows 2. In this embodiment, it is assumed that the rectangular block row 22 is selected. The wiring prohibited area 6 around the approximate wiring position 19 of the feedthrough wiring 17 in the rectangular block row 22 is read, and the data is avoided to set the feedthrough wiring 17 at the shortest distance from the feedthrough wiring pin position 10 (detailed wiring). Process).

Next, for the second rectangular block rows 21 and 23 opposed to the first rectangular block row 22, the feedthrough wiring pin positions 10 determined by the general wiring processing are changed. The feedthrough wiring pin position 10 on the lower side of the second rectangular block row 21 is located at the same coordinate position in the horizontal direction where the feedthrough wiring 17 set in the first rectangular block row 22 intersects the upper side of the rectangular block row 22. The feedthrough wiring pin position 10 on the upper side of the second rectangular block row 23 is changed to a position at the same horizontal coordinate where the feedthrough wiring 17 set in the first rectangular block row 22 intersects the lower side of the rectangular block row 22. You. The feedthrough wiring pin positions 10 on the lower side of the second rectangular block row 21 and the upper side of the rectangular block row 23 are not changed.

After the feedthrough wiring pin position 10 determined by the general wiring processing is changed as described above, detailed wiring processing is performed on the second rectangular block rows 21 and 23.
The result is shown in FIG.

As described above, according to the present embodiment, the schematic wiring processing step, the detailed wiring step in the first rectangular block row 22, and the second rectangular block row 21 facing the first rectangular block row 22 are performed. , Feed-through wiring 1 in 23
By the general wiring position changing step 7 and the detailed wiring processing step 7, when wiring is performed between rectangular block rows facing each other in the rectangular channel row 3, the wiring can be routed as straight as possible. As a result, the generation of trunk lines in the rectangular channel row 3 can be minimized, that is, the vertical direction of the rectangular channel row can be minimized, and the chip area in the vertical direction can be reduced.

FIG. 3 shows the result of performing feed-through wiring. In FIG. 3, reference numerals 31 and 32 are rectangular block rows formed on the semiconductor substrate 1. The numbers of the other components of the semiconductor circuit device are all the same as in FIG.

Here, a method of selecting the first rectangular block row will be described with reference to FIG. The schematic wiring position 19 of the feedthrough wiring 17 determined in the schematic wiring processing step is shown in FIG.
(A).

Next, the result of selecting the rectangular block row 32 having the least number of feedthrough wirings in the rectangular block row as the first rectangular block row and executing the wiring method of the semiconductor circuit device is shown in FIG. ). The feedthrough wiring 71 of the second rectangular block row 31 performed based on the position of the feedthrough wiring 73 of the first rectangular block row 32
As a result, the wiring path of the feedthrough wiring 72 next to the second rectangular block row 31 may be blocked, and the setting on the second rectangular block 31 may not be possible.

In order to avoid such a situation, the selection of the first rectangular block row is performed by selecting the rectangular block whose setting condition is strictest.
That is, it is determined that the rectangular block having the largest number of feedthrough wirings in the rectangular block row is selected. FIG. 3C shows the result of selecting the rectangular block row 31 having the largest number of feedthrough wirings in the rectangular block row and executing the wiring method of the semiconductor circuit device of the present invention. In this case, all the feedthrough wirings can be set.

If there are four or more rectangular block rows, the rectangular block row for which feedthrough wiring has already been set is regarded as the first rectangular block, and the general wiring position changing step and the detailed wiring processing step are similarly performed. By repeating the process for all of the plurality of rectangular block rows, the setting of the feedthrough wiring for all the rectangular block rows is completed.

[0023]

According to the present invention, in the feed-through wiring processing for each rectangular block row, the approximate wiring position of the target feed-through wiring is changed in consideration of the wiring result of the rectangular block row that has been subjected to the feed-through wiring processing. . As a result, the generation of a trunk line in a rectangular channel row can be minimized, that is, the vertical direction of the rectangular channel row can be minimized, and an excellent semiconductor integrated circuit device capable of reducing the chip area in the vertical direction can be realized. .

[Brief description of the drawings]

FIG. 1 is a mask layout diagram by a wiring method of a semiconductor integrated circuit device according to an embodiment of the present invention.

FIG. 2 is a process diagram showing a wiring method of a semiconductor integrated circuit device according to one embodiment of the present invention.

FIG. 3 shows a wiring processing result by a wiring method of the semiconductor integrated circuit device according to one embodiment of the present invention;

FIG. 4 is a mask layout diagram according to a conventional semiconductor integrated circuit device wiring method.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 rectangular block row 3 rectangular channel row 4 functional mask block 5 functional mask block outer frame 6 wiring prohibited area 7, 17 feedthrough wiring 8, 18 channel wiring 9, 19 schematic wiring position 10 feedthrough wiring pin position

──────────────────────────────────────────────────の Continued on front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/82

Claims (2)

(57) [Claims] 1. A general wiring processing step of determining a general wiring position of a feed-through wiring passing over a plurality of rectangular block rows, and a first rectangle in which the general wiring position is one of the plurality of rectangular block rows. A first detailed wiring processing step of resetting the feedthrough wiring to a first position of the shortest distance from the general wiring position by avoiding the wiring prohibited area if the wiring is in the wiring prohibited area on the block row; A general wiring position changing step of setting and changing the general wiring position of at least one second rectangular block row facing the first rectangular block row to a second position facing the first position; A second detailed wiring processing step of resetting the general wiring position on the second rectangular block row passing through the position of
A wiring method for a semiconductor integrated circuit device, comprising: a step of performing the general wiring position changing step and the detailed wiring processing step for all of the plurality of rectangular block rows. 2. A wiring method for a semiconductor integrated circuit device, wherein, among a plurality of rectangular block rows, a rectangular block row having the largest number of feedthrough wirings passing therethrough is set as a first rectangular block row.