JP2803408B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device suitable for a high-frequency IC having via holes, particularly a monolithic microwave IC (MMIC).

[0002]

2. Description of the Related Art FIG. 5 shows a sectional structure of an example of a conventional semiconductor device having via holes. In FIG. 1, a gate electrode 12, a source electrode 13, and a drain electrode 14 of a field effect transistor are formed on a semiconductor substrate 11 made of, for example, GaAs. As the gate electrode 12, a laminated metal such as Ti / Au or Ti / Al is used. As the source electrode 13 and the drain electrode 14, for example, A
A laminated metal such as u / Ge / Ni / Au is used.

[0003] on the semiconductor substrate 11, or, if example example Ni
/ 15 Au microstrip wiring made of laminated metal
The microstrip wiring 15 is connected to, for example, the source electrode 13. Immediately below the microstrip wiring 15, a via hole 16 penetrating the semiconductor substrate 11 is formed, and the inner surface of the via hole 16 and the entire back surface of the semiconductor substrate 11 are, for example, Ni / Ni.
A ground electrode 17 made of a laminated metal of Au is formed. The ground electrode 17 is connected to the microstrip wiring 15 at the upper part in the via hole 16.

The conventional semiconductor device shown in FIG. 5 is manufactured by the steps shown in FIG. First, as shown in FIG. 6A, a source electrode 13 and a drain electrode 14 are formed on a semiconductor substrate 11 having a predetermined thickness by Au / Ge / Ni / Au.
Are formed at the same time by vapor deposition and lift-off of the laminated metal.
Next, the gate electrode 12 is made of Ti / Au or Ti / A
1 is formed by vapor deposition of a laminated metal and lift-off. Subsequently, a resistor, an inductor, a capacitor, a passivation film or the like (not shown) is formed as necessary. Further, the microstrip wiring 15 is formed by vapor deposition of a laminated metal of Ti / Au and lift-off.

Next, the semiconductor substrate 11 shown in FIG. 6A is thinned by grinding, lapping, polishing, etching or the like from the back surface, so that the semiconductor substrate 11 has a thickness of 30 to 200 microns. Next, as shown in FIG. 6B, a via hole 16 penetrating through the semiconductor substrate 11 from the back surface of the semiconductor substrate is formed in a portion immediately below the microstrip wiring 15 by etching. Finally, Ni / Au is formed on the inner surface of the via hole 16 and the entire back surface of the semiconductor substrate 11 by electroless plating.
a ground electrode 17 made of Ni / Au laminated metal
Is formed, a conventional semiconductor device shown in FIG. 5 is obtained.

[0006]

In the conventional semiconductor device as described above, when the via hole 16 is formed, if the etching is over, the semiconductor substrate 11 is moved to the position shown in FIG.
Etching is performed as shown by the dotted line 18 in (b), and the upper portion of the via hole protrudes beyond the width of the microstrip wiring 15, and the hole of the via hole 16 is seen from the surface of the semiconductor substrate 11. In this case, there is a problem that metallization inside the via hole becomes difficult and electrical connection between the microstrip wiring 15 and the ground electrode 17 becomes difficult. The present invention solves the problems of the conventional semiconductor device as described above, and a semiconductor device in which a via hole does not become wider than a width of a microstrip wiring even if etching is slightly performed when forming a via hole. In particular, it aims at obtaining MMIC.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor device comprising a plurality of semiconductor devices each including at least one groove-shaped depression on an upper surface.
Or a semiconductor substrate on which a spiral groove-like depression is formed, a metal layer integrally formed on the inner surface of the depression and the periphery of the depression on the upper surface of the semiconductor substrate, and the depression is formed. A via hole formed at a depth reaching the dent from the back surface of the semiconductor substrate immediately below the portion that was formed,
A ground electrode formed in the via hole and on the back surface of the semiconductor substrate and connected to the metal layer formed on the inner surface of the depression.

A second semiconductor device according to the present invention has
A semiconductor substrate on which a depression including at least one groove-shaped depression is formed, a conductive material filled in the depression, and a part formed on a part of the upper surface of the semiconductor substrate in contact with the upper surface of the conductive material; Metal layer, a via hole formed to a depth reaching the dent from the back surface of the semiconductor substrate immediately below the portion where the dent is formed, formed in the via hole and on the back surface of the semiconductor substrate, And a ground electrode connected to the conductive material in the depression.

[0009]

In the first and second semiconductor devices according to the present invention, when forming a via hole from the back surface of the semiconductor substrate, the via hole is not formed so as to penetrate the semiconductor substrate, but is formed in the semiconductor substrate. Is formed to a depth that reaches the above-mentioned depression from the back surface of the semiconductor substrate. Therefore, even if the etching is slightly over, the upper portion of the via hole is not larger than the metal layer formed on the surface of the semiconductor substrate. No via holes can be formed with good reproducibility.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to the present invention will be described below in detail with reference to the illustrated embodiment. FIG. 1 is a sectional view showing a first embodiment of a semiconductor device of the present invention, in particular, an MMIC. In FIG. 1, a gate electrode 2, a source electrode 3, and a drain electrode 4 of a field effect transistor are formed on a semiconductor substrate 1 made of, for example, GaAs. As in the conventional semiconductor device shown in FIG. 5, the gate electrode 2 is made of Ti / Au.
And a laminated metal such as Ti / Al, and the source electrode 3 and the drain electrode 4 are, for example, Au / Ge / Ni /
A laminated metal such as Au is used.

On the semiconductor substrate 1, a plurality of holes or grooves 5 are formed. The depression 5 is formed by several straight grooves, for example, three grooves as shown in FIG. 3A, or concentrically as shown in FIGS. 3B, 3C and 3D. It is formed in the shape of a groove such as a circle, square, rectangle or the like.
On the inner surface of the depression 5 and on the surface of the semiconductor substrate 1, a microstrip wiring 6 made of, for example, a Ni / Au laminated metal is formed on the periphery of the depression. The microstrip wiring 6 is connected to, for example, the source electrode 3.

Immediately below the portion where the depression 5 is formed, a via hole 7 reaching the depression 5 from the back surface of the semiconductor substrate 1.
Are formed on the inner surface of the via hole 7 and the entire back surface of the semiconductor substrate 1, for example, a ground electrode 8 made of a laminated metal of Ni / Au is formed. The ground electrode 8 is connected to the laminated metal layer forming the microstrip wiring 6 in the upper part of the via hole 7.

The first embodiment of the MMIC of the present invention shown in FIG. 1 is manufactured by the steps shown in FIG. First, FIG.
As shown in (a), for example, GaAs having a predetermined thickness is used.
A source electrode 3 and a drain electrode 4 are simultaneously formed on a semiconductor substrate 1 made of s by, for example, vapor deposition of a laminated metal of Au / Ge / Ni / Au and lift-off. Next, the gate electrode 2 is formed by, for example, vapor deposition of a laminated metal of Ti / Au or Ti / Al and lift-off. Subsequently, a resistor, an inductor, a capacitor, a passivation film or the like (not shown) is formed as necessary.

Next, as shown in FIG. 2B, a recess 5 having a shape of any one of FIGS. 3A to 3D is formed at a predetermined position on the surface of the semiconductor substrate 1 by etching to a size of 5 to 30 μm. Form at depth. The depression 5 is formed by, for example, forming an SiO ₂ layer on the surface of the semiconductor substrate 1 and then performing patterning to form a mask having a predetermined shape, and dry-etching the semiconductor substrate 1 using the SiO ₂ mask. It is formed. It is the etching Gugasu, Cl ₂ For example, SiC
l ₄ is often used.

Next, on the inner surface of the depression 5 and on the surface of the semiconductor substrate 1, for example, a Ni / Au laminated metal layer is deposited and lifted off around the depression to form a microstrip wiring 6. The microstrip wiring 6 is connected to, for example, the source electrode 3. Next, the semiconductor substrate 1 is thinned by grinding, lapping, polishing, etching, or the like from the back surface to a thickness of 30 to 200 microns. FIG. 2C shows the state at this time.

Next, as shown in FIG. 2D, a via hole 7 is formed by etching from the back surface of the semiconductor substrate 1 to the depth reaching the recess 5, and the inner surface of the via hole 7 and the semiconductor substrate 1 are formed. N by electroless plating on the entire back surface
i / Au is formed, Au is formed by electrolytic plating, and Ni is formed.
A ground electrode 8 made of a laminated metal of / Au is formed. Thereby, as shown in FIG. 1, a semiconductor device in which the ground electrode 8 is connected to the microstrip wiring 6 in the recess 5 through the via hole 7 is obtained.

FIG. 4 shows a second embodiment of the semiconductor device of the present invention. In the semiconductor device of the second embodiment, after forming the recess 5 on the semiconductor substrate 1 of FIG. 2B by etching,
Using the SiO ₂ mask used for forming the depression 5 as it is, a semiconductor having an etching rate lower than that of the GaAs semiconductor substrate 1, for example, Si, AlGaAs, In
GaAs or a conductive substance such as copper or gold
It is grown only in the depression 5 by E (Molecular Beam Epitaxy) or MOCVD (Metal Organic Chemical Vapor Deposition). As a result, as shown in FIG. 4, the recess 5 is filled with the conductive substance 9. After filling the conductive material 9, the Si
The O ₂ mask is removed. Next, a metal layer 26 for microstrip wiring is formed on the semiconductor substrate 1 in contact with the conductive substance 9.

Next, the semiconductor substrate 1 is ground from the back side by grinding, lapping, polishing, etching or the like for 30 to 200 hours.
After thinning to a micron thickness, Figure 2
Similarly to (d), a via hole 27 is formed by etching from the back surface of the semiconductor substrate 1 to the depth reaching the depression 5.
I do. At this time, the conductive material 9 is etched from the semiconductor substrate 1.
Since the etching speed is low, the
Even if there is a slight etching over,
It keeps its shape when filling. Next, via hole 27
Ni / Au is formed by electroless plating on the inner surface of the semiconductor substrate 1 and the entire back surface of the semiconductor substrate 1, Au is formed by electrolytic plating, and a ground electrode 28 made of a Ni / Au laminated metal is formed. As a result, as shown in FIG.
Is connected to the conductive material 9 in the depression 5 through the via hole 27. In the second embodiment shown in FIG. 4, the depression 5 may be a linear groove having several lines as shown in FIG. 3 (a), or as shown in FIGS. 3 (b) to 3 (d). Concentric circular, square, rectangular grooves
Or a spiral groove .

In the semiconductor device of the present invention shown in FIGS. 1 and 4, the via hole 7 or 27 is originally formed to a depth reaching the groove-shaped depression 5 from the back surface of the semiconductor substrate 1. Therefore, even if a slight over-etching occurs due to a change in the conditions during the etching process and a via hole having a size as shown by the dotted line 30 in FIG. 2C or the dotted line 31 in FIG. The upper portion of the hole does not protrude outside the microstrip wiring 6 in FIG. 2D or the metal layer 26 in FIG. Therefore, the metallization in the via hole becomes difficult due to the etching over, and the electrical connection with the microstrip wiring 6 and the conductive material 9 does not become defective.

The field effect transistor formed on the GaAs semiconductor substrate is often used as a so-called source ground circuit in which a source electrode is connected to a ground electrode.
Alternatively, the metal layer 26 has been described as being connected to the source electrode of the field effect transistor formed on the semiconductor substrate 1. However, depending on the circuit configuration of the semiconductor device, the microstrip wiring 6 or the metal layer 26 may be connected to the field effect transistor. It may be connected to a drain electrode, a gate electrode, a resistor, an inductor, a capacitor, or the like of a transistor. The shape of the recess 5 may be three linear grooves as shown in FIG. 3, a concentric circular, square, or rectangular groove, a spiral groove, or any other shape. Can be used.

[0021]

As described above, in the semiconductor device of the present invention, the upper surface of the semiconductor substrate includes at least one groove-shaped depression.
Free recess provided depressions form a metal layer connected to the upper surface to form micro strip line of the semiconductor substrate in the viewing
Or filled with a conductive material, and formed a via hole reaching the bottom of the recess from the back surface of the semiconductor substrate. Occurrence of defects due to oversizing is greatly reduced, and the yield can be significantly improved.

[Brief description of the drawings]

FIG. 1 is a sectional view of a first embodiment of a semiconductor device of the present invention.

FIGS. 2 (a) to 2 (d) are diagrams illustrating a manufacturing process of the semiconductor device of the present invention shown in FIG.

FIGS. 3A to 3D are plan views showing the shapes of depressions formed in the semiconductor device of the present invention shown in FIG.

FIG. 4 is a sectional view of a second embodiment of the semiconductor device of the present invention.

FIG. 5 is a sectional view of an example of a conventional semiconductor device.

6 (a) and 6 (b) are diagrams illustrating a manufacturing process of the conventional semiconductor device shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Gate electrode 3 Source electrode 4 Drain electrode 5 Depression 6 Microstrip wiring 7 Via hole 8 Ground electrode 9 Conductive substance 26 Metal layer 27 Via hole 28 Ground electrode

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/338 H01L 21/768 H01L 29/41 H01L 29/812

Claims (7)

(57) [Claims] 1. An upper surface including at least one groove-shaped depression
A plurality of dents, or a semiconductor substrate on which a spiral groove-like dent is formed, a metal layer integrally formed on an inner surface of the dent and a periphery of the dent on an upper surface of the semiconductor substrate, and the dent is formed; A via hole formed to a depth reaching the dent from the back surface of the semiconductor substrate immediately below the portion, and a metal layer formed in the via hole and the back surface of the semiconductor substrate and formed on the inner surface of the dent. A semiconductor device comprising a connected ground electrode. 2. The dent formed on the upper surface of the semiconductor substrate,
A recess including a plurality of straight groove recesses, concentric circular groove recesses
Depressions, including concentric square groove depressions, concentric rectangular
2. The semiconductor device according to claim 1, wherein the semiconductor device is any one of a depression including a groove and a spiral groove . 3. An electrode of a field effect transistor is formed on an upper surface of a semiconductor substrate, and a metal layer integrally formed on an inner surface of the depression and a peripheral portion of the depression on the upper surface of the semiconductor substrate is a microstrip wiring. 2. The semiconductor device according to claim 1, wherein said microstrip wiring is connected to a source electrode of said field effect transistor. 4. An upper surface including at least one groove-shaped depression.
A semiconductor substrate having a recess formed therein, a conductive material filled in the recess having a lower etching rate than the semiconductor substrate, and a conductive material on the semiconductor substrate which is in contact with the upper surface of the conductive material.
A metal layer formed on a part of the surface, the recesses and via holes formed in a depth reaching the recess above the back surface of the semiconductor substrate directly under the formation portion, the via holes and the semiconductor substrate And a ground electrode connected to the conductive material in the depression. 5. The recess formed on the upper surface of the semiconductor substrate,
A recess including a plurality of straight groove recesses, concentric circular groove recesses
Depressions, including concentric square groove depressions, concentric rectangular
The semiconductor device according to claim 4, wherein the semiconductor device is one of a depression including a groove and a spiral groove . 6. An electrode of a field effect transistor is formed on an upper surface of a semiconductor substrate, and a metal layer formed on a part of the upper surface of the semiconductor substrate in contact with an upper surface of a conductive material forms a microstrip wiring. 5. The semiconductor device according to claim 4, wherein said microstrip wiring is connected to a source electrode of said field effect transistor. 7. The conductive material is Si, AlGaAs, I
5. The semiconductor device according to claim 4, wherein the semiconductor device is a substance selected from a semiconductor such as nGaAs and a metal such as Au and Cu.