JP2737735B2 - Polishing control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an ATM (Async).
More particularly, the present invention relates to a policing controller for controlling a flow rate of a cell based on information on traffic of the cell.

[0002]

2. Description of the Related Art In an ATM network, there is a possibility that cells (fixed-length packets) exceeding quality traffic promised by a user may be transmitted.
(Usage Parameter Control)
In the device, monitor the cell flow rate for each connection,
The network is defended by passing the cell if it meets the promise and discarding or tagging the cell if it violates. Here, tagging refers to a process of lowering the priority of a cell and passing the cell.

As an apparatus for realizing such policing control, for example, as shown in FIG.
Parameter memory unit 3, arithmetic memory unit 4, cell control unit 6, reference time counter 20, and policing determination unit 50
Has been considered.
Here, the parameter memory unit 3 stores a cell interval (minimum cell interval) T and a CDV (Cell D) designated by the user.
The memory 4 for storing the permissible value τ for each connection, and the memory for operation 4 is a memory for storing the expected arrival time TAT, which is a variable value used for policing determination, for each connection until the next cell arrives. FIG. 8 is an operation flowchart of FIG. The policing control device of FIG. 7 operates as follows.

When a new cell arrives (S21), the address detector 1 detects the connection address of the cell, and sends a cell interval T (T _i) corresponding to the connection from the parameter memory unit 3 and the operation memory unit 4. to), and CDV tolerance tau (tau _i) and expected arrival time and TAT (TAT _i) reads out, while policing determination unit 50 outputs the reference time counter 20 at that time,
That is, the cell arrival time ta is read (S22). next,
The policing determination unit 50 reads the cell interval T _i read from the parameter memory unit 3 _{, the} CDV allowable value τ _i , the expected arrival time TAT _i read from the operation memory unit 4, and the reference time counter 20. The following policing determination is performed based on the cell arrival time ta.

When the cell arrival time ta is equal to the expected arrival time TAT _i
It is checked whether or not it is later (S23). If it is later, it is determined that it is suitable (YES in S23), and the expected arrival time TAT _i of the arithmetic memory unit 4 is calculated by adding the cell arrival time ta and the cell interval T _i. Update (S25).

When the cell arrival time ta is equal to the expected arrival time TAT _i
If it is not later (NO in S23), the cell arrival time ta
If the time corresponding to the value obtained by adding the CDV allowable value τ _i to the expected arrival time TAT _{i is later} than the expected arrival time TAT _i (YES in S24), it is determined that the time is suitable, and the expected arrival time TA
Adding the cell interval T _i to T _i (S26). Otherwise, it is determined that violate (NO in S24), the expected arrival time TAT _i of the arithmetic memory unit 4 has been left original value (S27).

The cell control unit 6 allows cells determined to be conforming to pass based on the determination result of the policing determination unit 50,
The cell determined to be in violation is discarded or tagged.

The above policing control is performed by GCRA (Ge
(neric Cell RateAlgorithm)
VSA (Virtual Schedul)
An example is shown along an LBA (Leaky Bucket Algorithm).
thm), the operation memory unit 4 holds the arrival time of the previous cell and the bucket counter value, and the judgment processing of the policing judgment unit 50 differs accordingly.

[0009]

Since the reference time counter 20 is a counter having a finite number of bits, when the count value reaches the maximum value and returns to 0 again, the time reversely occurs. FIG. 8 shows the case where the time is not reversed.
The arithmetic operation in step S23 can always be executed correctly, but if the time is reversed, the result of the arithmetic operation in step S23 cannot be guaranteed to be correct. That is, there is a possibility that the policing determination is incorrect.

Therefore, in order to solve such a problem, a counter having a very large number of bits is used so that the reference time counter 20 does not return to 0 during the operation time. Therefore, not only does the amount of hardware of the reference time counter 20 increase, but also a policing determination using the reference time requires an arithmetic circuit having a large bit width. There is a problem that a large-capacity arithmetic memory unit 4 for storing until the cell arrives is required.

SUMMARY OF THE INVENTION An object of the present invention is to provide a policing control device which can accurately perform policing determination even when the count value of the reference time counter exceeds the boundary of 0 from the maximum value and the time reverses in a pseudo manner. To provide.

Incidentally, as a technique similar to the present invention, there is a polishing control method described in Japanese Patent Application Laid-Open No. 5-183570. However, this conventional technique monitors whether or not the reference time counter overflows, and adds the monitoring result to the judgment material, and requires an overflow detection function. Further, a configuration in which policing is determined without overflow detection is also disclosed. In that case, however, it is necessary to provide a reference time counter independently for each connection, which increases the amount of hardware. The present invention differs from the above-described conventional system in that the overflow detection function is not required and the reference time counter can be shared by a plurality of connections.

[0013]

According to the present invention, there is provided an apparatus for policing a cell on a connection in an ATM network, comprising: a parameter memory unit for holding a cell interval and a CDV allowable value designated by a user; A reference time counter whose one cycle is at least four times or more the time corresponding to the maximum value of the sum of CDV allowable values, an operation memory unit that holds a variable value used for policing determination until the next cell arrives, A flag memory unit that holds first and second flags that are set alternately at regular intervals equal to or longer than the time corresponding to the maximum value, and that are reset when they are determined to be appropriate by reference to policing determination; Every time a new cell arrives, the current time of the reference time counter, the cell interval of the parameter memory unit, and the CDV allowable value A policing determination unit that performs policing determination of the arriving cell with reference to the variable value of the arithmetic memory unit and the first and second flags of the flag memory unit, and the policing determination unit determines that the cell is compatible. A cell controller for passing cells and discarding or tagging cells determined to be in violation; and the policing determination unit sets both the first and second flags prior to detailed policing determination. It is configured to check whether or not they are set, and to judge that they are compatible when both are set.

As described above, the reference time counter having one cycle of at least four times the time corresponding to the maximum value of the sum of the cell interval and the allowable value of the CDV is used, and at least corresponds to the maximum value. Using the first and second flags that are set alternately at regular intervals of time or longer and that are reset at the time of policing determination of conformity,
If both the first and second flags are set at the time of policing determination, it becomes clear that the time corresponding to the maximum value of the sum of the cell interval and the CDV allowable value has elapsed since the arrival of the previous cell. It can be determined that the vehicle has passed immediately. Also,
Even if at least one of the first and second flags is not set, the operation range of the judgment by the policing judgment unit is less than 1/2 of the period of the reference time counter. Even if the time that exceeds the boundary between 0 and 0 is reversed, it can be determined normally. This is because when it is guaranteed that the difference between a certain time A and a certain time B thereafter is less than の of the period of the reference time counter, for example, the magnitude determination of A and B is performed in binary numbers. This is because it can be determined by the sign of the most significant bit of the expressed difference value between A and B.

Here, the polishing control device of the present invention
It is applicable to both GCRA VSA and LBA. As the variable value held in the operation memory unit, the expected arrival time is used when applied to VSA, and the bucket counter value and the arrival time of the previous cell are used when applied to LBA.

In the configuration in which the expected arrival time is used as the variable value, when the first and second flags are set together, the policing determination unit determines whether the cell arrival time and the cell arrival time are equal to each other. The sum with the interval is stored in the arithmetic memory unit as a new estimated arrival time, and the first
If at least one of the flag and the second flag is not set, when the arrival time of the cell is later than the expected arrival time, it is determined that the cell is compatible, and the sum of the arrival time of the cell and the cell interval is calculated as the new expected arrival time. When the arrival time of the cell is not later than the expected arrival time, it is suitable if the time corresponding to the sum of the arrival time of the cell and the CDV allowable value is later than the expected arrival time. And a value obtained by adding the cell interval to the expected arrival time is stored in the calculation memory unit as a new expected arrival time, and the time corresponding to the sum of the cell arrival time and the CDV allowable value is the If it is not later than the expected arrival time, it is determined to be a violation.

Further, in the configuration using the bucket counter value and the arrival time of the previous cell as the variable values, the policing determination unit determines whether or not the first and second flags are set at the present time. The cell arrival time and the cell interval are stored in the calculation memory unit as the arrival time and bucket counter value of a new previous cell, and the first
And when at least one of the second flag and the second flag is not set, a value X 'obtained by subtracting the time difference between the arrival time of the previous cell and the arrival time of the current cell from the bucket counter value.
Is smaller than 0, the cell is determined to be compatible, and the current cell arrival time and the cell interval are stored in the arithmetic memory unit as the new previous cell arrival time and bucket counter value, and the X 'is not smaller than 0. If X 'is not larger than the CDV allowable value, it is determined that the cell is compatible with the current cell arrival time and the value obtained by adding the cell interval to X' as the new previous cell arrival time and bucket counter value. Stored in the operation memory unit, and the X ′
Is larger than the CDV allowable value, it is determined to be a violation.

Further, according to the present invention, in a policing control device for controlling traffic of cells on one or more types of connections multiplexed in an ATM network, a cell interval and a CDV tolerance specified by a user are held for each connection. A parameter memory unit, a reference time counter having one cycle at least four times as long as the time corresponding to the maximum value of the sum of the cell interval and the CDV allowable value, and a variable value used for policing determination in the next cell. An operation memory unit that is held for each connection until arrival, and set alternately at regular intervals at least equal to or longer than the time corresponding to the maximum value, and are reset at the time when it is determined by the policing determination that a match is found. A flag memory unit for holding the first and second flags for each connection, and for each new cell arrival An address detection unit for detecting a connection address and reading out a corresponding cell interval, a CDV allowable value, a variable value, and first and second flags from the parameter memory unit, the operation memory unit and the flag memory unit; With reference to the cell interval, CDV allowable value, variable value, first and second flags read by the address detection unit, and the cell arrival time obtained from the reference time counter, policing judgment of the arriving cell is performed. A policing determination unit to perform, and a cell control unit that discards or tags a cell determined as conforming by the policing determination unit, and discards or determines a cell determined to be in violation. Prior to the policing determination, it is checked whether the first and second flags are set together. It has a configuration in which a constant.

In a preferred embodiment, the time at which the first and second flags are set is shifted for each connection.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of a policing control apparatus according to an embodiment of the present invention, and shows an example in which policing control is performed by an algorithm according to the VSA of GCRA. As shown in FIG. 1, the policing control device according to the present embodiment includes an address detection unit 1, a reference time counter 2, a parameter memory unit 3, an operation memory unit 4, a policing determination unit 5,
, A cell control unit 6, a flag memory unit 7, and a flag setting unit 8.

The parameter memory unit 3 stores a cell interval (minimum cell interval) T specified by a user for policing determination.
And a CDV allowable value τ for each connection address. Assuming that the connections are 1 to n, the parameter memory unit 3 stores the connection i (i = 1 to 1).
The cell interval T _{i and the} CDV allowable value τ _i corresponding to n) are held.

The operation memory section 4 is a section for holding a variable value for each connection address until the next cell arrives for use in policing determination. In the present embodiment, the target arrival time TAT is used as the variable value because VSA is targeted.
Is used. That is, each connection holds an expected arrival time TAT _i (i = 1 to n) corresponding to one to one.

The reference time counter 2 forms a reference time generation circuit of a predetermined cycle (TT) that counts up in units of one cell. Here, when the reference time counter 2 reaches the maximum value, it returns to 0 and repeats counting up again. One cycle TT of the reference time counter 2 is
(Maximum value of cell interval T _i + maximum value of CDV allowable value τ _i )
The number of bits of the reference time counter 2 is determined so as to be four times or more. Hereinafter, the current time generated by the reference time counter 2 is described as ta.

The flag memory section 7 is a section for holding a first flag f0 and a second flag f1 for each connection address. Hereinafter, the first flag for each connection is referred to as f0 _i , and the second flag is referred to as f1 _i . First and second flags f0 _i, f1 _i corresponding to one connection
Are set alternately at regular intervals equal to or more than (the maximum value of the cell interval T _i + the maximum value of the CDV allowable value τ _i ). In the present embodiment, the setting is made alternately every ４ cycle of the cycle TT of the reference time counter 2. This flag setting process is performed by the flag setting unit 8. Also, the first and second flags f0 _i, f1 _i corresponding to one connection are determined by the policing determination unit for the policing determination when the cell arrives through the connection and the first and second flags f0 _i, f1 _i, f1 _i. f1 _i is referred to, and both are reset when it is determined to be compatible. This flag reset processing is performed by the policing determination unit 5.

The flag setting section 8 is a section for performing the setting processing of the first and second flags f0 _{i and} f1 _i for each connection of the flag memory section 7 as described above. In the present embodiment, in order to avoid concentration of the flag setting process, the set time is shifted for each connection. Various methods are conceivable for this method.
The flag f0 _i of (TT * 0/4) + xi _, (TT * 2
/ 4) + set by x _i, a second flag f1 _i is, (T
T * 1/4) + x i, has been set at (TT * 3/4) + x i. Here, x _i is a value allocated to a different value at each connection, 0, 1, 2, ..., take the value. For example, when x ₅ = 5 is assigned to the connection with the connection address No. 5, the first flag f0 ₅
Indicates that the current time ta of the reference time counter 2 is (TT * 0 /
4) +5, (TT * 2 /4) is set at the timing becomes +5, the second flag f1 ₅ is the current time ta of the reference time counter 2 (TT * 1/4) +5 , (TT *
3/4) +5 is set at the timing. Further, x ₆ =
If you allocated a 6, the first flag f0 ₆ is the current time ta of the reference time counter 2 (TT * 0/4) +6 ,
(TT * 2/4) is set at the timing becomes +6, the second flag f1 ₆ is the current time ta of the reference time counter 2 (TT * 1/4) +6 , (TT * 3/4)
It is set at the timing of +6.

The address detecting section 1 detects a connection address every time a cell arrives, and detects a connection address.
From the arithmetic memory unit 4 and the flag memory unit 7, the cell interval T _i corresponding to the connection address _{, the} CDV allowable value τ _{i, the} expected arrival time TAT _i, the first and second flags f
0 _i, f1 _i is a means for reading out. Further, it notifies the policing determination unit 5 that a new cell has arrived.

The policing determination unit 5 sets the following every time a cell arrives.
The current time ta at that time is obtained from the reference time counter 2, and the cell arrival time ta and the parameter memory unit 3,
Cell interval T _i read from operation memory unit 4 and flag memory unit 7 _, CDV allowable value τ _i, expected arrival time TAT
_i, a means for making a policing determination based on the first and second flags f0 _{i and} f1 _i . There are two kinds of judgment results, conformity and violation, and the cell control unit 6 is notified.

The cell control section 6 is a section for passing a cell determined to be conforming, and for discarding or tagging a cell determined to be in violation.

FIG. 2 is an operation flowchart of the embodiment of FIG. Hereinafter, the operation of this embodiment will be described with reference to FIGS.

When a new cell arrives (S1), the address detection unit 1 detects the connection address of the cell and responds to the connection address from the parameter memory unit 3, the operation memory unit 4, and the flag memory unit 7. Cell interval T _i, CDV tolerance τ _i, expected arrival time TAT _i, first
And the second flags f0 _{i and} f1 _i are read, and the policing determination unit 5 compares the cell arrival time ta with the reference time counter 2
(S2).

Next, the policing determination unit 5 determines the cell arrival time ta, cell interval T _i, CDV allowable value τ _i, expected arrival time T
A policing decision is made based on AT _{i and} the first and second flags f0 _i, f1 _i . In this determination, first, the first and second flags f0 _{i and} f1 _i are checked (S3).
If both flags are set (S
3 (YES at 3), since there is a sufficient cell interval, it is determined to be compatible (passed) (S6). This is the first and second
That the flags f0 _{i and} f1 _i are set together, it is clear that the period of １ ／ cycle of the cycle TT of the reference time counter 2 has elapsed since the arrival of the previous cell.
Then, １ ／ of the period TT is (the maximum value of the cell interval +
This is because it is set to be equal to or more than the maximum allowable value of the CDV.

On the other hand, as a result of the flag check, if at least one of the first and second flags f0 _{i and} f1 _i has not been set (NO in S3), step S in FIG.
23 and S24 are checked to make a determination (S
4, S5). Here, the first and second flags f0 _i, f
The worst case where 1 _i is not both set is the period T
Although the cell interval is 1 / 2-1 of T, even in this case, the operation range of the judgment by the policing judgment unit 5 is 1 in the period TT.
/ 2 or less. The difference between the two times is the period TT
Is smaller than の, the magnitude can be determined by the sign of the most significant bit of the subtraction result when the two times are represented by a binary number, so that the determination in step S4 can be performed correctly. . Therefore, in step S4, for example,
TAT expressed in binary from ta expressed in binary
_i is subtracted, and when the value of the most significant bit is 0, it is determined that ta is larger.

If the checks at steps S3 and S4 show a match, the policing determination unit 5 rewrites the expected arrival time TAT _i in the operation memory unit 4 to the value of ta + T _i , and simultaneously sets the first and second values. Flags f0 _i, f1 _i
Are reset together (S6). In addition, when the policing determination unit 5 determines that there is a match in the check in step S5,
The expected arrival time TAT _i of the operation memory unit 4 is calculated as TAT _i
+ T _i rewrites the value of both resets the first and second flags _{f0 i, f1 i (S7)} . Further, when the policing determination unit 5 determines that there is a violation in the check in step S5, the policing determination unit 5 calculates the expected arrival time TAT of the arithmetic memory unit 4.
_i and the first and second flags f0 _i,
f1 _i is not reset (S8). Then, the cell control unit 6 passes the cell determined to be compatible, and discards or tags the cell determined to be in violation.

FIG. 3 is an example of a time chart of the embodiment of FIG. Here, the maximum value of the cell interval T is set to 2
The maximum value of the CDV allowable value τ is set to 2 to the 26th power. From this, the period TT of the reference time counter 2 is set to 2 to 29 so that T _max + τ _max <TT * １ ／.
It is set to the power. In the illustrated example, as indicated by the mark x, the first flag f0 _i corresponding to a certain connection is set at 0/4, 2/4 of the TT, and the second flag f1 _i Is set at 1/4, 3/4 of TT.
That is, the case where the value of x _i as described above is zero. Incidentally, when the number of connections is, for example, 4096, as shown in FIG. 4, x _i takes a value from 0 to 4095.

In FIG. 3, in cell arrival example 41, f0
_{Since i} = f1 _i = “1”, a time interval equal to or longer than １ ／ cycle of TT is left between the arrival of the previous cell and the arrival of the current cell, and it is immediately determined to be appropriate in step S3 of FIG. . In the cell arrival example 42, f0 _i = “1”, f1 _i =
Since it is “0”, the time from the arrival of the previous cell to the arrival of the current cell is 1 /
Since there is no guarantee that the cell interval is longer than four cycles, detailed determinations in steps S4 and S5 are performed. However, in this case, since it falls within the calculation range of less than １ ／ of the period TT of the reference time counter 2, it is possible to determine normally even if the reference time counter 2 is beyond the boundary of 0 from the maximum value.

The result of the decision made by the policing decision unit 5 is notified to the cell control unit 6, and the cell control unit 6 allows cells determined as conforming to pass therethrough, and discards or tags the cells determined as violating. Do.

FIG. 5 is a block diagram of a policing control device according to another embodiment of the present invention, showing an example in which policing control is performed by an algorithm according to the LBA of GCRA. As shown in the figure, the policing control device of the present invention comprises an address detection unit 1, a reference time counter 2, a parameter memory unit 3, an operation memory unit 4 ', a policing determination unit 5', a cell control unit It comprises a unit 6, a flag memory unit 7, and a flag setting unit 8. Among them, the address detection unit 1, the reference time counter 2, the parameter memory unit 3,
The cell control unit 6, flag memory unit 7, and flag setting unit 8 are the same as those in FIG.

The operation memory unit 4 'holds the arrival time LCT _i bucket counter value X _i and the previous cell for each connection to the next cell arrival for use in policing decision. Here, the maximum value of the bucket counter value is given by (maximum value of cell interval + maximum value of CDV allowable value).

The policing determination section 5 'obtains the current time ta at that time from the reference time counter 2 every time a cell arrives, and stores this cell arrival time ta, the parameter memory section 3, the operation memory section 4' and Based on the cell interval T _i read from the flag memory unit 7 _{, the} CDV allowable value τ _{i, the} bucket counter value X _i, the arrival time LCT _{i of} the previous cell _{, and} the first and second flags f0 _{i and} f1 _i. Perform policing determination.

FIG. 6 is an operation flowchart of the embodiment of FIG. Hereinafter, the operation of this embodiment will be described with reference to FIGS.

When a new cell arrives (S11), the address detection unit 1 detects the connection address of the cell and responds to the connection address from the parameter memory unit 3, the operation memory unit 4 ', and the flag memory unit 7. Cell interval T _i, CDV allowable value τ _i, bucket counter value X _i,
Arrival time LCT _{i of} the previous cell _, first and second flags f0 _i,
f1 _i , while the policing determination unit 5 ′ reads the cell arrival time ta from the reference time counter 2 (S1).
2).

Next, the policing determination unit 5 'includes a cell arrival time ta, a cell interval T _{i, an} allowable CDV value τ _{i, a} bucket counter value X _{i, a} previous cell arrival time LCTi _, first and second flags. Policing determination is performed based on f0 _{i and} f1 _i . In this determination, first, the first and second flags f0 _i, f1
Check _i (S13). If both flags are set (YES in S13), since there is a sufficient cell interval, it is determined that there is a match (pass) in step S18 via step S14. This means that both the first and second flags f0 _{i and} f1 _i are set, which means that the period TT of the reference time counter 2 is one.
It is clear that the period of 周期 period has elapsed from the arrival of the previous cell, and the ４ period of the period TT is set to (the maximum value of the cell interval + the maximum value of the CDV allowable value) or more. It is.

On the other hand, as a result of the flag check, if at least one of the first and second flags f0 _{i and} f1 _i is not set (NO in S13), a detailed judgment is made as follows.

First, the value of the internal variable X 'is obtained as follows (S15). _{X '= X i - (ta} -LCT i) That is, the bucket counter value X _i, determining the value obtained by subtracting the time interval before the cell and the current cell (ta-LCT _i). Here, arithmetic operations of (ta-LCT _i), if the reference time counter 2 has occurred reversal of time beyond the boundaries from 0 to the maximum value, conventionally, always not always possible to correctly calculated In this embodiment, the period TT of the reference time counter 2 is
Can be calculated correctly because it falls within the calculation range of less than 1/2.

Next, it is checked whether or not the internal variable X 'is smaller than 0 (S16). If it is smaller, the process goes to step S14 via step S14, and it is determined to be appropriate in step S18.

When the internal variable X 'is not smaller than 0 (S
16 NO), the internal variable X 'checks whether larger CDV tolerance τ _i (S17). And the internal variable X '
Is larger than the CDV allowable value τ _i (YE in S17).
S), the process proceeds to step S19 to determine a violation, otherwise (NO in S17), the process proceeds to step S18 to determine conformity.

In step S14, the internal variable X '
Is set to 0, and in step S18 determined to be appropriate,
Operation memory portion 4 'of the bucket counter value X _i of the (X' +
T _i ), the previous cell arrival time LCT _i is updated to ta, and the first and second flags f0 _i, f
1 Reset _i . Note that the step S determined to be in violation
In 19, the bucket counter value X _i of the arithmetic memory unit 4 _', the previous cell arrival time LCT _i Leave the first and second flags f0 _i, f1 _i also not reset.

The result of the judgment by the policing judgment unit 5 'is sent to the cell control unit 6, and the cell control unit 6 passes the cells judged as conforming, and discards or tags the cells judged as violating.

[0050]

As described above, according to the present invention, the policing determination can be performed normally even when the time is reversed in a pseudo manner beyond the boundary of the reference time counter from the maximum value to 0. As a result, the number of bits of the reference time counter can be reduced to a necessary minimum, and policing determination using the reference time can be configured with a small bit width. Further, the memory capacity for storing the variable values used in the policing determination until the next cell arrives can be reduced.

Further, a policing control device for controlling traffic of cells on one or more types of connections multiplexed in the ATM network can be realized by using one reference time counter. By shifting the time at which the first and second flags are set, the processing of flag setting is dispersed, and smooth processing can be realized even when the number of multiplexed connections is large.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is an operation flowchart of the embodiment of FIG. 1;

FIG. 3 is an operation timing chart of the embodiment of FIG. 1;

FIG. 4 is a timing chart of flag setting in the embodiment of FIG. 1;

FIG. 5 is a block diagram of another embodiment of the present invention.

FIG. 6 is an operation flowchart of the embodiment in FIG. 5;

FIG. 7 is a block diagram of a conventional polishing control device.

FIG. 8 is an operation flowchart of a conventional polishing control device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Address detection part 2 ... Reference time counter 3 ... Parameter memory part 4,4 '... Operation memory part 5,5' ... Policing judgment part 6 ... Cell control part 7 ... Flag memory part 8 ... Flag setting part

Claims (11)

(57) [Claims] 1. An apparatus for controlling policing of cells on a connection in an ATM network, comprising: a parameter memory unit for holding a cell interval and a CDV allowable value designated by a user; and a maximum value of the sum of the cell interval and the CDV allowable value. A reference time counter whose period is at least four times as long as the time corresponding to the above, a memory unit for holding variable values used for policing determination until the next cell arrives, and at least a time corresponding to the maximum value A flag memory unit that holds first and second flags that are alternately set at regular intervals of time, and that are reset when they are referred to in the policing determination and are determined to be suitable, and each time a new cell arrives Current time of the reference time counter, cell interval and CDV allowable value of the parameter memory section, A policing decision unit for making a policing decision on the arriving cell by referring to the numerical value and the first and second flags of the flag memory unit; a cell determined to be suitable by the policing decision unit is passed; The determined cell includes a cell control unit that performs discarding or tagging, and the policing determination unit checks whether the first and second flags are set together prior to detailed policing determination. , A polishing control device having a configuration in which when both are set, it is determined to be suitable. 2. The policing control device according to claim 1, wherein an expected arrival time is used as the variable value. 3. The arithmetic memory unit according to claim 1, wherein the policing determination unit sets a sum of a cell arrival time and the cell interval as a new estimated arrival time when the first and second flags are both set. When at least one of the first and second flags is not set, when the arrival time of the cell is later than the expected arrival time, it is determined that the cell is compatible, and the difference between the arrival time of the cell and the cell interval is determined. The sum is stored in the calculation memory unit as a new estimated arrival time, and when the cell arrival time is not later than the expected arrival time, the time corresponding to the sum of the cell arrival time and the CDV allowable value is set to the aforementioned value. If it is later than the expected arrival time, it is determined to be suitable, and a value obtained by adding the cell interval to the expected arrival time is stored in the calculation memory unit as a new expected arrival time. 3. The policing control device according to claim 2, wherein a violation is determined unless a time corresponding to the sum of the CDV allowable value and the expected arrival time is later than the expected arrival time. 4. The policing control device according to claim 1, wherein a bucket counter value and an arrival time of a previous cell are used as the variable values. 5. When the first and second flags are both set, the policing determination unit sets the current cell arrival time and the cell interval as a new previous cell arrival time and a bucket counter value. When stored in an operation memory unit and at least one of the first and second flags is not set, the time difference between the arrival time of the previous cell and the arrival time of the current cell is subtracted from the bucket counter value. If the value X 'is smaller than 0, it is determined that the cell is compatible, and the current cell arrival time and the cell interval are stored in the arithmetic memory unit as the arrival time of the new previous cell and the bucket counter value. If it is not smaller than X ', the cell is determined to be compatible unless X' is larger than the CDV allowable value, and the cell interval is added to the current cell arrival time and X '. The value stored in the arithmetic memory unit as the arrival time and the bucket counter value of a new pre-cell, according to claim 4, wherein X 'is characterized by having a violation determining configuration larger than said CDV tolerance
The polishing control device according to claim 1. 6. A policing control device for controlling traffic of cells on one or more types of connections multiplexed in an ATM network, comprising: a parameter memory unit for holding a cell interval and a CDV allowable value specified by a user for each connection. A reference time counter whose period is at least four times as long as the time corresponding to the maximum value of the sum of the cell interval and the CDV allowable value, and a variable value used for policing determination for each connection until the next cell arrives. A first and a second memory which are alternately set at regular intervals equal to or longer than at least the time corresponding to the maximum value, and which are reset when they are referred to in the policing determination and determined to be suitable; A flag memory unit that holds a flag for each connection, and a connection address each time a new cell arrives. An address detection unit for detecting a cell interval, a CDV allowable value, a variable value, and first and second flags from the parameter memory unit, the operation memory unit, and the flag memory unit, and detecting the address; Policing for determining the policing of an arriving cell by referring to the cell interval, CDV allowable value, variable value, first and second flags read by the unit, and the cell arrival time obtained from the reference time counter. A determination unit, a cell control unit that passes cells determined to be conforming by the policing determination unit, and discards or tags the cells determined to be in violation, and the policing determination unit is configured to perform the 1st and 2nd
A policing control device having a configuration in which when both of the flags are set, it is determined to be compatible. 7. The policing control device according to claim 6, wherein a time at which the first and second flags are set is shifted for each connection. 8. The policing control device according to claim 7, wherein an expected arrival time is used as the variable value. 9. The arithmetic memory unit according to claim 1, wherein when the first and second flags are both set, the policing determination unit sets a sum of a cell arrival time and the cell interval as a new estimated arrival time. When at least one of the first and second flags is not set, when the arrival time of the cell is later than the expected arrival time, it is determined that the cell is compatible, and the difference between the arrival time of the cell and the cell interval is determined. The sum is stored in the calculation memory unit as a new estimated arrival time, and when the cell arrival time is not later than the expected arrival time, the time corresponding to the sum of the cell arrival time and the CDV allowable value is set to the aforementioned value. If it is later than the expected arrival time, it is determined to be suitable, and a value obtained by adding the cell interval to the expected arrival time is stored in the calculation memory unit as a new expected arrival time. 9. The policing control device according to claim 8, wherein a violation is determined unless a time corresponding to the sum with the CDV tolerance is later than the expected arrival time. 10. The policing control device according to claim 7, wherein a bucket counter value and an arrival time of a previous cell are used as said variable values. 11. When the first and second flags are both set, the policing determination unit sets the current cell arrival time and the cell interval as a new previous cell arrival time and a bucket counter value. When stored in an operation memory unit and at least one of the first and second flags is not set, the time difference between the arrival time of the previous cell and the arrival time of the current cell is subtracted from the bucket counter value. When the value X 'is larger than 0, it is determined that the cell is compatible, and the current cell arrival time and the cell interval are stored in the arithmetic memory unit as the arrival time and bucket counter value of a new previous cell. If it is not larger than X ', the cell is determined to be compatible unless X' is larger than the CDV allowable value, and the cell interval is added to the current cell arrival time and X '. Claim 1 was the value stored in the arithmetic memory unit as the arrival time and the bucket counter value of a new pre-cell, wherein X 'is characterized by having a violation determining configuration larger than said CDV tolerance
0, the polishing control apparatus.