JP2701745B2 - Symbol clock controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

2. Description of the Related Art In mobile radio communications for transmitting digital signals, degradation of signal quality due to fading and delay dispersion distortion caused by multiple propagation has become a serious problem.

As a method of reducing deterioration due to fading, there is a pilot insertion method in which a pilot signal is inserted into a transmission data signal at regular intervals, detected on the receiving side, and the data signal is corrected.

As a method of reducing delay dispersion distortion, there is a multicarrier method of reducing the influence of delay dispersion distortion by lowering a transmission rate per wave by a frequency division method.

[0004] In mobile communications, the higher the transmission speed is required, the more important the pilot signal insertion system and multicarrier system become.

On the other hand, data transmission requires synchronization of frequency and symbol clock on both sides of the transmitter and receiver.

The present invention relates to a symbol clock control device for synchronizing symbol clocks when using a pilot signal insertion method and a multicarrier method.

[0007]

2. Description of the Related Art FIG. 2 shows a symbol clock control device when a conventional single carrier system is used.

A real component and an imaginary component of a complex baseband signal are supplied from a terminal 200 to bandpass filters 210 and 21.
1 is input.

The band-pass filters 210 and 211 extract a signal component at a portion separated from the center frequency by half the baud frequency as shown in FIG. The bandpass filter 210 extracts the upper part of the spectrum, and the bandpass filter 211 extracts the lower part of the spectrum.

The complex output signal of the band-pass filter 210 and the conjugate complex output signal of the band-pass filter 211 are input to a complex multiplier 220 and are complex-multiplied.

Since the output signal of the complex multiplier 220 includes a data signal component in addition to the symbol clock signal component, the output signal is usually a symbol clock signal containing considerable jitter. Therefore, the output signal of the multiplier 220 is P
The clock signal 240 is input to the LL 230, and the PLL 230 outputs a clock signal 240 synchronized with a high-quality symbol clock from which a jitter component has been removed.

[0012]

However, in the multi-carrier type modulation system, if a clock is to be extracted for each carrier, the number of band pass filters increases in proportion to the number of carriers. Since the bandpass filter generally requires a large amount of calculation in order to obtain a narrow band characteristic, there is a disadvantage that a calculation process for timing extraction is larger than other calculation processes.

An object of the present invention is to prevent an increase in the amount of timing extraction calculation due to an increase in the number of carriers.

[0014]

According to the present invention, as a means for solving the above-mentioned problem, a baseband signal composed of two or more base stations in which a pilot signal is periodically inserted into a data signal sequence in a time-division manner on the transmitting side is multicarrier modulated. A receiver that receives the signal as a reception signal, a sampler that receives the reception signal and the sampling clock signal that are continuous in time, samples the reception signal in synchronization with the sampling clock signal, and outputs the signal as a discrete reception signal, A power calculator that receives the sampler output signal and the sample clock signal, and calculates and outputs the square value of the sampler output signal in synchronization with the sample clock signal; A reference pilot signal generator for outputting a discrete power value of the signal; A cross-correlation for receiving an output signal of a calculator, an output signal of the reference pilot signal generator, and the sample clock signal, obtaining a cross-correlation between an output signal of the power calculator and an output signal of the reference pilot signal generator, and outputting the cross-correlation. Receiving the output signal of the cross-correlator, the pilot clock signal, and the sample clock signal, and obtaining a time position having the highest cross-correlation among the output signals of the cross-correlator within one cycle of the pilot clock signal. A maximum detector for detecting a phase shift signal from the pilot clock signal and receiving the output signal of the maximum detector, and controlling the pilot so that the phase shift signal of the maximum detector becomes zero. A clock signal and the sample clock signal are output and a symbol clock signal synchronized with the baud rate of the reception signal is externally supplied. Characterized by comprising the output clock generator.

[0015]

Next, the present invention will be described with reference to the drawings.

FIG. 4 is a diagram showing a signal configuration on the time axis of each carrier of a transmission signal composed of four waves.

The pilot signal at a predetermined period T _p in the data signal are arranged at the symbol rate T _b for each carrier are inserted respectively 3 symbols. In FIG. 4, T _p is 16 times T _b .

In the present invention, the symbol clock control is performed using the amplitude information of the received signal. If the phase information of the received signal is also used for symbol clock control, a further improvement in control performance can be expected, but for that purpose, the modulation frequency on the transmission side and the demodulation frequency on the reception side must be synchronized in advance. Therefore, control is performed here using only the amplitude component of the received signal which is not affected by the frequency shift.

FIG. 5 shows an example of a temporal change of the amplitude component of a signal obtained by combining four waves. As shown in FIG. 5, since the signal waveform of the portion where the pilot signal is inserted becomes the same everywhere, the signal form can be detected by using the cross-correlation. Here, the case of four-wave synthesis is described, but the same processing can be performed for the case of five or more waves.

FIG. 1 is a block diagram showing one embodiment of the present invention.

The complex reception signal demodulated into a baseband signal is input from an input terminal 100, and is converted by a sampler 110 from a continuous signal to a time-discrete signal synchronized with a sample clock signal. Assuming that the period of the sample clock signal is T _s and the input signal of the sampler is r (t), the output signal can be expressed as r (nT _s ). Here, it is the period T _s of the sample clock signal four times the period T _b of the symbol clock signal.

In power calculator 120, input signal r (nT
_A square operation is performed to find the amplitude component of _s ), and the power component p (nT _s ) is found as in (1).

Here, r ^* (nT _s ) is a conjugate complex signal of r (nT _s ).

P (nT _s ) = r (nT _s ) × r ^* (nT _s ) (1) In the reference pilot signal generator 130, the discrete value of the power component of the pilot signal synthesized by four waves is stored as a replica signal. Have been. FIG. 6 shows an example of a replica signal composed of 12 samples. The reference pilot signal generator 130 is composed of 12 memories as shown in FIG.

In the cross-correlator 140, the power calculator 120
Is obtained at a timing synchronized with the sample clock signal and the correlation operation clock signal.

The output signal from the power calculator 120 is represented by q (n
T _s ), _assuming that twelve replica signals output from the reference pilot signal generator 130 are g (0) to g (11T _s ), the cross-correlation value h (nT _s ) is obtained as in equation (2). Can be

[0027]

(Equation 1)

In the maximum detector 150, the cross-correlator 14
Receiving the output signal from the 0 is detected as a timing optimum point of time of the correlation value with the highest correlation value for each period T _p of the pilot clock signal. A time shift between the optimum point and the falling point of the pilot clock signal is output as a phase shift. FIGS. 8A and 8B show the optimal point of the cross-correlation value and the temporal relationship between the pilot clock signal and the output signal. FIG. 8A is a diagram when the phase of the pilot clock signal is advanced, and FIG. 8B is a diagram when the phase of the pilot clock signal is delayed.

In the clock generator 160, the maximum detector 1
The phase of the clock is changed so that the DC component of the output signal from 50 becomes 0, a pilot clock signal and a symbol clock signal synchronized with the received signal are generated, and the symbol clock signal is output from the output terminal 170 to the outside. .
FIG. 9A is a diagram illustrating the phases of the received signal and each clock signal when the DC component of the output signal from the maximum detector 150 is not zero. FIG. 9 b shows the maximum detector 150.
FIG. 3 is a diagram when the DC component of the output signal from the is zero.

As described above, a symbol clock synchronization signal can be obtained from a received signal.

[0031]

As described above, according to the present invention, even if the number of carriers increases, the arithmetic processing method is not affected, so that the symbol clock signal control can be performed with the same amount of operation as in the single carrier method. it can.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing one embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a conventional symbol clock control circuit.

FIG. 3 is a diagram showing a received signal spectrum and a frequency characteristic of a band-pass filter in a conventional symbol clock control circuit.

FIG. 4 is a diagram showing a position where a pilot signal of each wave is inserted in a four-wave multicarrier system.

FIG. 5 is a diagram illustrating a temporal change of a power component of a signal obtained by combining four waves.

FIG. 6 shows 4 stored in a reference pilot signal generator.
This is the power component of the pilot signal portion of the wave synthesized signal.

FIG. 7 is a diagram showing an internal structure of a reference pilot signal generator.

FIG. 8 is a diagram illustrating a relationship between an output signal from a maximum detector 140 and a symbol clock signal. a is a state where the phase of the symbol clock signal is advanced, and b is a state where the phase of the symbol clock signal is delayed.

FIG. 9 is a diagram showing a relationship between an input signal and an output signal of the clock generator 160. a is a state where synchronization is not achieved, and b is a state where synchronization is achieved.

[Description of Signs] 100 Input Terminal 110 Sampler 120 Power Calculator 130 Reference Pilot Signal Generator 140 Cross-Correlator 150 Maximum Detector 160 Clock Generator 170 Output Terminal 200 Input Terminal 201 Input Terminal 210 Bandpass Filter 211 Bandpass Filter 220 complex multiplier 230 PLL 240 output terminal

Claims (1)

(57) [Claims] 1. A receiver for receiving, as a reception signal, a signal obtained by multicarrier modulating a baseband signal composed of two or more pilot signals periodically inserted into a data signal sequence in a time division manner on a transmission side, A sampler that receives the continuous reception signal and the sampling clock signal, samples the reception signal in synchronization with the sampling clock signal, and outputs the sampled signal as a discrete reception signal; inputting the output signal of the sampler and the sample clock signal, A power calculator that calculates and outputs a square value of the sampler output signal in synchronization with a clock signal; a reference pilot signal generator that receives the sample clock signal and outputs a discrete power value of the same signal as the pilot signal; The output signal of the power calculator and the output signal of the reference pilot signal generator A cross-correlator that receives the sample clock signal, calculates a cross-correlation between an output signal of the power calculator and an output signal of the reference pilot signal generator, and outputs the cross-correlator; an output signal of the cross-correlator, a pilot clock signal; Receiving a sample clock signal, detecting a temporal position having the highest cross-correlation among output signals of the cross-correlator within one cycle of the pilot clock signal, and outputting a phase shift signal with the pilot clock signal; Receiving the output signal of the maximum detector, outputting the pilot clock signal and the sample clock signal so that the phase shift signal of the maximum detector becomes 0, and the baud rate of the reception signal. A clock generator for outputting a symbol clock signal synchronized with the clock to the outside Lock control device.