JP2694774B2 - Program branch method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a program branching method when one processor sequentially executes a plurality of processes by branching.

[Prior Art] As a method of executing a plurality of independent processes in parallel by a single processor, a method of executing the plurality of processes alternately while repeating conditional branching between a plurality of process programs has been conventionally used. Are known.

FIG. 6 is a schematic diagram for explaining a conventional method based on such conditional branching.

That is, when the CALL instruction is fetched at the address A1 in the program P1, the processor saves the address A1 which is the value of the program counter PC to the stack register top ST, and the address A2 which is the operand of the CALL instruction is stored in the program counter PC. Store. As a result, the processing of the processor branches to the address A2 of the program P2.

Subsequently, when the RET (return) instruction is fetched during execution of the program P2, the processor restores the address A1 before the branch saved in the stack register top ST to the program counter PC. As a result, the processing of the processor branches again from the program P2 to the address A1 + 1 of the program P1.

By repeating the above processing, the single processor can alternately execute the programs P1 and P2, and apparently the two processings can be executed in parallel.

[Problems to be Solved by the Invention] However, in such a conventional program branching method, when the program P2 is changed, the branch destination of the CALL instruction in the program P1 must also be changed.

As described above, in the conventional conditional branch method using a single processor, the branch source program and the branch destination program influence each other. For this reason, the branching process becomes complicated, and the timing of the branching process cannot be set independently for each individual process. Therefore, when applied to a program for sending and receiving, it is difficult to establish synchronization between sending and receiving. is there.

The present invention has been made to solve such a problem, and a branching process for a plurality of processes to pass execution rights to another process can be performed without affecting each other. It is an object of the present invention to provide a program branching method that can be executed by an extremely simple instruction and that can simplify branch processing and facilitate synchronization establishment of a transmission / reception program.

[Means for Solving the Problem] A program branching method of the present invention is a program branching method for executing two programs in parallel,
A branch instruction for sharing one last-in, first-out stack register group between the two programs and for exchanging a current address stored in a program counter with data stored at the top of the stack register group; By appropriately inserting the branch instruction into the two programs, the branch instruction can be executed without passing through another branch mechanism.
The feature is that branch processing is executed between two programs.

[Operation] According to the present invention, when the branch instruction is executed during execution of the first process, the current address stored in the program counter and the address before the branch of the second process stored in the stack register are exchanged. Therefore, the branch is made to the address before the branch in the second processing. Furthermore,
If the branch instruction is executed during the execution of the second processing, the processing branches to the address of the first processing before the processing branches to the second processing as described above.

By appropriately inserting the branch instruction in the two processes in this manner, the two processes are alternately executed by the single processor.

According to the present invention, even if one process is changed, the other process does not have a condition such as a branch destination, so that the other process is not affected. Therefore, the timing of branch processing can be easily set.

Embodiments Embodiments of the present invention will be described below with reference to the accompanying drawings.

FIG. 2 is a block diagram showing the system configuration of a signal processor to which the program branching method of this embodiment is applied.

This system is a system for processing and transmitting a signal received through a communication line in the form of a digital signal,
A program for reception processing and a program for transmission processing are provided, and these programs are alternately executed in parallel. This system has a CPU (Central Processing Unit) 1 that controls the system,
A ROM 2 storing the transmission / reception program, a RAM 3 for providing a work area in the transmission / reception processing, an operation unit 4 such as a keyboard, and communication / control for controlling data transmission / reception between a communication line (not shown) and the system. It is composed of a line control unit 5, which are connected to each other via a system bus 6.

 The CPU 1 is configured, for example, as shown in FIG.

That is, the instructions sequentially read from the ROM 2 and the like are stored in the instruction register 13 via the data bus 11 and then decoded by the instruction decoder 14. Instruction decoder
Based on the decoding result, the control unit 14 controls data storage and reading with respect to the general-purpose register group 15, the program counter 16 and the stack register group 17 and the increment control of the program counter 16. The instruction decoder 14 also controls the execution of the arithmetic processing of the arithmetic processing unit 18. The value stored in the program counter 16 is output to the address bus 12 via the address buffer 19.

Next, the CO_RET instruction provided in this system will be described.

The CO_RET instruction is a kind of branch instruction like the conventional CALL instruction. When this CO_RET instruction is executed, the value stored in the program counter 16 and the stack register group 17
Is exchanged with the value stored in the top (hereinafter, referred to as the stack register top).

FIG. 1 is a schematic diagram showing a branch process using this CO_RET instruction.

That is, it is assumed that the address A3 in the program P2 is stored in the stack register top (ST) by some processing. At this time, at address A1 of program P1
When the CO_RET instruction is executed, the program counter (PC)
The address A1 stored in 16 and the address A3 stored in the stack register top 17 are exchanged. As a result, the process branches to the address A3 of the program P2. When the processing of the program P2 progresses and the CO_RET instruction is executed at the address A4, the address A4 stored in the program counter 16 and the address A1 stored in the stack register top are exchanged. As a result, the process branches to the address A1 of the program P1.

After that, by repeating the same processing, the program
P1 and P2 will be executed alternately.

FIG. 4 is a diagram showing an application example of the branching process according to the present invention. That is, CO_R can be set appropriately for each program for transmission and reception.
By simply inserting the ET command, the program execution right can be alternately passed between the transmission program and the reception program to perform parallel processing. Also, as shown
Needless to say, it is possible to branch in a program by inserting a CALL instruction and a RET instruction even in each program.

By performing such processing, the transmission program and the reception program can determine the branch timing without being aware of each other's program. Therefore, for example, as shown in FIGS. 5A and 5B, even when the CO_RET instruction is inserted into the transmission / reception program loop every time the program is executed for a certain period of time, the insertion / reception timings of the transmission / reception program are different from each other. Can be set independently. Therefore, there is an advantage that synchronization of transmission and reception can be easily established.

[Effects of the Invention] As described above, according to the present invention, branch processing is performed by an instruction for exchanging the current address stored in the program counter as a branch instruction and the pre-branch address stored in the stack register. Therefore, it is not necessary to describe the branch destination of the program that defines the other process in the program that defines one process, and the multiple processes do not affect each other.

Therefore, there is an effect that the branching process and the setting of the timing thereof are extremely simple.

[Brief description of the drawings]

FIG. 1 is a schematic diagram for explaining a program branching system of an embodiment of the present invention, FIG. 2 is a block diagram of a system to which the system is applied, FIG. 3 is a block diagram of a CPU in the system, and FIG. Is a schematic diagram for explaining an application example of the system, FIG. 5 is a schematic diagram showing a branch instruction insertion timing in the system, and FIG. 6 is a schematic diagram for explaining a conventional program branch system. . 1 ... CPU, 2 ... ROM, 3 ... RAM, 4 ... operation section, 5
...... Communication / line control unit, 6 ... System bus, 11 ... Data bus, 12 ... Address bus, 13 ... Instruction register,
14 …… Instruction decoder, 15 …… General purpose register group, 16 …… Program counter, 17 …… Stack register group, 18 ……
Arithmetic processing unit, 19 ... Address buffer.

Claims (1)

(57) [Claims] 1. A program branching method for executing two programs in parallel, wherein one stack register group of the last-in first-out method is shared between the two programs, and a current address stored in a program counter is used. A branch instruction for exchanging data stored at the top of the stack register group is provided, and by appropriately inserting the branch instruction into the two programs, the two programs can be executed without passing through another branch mechanism. A program branching method characterized in that branching processing is executed between them.