JP2637973B2 - Block encoding decoding device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a block coding decoding device capable of compressing and transmitting original image data by using a two-dimensional correlation of an image.

[Conventional technology]

One feature of the image information is that it has a two-dimensional correlation. As one of the encodings using the two-dimensional correlation, an image is divided into a number of two-dimensional blocks,
A block coding method for performing coding for each block is known.

As an example, the present applicant obtains a dynamic range defined by a maximum value and a minimum value of a plurality of pixels included in a two-dimensional block as described in Japanese Patent Application No. 59-266407. A high-efficiency coding apparatus that performs coding adapted to a dynamic range has been proposed. Also, as described in Japanese Patent Application No. 60-232789, a high-efficiency coding apparatus that performs coding suitable for a dynamic range with respect to a three-dimensional block formed from pixels in an area included in each of a plurality of frames. Has been proposed.

Further, as described in Japanese Patent Application No. 60-268817, there is a variable length coding method in which the number of bits changes according to a dynamic range in which the maximum distortion generated when performing quantization is constant. Proposed.

In the above-mentioned coding adapted to the dynamic range (referred to as ADRC), two data of the dynamic range, the maximum value and the minimum value of each block are used as an additional code, and one pixel is compared with the original number of bits. The code signal with the reduced number of bits per hit and the additional code are transmitted.

As another example of the block encoding method, there is a method of transmitting an average value Av and a standard deviation σ for each block. Each pixel in the block is encoded into one bit of “0” or “1” depending on whether it is larger or smaller than the average value Av. For example, data having a level equal to or higher than the average value Av is “1”, and data having a level lower than the average value Av is “0”.
In this case, the average value Av and the standard deviation σ are parameters representing the block, and are transmitted as additional codes. On the receiving side, the data of “1” is decoded to the level of (Av + σ), and the data of “0” is decoded to the level of (Av−σ).

In block decoding, if an additional code, which is a parameter representative of a block, is erroneous in the transmission process, decoding cannot be performed on the decoding side because the additional code is erroneous, and all pixel data of one block becomes error data. Become. For example, as disclosed in Japanese Patent Application Laid-Open No. 61-147690, the applicant of the present application uses an average value of eight additional blocks in the vicinity of a block whose error code is an error data instead of an erroneous additional code. A retouching method is proposed.

[Problems to be solved by the invention]

Even if the concealment as described above is performed, there is a problem that the correlation between the peripheral blocks used for the modification and the block of interest is small, and the distortion per block cannot be sufficiently removed.

Accordingly, it is an object of the present invention to provide a block code which, when an additional code, which is a parameter representing a block, is erroneous, obtains data very close to a correct additional code, and can decode each pixel data in the block by using this data. Another object of the present invention is to provide a decoding device for decoding.

[Means for solving the problem]

The present invention converts a digital image signal into a signal having a block structure, calculates a plurality of pixel values in the block, generates a common parameter for a plurality of pixels in the block, and uses the parameter. A plurality of pixels in a block are converted into a code signal having a smaller number of bits than the original number of bits, and a block coding decoding device that transmits a parameter and a code signal detects whether there is a parameter error. Using a part of the code signal in the block to be decoded whose parameter is erroneous, and a plurality of restored pixel values included in the block of the decoding unit and adjacent to the part of the code signal. Means for restoring the above parameters by the method of least squares, a parameter for which no error is detected, or a restored parameter, and a code signal. A decoder block coding, characterized in that a means for obtaining data.

[Action]

When it is determined that an additional code such as a dynamic range in ADRC has an error that cannot be corrected by error detection and error correction code, a neighboring pixel in a target block (a block to be restored) and a neighboring pixel adjacent to the neighboring pixel are restored. Using the obtained data, an additional code is obtained by the least square method. That is, the additional code is identified by utilizing the fact that the peripheral pixel of the target block and the restored pixel having the shortest distance from the peripheral pixel have a very strong correlation. A block code such as ADRC is decoded using the obtained additional code.

〔Example〕

Hereinafter, an embodiment of the present invention will be described. In this embodiment, for example, one frame of a digital video signal is vertically divided into n as shown in FIG. 3, and horizontally divided into m, and (B11, B12, B13,...)
(B nm) (n × m) blocks are formed. As shown in FIG. 2, this one block includes 64 pixels (8 lines × 8 pixels). The number of quantization bits for one pixel is set to 8 bits. ADRC (Adaptive Dynamic-Ange Coding) coding, which is one of the high-efficiency codes, detects the maximum value MAX and the minimum value MIN of the level of 64 pixels in one block, and calculates (MAX-MIN) , The dynamic range DR, this dynamic range DR
The example 2 was divided into ^four level ranges, or in accordance with the minimum value is included in which level range the pixel data that has been removed,
It forms a 4-bit code signal. The transmitted data is a maximum value MAX, a minimum value MIN, and two additional codes in the dynamic range DR for each block, and a code signal of 4 bits for each pixel.

These additional codes and code signals are encoded by an error detection and correction code in order to detect errors that occur during transmission and to correct the errors. The error detection and correction code is separately added to the additional code and the code signal.

FIG. 5 shows a system on the transmitting side using ADRC. In FIG. 5, a digital video signal is supplied to an input terminal indicated by 1. This digital video signal is a signal in the order of scanning, and is converted into the order of blocks in the blocking circuit 2. In the example shown in FIG. 3, (B11
→ B12 → B13 →... → Bnm). The output signal of the blocking circuit 2 is supplied to the ADRC encoding circuit 3, and as described above, the ADRC encoding circuit 3
Encoding is performed. The additional code (dynamic range DR and minimum value MIN) obtained by the ADRC encoding circuit 3 and the code signal DT are supplied to the framing circuit 4. In the framing circuit 4, the output data of the ADRC encoding circuit 3 is converted into data having a frame structure,
Error detection and correction code encoding are performed, and transmission data is obtained at the output terminal 5.

The receiving system corresponding to the transmitting system has the configuration shown in FIG. In FIG. 6, received data is supplied to an input terminal indicated by reference numeral 6, and error detection and correction code decoding are performed in a frame decomposition circuit 7. The additional code and code signal from the frame decomposition circuit 7 are ADRC
The digital video signal supplied to the decoding circuit 8 and restored from the ADRC decoding circuit 8 is obtained. The restored data from the ADRC decoding circuit 8 is supplied to a block decomposition circuit 9,
The order of the blocks is returned to the order of the television scan.
The output data of the block decomposition circuit 9 is supplied to an error correction circuit 10. In the error correction circuit 10, erroneous pixel data that cannot be corrected in the frame decomposition circuit 7 is interpolated by surrounding correct pixel data. If the additional data is incorrect, the additional data is modified in the ADRC decoding circuit 8 as described later. Error correction circuit 10
Restored data is obtained at the output terminal 11.

FIG. 1 shows an embodiment of the present invention. In FIG. 1, a code signal DT is supplied to an input terminal indicated by 21, a dynamic range DR is supplied to an input terminal indicated by 22, and an input terminal indicated by 23 is provided. Is supplied with a minimum value MIN, and an input terminal indicated by 24 is supplied with an error flag indicating the presence or absence of an error in the additional data DR and MIN. The dynamic range DR is supplied to the ROM 25 as an address signal, and the ROM 25 generates a minimum quantization width △. The code signal DT, the minimum quantization width △, and the minimum value MIN are supplied to the delay circuit 26. The code signal DT from the delay circuit 26 is supplied to one input terminal of the multiplication circuit 27. The minimum quantization width の from the delay circuit 26 is supplied to the selection circuit 28, and the output signal of the selection circuit 28 is supplied to the multiplication circuit 27.

At the output of the multiplication circuit 27, the product of the minimum quantization width and the code signal, that is, restored data after removing the minimum value is obtained.
The output signal of the multiplication circuit 27 is supplied to one input terminal of the addition circuit 30. The output signal of the selection circuit 29 is supplied to the other input terminal of the addition circuit 30. The minimum value passed through the selection circuit 29 is supplied to the addition circuit 30, and the output terminal 31 of the addition circuit 30
Is retrieved.

The selection circuit 28 selects the minimum quantization width △ from the delay circuit 26 when the received dynamic range DR is correct, and encloses it with a broken line when the received dynamic range DR is error data. The minimum quantization width △ ′ from the additional information restoring unit 41 is selected. If the received minimum value MIN is correct, the selection circuit 29 outputs the minimum value M from the delay circuit 26.
When IN is selected and the received minimum value MIN is error data, the minimum value MIN ′ from the additional information restoring unit 41 indicated by a broken line is selected. These selection circuits 28 and 29 are controlled by an error flag from an input terminal.

In FIG. 2, the additional information restoring unit 41 outputs the restored data y1 ′, y2 ′,..., Y8 ′ indicated by black dots and the code signals x1, x2,.
Using the known value of x8, the additional codes △ ′ and MIN ′, which are unknowns, are obtained by the least square method. In this embodiment, as the data y1 ′ to y8 ′, the data of the lowermost line in the upper decoded block is used, and as the code signals x1 to x8, the additional code is included in the block in which the error occurs, Pixels adjacent to the data y1 'to y8' are used.
Since the distance between the restored data y1 ′ to y8 ′ and the code signals x1 to x8 is extremely short, there is a strong correlation between the two.
Therefore, even if it is estimated that both have the common additional information, the error is small.

The additional code of the block to be decoded is (△ = a)
(MIN = b), the following equation holds.

Here, e1 to e8 are errors.

According to the least square method, the error (e1 to e8)
Values of a and b that minimize the sum of squares of In the following equation, Σ means integration of eight data. For example, (Σy) is (y1 '+ y2' +... Y
8 '). Also, (x), (x ² ), (y), (x
y) ^{is, x, x 2, y '} , means respectively the xy average value.

The additional information restoring unit 41 is configured to execute these operations. The restored data (y1 'to y8') is provided from the memory 40 to the additional information restoring unit 41. The restored data obtained at the output terminal 31 is input to the memory 40.

The memory 40 is supplied with an address signal and an R / W signal from a memory control circuit (not shown). The memory 40 has a capacity capable of storing at least m lines of restored data, where m is the number of blocks in the horizontal direction.

The multiplying circuit 42 outputs the code signal DT (x1 to
x8) and the restored data (y1 'to y8') to form a product xy.
The integrating circuit 43 forms Σy, the integrating circuit 44 forms Σxy, and the integrating circuit 45 forms Σx. The output signal of the integrating circuit 44 is supplied to an octupler circuit 46, and the output signal of the octupler circuit 46 is supplied to a subtraction circuit 47. The output signals of the integration circuits 43 and 45 are supplied to the multiplication circuit 48, and the output signal of the multiplication circuit 48 is supplied to the subtraction circuit 47. The output of this subtraction circuit 47
The numerator term of the formula is obtained.

The squaring circuit 49 and the product-sum circuit 50, the term? X ² is calculated, the output signal of the multiply-add circuit 50 is supplied to the subtraction circuit 52 through a 8-fold circuit 51. (Σx) ² from the squaring circuit 53 is supplied to the subtraction circuit 52.
The denominator term of the equation is obtained. Subtraction circuit 47 and subtraction circuit 52
Are supplied to the division circuit 53. From the dividing circuit 53, the value of a represented by the equation, that is, the minimum quantization width △ ′ restored by the least square method is obtained.

The multiplying circuit 54 includes an output signal of the dividing circuit 53 and an integrating circuit.
The two output signals 45 are supplied, and the output signal of the multiplication circuit 54 is supplied to the subtraction circuit 55. The subtraction circuit 55 includes an accumulation circuit
The output signal of 43 is supplied, and the output signal of the subtraction circuit 55 becomes (1 /
8) It is supplied to the doubling circuit 56. At the output of the (1/8) multiplying circuit 56, the value of b represented by the equation, that is, the minimum value MIN 'restored by the least square method is obtained. The minimum quantization width △ ′ and the minimum value MIN ′ formed in the additional information restoring unit 41 are supplied to the selection circuits 28 and 29, respectively.

FIG. 4 is a timing chart showing the operation of the additional information restoring unit 41. FIG. 4A shows a reception code from the input terminal 21. This code signal is divided into the first line (eight code signals) of each block, the second line,.
... input in the order of the eighth line. The first line includes a code signal x1 used for restoring an additional code.
It contains data for 8 pixels of ~ x8.

FIG. 4B shows the operation mode of the memory 40. The restored data of the adjacent line of the upper block is read from the memory 40 in synchronization with the data of eight pixels of the first line of the received code signal. y1 'to y8' are read. For example, N
If the second block is B22, the restored data of the eighth line of block B12 is read from the memory 40.
Using these code signals x1 to x8 and the restoration data y1 'to y8', the additional information restoration unit 41 calculates the minimum quantization width △ 'and the minimum value MIN' (FIG. 4C) as described above. Restore.

Time delay circuit 26 required for additional information restoring section 41 for restoring operation
As shown in FIG. 4D, the received code is delayed, and the minimum quantization width △ ′ and the minimum value MIN ′ are restored before the timing at which the code signal of the N-th block is supplied to the multiplication circuit 27. Is done. In the restored data, the eighth line of each block is written to the memory 40 as shown in FIG. 4E. The restoration data written in the memory 40 is used to restore the additional information of the block in the next row.

Blocks B11 and B located at the top of one frame
With respect to 12,..., B1m, the restored data of the eighth line of the block located at the bottom of the previous frame is used for restoring the additional information. Also, in order to restore the additional information, as described above, in addition to using the [code signal of the first line of the block of interest and the restored data of the eighth line of the upper block], the decoding order, The following combinations of data can be used depending on the memory capacity and the like.

[The 8th line code signal of the block of interest and the restored data of the 1st line of the block below] [The code signal of the 1st sampling position of the block of interest and the 8th sampling position of the left block Restored Data] [Code Signal at Eighth Sampling Position of Target Block and Restored Data at First Sampling Position of Right Block] Further, the above combinations are not used alone, but two, three, or all are used. You may do it.

The present invention can be applied not only to ADRC that converts pixel data into fixed-length data for each two-dimensional block, but also to variable-length ADRC that converts variable-length data. Further, the average value and the standard deviation representing the block may be used as additional codes, and the present invention may be applied to coding other than ADRC, such as block coding in which pixels in the block are each encoded into a 1-bit code signal. it can.

〔The invention's effect〕

The present invention transmits an additional code, which is a parameter representing a block obtained by block encoding, and a code signal corresponding to a pixel. Next, when the additional code becomes error data, the restored data having a very strong correlation is obtained. To recover the additional code. Therefore, according to the present invention, additional information very close to correct data is restored, and the image quality of restored pixels can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, FIGS. 2 and 3 are schematic diagrams used to explain blocks in one embodiment of the present invention, and FIG. 4 is an operation of one embodiment of the present invention. FIG. 5 is a block diagram of a transmission side system of block coding to which the present invention can be applied, and FIG. 6 is a block diagram of a reception side system of block coding to which the present invention can be applied. FIG. Description of main symbols in the drawings 21: input terminal of received code signal, 22 and 23: input terminal of received additional code (DR, MIN), 28, 29: selection circuit, 27, 30: for decoding Multiplication circuit and addition circuit, 40: memory, 41: additional information restoring unit.

Claims (1)

(57) [Claims] 1. A digital image signal is converted into a signal having a block structure, and a plurality of pixel values in the block are calculated to generate a common parameter for a plurality of pixels in the block. A plurality of pixels in the block using the above parameters is converted to a code signal having a smaller number of bits than the original number of bits, and a decoding device for block coding that transmits the parameters and the code signal, Means for detecting the presence or absence of an error in the parameter; a part of the code signal in a block to be decoded in which the parameter is erroneous; and a part included in the decoded block and adjacent to a part of the code signal. Means for restoring the above parameters by the least squares method using the restored plurality of pixel values, Parameters and decoding apparatus block coding, characterized in that a means for obtaining reconstructed data from the above code signal.