JP2637172B2 - Error correction method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an error correction system in the field of digital wireless communication using a multicarrier communication system.

[Conventional technology]

In digital wireless communication, multi-carrier communication may be adopted in order to prevent deterioration of line quality due to fading occurring in a propagation path.

 FIG. 7 is a diagram illustrating the principle of multicarrier communication.

As shown in the figure, in this manner, by transmitting by dividing a transmission signal small multicarrier 50 ₁ ~50n frequency bandwidth, compared with the case of a single carrier 51, a large overall fading tolerance (In this case the tolerance
_The aim is to reduce the effect of fading ( _x dB becomes n · _x dB) (see the document “Y. Saito et al.“ Feasibi ”).
lity Considerations of High-level QAM Multi-Carr
ier System "ICC'84 1984 pp 665-671").

On the other hand, in digital wireless communication, an error correction circuit is sometimes used in order to remove a residual error in a steady state caused by imperfections in a relay device.

FIG. 8 is a block diagram showing an example of the configuration of a conventional digital radio system using both multicarrier communication and error correction.

In the figure, 52 _{1 to} 52 n are encoders, 53 _{1 to} 53 n are modulators, 54 _{1 to} 54 n are first to n-th carriers,
55 _{1 to} 55 n represent demodulators, and 56 _{1 to} 56 n represent decoders.

However, even if such a configuration is adopted, errors due to fading occur in bursts, and this reduces the error correction capability.

In addition, the multi-carrier system requires a plurality of encoders / decoders, and thus has a disadvantage of increasing the circuit scale and cost.

On the other hand, coded modulation is a technology that combines error correction and modulation / demodulation (see "G. Ungerboeck" Channel coding with M
ultilevel / phasesignals ", IEEE Trans.Information The
ory, vol IT-28 pp. 55-67 Jan. 1982 "). This is because the set partition (Set Part
In this method, the minimum free distance between codewords is made large as a Euclidean distance in a signal space by using a technique called ition).

Among them, studies on multi-dimensional (2 ^n- dimensional, n = 2,3...) Codes are being pursued in order to obtain a larger coding gain than conventional coded modulation (see "ARCalderbank and
NJSlodane “Four-dimensional modulation with an
eight-state trellis code "AT & T Tech.Jour.vol 6
4 pp1005-1017, May-June 1985). In order to further increase the minimum free distance, a mapping circuit outputs n symbols as a set from a conventional coded signal corresponding to n symbols.

Next, the set of symbols is subjected to parallel-serial conversion and transmitted on one carrier. FIG. 9 is a block diagram showing an example of the configuration of the transmitting side of such a multidimensional code.

In the figure, 56 is a multidimensional encoder, 57 is a mapping circuit, 58 is a parallel-serial converter, and 59 is a modulator.

With such a configuration, a code with a larger minimum free distance can be obtained by optimizing the mapping method of n symbols.

For example, in a four-dimensional code, a redundant bit is added to a signal of two sequences or a signal of two consecutive time slots.

In the example of the figure, three bits obtained by adding one redundant bit to a binary binary signal are transmitted by two 4PSK symbols.
At this time, the 3-bit signal 000,001,.
Perform mapping (signal allocation) on 4PSK symbols. It is a feature of the multidimensional code that the Euclidean distance between codewords is increased by this mapping method.

 FIG. 10 shows an example of the mapping method.

In the figure, (a) shows the case of the first symbol,
(B) shows the case of the second symbol. For example, when the three bits including the redundant bits are 1, 1, and 0, the first symbol becomes the symbol of the signal point indicated by the alphabetic character A in (a). ,
The second symbol is a symbol of a signal point indicated by an alphabetical character B at the upper left of (b).

[Problems to be solved by the invention]

In the coded modulation scheme as described above, when a burst error due to fading occurs, a plurality of symbols in a set of symbols are erroneous, which leads to an increase in an error rate.

When a circuit is configured, parallel / serial conversion is required as described with reference to FIG.

FIG. 11 shows a block diagram of a transmission system using a combination code.

In the figure, 60 is the first encoder, 61 is the interleaver, 62 is the second encoder, 63 is the modulator, 64 is the carrier, 65
Is the demodulator, 66 is the second decoder, 67 is the deinterleaver,
68 indicates a first decoder.

The combination code is a method for increasing the error correction capability by arranging two or more different types of error correction codes in series with respect to an information signal.

In this case, after decoding the inner code, the error rate decreases, but the error at the output of the second decoder becomes bursty due to an error generated in the propagation path plus an error due to error correction at the decoder.

Therefore, it is generally necessary to interleave between the first code and the second code. However, when this combination code is applied to a system for performing high-speed signal transmission such as a digital microwave system, it is very difficult to realize an interleave circuit because of the access time of a memory and a control circuit.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an error correction method in a multi-carrier digital wireless communication channel capable of solving the above-mentioned deterioration in correction capability due to a burst error.

[Means for solving the problem]

According to the invention, the above-mentioned object is achieved by the means as set forth in the claims.

That is, the first invention is a multi-carrier communication system for transmitting a transmission signal by dividing the transmission signal into a plurality of carriers having a small frequency bandwidth in digital wireless communication.
An error correcting encoder that outputs a signal having a code rate of ₀ (bit / sec), and outputs the encoder output at a code rate of ₀ / n (bit / se).
c) a serial-parallel converter for converting into an n-serial parallel signal, and means for dividing the n-serial parallel signal into respective carriers of a multicarrier communication system and transmitting the same;
On the receiving side, a receiver for receiving the signal of each of the carriers,
An error correction method including a parallel-serial converter for converting the n-serial parallel signal into a signal having a code rate of ₀ (bit / sec), and an error correction decoder for decoding the converter output signal. 2 of the invention in a multicarrier communication system for transmitting by dividing a transmission signal small plurality of carrier frequency bandwidth digital radio communication, code rate ₀ to the sender
(Bit / sec) signal, an error correction encoder, a serial-parallel converter for converting the output of the encoder into n-series parallel signals each having a code rate of ₀ / n (bit / sec), There are provided n error detecting encoders for error detecting and coding the n series of parallel signals, respectively, and means for dividing the n series output of the error detecting encoder into respective carriers of a multicarrier communication system and transmitting the divided signals. A receiver for receiving the signal of each carrier, an error detection decoder for detecting an error of the n-sequence parallel signal by parity bits generated by the error detection encoder, A parallel-serial converter for converting the output of the n-sequence of the detection decoder into a signal having a code rate of ₀ (bit / sec), an error correction decoder for decoding the converter output signal, and the error correction decoding Output from the parallel-to-serial converter before decoding The decoder output for error detection is used as a control signal, and the output of the decoder for error correction is output for a signal of a carrier in which an error is detected as a control signal. The third invention is a multi-carrier communication method for dividing a transmission signal into a plurality of carriers having a small frequency bandwidth and transmitting the divided signal in digital wireless communication. , An error correction encoder that outputs a signal having a code rate of ₀ (bit / sec) to the transmitting side, and outputs the encoder output at a code rate of ₀ / n.
(Bit / sec) a serial-parallel converter for converting into an n-series parallel signal, and means for dividing the n-series parallel signal into respective carriers of a multi-carrier communication system and transmitting the same; A receiver for receiving a signal of each carrier, and a code rate of ₀ / (bit / sec) for the n series of parallel signals.
A serial-to-serial converter for converting the output signal into a signal, an error correction Viterbi decoder for decoding the converter output signal, and a circuit for determining whether or not there are many errors for each carrier. This is an error correction method provided with means for changing the branch metric of the Viterbi decoder depending on whether there are many errors.

[Action]

The main feature of the present invention is to divide a signal encoded by an error correction encoder into a plurality of carriers in a multicarrier system and transmit the divided carriers.

That is, in digital wireless communication using multicarrier transmission, each carrier transmits at a different center frequency. Therefore, even when frequency-selective fading occurs in the propagation path, the probability of errors occurring simultaneously on a plurality of carriers is extremely low. By dividing a signal into carriers using this property, a burst error can be converted into a random error, and the error correction capability can be maximized.

Further, when an error correction device is used for each carrier as in the related art, the number of devices increases, and the circuit scale and cost increase.

On the other hand, in the present invention, the error correction of the signal transmitted by a plurality of carriers is performed by one error correction device, so that the circuit size and the cost can be reduced. Error correction was originally applied to the microwave system to eliminate residual bit errors, which are random errors. Therefore, random error correction is employed.

However, according to this configuration, it is different from the related art that the error correction capability can be sufficiently exerted even in the fading propagation path by randomizing the burst error by using the decorrelation of each carrier of the multicarrier.

〔Example〕

FIG. 1 is a block diagram showing a first embodiment of the present invention.

In the figure, 1 is an encoder, 2 is a serial-parallel converter,
3 ₁ 3n are modulators, 4 ₁ to 4n each first carrier to the n-th carrier, 5 ₁ through 5n demodulator, 6 parallel - serial converter, 7 denotes a decoder.

A signal having a code rate of ₀ is error-correction-coded by an encoder 1, converted into an n-sequence signal having a code rate of ₀ / n by a serial-parallel converter 2, and then transmitted on different carriers. After the received signal is demodulated by the demodulators 5 ₁ through 5n, parallel - converted by the serial converter 6 to a series of signals of code rate _0.

At this time, the signals of each stream need to be clock-synchronized, but apparent synchronization can be obtained by adding a frame synchronization signal to each stream. Further, the converted signal is decoded in the decoder 7.

FIG. 2 shows the relationship between the error in each carrier and the error in the decoder input. Here, the case of four multicarriers is taken as an example.

As described above, in digital wireless communication, the probability that the error rate deteriorates due to fading simultaneously in each transmission path is extremely small.

This figure shows a case in which degraded by the second carrier 8 ₂ only fading of the four carriers.

In the figure, portions indicated by crosses indicate errors in each carrier. There is no error in the _first , _third and _fourth carriers 81, 83 and 84. However, the ₂ second carrier 8 has occurred error with an error rate of 1/2, continuously error also occurred.

In general, in an error correction device, the coding gain decreases as the error rate increases. Further, the random error correction is difficult to correct the continuous errors, when performing error correction for each carrier in the figure, the ₂ second carrier 8 coding gain is considered not obtained.

In contrast, the decoder input 9 in FIG. 2 is an error when the four carriers are converted from parallel to serial. As shown in FIG, 1 1/4 times the error rate, the second carrier 8 ₂ error rate
/ 8, and there is no continuous error.

Therefore, it is possible to exhibit the correction capability of the error correction device and expect a sufficient coding gain.

FIG. 3 is a block diagram showing a second embodiment of the present invention, in which a four-dimensional (n = 2) code is taken as an example.

In the figure, 10 is a multidimensional encoder, 11 is a mapping circuit, 12 ₁ and 12 ₂ are modulators, 13 ₁ and 13 ₂ are a first carrier and a second carrier, respectively, and 14 ₁ and 14 ₂ are demodulators. , 15 represent a decoder.

The multidimensionally coded signal outputs a set of n symbols. At this time, if the K symbols are erroneous at the same time, the probability that the decoded signal is erroneous increases. On the other hand, in the present invention, since n symbols are transmitted on different carriers, the probability of simultaneous errors is reduced, and a sufficient error correction effect is expected.

FIG. 4 is a block diagram showing a third embodiment of the present invention, in which 16 is a first encoder, 17 is a serial-parallel converter, and 18 ₁
~18n the second encoder, 19 ₁ ~19n are modulators, 20 ₁ ~20n the first carrier to the n-th carrier, 21 ₁ 21n demodulator, 22 ₁ ~22n second decoding , 23 is a parallel-serial converter,
24 represents a first decoder.

In this example, an error correction code using a combination code of the first code and the second code is used. Then, the same result as interleaving is obtained by using the decorrelation of each carrier instead of the conventional interleaving.

In this embodiment, the same effects as in the case of the first embodiment can be obtained.

FIG. 5 is a block diagram showing a fourth embodiment of the present invention.

In the figure, (a) shows the configuration on the transmission side, (b) shows the configuration on the reception side, 25 is an error correction encoder, 26 is a serial-parallel converter, and 27 _{1 to} 27n are error detection codes. Vessel, 28 _{1 to} 28n
Is a modulator, 29 _{1 to} 29 n are demodulators, 30 _{1 to} 30 n are error detection decoders, 31 is a first parallel-serial converter, 32 is a second parallel-serial converter, and 33 is error correction decoding. , 34 represents a delay circuit, and 35 represents a selection circuit.

In the present embodiment, when fading occurs in one of the multi-carriers and an error occurs, as a result of error correction, an error is detected for each carrier in order to prevent the narrative from propagating to other carriers. A circuit is provided.

Error detection can be performed by a simple circuit such as a parity check.

If the systematic code is used, the demodulated signal becomes a signal before error correction decoding is performed as it is, and if there is no error, it matches the decoded signal.

Therefore, by not decoding the carrier determined to be error-free by the error detection circuit and outputting the demodulated signal as it is, it is possible to prevent the propagation of the error of the carrier in which fading has occurred.

In the figure, a delay circuit 34 converts a signal before decoding into an error correction decoder in order to perform phase matching with the output of the error correction decoder 33.
It delays the time necessary for 33. However, the delay times of the two differ by the amount of delay in the decoder.

Further, the second parallel-serial converter 32 converts the outputs of the respective error detection circuits so as to be in the same order as the decoder outputs.

FIG. 6 is a block diagram showing a fifth embodiment of the present invention.

In the figure, (a) shows the configuration on the transmitting side,
(B) shows the configuration on the receiving side.

36 is an error correction encoder, 37 is a serial-parallel converter,
38 ₁ ~38n are modulators, 39 ₁ ~39n demodulator, 40 is parallel - serial converter, the Viterbi decoding circuit 41, 42 is the branch metric generator, 43 ACS, 44 path memory, 45 is the carrier 2 shows a circuit for determining that there is a large number of errors for each.

The Viterbi decoding circuit 41 in the figure calculates the likelihood of each symbol (hereinafter, referred to as a branch metric) from the received signal point for each time slot, and calculates the likelihood of a past codeword (hereinafter, a path metric). ) To select the most probable codeword.

At this time, when a signal is divided into each carrier and transmitted as in the present invention, the error rate differs for each carrier.

Therefore, the reliability of the branch metric is also different. Therefore, the signal of the carrier in which fading is occurring in the branch metric generator 42 has low reliability, and the branch metric is reduced. As a result, a highly reliable path metric can be obtained as a whole, and higher coding gain can be expected.

Examples of a circuit for determining that there are many errors for each carrier include a method using an error detection circuit, a method using a signal level of each carrier, and a method of obtaining from a value of a past branch metric.

〔The invention's effect〕

As described above, since the error correction method of the present invention utilizes the decorrelation between carriers in the multi-carrier method, any one of the carriers is deteriorated by fading, and a burst error occurs, or Even when a burst error occurs by the inner decoder of the combination code, the error of the signal input to the outer decoder is randomized.

As shown in FIG. 2, among the K (K = 2, 3,...) Carriers, (K-1) carriers are error-free, errors occur with a probability of P in one carrier, and continuous errors occur. Even when a large number of errors occur, the error rate as a decoder input is as low as 1 / PKd, and there is no continuous error. Therefore, a sufficient error correction effect can be expected.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention, and FIG.
FIG. 3 is a diagram showing a relationship between an error in a carrier and an error in a decoder input, FIG. 3 is a block diagram showing a second embodiment of the present invention, and FIG. 4 is a block diagram showing a third embodiment of the present invention. FIG. 5 is a block diagram showing a fourth embodiment of the present invention, FIG. 6 is a block diagram showing a fifth embodiment of the present invention,
FIG. 7 is a diagram showing the principle of multicarrier communication, FIG. 8 is a block diagram showing an example of a configuration of a conventional digital radio system, and FIG. 9 is a diagram showing an example of a configuration of a conventional multidimensional code transmission side. FIG. 10 is a diagram showing an example of a mapping method, and FIG. 11 is a block diagram showing a transmission system using a combination code. 1 ...... encoder, 2 ...... serial - parallel converter, 3 ₁ 3n, 19 ₁ ~
_{19n, 28 1 ~28n, 38 1} ~38n ...... _{modulator, 4 1 ~4n, 20 1 ~20n} ...
... the first carrier to the n-th-th carrier, 5 ₁ ~5n, 14 ₁ ~
14 ₂ , 21 _{1 to} 21n, 29 _{1 to} 29n, 39 _{1 to} 39n ... demodulator, 6,23,40
... parallel-serial converter, 7,15 ... decoder, 8 ₁ to 8 ₄ ... _first to _fourth carriers, 9 ... decoder input, 10
…… Multi-dimensional encoder, 11… Mapping circuit, 12 _{1 to} 12 ₂ …
... modulator, 13 ₁ ... first carrier, 13 ₂ ... second carrier, 16 ... first encoder, 17, 26, 37 ... serial-parallel converter, 18 _{1 to} 18 n ... Second encoder, 22 _{1 to} 22 n... Second decoder, 24... First decoder, 25, 36... Error correction encoder, 27 _{1 to} 27 n... Error detection encoder, 30 ₁ ... 30n error detecting decoder, 31 first parallel-serial converter, 32 second
, An error correction decoder, 34, a delay circuit, 35, a selection circuit, 41, a Viterbi decoding circuit, 42,
… Branch metric generator, 43… ACS, 44… path memory, 45… circuit to determine that there are many errors for each carrier

Claims (3)

(57) [Claims] In a multi-carrier communication system in which a transmission signal is divided into a plurality of carriers having a small frequency bandwidth and transmitted in digital wireless communication, an error in which a signal having a code rate of ₀ (bit / sec) is output to a transmission side. The encoder for correction and the output of the encoder have a code rate of ₀ /
a serial-to-parallel converter for converting the signal into n (bit / sec) n-serial parallel signals; and a means for dividing the n-serial parallel signals into respective carriers of a multicarrier communication system and transmitting the signals. A receiver for receiving a signal of each of the carriers,
An error correction system comprising: a parallel-serial converter for converting the n-serial parallel signal into a signal having a code rate of ₀ (bit / sec); and an error correction decoder for decoding the converter output signal. method. 2. In a multi-carrier communication system in which a transmission signal is divided into a plurality of carriers having a small frequency bandwidth in digital wireless communication and transmitted, an error in which a signal having a code rate of ₀ (bit / sec) is output to a transmission side. The encoder for correction and the output of the encoder have a code rate of ₀ /
a serial-to-parallel converter for converting into n (bit / sec) n-sequence parallel signals, n error-detection encoders for error-detecting and encoding the n-serial parallel signals, and the error-detection code Vessel n
Means for dividing and transmitting the output of the sequence to each carrier of the multi-carrier communication system, and a receiver for receiving a signal of each carrier on a receiving side;
An error detecting decoder for detecting an error in the n-sequence parallel signal by a parity bit generated by the error detecting encoder, and an n-sequence output of the error detecting decoder having a code rate of ₀ (bit / sec). A parallel-to-serial converter for converting the output of the converter, an error-correcting decoder for decoding the converter output signal, and the output of the error-correcting decoder and the parallel-to-serial converter before being decoded. The output of the error correction decoder is output for a signal of a carrier in which an error is detected using the output of the error detection decoder as a control signal, and the signal of a carrier in which no error is detected is output as a parallel signal before decoding.
An error correction method comprising a circuit for outputting a serial converter output. 3. In a multi-carrier communication system in which a transmission signal is divided into a plurality of carriers having a small frequency bandwidth in digital wireless communication and transmitted, a code rate of ₀ (bi) is transmitted to a transmission side.
t / sec), a serial-parallel converter for converting the output of the encoder into n-series parallel signals each having a code rate of ₀ / n (bit / sec); Means are provided for dividing the parallel signal of the series into each carrier of the multi-carrier communication system and transmitting the same. On the receiving side, a receiver for receiving the signal of each carrier, and a code rate of ₀ (bit) / sec), a parallel-to-serial converter for converting the signal into an output signal, an error correction Viterbi decoder for decoding the output signal of the converter, and a circuit for determining whether or not there are many errors for each carrier. An error correction method characterized by comprising means for changing a branch metric of a Viterbi decoder depending on whether or not there are many errors for each carrier.