JP2591574B2 - Automatic broadcast system selection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to selection of a broadcasting system in a video signal processing apparatus, and more particularly, to NTSC, PAL-M,
1. Field of the Invention The present invention relates to a broadcasting system automatic selection device in which a broadcasting system such as PAL-N is automatically selected.

[0002]

2. Description of the Related Art In general, the broadcasting system of color television is NTSC (National Television System Committe).
e) Method, PAL (Phase Alternation by Line) method, SECAM (Sequence De Couleurs Avec Memoir)
e) There is a method. Japanese Patent Application Laid-Open No. 4-103288 discloses an "NTSC / PAL signal discriminating circuit and an active filter using this discriminating circuit", which generates a large signal depending on the frequency of the input signal and the magnitude of the generated signal. It is determined whether the input signal is an NTSC subcarrier signal or a PAL carrier signal based on
A technique for performing adjustment for performing a predetermined operation in each mode of the SC / PAL signal is introduced.

Incidentally, the PAL system has some functions different from the PAL-M system, the PAL-N system, and the PAL-M system.
B system, PAL-I system and the like. Therefore, PAL-M
In some countries that transmit and receive television broadcasts according to the PAL-N system, the NTSC system and the PASC can be used to receive NTSC broadcasts transmitted from neighboring countries.
A receiver has been developed to receive both the LM and PAL-N systems.

[0004]

However, in such a receiver, a mechanical mode selection switch such as a slide is used to select the mode of the NTSC system, the PAL-M system and the PAL-N system. did. Therefore,
In order for the user to change the mode of the broadcasting system according to the characteristics of the broadcasting system in the corresponding area, the user must manually operate the mode selection switch.

Accordingly, an object of the present invention is to provide an apparatus for processing video signals of the NTSC system, the PAL-M system and the PAL-N system, wherein the broadcasting system is automatically selected without using means such as a selection switch. It is an object of the present invention to provide a broadcast system automatic selection device.

[0006]

According to the present invention, there is provided an automatic broadcast system selection apparatus for achieving the above object, comprising: a first state detection circuit for determining a broadcast system from a color burst signal; It comprises a second state detection circuit for discriminating and a third state detection circuit for discriminating the broadcasting system based on the output state of the first and second state detection circuits.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the accompanying drawings.
According to FIG. 1, the present invention includes a first state detection circuit 100 for determining a broadcast system from a color burst signal, a second state detection circuit 200 for determining a broadcast system from a synchronization signal, and the first and second state detection circuits. And a third state detection circuit that determines the broadcast system based on the output state of the signal.

The first state detection circuit 100 includes an inverter circuit 10 for inverting the phase of the color burst recognition pulse, a clamp circuit 11 for removing a predetermined level signal of the signal output from the inverter circuit 10, A first monostable multivibrator 12 that outputs a square wave signal having an arbitrary duty ratio based on a signal output from the circuit 11, and a first integration that integrates the square wave signal output from the first monostable multivibrator 12 It comprises a circuit 13 and a first comparator 14 which compares a signal output from the first integration circuit 13 with an arbitrary reference voltage and outputs a broadcast system discrimination signal.

The second state detection circuit 200 includes a bistable multivibrator 20 for outputting a square wave signal based on a synchronization signal of a video signal, and the bistable multivibrator 20.
A second monostable multivibrator 21 for outputting a square wave signal having a constant duty ratio in response to the output signal of the second monostable multivibrator 20 and an output signal of the second monostable multivibrator 21 An exclusive OR gate 22 that outputs a signal, a third monostable multivibrator 23 that outputs a square wave signal based on the output signal of the exclusive OR gate 22, and a square wave signal that is output from the third monostable multivibrator 23. It comprises a second integration circuit 24 for integration, and a second comparator 20 for comparing an arbitrary reference voltage output from the second integration circuit 24 and outputting a broadcast system identification signal.

The operation of the second state detection circuit 300 is based on the output of the first state detection circuit 100 for determining the broadcast system from the color burst signal and the output of the second state detection circuit 200 for determining the broadcast system from the synchronization signal. First and second transistors Q1 and Q2 controlled to output a broadcast system discrimination signal
It is composed of Therefore, NTSC, PAL-M, P
When a broadcast is received in an area where the NTSC broadcast system is used as a video signal processing device capable of receiving all the AL-N broadcast systems, an NTSC signal composed of a color burst signal and a color signal is received as shown in FIG. You.

Here, it goes without saying that the above signals include horizontal / vertical synchronization signals. As shown in FIG. 4A, when a PAL-M signal is received, the phase of the color burst signal is checked and an IC that outputs a pulse signal is output.
(Not shown) generates a color burst recognition pulse as shown in FIG. As shown in FIG. 2B, the color burst pulse input to the inverter circuit 10 of the first state detection circuit 100 is inverted, and a signal is output as shown in FIG.

The clamp circuit 11 includes an inverter circuit 10
2D is removed from the output signal of FIG.
And outputs such a signal. The output signal of the clamp circuit 11 is
It is input to the first monostable multivibrator 12. here
The first monostable multivibrator 12 has a resistor R
₁And capacitor C ₁, The duty ratio is adjusted.
Also, by inputting a pulse signal as shown in FIG.
(E) is output.

The output signal of the first monostable multivibrator 12 is input to a first integration circuit 13 and integrated to output a signal as shown in FIG. 2 (F), which is input to a first comparator 14. The first comparator 14 compares the output signal of the reference voltage Vref1 which is determined by the variable resistor VR ₁ and the resistor R ₃ as in FIG. 2 (F) and the first integration circuit 13.

At this time, if the color burst signal input to the first state detection circuit 100 is a signal of the NTSC broadcasting system, the output signal of the first integration circuit 13 becomes higher than the reference voltage Vref1, and the first comparator 14 Will output a high level logic signal. As described above, when receiving in the NTSC broadcasting system, the second state detection circuit 200 receives a vertical synchronization signal as shown in FIG. 3A separated by a synchronization separation circuit (not shown).

The vertical synchronizing signal input to the bistable multivibrator 20 as shown in FIG. 3A outputs a square wave signal as shown in FIG. 3B. At this time, since the square wave signal is a signal whose logic level changes at the falling angle of the vertical synchronization signal,
The cycle T ₁ is 1/30 sec. The output signal of the bistable multivibrator 20 is input to the second monostable multivibrator 21, the duty ratio is determined by the resistor R ₂ and capacitor C _2, the period T as shown in FIG. 3 (C)
₂ outputs a square wave signal of V ₃₀ sec.

The output signal of the second monostable multivibrator 21 is input to the exclusive OR gate 22 together with the output signal of the bistable multivibrator 20, and the output signal of FIG.
When a different logic level signal exists between the output of the bistable multivibrator 20 as shown in FIG. 3 and the second monostable multivibrator 21 as shown in FIG. 3C, a high level logic signal is output.

However, since there are no signals of different logic levels in the above signals, the output signal of the exclusive OR gate 22 outputs a low-level logic signal and is input to the third monostable multivibrator 23. A low-level logic signal is output according to the signal. Next, the low-level logic signal is input to the second integration circuit 24, and a low-level signal is output. When the output low-level logic signal is input to the second comparator 25, the second comparator 25
Reference voltage V determined by variable resistor VR ₂ and resistor R ₄
ref2 is compared with the output signal of the second integration circuit 24.

At this time, since the output signal of the second integration circuit 24 is a low-level logic signal, the output signal is lower than the reference voltage Vref2, so that the second comparator 25 outputs a low-level logic signal. . With this output, the second transistor Q2 of the third state detection circuit 300 is turned on (on). However, since the signal output from the first comparator 14 of the first state detection circuit 100 is a high-level logic signal, the first transistor Q of the third state detection circuit 300
1 is in a cutoff state (off state).

In the shut-off state, the voltage VCC becomes the second
Since the voltage is not applied to the emitter of the transistor Q2, a low-level logic signal is output to the collector of the second transistor Q2. That is, when receiving the NTSC broadcasting system, a high-level logic signal is output only to the NTSC mode end, and a low-level logic level signal is output to the PAL-M mode end and the PAL-N mode end.

On the other hand, when a broadcast is received in an area where the PAL-M broadcast system is used, a PAL-M signal including a color burst signal and a color signal is received as shown in FIG. Here, it goes without saying that the signal includes a horizontal / vertical synchronization signal. As shown in FIG.
When the LM signal is received, the phase of the color burst signal is checked and an IC (not shown) that outputs a pulse signal generates a color burst recognition pulse as shown in FIG. 4B.

As shown in FIG. 4B, the first state detection circuit 1
The color burst pulse input to the inverter circuit 10 is inverted and a signal is output as shown in FIG. The clamp circuit 11 removes the -level signal from the output signal of the inverter circuit 10. When the PAL-M broadcast system is received, a vertical synchronization signal as shown in FIG. 3A separated by a synchronization separation circuit (not shown) is input to the second state detection circuit 200. At this time, the vertical synchronizing signal of the PAL-M broadcast system is shown in FIG.
And is the same as the vertical synchronization signal of the NTSC broadcast system.

As shown in FIG. 3A, the vertical synchronizing signal is inputted to the bistable multivibrator 20, and a square wave signal as shown in FIG. 3B whose logical level changes at the falling angle of the vertical synchronizing signal is output. I do. That is, a square wave signal having a period T ₁ of 1/30 sec is output. The above bistable multivibrator 2
The output signal of 0 is input to the second monostable multivibrator 21, the duty ratio is determined by the resistor R ₂ and capacitor C _2, the period T ₂ as the (C) 3 1/30
sec.

The output signal of the second monostable multivibrator 21 is input to the exclusive OR gate 22 together with the output signal of the bistable multivibrator 20, and the output signal of FIG.
When a different logic level signal exists between the output of the bistable multivibrator 20 as shown in FIG. 3 and the second monostable multivibrator 21 as shown in FIG. 3C, a high level logic signal is output.

However, since there are no signals of different logic levels in the above signals, the output signal of the exclusive OR gate 22 outputs a low-level logic signal and is input to the third monostable multivibrator 23. A low-level logic signal is output according to the signal. Next, the low-level logic signal is input to the second integration circuit 24, and a low-level signal is output. When the output low-level logic signal is input to the second comparator 25, the second comparator 25
Reference voltage V determined by variable resistor VR ₂ and resistor R ₄
ref2 is compared with the output signal of the second integration circuit 24.

At this time, since the output signal of the second integrating circuit 24 is a low-level logic signal, the output signal is lower than the reference voltage Vref2, so that the second comparator 25 outputs a low-level logic signal. . With this output, the second transistor Q2 of the third state detection circuit 300 is turned on (on). Also, since the signal output from the first comparator 14 of the first state detection circuit 100 is a high-level logic signal, the first transistor Q1 of the third state detection circuit 300
Also enter the conductive state (ON state).

When the conductive state is established, the voltage VCC becomes the second level.
A high level logic signal is output to the emitter terminal of the transistor Q2 and to the collector terminal of the second transistor Q2. That is, when the PAL-M broadcast system is received, P
A high-level logic signal is output only to the AL-M mode end, and a low-level logic level signal is output to the NTSC mode end and the PAL-N mode end.

If a broadcast is received in an area where the PAL-N broadcast system is used, a PAL-N signal including a color burst signal and a color signal is received as shown in FIG. At this time, the PAL-N signal and the PAL-M signal are the same, and the signal includes a horizontal / vertical synchronization signal. As shown in FIG. 4A, PAL-N
When the signal is received, the phase of the color burst signal is checked, and a color burst recognition pulse as shown in FIG. 4B is generated by an IC (not shown) that outputs a pulse signal.

The first state detection circuit 10 as shown in FIG.
The color burst pulse input to the 0 inverter circuit 10 is inverted to output a signal as shown in FIG. The clamp circuit 11 removes the -level signal from the output signal of the inverter circuit 10. At this time, the output signal of the inverter circuit 10 includes:
Since there is no + level signal, the clamp circuit 11 that removes the −level signal outputs a low-level logic signal.

The output signal of the clamp circuit 11 is input to the first monostable multivibrator 12. At this time, the first monostable multivibrator 12, the resistor R ₁ and capacitor C ₁ becomes the duty ratio to output a square wave signal is adjusted. The first monostable multivibrator 12 outputs a low-level logic signal when a low-level logic signal is input. Accordingly, the output of the first integration circuit 13 that integrates the output signal is also a low-level logic signal, and the first comparator 14 that compares the output of the first integration circuit 13 with the reference voltage Vref1 also outputs a low-level logic signal. .

When the PAL-M broadcast system receives, the second
The state detection circuit 200 is separated by a synchronization separation circuit (not shown).
A separated vertical synchronization signal as shown in FIG.
You. As shown in FIG. 5A, the vertical synchronizing signal is
The falling angle of the vertical synchronizing signal input to the vibrator 20
The logic level changes as shown in FIG. _ThreeBut
A square wave signal of 1/25 sec is output.

The output signal of the bistable multivibrator 20 is input to the second monostable multivibrator 21, but outputs a square wave signal whose duty ratio is determined by the resistor R ₂ and capacitor C _2, FIG. As shown in FIG. 5C, a signal having a duty ratio different from the square wave signal output from the bistable multivibrator 20 is output. The output signal of the second monostable multivibrator 21 is input to the exclusive OR gate 22 together with the output signal of the bistable multivibrator 20, and the output of the bistable multivibrator 20 as shown in FIG. When different logic level signals are present in the second monostable multivibrator 21 as shown in (C), a high level logic signal is output.

Therefore, the exclusive OR gate 22 output signal is:
As shown in FIG. 5D, a square wave pulse signal generated by different duty ratios is obtained. When the output square wave pulse signal is input to the third monostable multivibrator 23, the square wave signal as shown in FIG. 5E is generated by the pulse signal as shown in FIG. When a pulse signal is output and the pulse signal is input to the second integration circuit 24, the pulse signal is integrated to output a signal as shown in FIG.

The signal output from the second integration circuit 24 is
Is input to the second comparator 25, second comparator 25, the reference voltage is determined by the variable resistor VR ₂ and the resistor R ₄ Vre
f2 is compared with the output signal of the second integration circuit 24. At this time, the output signal of the second integration circuit 24 becomes higher than the reference voltage Vref2. Accordingly, the second comparator 25 outputs a high-level logic signal. When the second comparator 25 outputs a high-level logic signal, the output puts the second transistor Q2 of the third state detection circuit 300 into an off state (off state).

When the cutoff state is established, the voltage VCC becomes the second level.
Since the voltage is not applied to the emitter of the transistor Q2, a low-level logic signal is output to the collector of the second transistor Q2. That is, when the PAL-N broadcast system is received, a low-level logic signal is output to the NTSC mode end and the PAL-M mode end of the output of the first state detection circuit 100, and a high-level logic signal is output to the PAL-N mode end. A logic signal is output.

[0035]

[Table 1]

The above contents are summarized in the above [Table 1]. As described above, according to the present invention, the broadcasting system is automatically selected by outputting a determination signal for selecting one of the NTSC system, one of the PAL-M and PAL-N systems according to the received broadcasting system. There is an effect that can be. In particular, in the above description, only the reception state in an area using the NTSC broadcasting system and the PAL-M and PAL-N broadcasting systems has been described. However, NTSC, PAL-M, or NTS is used.
In an area where the C and PAL-N broadcasting system is used, it is needless to say that the object of the present invention can be achieved even if only the first state detection circuit is used.

Also, NTSC, PAL-N and PAL
In areas where the -M and PAL-N broadcasting systems are used, the object can be achieved by using only the second state detection circuit, and the vertical synchronization signal is used in the second state detection circuit. A person having ordinary knowledge in the field can use the horizontal synchronization signal to achieve the object of the present invention, and the first, second, and third state detection circuits have been specifically described. The present invention is not limited to this example, and an automatic broadcast system selection device using a color burst recognition signal and vertical and horizontal synchronization signals can be configured.

In the above, more specific embodiments have been described, but it is clear that various modifications can be made without departing from the scope of the present invention.

[Brief description of the drawings]

FIG. 1 is a block diagram of a broadcast system automatic selection device according to the present invention.

FIG. 2 is a main part output waveform diagram in FIG.

FIG. 3 is an output waveform diagram of a main part in FIG.

FIG. 4 is a main part output waveform diagram in FIG. 1;

FIG. 5 is an output waveform diagram of a main part in FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Inverter circuit 11 Clamp circuit 12 1st monostable multivibrator 13 1st integration circuit 14 1st comparator 20 Bistable multivibrator 100 1st state detection circuit 200 2nd state detection circuit

Claims (2)

(57) [Claims] An inverter circuit for inverting a phase of a color burst recognition pulse; a clamp circuit for removing a predetermined level signal of a signal output from the inverter circuit;
A first monostable multivibrator that outputs a square wave signal having an arbitrary duty ratio based on a signal output from the clamp circuit, and a first integration circuit that integrates the square wave signal output from the first monostable multivibrator When,
A first state detection circuit including a first comparator for comparing a signal output from the first integration circuit with an arbitrary reference voltage and outputting a broadcast system determination signal; and a square wave based on a synchronization signal of a video signal. A bistable multivibrator for outputting a signal, a second monostable multivibrator for outputting a square wave signal having a constant duty ratio according to the output signal of the bistable multivibrator, an output signal of the bistable multivibrator and a second An exclusive OR gate that inputs an output signal of the monostable multivibrator and outputs a logic signal, a third monostable multivibrator that outputs a square wave signal based on an output signal of the exclusive OR gate, and the third monostable multivibrator A second integration circuit that integrates the square wave signal output from the second integration circuit with an arbitrary reference voltage output from the second integration circuit. A second comparator for outputting a broadcast system discrimination signal, a first state detector for discriminating the broadcast system from the color burst signal, and discriminating the broadcast system from the synchronization signal. A third transistor composed of first and second transistors whose operations are controlled by the output of the second state detection circuit to output a broadcast system identification signal;
An automatic broadcast system selection device comprising a state detection circuit. 2. An inverter circuit for inverting the phase of a color burst recognition pulse, a clamp circuit for removing a predetermined level signal of a signal output from the inverter circuit,
A first monostable multivibrator that outputs a square wave signal having an arbitrary duty ratio based on a signal output from the clamp circuit, and a first integration circuit that integrates the square wave signal output from the first monostable multivibrator When,
A first comparator for comparing a signal output from the first integration circuit with an arbitrary reference voltage and outputting a broadcast system discrimination signal; Selection device.