JP2513329B2 - Frequency modulated wave receiver - Google Patents

Description

The present invention relates to an AFC circuit used in a quadrature detection receiver.

〔Overview〕

The present invention, in an automatic frequency control circuit used in a frequency modulation wave receiving device that performs quadrature detection demodulation, holds the output voltage of the oscillation circuit with a stop signal generated by using the baseband frequency, so that the sensitivity of the receiving device is improved. This is to make it possible to improve the band characteristic.

[Conventional technology]

In recent years, advances in integrated circuit technology have made receivers smaller. However, in the current situation, taking the wireless unit as an example, it is approaching the limit of miniaturization due to the presence of elements that are impossible or difficult to integrate. For example, in a superheterodyne receiver, high frequency and intermediate frequency filters require a large area. Therefore, a quadrature detection receiver shown in FIG. 16 has been proposed to reduce the size and weight.
The quadrature detection receiver equalizes the line frequency and the local oscillation frequency, extracts the beat between the reception frequency and the local oscillation frequency with a mixer circuit, and outputs only the baseband signal via a low-pass filter, and this beat is the limiter circuit. After the amplitude is limited by, demodulation processing is performed to obtain a demodulated signal. In such a quadrature detection receiver, since the local oscillation frequency and the line frequency match, the intermediate frequency becomes zero.
It is characterized by the absence of image frequencies. This means that high frequency amplifiers and intermediate frequency amplifiers do not require highly selective filters to attenuate the image frequencies. Further, since the channel filter for attenuating the adjacent channel interference wave has an intermediate frequency of zero, it can be configured by a low frequency active filter and can be realized on an integrated circuit.

[Problems to be solved by the invention]

As described above, by using the quadrature detection receiver, it is possible to eliminate the high frequency filter, the intermediate frequency filter, etc., and it is possible to realize the miniaturization and weight reduction of the receiver. However, the quadrature detection receiver shown in FIG. 16 has a drawback that the reception sensitivity bandwidth is narrow. This can be qualitatively explained from the amount of information contained in one bit of data. An FSK (FREQUENCY SHIFT KEYING) receiver frequency-modulated by a binary digital signal of a mark or space is F _D with the maximum frequency deviation, B _R is the data transmission rate, and the amount of information contained in 1 bit of data the When E _B, becomes _{E B = 2 * F D /} B R. Here, when the line frequency is F _C and the local oscillation frequency is F _L , the beat frequency F _B appearing at the output of the mixer circuit is F _B = (F _C ± F _D ) −F _L. Assuming that there is no error between the line frequency F _C and the local oscillation frequency F _L , the beat frequency F _B and the maximum frequency deviation F _D become equal, and the amount of information E _B contained in one bit of data E _B
Is equal to the mark and the space. However, when a deviation ΔF occurs between the line frequency and the local oscillation frequency due to the oscillation frequency error and the temperature variation characteristic of the local oscillation circuit,
The beat frequency F _B becomes F _B = ± F _D −ΔF. In addition, there is a case where an offset is applied on the transmitting base station side for transmission, and in this case as well, a deviation ΔF occurs between the line frequency and the local oscillation frequency. In this way, the beat frequency F _B causes a difference between the mark and the space, and F _D − △
F, becomes _{F D + △ F, F D} - △ SN E B decreases when the F
And the reception sensitivity deteriorates.

FIG. 4 shows a comparison between the reception band characteristic of the conventional superheterodyne receiver (curve of II in the figure) and the reception band characteristic of the quadrature detection receiver (curve of I in the figure). As the graph shows, the 1 dB reception band of the super-heterodyne receiver is 6 kHz, whereas the 1 dB reception band of the quadrature detection reception system is only 2 kHz, which is clearly inferior. Such a characteristic is not a problem only when the local oscillation frequency is accurately adjusted, there is no temperature fluctuation, and the transmitting base station operates without offset, but in most cases, reception sensitivity deteriorates. There is.

The present invention eliminates such drawbacks, and an object of the present invention is to provide a frequency-modulated wave receiving apparatus in which deterioration of reception sensitivity does not easily occur.

[Means for solving problems]

The present invention provides an oscillator circuit capable of variably setting the frequency of a local frequency signal generated by its own circuit according to a given control voltage, and a modulated wave signal frequency-modulated by a binary digital signal to be received. A frequency modulation wave including a mixer circuit for converting the baseband signal into a baseband signal, an automatic frequency control circuit for applying a control voltage to the oscillation circuit, and a demodulation circuit for performing a quadrature detection process on the baseband signal to generate a demodulation signal. In the receiving device, the automatic frequency control circuit includes a first means for frequency-detecting the baseband signal to generate a first signal, and a second means for indicating an average value voltage of the first signal. Second means for generating a signal, third means for generating two third signals by superposing a positive or negative offset voltage on the voltage indicated by the second signal, and the first signal A fourth means for serial two third signal and comparing each to the first signal and outputs a fourth signal when within the offset voltage than the average voltage,
A fifth means for holding a voltage represented by a fifth signal generated by the own means in response to the fourth signal and using the voltage as a control voltage for the oscillation circuit is provided.

Here, the first means delays the baseband signal for a fixed time, and an exclusive OR circuit having the output of the delay circuit as a first input and the baseband signal as a second input. And a low pass filter connected to the output of the exclusive OR circuit.

Further, the second means may be composed of a primary integrating circuit.

Further, the third means may be means for superimposing the positive and negative offset voltages ΔV to generate the voltages V _A + ΔV and V _A −ΔV.

Further, the third means includes a voltage follower that receives the average value voltage V _A as an input, and a first one that generates a discharge current.
Constant current circuit, a first resistor connected to the first constant current circuit at one side and the other connected to the voltage follower at the other side, a second constant current circuit generating a sink current, and the second constant current circuit. The current circuit may be composed of a second resistor, one of which is connected to the voltage follower and the other of which is connected to the voltage follower.

The fourth means may be means for outputting the stop signal when the voltage of the signal output by the first means is within V _A ± ΔV.

The fourth means has a first comparator that receives the frequency detection signal as a negative input and the voltage V _A + ΔV as a positive input, and the frequency detection signal as a positive input, and the voltage V _A
It is composed of a second comparator having -V as a positive input and an AND circuit to which the output of the first comparator and the output of the second comparator are connected, and the output of the AND circuit is used as the stop signal. It may be a means.

Further, the oscillation circuit may be a sawtooth wave generation circuit.

The oscillation circuit has first and second constant voltage circuits,
A third comparator having the first constant voltage circuit as a negative input and the output voltage as a positive input, and a fourth comparator having the second constant voltage circuit as a positive input and the output voltage as a negative input; And an RS flip-flop having an output of the third comparator and an output of the fourth comparator as reset set inputs, respectively.
A third constant current circuit for making the discharge current zero by the positive phase output of the flop, and a fourth constant current circuit for making the drawing current zero by the reverse phase output of the RS flip-flop, A switch circuit for stopping the positive phase output and the negative phase output of the RS flip-flop by the stop signal by setting the output voltage at the connection point between the output of the constant current circuit and the output of the fourth constant current circuit and the capacitor You may have.

[Action]

The offset voltage is superimposed on the average value voltage of the frequency detection signal of the baseband signal as a positive voltage given to the voltage oscillation circuit that generates the local oscillation frequency given to the mixer circuit that generates the baseband signal. And a stop signal is output, and the output voltage of the oscillation circuit held by this stop signal is used.

This makes it possible to improve the sensitivity band characteristic of the quadrature detection method to the same level as that of the super heterodyne method.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of this embodiment. Figure 2 shows
FIG. 17 is a configuration diagram in which an AFC circuit 110 is added to the wireless unit of the quadrature detection receiver shown in FIG.

In this embodiment, as shown in FIG. 1, a voltage controlled oscillator circuit 109 which is an oscillator circuit capable of variably setting the frequency of a local frequency signal generated by its own circuit according to a given control voltage.
And a mixer circuit 102 for converting a modulated wave signal frequency-modulated by a binary digital signal to be received into a baseband signal by using this local frequency signal, and an automatic frequency control circuit AFC for providing a control voltage to the oscillation circuit. A circuit 110 and a demodulation circuit 105 that generates a demodulated signal by performing quadrature detection processing on the baseband signal, and further, as a feature of the present invention, the automatic frequency control circuit is a frequency converter for the baseband signal. The demodulation section 10 and the low-pass filter 11 which are the first means for detecting and generating the first signal, and the average value circuit 12 which is the second means for generating the second signal indicating the average value voltage of the first signal. And an offset circuit 13 which is a third means for generating a third signal indicating a voltage obtained by applying an offset voltage to the voltage indicated by the second signal, and compares the first signal with the third signal to obtain a fourth signal. signal Comparing the comparator circuit 14, 15 and AND circuit 17 or the comparator circuit 14 and the exclusive OR circuit 18 which are the fourth means for generating, and the voltage represented by the fifth signal generated by the own means in response to the fourth signal. And a sawtooth wave generation circuit 17 which is a fifth means for using this voltage as a control voltage for the oscillation circuit.

 Next, the operation of this embodiment will be described.

First, the detection operation when the AFC circuit 110 is not operated will be described.

The received wave frequency-modulated by the binary digital signal of the mark or space is amplified by the high frequency amplifier 101, further divided into two, and input to the mixer circuit 102, respectively. In addition, the local oscillation frequency is input from the voltage controlled oscillation circuit 109 to the 90-degree phase shifter 108, the phase is rotated by +45 degrees and -45 degrees, and is input to the mixer circuit 102. With this circuit configuration, signals with a 90 degree phase shift can be mixed
The frequency is converted from 102 to the baseband and output.
Since the line frequency and the local oscillation frequency match, the baseband signal becomes the beat frequency. Low pass filter
Reference numeral 103 extracts only the baseband signal and limits the noise band. Limiter circuit 104 for each baseband signal
Is inputted to the input terminal and binarized signals I and Q are obtained.
This signal waveform is shown in FIG. Here, the data indicates a modulation signal. By inputting the signals I and Q to the demodulation circuit 105, frequency detection as shown in FIG. 6 is performed. Here, assuming that the demodulation circuit 105 is composed of D flip-flops as shown in FIG.
When the clock input CL of the flop is the signal I and the data input D is the signal Q, the output becomes L when the data is counted at the rising edge of the clock, and is output by changing the phase of the signals I and Q by 90 degrees. Similarly, L changes and data is demodulated. The demodulated signal demodulated in this way passes through a low-pass filter 106 for removing noise and is binarized by a comparator circuit 107 and output as a binary digital signal.

 Next, the operation of the AFC circuit 110 will be described.

This circuit detects the offset frequency with respect to the line frequency by frequency-detecting the output signal I or the signal Q of the limiter circuit 104, and when the offset frequency is within a certain value, the self-running voltage-controlled oscillator circuit 109 is detected. The frequency is stopped at a fixed frequency and the local oscillation frequency is made to follow the line frequency. FIG. 3 shows the waveform of each part. The signal Q is the output of the limiter circuit 104 and is assumed to have the offset frequency ΔF. That is, the frequency of the signal Q in the mark or space is ± F _D −ΔF. Here, the demodulator 10
Is a delay detection circuit composed of a delay circuit 61 having a delay time T and an exclusive OR circuit 62, as shown in FIG. The output of the demodulator 10 becomes a pulse wave D having a pulse width T.
By integrating the pulse wave D with the low-pass filter 11, a voltage output O proportional to the frequency of the signal Q is obtained. The average value of the voltage output O becomes the voltage output of F _D which is independent of ΔF. That is, the frequencies of the signal Q are F _D −ΔF and | −F _D −Δ
Since it is F |, the frequency average value becomes F _D. The average value A of the signal O is obtained by the average value circuit 12. Time constant are sufficiently longer set than 1 / B _R. The structure of the average value circuit 12 is a first-order RC integrating circuit as shown in FIG. Next, the average value A is input to the offset circuit 13 and a voltage of ± ΔV is applied.

V _H = A + ΔV, V _L = A-ΔV V _H and V _L are input to the comparator circuits 14 and 15, respectively, and V _OH is in a high state when O <V _H and V _OL is O> V. _L is set to be in a high state at the time of. V _OL and V _OH are input to the AND circuit 16, and the output C of the AND circuit 16 is in the high state only when both V _OL and V _OH are in the high state. This indicates that signal C goes high when signal O is within .DELTA.V from average value A. To show the above with specific numerical values, the demodulation sensitivity in the demodulation circuit 10 can be shown by K _D
(V / kHz), the signal O becomes O = K _D · ΔF, and the signal C becomes high when ΔV> K _D · ΔF. K _D = 10 mV / kHz, △ V = 10
If it is mV, the signal C goes high when ΔF <1 kHz. Here, the configuration of the offset circuit 13 is shown in FIG. Average value A is offset voltage ± by resistors 68 and 69 and constant current circuits 66 and 67 through voltage follower 65.
ΔV is generated. In addition, the comparator circuit 14 and
15 is a transistor 77, 78, a resistor 75, as shown in FIG.
76, differential amplifier consisting of constant current circuit 79 and transistor 8
0 and a level shift composed of a resistor 81.

FIG. 12 shows the configuration of the sawtooth wave generation circuit 17. The capacitor 82 is charged by the constant current circuit 83 using the RS latch 91 and the comparators 89 and 90, and the RS latch 91 is inverted when the voltage becomes higher than the set voltage V _CH on the high voltage side, and the capacitor 82 is rapidly discharged by the constant current circuit 84. To do. Next, low voltage side setting voltage V _CL
In the following cases, the RS latch 91 is inverted and the constant current circuit 83
The charging is repeatedly started by and the wave is generated. The sawtooth wave generation circuit 17 stops the free running when the signal C is in the high state and maintains the voltage V _T at that time. Signal C
When is high, the constant current circuits 83 and 84 are turned off, and a high impedance state is set. Sawtooth wave generator
The output V _T of 17 is input to the voltage controlled oscillator circuit 109. For this reason, the voltage controlled oscillator circuit 109 is self-propelled by the sawtooth wave generation circuit 17 in a cycle as shown in FIG. Where 1
The cycle of the sawtooth wave is shorter than the data transmission rate because the cycle is within 1 bit. Also, as shown in FIG. 13, the local oscillation frequency changes above and below the line frequency. This is AFC
It is impossible to judge whether the beat frequency input to the circuit has a positive frequency offset or a negative frequency offset, and the local oscillation frequency is changed above and below the line frequency to reduce the offset. This is because it is necessary to detect As the local oscillation frequency changes periodically, the baseband signals I and Q also change. Therefore, be sure to set 1 in 1 bit.
Since the error between the line frequency and the local oscillation frequency may be within a predetermined frequency, the signal C also becomes the high state at least once in one bit. At this time, the output V _T of the sawtooth wave generation circuit 17 becomes a constant value, and the local oscillation frequency falls within a predetermined frequency of the line frequency and automatic frequency control is applied.

 Next, a second embodiment of the present invention is shown in FIG.

The AND circuit 16 of FIG. 1 is replaced with an exclusive OR circuit 18, and it operates similarly to the first embodiment.

Finally, FIG. 15 shows the reception sensitivity band characteristic when the AFC circuit of this embodiment is used. Compared to the quadrature detection method that does not use the AFC circuit, the 1dB band is clearly improved from 2kHz to 6kHz. Further, as shown in FIG. 4, it is comparable to the conventional super heterodyne system. Here, the curve I in FIG. 4 shows the characteristics of the quadrature detection reception system, and the curve II shows the characteristics of the superheterodyne system. Curve I in FIG. 15 shows the characteristics without the AFC circuit, and curve II shows the characteristics with the AFC circuit.

〔The invention's effect〕

As described above, according to the present invention, the local oscillation frequency is within a predetermined frequency with the line frequency, and it is possible to follow the line frequency, thereby eliminating the disadvantage that the sensitivity band characteristic is narrow like the conventional example. The effect is that sensitivity band characteristics equivalent to those of the super heterodyne system can be realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of the receiver used in the present invention. FIG. 3 is a diagram showing the waveform of each part of the first embodiment. FIG. 4 is a graph showing reception band characteristics. FIG. 5 is a configuration diagram showing a configuration of the demodulation circuit of FIG. FIG. 6 is a waveform diagram showing the operation of the demodulation circuit of FIG. FIG. 7 is a block diagram of the demodulator of FIG. FIG. 8 is a block diagram of the low-pass filter of FIG. FIG. 9 is a block diagram of the average value circuit of FIG. FIG. 10 is a block diagram of the offset circuit of FIG. FIG. 11 is a block diagram of the comparator circuit of FIG. FIG. 12 is a block diagram of the sawtooth wave generation circuit of FIG. Figure 13 is a waveform diagram of a sawtooth wave. FIG. 14 is a block diagram showing the configuration of the second embodiment of the present invention. FIG. 15 is a graph of reception band characteristics when the present invention is used. FIG. 16 is a block diagram showing the configuration of a conventional example. 10 ... Demodulator, 11, 103, 106 ... Low-pass filter, 12
…… Average value circuit, 13 …… Offset circuit, 14, 15, 107
...... Comparator circuit, 16 …… And circuit, 17 …… Sawtooth wave generation circuit, 18 …… Exclusive OR circuit, 101 …… High frequency amplifier, 102 …… Mixer circuit, 104 …… Limiter circuit, 105 …… Demodulation Circuit, 108 …… 90 degree phase shifter, 109 …… Voltage control oscillation circuit, 110 …… AFC circuit, 201 …… Local oscillation circuit.

Claims (1)

(57) [Claims] 1. An oscillating circuit capable of variably setting the frequency of a local frequency signal generated by its own circuit in accordance with a given control voltage, and a modulating wave signal frequency-modulated by a binary digital signal to be received. Frequency modulation including a mixer circuit for converting to a baseband signal by using the above, an automatic frequency control circuit for giving a control voltage to the oscillation circuit, and a demodulation circuit for performing a quadrature detection process on the baseband signal to generate a demodulation signal. In the wave receiving device, the automatic frequency control circuit includes first means for frequency-detecting the baseband signal to generate a first signal, and second means for generating a second signal indicating an average value voltage of the first signal. Means and third means for generating two third signals by superposing a positive or negative offset voltage on the voltage indicated by the second signal,
Fourth means for comparing the first signal with the two third signals, and outputting a fourth signal when the first signal is within the offset voltage from the average value voltage, and the fourth signal. And a fifth means for holding the voltage represented by the fifth signal generated by its own means, and using this voltage as the control voltage of the oscillation circuit, wherein the first means is the baseband signal for a certain period of time. A delay circuit for delaying, an exclusive OR circuit using the output of the delay circuit as a first input and the baseband signal as a second input, and a low frequency band connected to the output of the exclusive OR circuit. A pass filter, the second means is a first-order integration circuit, and the third means is a voltage follower that receives the second signal as an input and a first constant circuit that generates a discharge current. The current circuit and the first constant current circuit above A first resistor having one end connected to the voltage follower and the other end connected to the voltage follower, a second constant current circuit for generating a sink current, and one end connected to the second constant current circuit to the voltage follower. And a second resistor whose other end is connected to the fourth means, wherein the fourth means uses the first signal as a negative input and the first third signal on which the positive offset voltage is superimposed as a positive input. A first comparator, a second comparator having the first signal as a positive input and a second third signal having the negative offset voltage superposed thereon as a negative input, an output of the first comparator and a second And a logical product circuit connected to the output of the comparator, the fifth means is a first constant voltage circuit, a second constant voltage circuit, the first constant voltage circuit as a negative input A third comparator having the fifth signal as a positive input and , A fourth comparator having the second constant voltage circuit as a positive input and the fifth signal as a negative input, and the outputs of the third and fourth comparators as reset / set inputs, respectively.
An RS flip-flop, a third constant current circuit that makes the discharge current zero by the positive-phase output of this RS flip-flop, and a fourth constant current circuit that makes the pull-in current zero by the opposite-phase output of the RS flip-flop. A switch circuit for stopping the positive phase input and the negative phase output of the RS flip-flop by the fourth signal, and connecting the output of the third constant current circuit and the output of the fourth constant current circuit to a capacitor. And a point is a sawtooth wave generation circuit that outputs the fifth signal.