JP2508646B2 - High efficiency encoder - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a high-efficiency coding apparatus for compressing the number of bits per pixel of image data such as digital television signals.

[Outline of Invention]

The present invention, in a high-efficiency coding apparatus applied when transmitting a digital television signal, divides a television screen into a large number of three-dimensional blocks, that is, spatial blocks, and correlates the pixels in each block. By the encoding adapted to the narrowed dynamic range, the pixel data in the block can be encoded with the compressed bit number, and the transmission data with the reduced bit number compared to the bit number of the original data can be formed. , It is possible to remove the redundancy in the time direction by judging the motion of the image for each block, and coding the block having no motion as compared with the block having the motion with a smaller quantization step. .

[Conventional technology]

As a method of encoding a television signal, some methods are known in which the average number of bits per image or the sampling frequency is reduced for the purpose of narrowing the transmission band.

As an encoding method for lowering the sampling frequency, the pixel data is decimated to 1/2 by subsampling, and the position of the subsampling point and the subsampling point used at the time of interpolation are shown (that is, either above or below the interpolation point or left or right). And a flag indicating whether to use the data of the sub-sampling point) has been proposed.

DPCM (differential PCM) is known as one of encoding methods for reducing the average number of bits per pixel. DPCM focuses on the fact that the correlation between pixels of a television signal is high and the difference between adjacent pixels is small, and the difference signal is quantized and transmitted.

As another encoding method for reducing the average number of bits per pixel, the screen of one field is subdivided into minute blocks, and the deviation of the pixel at the representative point and the level distribution of the data in the block is calculated for each block. There is something to transmit.

[Problems to be solved by the invention]

An encoding method that attempts to reduce the sampling frequency by using subsampling has a sampling frequency of 1/2
Therefore, there is a fear that a folding distortion may occur.

DPCM has a problem that an error propagates to subsequent decoding.

The method of encoding in block units has a drawback that block distortion occurs at boundaries between blocks.

An object of the present invention is to provide a high-efficiency coding apparatus which does not cause problems such as the generation of aliasing distortion, the propagation of errors, the generation of block distortion, etc., which the above-mentioned conventional techniques have.

The applicant of the present application obtains a dynamic range defined by the maximum value and the minimum value of a plurality of pixels included in a two-dimensional block as described in Japanese Patent Application No. 59-266407. We have proposed a high-efficiency coder that performs adaptive coding. In addition, Japanese Patent Application Sho 60-2
An encoding method adapted to a dynamic range has been proposed for a three-dimensional block formed from pixels included in a plurality of fields as described in the specification of No. 32789.

In the coding method adapted to these dynamic ranges, the quantization step is the same for a still image block and a moving image block.

Furthermore, as described in Japanese Patent Application No. 60-268817, a variable length in which the word length (the number of bits) changes according to the dynamic range so that the maximum distortion that occurs when quantization is made constant. A coding method has been proposed.

Also in this variable length coding method, the maximum distortion is set to the same value in both the still image block and the block having motion.

However, when the quantization step is gradually increased and the compression rate is increased, the still image is first deteriorated such as block distortion. The reason for this is that in the case of an image with relatively fast movement, details are not recognized due to the afterglow characteristic of the cathode ray tube and the integration effect of the human eye, and conversely, in the case of a still image, the details of the image are not recognized. This is because it is possible to recognize up to.

The present invention improves a high-efficiency coding apparatus using a three-dimensional block in consideration of this visual characteristic. That is, in the present invention, by discriminating between a moving block and a still block in block units and making the quantization step of the still block smaller than the quantization step of the moving block, The present invention provides a high-efficiency encoding device capable of increasing the compression rate.

[Means for solving problems]

The maximum value of a plurality of pixel data included in a three-dimensional block including the first, second, and third regions belonging to each of the first, second, and third frames of the input digital image signal Means for obtaining the minimum value of pixel data, means for detecting the dynamic range of each three-dimensional block from the maximum and minimum values, and pixels at the same position between the two areas of the first, second and third areas Is detected, the presence / absence of motion is determined for each three-dimensional block based on the detected difference, and the motion determining means for generating a determination code and the input digital image signal and a value defining the dynamic range are subtracted. To form modified input data with a predetermined number of quantization bits smaller than the original number of quantization bits within the detected dynamic range, and , A quantizing means for generating a coded code signal by reducing the quantizing step of a non-moving three-dimensional block as compared with the quantizing step of a three-dimensional block having motion by the discrimination code, and data showing a dynamic range And a transmission means for transmitting at least two of the maximum value and the minimum value as the additional code together with the encoded code signal and the discrimination code.

[Action]

Since the television signal has a three-dimensional correlation in the horizontal direction, the vertical direction, and the time direction, the level change range of the pixel data included in the same block is small in the stationary part. Therefore, even if the dynamic range of the data after removing the minimum level shared by the pixel data in the block is quantized with a quantization bit number smaller than the original quantization bit number, quantization distortion hardly occurs. By reducing the number of quantization bits, the data transmission bandwidth can be made narrower than the original transmission bandwidth. Further, when the image of the block is a still image, the quantization step is smaller than that of the block in which the image is moving, the compression rate can be increased, and the image of the still portion can be prevented from deteriorating.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. This explanation will be given in the order of the following items.

a. Configuration on the transmission side b. Configuration on the reception side c. Block and blocking circuit d. Motion determination circuit e. Dynamic range detection circuit f. Quantization circuit g. Modified example a. Configuration on the transmission side FIG. 1 shows the overall configuration of the transmission side (recording side) of the present invention. A digital television signal in which, for example, one sample is quantized into 8 bits is input to an input terminal indicated by 1. This digital television signal is supplied to the blocking circuit 2.

The block circuit 2 converts the input digital television signal into a continuous signal for each block which is a unit of encoding. The output signal of the blocking circuit 2 is supplied to the motion determination circuit 3 and the dynamic range detection circuit 4. The motion determination circuit 3 uses a three-dimensional block (in this example,
This is a circuit for generating a 1-bit discrimination code SJ indicating the presence / absence of motion within 6 lines × 6 pixels × 3 frames). The discrimination code SJ becomes high level for a still block that does not move, and the discrimination code SJ becomes low level for a block that has a motion. The dynamic range detection circuit 4 is
Maximum value MAX, minimum value MIN, dynamic range of each block
Detect DR. The input data converted into the order of blocks from the blocking circuit 2 is supplied to the subtraction circuit 5, and in the subtraction circuit 5, the data PDI from which the minimum value MIN is removed is formed.

The data PDI from the subtraction circuit 5 is supplied to the AND gates 6 and 7. The data passed through the AND gate 6 is supplied to the quantization circuit 8, and the data passed through the AND gate 7 is supplied to the quantization circuit 9. In the quantizing circuits 8 and 9, encoding is performed with a variable number of bits adapted to the dynamic range DR of each block. That is, in the quantization circuits 8 and 9,
Data PDI after removing the minimum value by dividing the dynamic range DR of the block by the number of steps corresponding to the number of quantization bits
By determining which level range is included in
It is quantized.

The quantization step of the quantization circuit 8 is smaller than the quantization step of the quantization circuit 9. The quantization circuit 8 is supplied with the data of the still block selected by the AND gate 6, and the quantization circuit 9 is supplied with the data of the block having the motion selected by the AND gate 7.
Code signal DT1 or D from these quantization circuits 8 and 9
T2 is supplied to the framing circuit 12 via the OR gate 11.

In this embodiment, the discrimination code SJ, the dynamic range DR, the minimum value MIN, and the code signals DT1 and DT2 are transmitted. These data are supplied to the framing circuit 12 and converted into transmission data. As the form of transmission data, discrimination code SJ, minimum value MIN, dynamic range DR
Also, it is possible to use a device in which an independent error correction code is encoded in each of the data portions including the code signals DT1 and DT2 and the parity of each error correction code is added for transmission. Further, each of the discrimination code SJ other than the code signal, the dynamic range DR, and the minimum value MIN may be encoded with an independent error correction code. Further, it is also possible to apply common error correction code to both the discrimination code SJ, the dynamic range DR and the minimum value MIN, and add the parity.
The transmission data is taken out at the output terminal 13 of the framing circuit 12. Although not shown, the transmission data from the framing circuit 12 is transmitted (or recorded in a recording medium) as serial data.

b. Configuration on the receiving side FIG. 2 shows the configuration on the receiving (or reproducing) side. The received data from the input terminal 21 is supplied to the frame decomposing circuit 22. The frame decomposing circuit 22 separates the code signals DT1 and DT2 from the additional codes MIN and DR and the discrimination code SJ, and also performs error correction processing.

The code signal from the frame decomposition circuit 22 is AND gate 23,
It is supplied to the decoding circuits 25 and 26 via 24 respectively. The dynamic range DR is supplied to the decoding circuits 25 and 26. A
The discrimination code SJ is supplied to the ND gate 23, and the discrimination code SJ is inverted and supplied to the AND gate 24. Therefore, the code signal DT1 of the still block is supplied to the decoding circuit 25, and the code signal DT2 of the block having motion is supplied to the decoding circuit 26. These decoding circuits 25 and 26
Performs processing reverse to that of the quantization circuits 8 and 9 on the transmission side, respectively, and generates an output signal of a level corresponding to the code signal.

The output signals of the decoding circuits 25 and 26 are supplied to the adding circuit 28 via the OR gate 27. In each of the decoding circuits 25 and 26, the data DTI after removal of the 8-bit minimum level is restored as a representative level, and this data and the 8-bit minimum value MI are restored.
N and N are added by the adder circuit 28, and the original pixel data is decoded. The output data of the adder circuit 28 is supplied to the block decomposition circuit 29. The block decomposing circuit 29 is a circuit for converting the decoded data in the order of blocks into the same order as the scanning of the television signal, contrary to the blocking circuit 2 on the transmitting side. The decoded original television signal is obtained at the output terminal 30 of the block decomposition circuit 29.

c. Block and Blocking Circuit A block, which is a unit of coding, will be described with reference to FIG. In FIG. 3, 14 indicates one block consisting of two-dimensional areas 14A, 14B, 14C belonging to each of the three frames, where the solid line indicates the odd field line and the broken line indicates the even field line. Show. The six pixels included in each of the six lines in each frame form (6 lines × 6 pixels) areas 14A, 14B, and 14C. Therefore, one block is (6 × 6 × 3 = 108)
It consists of individual pixels. The total number of bits of the original digital television signal contained in one block is (108 × 8
Bit = 864 bits).

The smaller the number of quantization bits of the code signal, the better in order to suppress the redundancy. However, in order not to increase the quantization distortion, the number of quantization bits should not be reduced too much.
When the number of quantization bits is 8, the level of the television signal can be 256 (0 to 255). However, in the stationary part except the non-stationary part such as the contour of the object, the level distribution of the pixels of one block is concentrated in a fairly narrow level range. In the case of a television signal, each pixel in a three-dimensional one block has a correlation, so that the dynamic range DR does not become so large in the stationary portion, and if the maximum value is 128th place, Is enough.

FIG. 4 shows an example of the configuration of the blocking circuit 2 described above. The frame memories 15A, 15B and 15C are connected in series to the input terminal 1. The pixel data of the current frame Fn + 2 is supplied to the scan conversion circuit 16A, the pixel data of the previous frame Fn + 1 from the frame memory 15A is supplied to the scan conversion circuit 16B, and the previous frame Fn from the frame memory 15A is supplied.
Pixel data is supplied to the scan conversion circuit 16C.

As shown in FIG. 5A, the scan conversion circuit 16A converts the order of data in one frame into the order of each block area. Similarly, the other scan conversion circuits 16B and 16C convert the order of the data in one frame into the order of each block area. The output data of the scan conversion circuit 16A is supplied to the combining circuit 18 via the delay circuit 17A, and the output signal of the scan conversion circuit 16B is supplied to the combining circuit 18 via the delay circuit 17B. The delay circuit 17A has a delay amount equal to 72 pixel data included in two regions, and the delay circuit 17B has a delay amount equal to 36 pixel data included in one region. Also,
The combining circuit 18 is composed of a delay circuit and a switch circuit.

As shown in FIG. 5B, the pixel data of the areas 14A, 14B and 14C included in each of the three consecutive frames Fn, Fn + 1 and Fn + 2 are sequentially output to the output terminal 19 of the synthesizing circuit 18. That is, output data converted into the block order is obtained at the output terminal 19.

d. Motion determination circuit FIG. 6 shows an example of the motion determination circuit 3. In FIG. 6, 31A, 31B and 31C are input terminals to which image data of three frames Fn, Fn + 1 and Fn + 2 in one block are supplied. This input data is formed by parallelizing the output data of the blocking circuit 2 described above for each block. Image data of each frame, threshold data Tf from terminal 31D, reset pulse PR from terminal 31E
Are supplied to the motion detection circuits 32A, 32B and 32C, respectively.

The motion detection circuit 32A detects the motion of the image between the area 14A of the frame Fn and the area 14B of the frame Fn + 1. The motion detection circuit 32B uses the area 14A of the frame Fn and the frame Fn + 2.
The image movement is detected between the areas 14C. Motion detection circuit 32C
Detects the motion of the image between the area 14B of the frame Fn + 1 and the area 14C of the frame Fn + 2. Since these motion detection circuits 32A, 32B, 32C have the same configuration except for the input image data, FIG. 6 shows a specific configuration of the motion detection circuit 32A. Motion detection circuit 32A, 32
The 1-bit output signals of B and 32C are supplied to the AND gate 33, and the 1-bit discrimination signal SJ is output from the AND gate 33 to the output terminal 3
Taken out in 4.

The motion detection circuit 32A includes a subtraction circuit 35, an absolute value conversion circuit 36, a comparison circuit 37, and a determination circuit 38. Subtraction circuit 35
The absolute value conversion circuit 36 forms the absolute value of the level difference (frame difference) between the pixels at the corresponding positions between the areas 14A and 14B. The absolute value of this frame difference is compared with the threshold data Tf by the comparison circuit 37.

A binary comparison output corresponding to the level relationship between the absolute value of the frame difference and the threshold data Tf is supplied to the decision circuit 38. The determination circuit 38, when the absolute value of the frame difference with respect to all the pixels included in each of the areas 14A and 14B of the frame Fn and the frame Fn + 1 is equal to or less than the threshold data Tf, that is, there is no change between the two, that is, the stationary portion. judge. The determination circuit 38 includes
The reset pulse PR for each block is supplied. The output signal of the determination circuit 38 becomes high level when it is determined to be a stationary portion, and becomes low level when it is determined that there is motion.

Similar to the above, the change between the areas 14A and 14C is detected by the motion detection circuit 32B, and the change between the areas 14B and 14C is detected by the motion detection circuit 32C. Therefore, the AND gate
The discrimination code SJ extracted from 33 to the output terminal 34 is a 1-bit signal which becomes high level in the stationary portion.

As the motion determination, a method of comparing the integrated value of the frame difference from the absolute value conversion circuit 36 and the threshold value or the determination circuit 38 compares the number of absolute value frame differences exceeding the threshold value with the threshold value. The method etc. can be used.

e. Dynamic Range Detection Circuit FIG. 7 shows an example of the configuration of the dynamic range detection circuit 4. As described above, the block circuit 2 sequentially supplies the input terminal indicated by 41 with image data of an area in which encoding is required for each block. The pixel data from the input terminal 41 is supplied to the selection circuit 42 and the selection circuit 43. One of the selection circuits 42 selects and outputs the one having a larger level between the pixel data of the input digital television signal and the output data of the latch 44. The other selection circuit 43 selects and outputs the smaller one of the pixel data of the input digital television signal and the output data of the latch 45.

The output data of the selection circuit 42 is supplied to the subtraction circuit 46 and is also captured by the latch 44. The output data of the selection circuit 43 is supplied to the subtraction circuit 46 and the latch 48, and is also captured by the latch 45. A latch pulse is supplied from the control unit 49 to the latches 44 and 45. Timing signals such as a sampling clock and a synchronizing signal that are synchronized with the input digital television signal are supplied to the control unit 49 from the terminal 50. The control unit 49 supplies a latch pulse to the latches 44 and 45 and the latches 47 and 48 at a predetermined timing.

At the beginning of each block, the contents of latches 44 and 45 are initialized. All of the data of "0" is initialized to the latch 44, and all of the data of "1" is initialized to the latch 45. The maximum level is stored in the latch 44 among the pixel data of the same block that are sequentially supplied. In addition, the minimum level is stored in the latch 45 among the pixel data of the same block that is sequentially supplied.

When the detection of the maximum level and the minimum level is completed for one block, the maximum level of the block occurs at the output of the selection circuit 42. On the other hand, the minimum level of the block occurs at the output of the selection circuit 43. Latches 44 and 45 are reinitialized when the detection for one block is complete.

The output of the subtraction circuit 46 is the maximum level from the selection circuit 42.
The dynamic range DR of each block is obtained by subtracting MAX and the minimum level MIN from the selection circuit 43. These dynamic range DR and minimum level MIN are latched in the latches 47 and 48 by the latch pulse from the control block 49, respectively. The dynamic range DR of each block can be obtained at the output terminal 51 of the latch 47, and the output terminal 52 of the latch 48 can be obtained.
The minimum value MIN of each block is obtained.

f. Quantization circuit The quantization circuits 8 and 9 respectively perform variable-length coding adapted to the dynamic range DR. FIG. 8 shows an example of the quantization circuit 8. In FIG. 8, in the ROM indicated by 55,
A data conversion table for converting the pixel data PDI (8 bits) after the minimum value removal into a compressed bit number is stored. The dynamic range DR from the input terminal 56 and the pixel data PDI from the input terminal 57 are supplied to the ROM 55 as address signals.

In the ROM 55, the data conversion table is selected according to the size of the dynamic range DR, and the 5-bit code signal DT1 is extracted at the output terminal 58. Dynamic range DR
Accordingly, the number of bits of the code signal DT1 changes in the range of 0 bit to 5 bits. Therefore, the effective bit length in the code output from the ROM 55 changes. A valid bit is selected in the framing circuit 12.

FIG. 9 is used to explain the variable bit length coding adapted to the dynamic range, which is performed by the quantizing circuit 8. This encoding is a process of converting the pixel data from which the minimum value has been removed into a representative level. The allowable maximum value of the quantization distortion (referred to as maximum distortion) that occurs during this quantization is set to a predetermined value, for example 4.

FIG. 9A shows the case where the dynamic range DR (difference between the maximum value MAX and the minimum value MIN) is 8. In the case of (DR = 8), the central level 4 is the representative level L0, and the maximum distortion E = 4. That is, when (0 ≦ DR ≦ 8), the center level of the dynamic range is set as the representative level,
There is no need to transmit quantized data. Therefore, the required bit length Nb is 0. On the receiving side, decoding is performed with the representative level L0 as the restoration value from the minimum value MIN of the block and the dynamic range DR.

FIG. 9B shows the case of (DR = 17), the representative level is set to (L0 = 4) (L1 = 13), and the maximum distortion E is 4. Since there are two representative levels L0 and L1, (Nb = 1)
Becomes In the case of (9 ≦ DR ≦ 17), it is (Nb = 1). The maximum distortion E becomes smaller as the dynamic range DR is narrower.

FIG. 9C shows the case of (DR = 35), and the representative levels are determined to be (L0 = 4) (L1 = 13) (L2 = 22) (L3 = 31), respectively, and (E = 4) is there. Since there are four representative levels L0 to L3, (Nb = 2). In the case of (18 ≦ DR ≦ 35), (Nb = 2) is set.

In the case of (36 ≦ DR ≦ 71), eight representative levels (L0-
L7) is used. FIG. 9D shows the case of (DR = 71), and the representative level is (L0 = 4) (L1 = 13) (L2 = 22) (L3
= 31) (L4 = 40) (L5 = 49) (L6 = 58) (L7 = 67). In order to distinguish the eight representative levels L0 to L7, (Nb = 3) is set.

In the case of (72 ≤ DR ≤ 143), 16 representative levels (L0
~ L15) is used. FIG. 9E shows the case of (DR = 143), and the representative level is (L8 = 76) (L9 = 85) (L10 = 9).
4) (L11 = 103) (L12 = 112) (L13 = 121) (L14 = 13
0) (L15 = 139) (L0 to L7 are the same as the above values). In order to distinguish 16 representative levels (L0 to L15), it is set to (Nb = 4).

In the case of (144 ≦ DR ≦ 287), 32 representative levels (L0
~ L31) is used. FIG. 9F shows the case of (DR = 287), and the representative level is (L16 = 148) (L17 = 157) (L18
= 166) (L19 = 175) (L27 = 247) (L28 = 25)
6) (L29 = 265) (L30 = 274) (L31 = 283) (L0 ~ L15
Is the same as the value above). In order to distinguish the 32 representative levels (L0 to L31), it is set to (Nb = 5). Actually, since the input pixel data is quantized by 8 bits, the maximum value of the dynamic range DR is 255, and it is not quantized to the representative level (L28 to L31).

The other quantizer circuit 9 performs variable-length coding similar to the quantizer circuit 8 described above. Since the quantizing circuit 9 is applied to a moving block, the maximum distortion E has a larger value than the quantizing circuit 8 applied to a still block. For example, the maximum distortion is set to 7.
Therefore, the number of bits of the code signal DT2 generated from the quantization circuit 9 is smaller than the number of bits of the code signal DT1 generated from the quantization circuit 8 when the dynamic range DR is the same.

As described above, the block is divided into a predetermined number of level ranges according to the dynamic range DR of the block, and the central value of each level range is set as the representative level. In this case, the value of twice the maximum distortion is the quantization step.

Since the television signals in one block have a three-dimensional correlation in the horizontal and vertical two-dimensional directions and in the time direction, in the steady part, the variation range of the level of the pixel data included in the same block. Is small. Therefore,
Even if the dynamic range of the data DTI after removing the minimum level MIN shared by the pixel data in the block is quantized with a quantization bit number smaller than the original quantization bit number, quantization distortion hardly occurs. By reducing the number of quantization bits, the data transmission bandwidth can be made narrower than the original transmission bandwidth.

g. Modified Example The present invention is applicable not only to the variable length coding system but also to the fixed length coding system. In the fixed length coding method, the dynamic range DR of the block is divided into a number of level ranges determined by the number of quantization bits, and a code signal corresponding to the level range to which the data after the minimum value removal belongs is formed. Therefore, when the number of bits of the quantizing circuit 8 for coding a still block is 4 bits, the number of bits of the quantizing circuit 9 for coding a moving block is smaller, for example, 3 bits. It is said that

On the other hand, in the quantization circuit 8, as shown in FIG. 10A, the level range to which the data PDI after the minimum value removal belongs is determined in the level range obtained by dividing the dynamic range DR into 16
A code signal indicating the obtained level range is generated. In the other quantization circuit 9, as shown in FIG. 10B,
In the case of the same dynamic range DR as in FIG. 10A, this dynamic range DR is divided into eight level ranges and the level range in which the data PDI is included is determined. Therefore, if the quantization step of the quantization circuit 9 is Δ,
In the example of FIG. 10, the quantization step of the quantization circuit 8 is 1 / 2Δ
Becomes

In fixed-length encoding, as is clear from FIG. 10, the dynamic range is equally divided by the quantization step Δ or 1 / 2Δ, and the representative level L0, L1, ...
... is used as the value at the time of decoding. This encoding method can reduce quantization distortion.

On the other hand, pixel data having the minimum level MIN and the maximum level MAX always exist in one block. Therefore, in order to increase the number of encoded codes having an error of 0,
As shown in Fig. 11, the dynamic range DR is set to (2 ^m-
1) (where m is the number of quantization bits), the minimum level MIN may be the representative minimum level L0, and the maximum level MAX may be the representative maximum level L3. The example in FIG. 11 shows a case where the number of quantization bits is 2 for simplicity.

In the above description, the code signal DT1 or DT2, the dynamic range DR, the minimum value MIN, and the motion determination code SJ are transmitted. However, the dynamic range as an additional code
Quantization width or maximum distortion may be transmitted instead of DR.

Further, one block of data may be simultaneously taken out by a circuit combining a frame memory, a line delay circuit, and a sample delay circuit.

〔The invention's effect〕

According to the present invention, the amount of data to be transmitted can be sufficiently reduced compared to the original data, and the transmission band can be narrowed. Further, the present invention has an advantage that the original pixel data can be almost completely restored from the received data in the stationary part where the change width of the brightness level is small, and the image quality is hardly deteriorated. Further, according to the present invention, since the dynamic range is determined corresponding to each block, the response at the transitional part such as the edge where the change width is large becomes good.

According to the present invention, the quantization step of the still block is made smaller than the quantization step of the moving block in consideration of human visual characteristics, so that the quality of the restored image on the receiving side is not deteriorated and the code is The number of signal bits can be reduced.
Therefore, the compression rate can be increased.

Further, according to the present invention, a three-dimensional block is formed by three regions each belonging to a period of three frames, and the presence or absence of motion is detected based on the difference between pixels at the same position in the three regions. Accuracy can be increased,
The quantization step can be controlled correctly.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram showing a configuration of a receiving side, and FIG. 3 is a schematic diagram used for explaining a block which is a unit of encoding processing. 5 and 5 are schematic diagrams for explaining an example of the configuration of the blocking circuit and the blocking circuit, FIG. 6 is a block diagram of an example of the motion determination circuit, and FIG. 7 is an example of a dynamic range detection circuit. Block diagram, FIG. 8 is a block diagram of an example of a quantization circuit, FIG. 9 is a schematic diagram used to explain an example of quantization,
10 and 11 are schematic diagrams used to explain another example of quantization and still another example, respectively. Description of main symbols in the drawings 1: Input terminal of digital television signal, 2: Blocking circuit, 3: Motion determination circuit, 4: Dynamic range detection circuit, 8, 9: Quantization circuit, 12: Framed circuit.

Claims (1)

(57) [Claims] 1. A continuous first of an input digital image signal,
A means for determining a maximum value of a plurality of pixel data and a minimum value of the plurality of pixel data included in a three-dimensional block consisting of the first, second and third regions belonging to each of the second and third frames; Means for detecting the dynamic range of each of the three-dimensional blocks from the maximum value and the minimum value, and a difference between pixels at the same position between the two areas of the first, second and third areas. , A motion determining means for determining the presence or absence of motion for each of the three-dimensional blocks based on the detected difference and generating a determination code, and the input digital image signal and a value defining the dynamic range are subtracted and corrected. The means for forming the input data and the method for encoding the modified input data with a predetermined number of quantization bits less than the original number of quantization bits within the detected dynamic range are used together. In addition, the discrimination code reduces the quantization step of the non-moving three-dimensional block as compared with the quantization step of the three-dimensional block having the movement,
Quantization means for generating an encoded code signal, data indicating the dynamic range, the maximum value,
At least two of the above minimum values are added codes,
A high-efficiency coding device comprising: a transmission means for transmitting together with the coded code signal and the discrimination code.