JP2014110291A - Light-emitting device, method for manufacturing light-emitting device, light-emitting element print head, and image forming apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve such problems that in a process of fabricating a light-emitting device by transferring an epitaxial film including a separately fabricated light-emitting element or the like onto a board where a drive circuit is laid, and then wiring the light-emitting element and the drive circuit, it is difficult to wire the light-emitting element with high accuracy and wiring induces reduction in emission efficiency.SOLUTION: A light-emitting thyristor array 302 is fabricated through the following steps: a first step of forming the light-emitting thyristor array 302 and a crisscross alignment mark 13 on a substrate 331 for producing an epitaxial film via an AlAs release layer 353; a second step of transferring the light-emitting thyristor array 302 and the alignment mark 13 released from the substrate 331 for producing an epitaxial film without changing the relative positional relationship onto a Si substrate 201 where a drive circuit is laid; and a third step of wiring the light-emitting thyristor array 302 transferred onto the Si substrate 201 by using the alignment mark 13 as a reference.

Description

  The present invention relates to a light emitting device constituting a light emitting element print head used in an image forming apparatus such as an electrophotographic printer, and a method for manufacturing the same.

  Conventionally, a driver circuit is formed on a glass or Si substrate, a separate light emitting element is formed on a gallium arsenide substrate, a release layer formed on the gallium arsenide substrate is etched to separate the light emitting elements, and separated light emission There has been proposed a structure in which a light emitting device such as an LED print head is formed by transferring an element to a substrate on which a drive circuit is formed and electrically connecting the light emitting element and the drive circuit with wiring. Since the light-emitting element is a thin film that is peeled off and transferred, the light-emitting element, the drive circuit, etc. on the substrate can be wired in a lump by using a photolithography method or the like without using individually connected wire bonding (for example, patents) Reference 1).

JP 2004-207444 A (paragraphs 0021 to 0026, FIGS. 5 to 7)

  However, in this method, since the light emitting element and the drive circuit are formed on completely different substrates, in order to carry out accurate wiring, high-precision alignment in the transfer process is required. A micron order is required for the positioning accuracy. The light emitting elements of LED print heads currently in practical use are, for example, 1200 dots per inch, that is, 1200 dpi, and the light emitting elements are formed with a high definition of about 10 μm. In order to accurately connect the wiring to the light emitting element and the driving circuit, a positioning accuracy of ± 3 μm or less is required at the most, combining both the transfer positioning accuracy and the wiring positioning accuracy. If the misalignment due to transfer increases, it may become short-circuited or disconnected at an unintended location, making it impossible to make an electrical connection, or a highly accurate wiring cannot be made to the light-emitting element. There is a problem that the area to be blocked is enlarged and the luminous efficiency is lowered.

  A light emitting device according to the present invention is provided on a substrate on which a drive circuit is disposed, an adhesive layer formed on the substrate, a light emitting element array disposed on the adhesive layer, and the adhesive layer. And a wiring provided on the light emitting element array based on the alignment pattern.

  A method for manufacturing a light emitting device according to the present invention includes a first step of forming a light emitting element array and an alignment pattern on a substrate for manufacturing a light emitting element via a release layer, and a substrate on which a drive circuit is disposed. The second step of transferring the light emitting element array and the alignment pattern peeled from the light emitting element manufacturing base material without changing the relative positional relationship, and the transferred to the substrate on the basis of the alignment pattern And a third step of wiring the light emitting element array.

  According to the present invention, wiring related to the light emitting unit can be implemented with high accuracy, and a decrease in output light amount due to light shielding by wiring can be suppressed to a minimum.

It is a principal part top view which shows schematically the structure of the light-emitting device of Embodiment 1 by this invention. It is the elements on larger scale which expanded the area | region D1 enclosed with the dotted line shown in FIG. It is AA sectional drawing shown in FIG. It is BB sectional drawing shown in FIG. In Embodiment 1, it is a manufacturing process figure for simplifying and explaining the assembly procedure of a light-emitting device, (a) is a top view which shows the structure of the semiconductor layer in the stage which completed the light emitting element formation process, (b) ) Is a plan view showing the configuration of the semiconductor layer at the stage where the drive element formation process is completed, (c) is a plan view for explaining the transfer process, (d) is a plan view for explaining the wiring process, e) It is a top view with which it uses for description of a dicing process. In Embodiment 1, it is sectional drawing which shows the cross section of the laminated | stacked semiconductor layer for forming the light emitting thyristor array. In Embodiment 1, it is sectional drawing which shows the cross section of the laminated | stacked semiconductor layer for forming the light emitting thyristor array, and shows the state by which each was isolate | separated into the predetermined magnitude | size. (A)-(e) is a top view which shows the process in which the light emitting thyristor array and + mark alignment mark are formed. (A)-(e) is a top view which shows each process from before transcription | transfer to the wiring after transcription | transfer of the Si substrate in which the drive circuit was formed used as the transfer destination of an epi film. For example, in the light emitting device shown in FIG. 2, the light emitting thyristor array, the drive circuit, and the circuit diagram showing each connection relationship of each wiring. It is a block diagram which shows the structural example of the LED print head which employ | adopted the light emitting device. It is a block diagram which shows the structural example of the image forming apparatus which employ | adopted LED print head. In Embodiment 2, it is a top view which shows the manufacturing process for simplifying and explaining the manufacturing method of a light-emitting device. In Embodiment 2, it is a top view which shows the manufacturing process for simplifying and explaining the manufacturing method of a light-emitting device. In Embodiment 2, it is a top view with which it uses for description of a dicing process.

Embodiment 1 FIG.
FIG. 1 is a principal plan view schematically showing the configuration of the light emitting device according to the first embodiment of the present invention, and FIG. 2 is a partially enlarged view of a region D1 surrounded by a dotted line shown in FIG. 3 is a cross-sectional view taken along line AA shown in FIG. 2, and FIG. 4 is a cross-sectional view taken along line BB shown in FIG.

  As shown in these drawings, the light-emitting device 1 includes a light-emitting thyristor array as a light-emitting element array disposed on a drive circuit 202 formed on a Si substrate 201 and a planarizing layer 205 as an adhesive layer on the Si substrate 202. 302, a + mark alignment mark 13 as an alignment pattern which is also disposed through the planarization layer 205, a plurality of first common wirings 101, a plurality of second common wirings 102, and a plurality of individual wirings 103. Yes. In the light-emitting thyristor array 302, a plurality of light-emitting thyristors 320 as light-emitting elements are linearly arranged at equal intervals, and a drive circuit for individually driving these at positions corresponding to the light-emitting thyristors 320. 202 drive terminals 203 are arranged at equal intervals.

  Each first common wiring 101 electrically connects the anode electrode 321 of the corresponding light emitting thyristor 320 and the mother wiring 105, and each second common wiring 102 connects to the cathode electrode 322 of the corresponding light emitting thyristor 320 and the common electrode layer. 206, and each individual wiring 103 electrically connects the gate electrode 323 of the corresponding light-emitting thyristor 320 and the corresponding drive terminal 203 of the drive circuit 202.

  As will be described later, each of the wirings 101 to 103 is not formed individually like a wire or the like, but has a characteristic of being formed in a lump. Although not described here, as will be described later, the wiring is formed on the passivation film (FIG. 9), and each connection portion is electrically connected via the contact hole 116 (FIG. 9) formed in the passivation film. To connect to.

  In the AA cross section at the position of an alignment block 363 described later, as shown in FIG. 3, an interlayer insulating film 212 is formed on the lowermost Si substrate 201, and is surrounded by a broken line including the interlayer insulating film 212. A drive circuit 202 is formed in the circuit configuration layer 208. A planarization layer 205 is formed on the interlayer insulating film 212 through passivation, and an epifilm 333 serving as an alignment block 363 in which the + mark alignment mark 13 is formed is disposed on the planarization layer 205. Yes.

  In the BB cross section at the location including the light emitting thyristor 320, as shown in FIG. 4, an interlayer insulating film 212 is formed on the lowermost Si substrate 201, and the circuit is surrounded by a broken line including the interlayer insulating film 212. A driving circuit 202 is formed in the constituent layer 208. A planarization layer 205, a common electrode layer 206, and a drive terminal 203 are formed on the interlayer insulating film 212 through passivation, and an epifilm 333 serving as the light emitting thyristor array 302 is disposed on the planarization layer 205. Has been. In these upper layers, the mother wiring 105, the first common wiring 101, the individual wiring 103, and the like are formed via the passivation film 115.

  Next, a method for manufacturing the light emitting device 1 will be described. FIG. 5 is a manufacturing process diagram for simplifying and explaining the assembly procedure of the light emitting device 1.

The manufacturing process of the light emitting device 1 is roughly divided into
(1) Light emitting element formation process (2) Drive element formation process (3) Integration process by transfer (4) Wiring process of substrate after transfer The alignment marks used in the manufacturing steps (1) to (4) will be described.

  FIG. 5A is a plan view showing the configuration of the semiconductor layer at the stage where the light emitting element formation process is completed. As shown in the figure, a plurality of light emitting thyristor arrays 302 arranged in a straight line (here, four) and in parallel at a predetermined interval (here, eight rows), and Δ mark used in this light emitting element forming step The alignment mark 10, the ◇ mark alignment mark 12 a used in the subsequent transfer process, and the + mark alignment mark 13 used in the subsequent wiring process, as will be described later, serve as a light emitting device manufacturing base material that is a GaAs substrate. It is formed on the GaAs buffer layer 352 of the substrate 331 for manufacturing the epifilm via the release layer 353 (FIG. 6).

  FIG. 5B is a plan view showing the configuration of the semiconductor layer at the stage where the drive element formation process is completed. As shown in the figure, the silicon substrate 201 has a plurality of drive terminals 203 arranged in a straight line as shown in FIG. 1, and a plurality (four in this case) in a straight line and parallel at a predetermined interval. A plurality of (here, 8 columns) arranged drive circuits 202, a circle mark alignment mark 11 used in the drive element forming process of the drive circuit, and a mark mark alignment mark 12b used in the subsequent transfer process are formed. . Note that the shape, position, number, and the like of each alignment mark shown in FIG. 5 are for convenience, and are not limited to this in actual use.

  As shown in FIGS. 5A and 5B, the light-emitting thyristor array 302 and the drive circuit 202 of the light-emitting device 1 are manufactured using different substrates and are formed by independent processes. Thereafter, as shown in FIG. 5 (c), the light emitting thyristor array 302 is peeled off from the substrate 331 for manufacturing an epifilm as an epifilm 333, which will be described later, together with the alignment marks 12a, 13, and the alignment mark 12a marked with ◇. Is transferred onto the silicon substrate 201 so as to overlap the alignment mark 12b formed with ◇ on the silicon substrate 201. That is, the light emitting thyristor array 302 and the + -marked alignment mark 13 are transferred onto the silicon substrate 201 while maintaining a relative positional relationship with each other.

  At this time, a planarization layer 205 is formed in advance at the transfer position on the silicon substrate 201 as shown in FIG. 1, and the silicon substrate 201 is subjected to, for example, intermolecular force bonding via the planarization layer 205. It is to be transcribed. At this stage, each light-emitting thyristor array 302 and each drive circuit 202 face each other with the gate electrode 323 of the corresponding light-emitting thyristor 320 (light-emitting element) and the drive terminal 203 of the drive circuit 202, as shown in FIG. It becomes a relationship.

  Thereafter, in the wiring step shown in FIG. 5D, each wiring shown in FIG. 1 is formed by, for example, photolithography. At this time, the + alignment mark 13 transferred integrally with the light emitting thyristor array 302 is used as a reference pattern for alignment.

In the four steps (1) to (4) as described above, the following points are required.
In order to satisfactorily electrically connect the gate electrode 323 of the light emitting thyristor 320 and the drive electrode of the drive circuit 202, it is necessary to increase the alignment accuracy during transfer.
The wiring formed on the light emitting thyristor 320 (FIG. 2) blocks light and cannot be formed with a large connecting portion, and a high positional accuracy is required in the wiring process for the light emitting thyristor 320.

  On the other hand, in the manufacturing method of the light-emitting device 1 of this Embodiment mentioned above, these requirements are satisfied. The reason is as follows.

At the time of transfer, the ◇ mark alignment mark 12a that moves integrally with the light emitting thyristor array 302 is positioned so as to coincide with the ◇ mark alignment mark 12a formed on the transfer destination Si substrate 201. Can be prevented from being displaced. As shown in FIG. 1, the position of each light emitting thyristor array 302 with respect to the alignment mark 12a marked with ◇ and the position of each drive circuit 202 with respect to the alignment mark 12b marked with ◇ are respectively the gate electrodes 323 of the corresponding light emitting thyristors 320. And the drive electrode of the drive circuit 202 are assumed to be designed in advance so as to face each other.

In the wiring process, alignment is performed by using the + alignment mark 13 transferred integrally with the light emitting thyristor array 302. Since the + mark alignment mark 13 and the light emitting thyristor array 302 are integrally transferred, the relative positional relationship between them is not affected by the misalignment in the transfer process. Therefore, by performing alignment using the + mark alignment mark 13 during the wiring process, highly accurate wiring is applied to the light-emitting thyristor 320 (light-emitting element) without being affected by misalignment during transfer. be able to. On the other hand, misalignment of the wiring with respect to the drive circuit 202 formed on the Si substrate 201 occurs according to misalignment at the time of transfer. This misalignment is caused by, for example, the drive terminal 203 of the drive circuit 202 correspondingly. It can be absorbed by expanding it.

  As shown in FIG. 5E, when the wiring process is completed, the light emitting devices 1 each having the light emitting thyristor array 302 formed on the Si substrate 201 are individually separated along the dicing line 110.

  Next, the drive element forming process will be further described.

In the Si substrate 201 (FIGS. 3 and 4), a transistor to be included in the shift register 210 (FIG. 10) of the drive circuit 202 is formed in advance. After the transistor is formed, the upper layer is formed of silicon nitride (SiN). And a passivation film 211 formed of silicon oxide (SiO ₂ ) or the like.

  An interlayer insulating film 212, which will be described later, is formed under the passivation film 211. As shown in FIGS. 3 and 4, a region surrounded by a broken line including the interlayer insulating film 212 is made of a transistor or the like. A circuit configuration layer 208 is formed. The drive circuit 202 is formed in the circuit configuration layer 208. An IC wafer including a MOS transistor composed of the Si substrate 201 and the circuit configuration layer 208 and the like is manufactured using a known complementary MOS transistor (hereinafter referred to as “CMOS”) process.

  Next, the light emitting element forming step will be further described.

  6 and 7 are cross-sectional views showing cross-sections of stacked semiconductor layers for forming the mesa light-emitting thyristor array 302. FIG. As shown in FIG. 6, in the method of manufacturing the light-emitting thyristor array 302, for example, a metal organic chemical vapor deposition method (MetAl Organic Chemical Al Vapor Deposition, hereinafter referred to as “MOCVD method”) or a molecular beam epitaxy method (hereinafter referred to as “Molecular Beam Epitaxy”, hereinafter referred to as “MBE”). The epitaxial layer 332 is formed on the substrate 331 for manufacturing an epifilm as described below.

  First, a GaAs substrate 351 is used as a light emitting element formation substrate, and a GaAs buffer layer 352 is formed to form an epifilm manufacturing base material 331. Further, on the GaAs buffer layer 352, a sacrificial film of aluminum / arsenic ( An AlAs) release layer 353 is formed. After the AlAs release layer 353 is formed, an n-type aluminum / gallium / arsenic (AlGaAs) layer 354 and an n-type GaAs contact layer 355 are sequentially formed thereon. Next, an indium gallium phosphorus (InGaP) etching stop layer 356, a p-type AlGaAs layer 357, an n-type AlGaAs layer 358, an InGaP etching stop layer 359, a p-type AlGaAs layer 360, and a p-type GaAs contact layer 361 are sequentially formed. Thus, the epitaxial layer 332 is formed. In order to simplify the explanation in FIG. 6, a multilayer structure in which the mixed crystal ratio of AlGaAs is not shown is not shown, but single heterojunction and double heterojunction can be obtained by changing the mixed crystal ratio variously. Can be realized.

  By comprising as mentioned above, it becomes possible to peel the epitaxial layer 332 from the base material 331 for epifilm manufacture, and to form the epifilm 333 (FIG. 3, FIG. 4). That is, here, the epi film 333 corresponds to a film separated from the substrate 331 for manufacturing the epi film by processing the epitaxial layer 332 by etching or the like as will be described later.

  Therefore, as shown in FIG. 7, the epitaxial layer 332 is etched to form a groove 335. The groove 335 can be formed by using a photolithography process in which a region other than the predetermined region of the groove portion is masked with a resist or the like, and a wet etching method using an etching chemical solution prepared with, for example, citrate / ammonia / hydrogen peroxide solution. . A plan view at the stage where the epitaxial layers 332 separated from each other by the grooves 335 are processed as described later to form the light emitting thyristor array 302 and the like corresponds to, for example, the plan view shown in FIG. To do.

  FIG. 8 is a plan view showing a process of forming the light emitting thyristor array 302 while etching the epitaxial layer 332 that is individually separated into a predetermined size, as shown in FIG. Each of the plan views of FIGS. 9A to 9E shows only one light emitting thyristor array 302 and a part of the periphery thereof for the sake of simplicity.

  FIG. 8A shows a state in which the p-type AlGaAs layer 360 is etched except for a part of the p-type GaAs contact layer 361 to be the anode electrode 321 (FIG. 1) of each light emitting thyristor 320. FIG. 8B shows a state in which the n-type AlGaAs layer 358 is etched except for the light emitting region of each light emitting thyristor 320, and FIG. 8C shows the n type in which the gate electrode 323 of each light emitting thyristor 320 is formed. A state in which the n-type GaAs contact layer 355 is etched except for a part of the AlGaAs layer 358 is shown. Next, as shown in FIG. 8D, the individual light emitting thyristor 320 is formed on the n-type AlGaAs layer 358, the metal electrode to be the gate electrode 323 of each light emitting thyristor 320, and the n-type GaAs contact layer 355. The metal electrode to be the cathode electrode 322 is formed in the same process.

  Further, in the step of forming the metal electrodes of the gate electrode 323 and the cathode electrode 322, the + mark alignment mark 13 is simultaneously formed at a predetermined position on the n-type GaAs contact layer. Here, an example is shown in which the + mark alignment mark 13 is formed at the same time as the metal electrode. However, the present invention is not limited to this, and the + mark alignment mark 13 is simultaneously formed during the formation of the light emitting thyristor 320. It is only necessary that the mutual positional relationship with the light emitting thyristor array 302 is formed.

  FIG. 8E shows a partial region of the n-type GaAs contact layer 355 in which a plurality of light emitting thyristors 320 arranged in a straight line are integrally arranged, and an n-type GaAs contact layer in which the + -marked alignment mark 13 is arranged. A state where etching is performed up to the GaAs buffer layer 352 except for a partial region of 355 is shown. Therefore, here, the light-emitting thyristor array 302 and the + -marked alignment mark 13 are formed in which the epifilm 333 (FIGS. 3 and 4) is disposed on the epifilm manufacturing substrate 331 via the AlAs release layer 353. This corresponds to an alignment block 363 that is a partial region of the n-type GaAs contact layer 355 formed. Although not described here, the alignment mark 12a marked with ◇ described in FIG. 5 is also left as an epi film if necessary.

  Next, the AlAs peeling layer 353 shown in FIG. 7 is selectively removed by using, for example, a photolithography method and a wet etching method. When the wet etching method is used, the etching rate for the AlAs release layer 353 is significantly increased as compared with the etching rates for the AlGaAs layer, the GaAs layer, and the etching stop layer by appropriately selecting the composition of the wet etching chemical. Thus, the AlAs release layer 353 can be selectively etched. FIG. 7 shows a state in which a part of the AlAs peeling layer 353 is left (in the middle of etching). As will be described later, the AlAs peeling is finally performed with the epifilm 333 held. Layer 353 is completely removed.

  Next, the transfer process of the light emitting element will be further described.

  When the epifilm 333 is peeled off, a support (not shown) that supports and protects the epifilm 333 can be provided on the epifilm 333. For example, when a support is provided on the epifilm 333, the surface of the epifilm support is formed, for example, by a member such as a photocurable adhesive sheet that loses its adhesiveness by vacuum suction or light irradiation, and the epifilm 333 is adsorbed. Can be moved to a predetermined position. At this time, the light emitting thyristor array 302 and the alignment block 363 constituting the epi film 333 are integrally processed.

  FIG. 9 is a plan view showing each process from before the transfer to the wiring after the transfer of the Si substrate 201 on which the drive circuit 202 is formed, which is the transfer destination of the epi film 333. The plan views of FIGS. 8A to 8E correspond to the epitaxial film shown in FIG. 8E showing only one part of the light emitting thyristor array 302 and its periphery for the sake of simplicity. Only a part of the Si substrate 201 is shown.

  As shown in FIG. 9A, a drive circuit 202, its drive terminal 203, and a common electrode layer 206 are formed on the Si substrate 201, and during transfer, as shown in FIG. For example, a planarizing layer 205 serving as an adhesive layer formed by patterning polyimide or the like is formed in advance on the surface at a position where the light emitting thyristor array 302 and the alignment block 363 are arranged. At the time of transfer, as described with reference to FIG. 5C, the angle is so that the alignment mark 12a formed on the epi film 333 side overlaps the alignment mark 12b formed on the Si substrate 201 side. Also, alignment in the X and Y directions is performed. FIG. 9C shows the state after the transfer.

  As described above, the transfer here is performed by the light emitting thyristor array 302 and the alignment block 363 integrally. Therefore, even if the positions of the light-emitting thyristor array 302 and the alignment block 363 are shifted with respect to the Si substrate 201 at the time of transfer, the relative positional relationship between each light-emitting thyristor 320 of the light-emitting thyristor array 302 and the + -marked alignment mark 13 remains unchanged. It is.

  Next, the process after the transfer process will be described.

  As shown in FIG. 9D, a passivation film 115 for wiring is formed on the surface of the Si substrate 201 after the transfer, and further, the passivation film 115 is positioned at a position corresponding to each connection portion below it. Forms a contact hole 116. These processes are formed by patterning polyimide by, for example, a photolithography method. By using the + -marked alignment mark 13 as the alignment mark at this time, the contact hole 116 on each light-emitting thyristor 320 can be formed with high accuracy.

  As described above, since the relative positional relationship between each light-emitting thyristor 320 and the + -marked alignment mark 13 is not changed during transfer, this alignment can be performed even if the light-emitting element and the driving element are misaligned in the transfer process. The positional relationship between the mark 13 and the light emitting thyristor array 302 is not affected. For this reason, the alignment accuracy of the contact hole 116 with respect to each light-emitting thyristor 320 can be a high alignment accuracy such as a photolithography method. On the other hand, the contact hole 116 on the drive terminal 203 formed at the same time is displaced with respect to the drive terminal 203 according to the transfer deviation at the time of transfer. The contact hole 116 can be formed on the drive terminal 203 by absorbing this misalignment.

  Next, as shown in FIG. 9E, a wiring 107 is formed on the passivation film 115. The wiring 107 is a first common that electrically connects the anode electrode 321 of the corresponding light-emitting thyristor 320 and the mother wiring 105 via the mother wiring 105 and the contact hole 116 extending in parallel to the light-emitting thyristor array 302. Via the wiring 101 and the contact hole 116, the cathode electrode 322 of the corresponding light emitting thyristor 320 and the common electrode layer 206 are electrically connected to each other through the second common wiring 102 and the contact hole 116. It consists of the individual wiring 103 that electrically connects the gate electrode 323 and the corresponding drive terminal 203 of the drive circuit 202.

  Similar to the contact hole 116, the wiring 107 is formed by, for example, a photolithography method. At this time, by using the + -marked alignment mark 13 as the alignment reference, it is possible to align the light emitting thyristors 320 with high accuracy. In particular, since the first common wiring 101 connected to the anode electrode 321 is connected to the upper part of the light emitting thyristor 320 that is a light emitting element, it is necessary to form it thinly to prevent light shielding and to accurately wire it at a predetermined position. It is possible to satisfy these requirements. Further, since the wiring 107 and the previous contact hole 116 use the same + -marked alignment mark 13 as a reference for alignment, the mutual positional accuracy of the wiring 107 and the previous contact hole 116 are also high alignment accuracy such as photolithography. can do.

  When the wiring process is completed as described above, as shown in FIG. 5E, the dicing lines 110 are separated to individually separate the light emitting devices 1 each having the light emitting thyristor array 302 formed on the Si substrate 201. Cut along. Thereby, a plurality of independent light emitting devices 1 are completed.

  FIG. 10 is a circuit diagram showing a connection relationship between the light emitting thyristor array 302, the drive circuit 202, and each wiring in the light emitting device 1 shown in FIG. 2, for example. Here, for the sake of simplicity, four light emitting thyristors 320 are shown, but actually, for example, 4992 light emitting thyristors 320 are arranged by arranging a plurality of light emitting thyristor arrays 302 in series. It is.

  As shown in the figure, the anode terminal of each light emitting thyristor 320 of the light emitting thyristor array 302 is connected to the D terminal through the first common wiring 101 and the mother wiring 105, and the cathode terminal of each light emitting thyristor 320 is Both are connected to the ground (GND) via the second common wiring 102 and the common electrode layer 206, and the gate terminal of each light-emitting thyristor 320 is individually connected to the drive terminal 203 of the drive circuit 202 via the individual wiring 103. Yes.

  The drive circuit 202 is configured by a gate drive shift register 210 that drives the light-emitting thyristor array 302 in a time-sharing manner, for example. The shift register 210 includes a plurality of stages (herein, four stages) of flip-flop circuits (hereinafter referred to as FF circuits) connected in cascade (cascade), a data input terminal SI for inputting serial data SI, and a serial clock. It has a clock input terminal CK for inputting SCK, and output terminals Q1 to Q4 that output shifted data and are connected to the drive terminal 203, respectively.

  The shift register 210 sequentially shifts the input serial data SI by the internal FF circuit in synchronization with the input serial clock SCK, and the FF circuit at each stage sequentially holds the shifted data. It has a function of outputting from the output terminals Q1 to Q4. Accordingly, each light-emitting thyristor 320 of the light-emitting thyristor array 302 selectively emits light according to the data output output from the output terminals Q1 to Q4 in a state where a predetermined voltage is applied to the D terminal.

  In this embodiment, the epi film 333 is transferred to a predetermined position of the Si substrate 201 on which the drive circuit 202 is formed. However, the present invention is not limited to this, and for example, the drive circuit 202 is formed on a drive circuit manufacturing base material on another substrate, and the formed circuit configuration layer is separated from the drive circuit manufacturing base material while being held by a holding member. It may be transferred and arranged. Also in this case, after the circuit configuration layer and the epi film 333 are transferred together, the wiring is formed by the same method as that for forming the wiring 107, for example, photolithography.

  FIG. 11 is a configuration diagram showing a configuration example of an LED print head 1200 as a light-emitting element print head employing the light-emitting device 1 manufactured as described above.

  As shown in the figure, an LED unit 1202 is mounted on the base member 1201. A plurality of light emitting devices 1 are arranged on the LED unit 1202 along the longitudinal direction. Above the light emitting unit of the light emitting device 1, a rod lens array 1203 is disposed as an optical element that collects light emitted from the light emitting unit. The rod lens array 1203 includes a large number of columnar optical lenses arranged along the light emitting portions (here, the light emitting thyristor array 302) of a plurality of light emitting devices 1 arranged in a straight line. Is held in.

  The lens holder 1204 is formed so as to cover the base member 1201 and the LED unit 1202 as shown in FIG. The base member 1201, the LED unit 1202, and the lens holder 1204 are integrally held by a clamper 1205 that is disposed through openings 1201 a and 1204 a formed in the base member 1201 and the lens holder 1204. Accordingly, the light generated by the LED unit 1202 is irradiated to a predetermined external member through the rod lens array 1203. The LED print head 1200 is used as an exposure device of an image forming apparatus such as an electrophotographic printer or an electrophotographic copying apparatus. Used.

  FIG. 12 is a configuration diagram showing a configuration example of an image forming apparatus 1300 employing the LED print head 1200 manufactured as described above.

  As shown in the figure, in the image forming apparatus 1300, four process units 1301 to 1304 that respectively form yellow, magenta, cyan, and black images are provided along the conveyance path 1320 of the recording medium 1305. They are arranged in order from the upstream side. Since the internal configurations of these process units 1301 to 1304 are common, the internal configuration will be described by taking, for example, a cyan process unit 1303 as an example.

  In the process unit 1303, a photosensitive drum 1303a as an image carrier is rotatably arranged in the direction of the arrow. Electricity is supplied to the surface of the photosensitive drum 1303a around the photosensitive drum 1303a sequentially from the upstream side in the rotation direction. A charging device 1303b for charging and an exposure device 3103c for forming an electrostatic latent image by selectively irradiating light onto the surface of the charged photosensitive drum 1303a are provided. Further, a developing device 1303d for generating a visible image by attaching toner of a predetermined color (cyan) to the surface of the photosensitive drum 1303a on which the electrostatic latent image is formed, and toner remaining on the surface of the photosensitive drum 1303a A cleaning device 1303e to be removed is provided. The drums or rollers used in these devices are rotated by a drive source and gears (not shown).

  Further, the image forming apparatus 1300 has a paper cassette 1306 for storing a recording medium 1305 such as paper stacked in a lower part of the image forming apparatus 1300, and a recording medium 1305 is separated and conveyed one above the paper cassette 1306. A hopping roller 1307 is provided. Further, by sandwiching the recording medium 1305 together with the pinch rollers 1308 and 1309 in the conveyance direction of the recording medium 1305, the skew of the recording medium 1305 is corrected, and the process units 1301 to 1304 are corrected. Conveying rollers 1310 and 1311 for conveying are disposed. These hopping roller 1307 and transport rollers 1310 and 1311 rotate in conjunction with a drive source and gears (not shown).

  Transfer rollers 1312 made of semiconductive rubber or the like are disposed at positions facing the respective photosensitive drums of the process units 1301 to 1304. In order to adhere the toner on the photosensitive drums 1301a to 1304a to the recording medium 1305, a predetermined potential difference is generated between the surfaces of the photosensitive drums 1301a to 1304a and the surfaces of the transfer rollers 1312. Has been.

  The fixing device 1313 includes a heating roller and a backup roller, and fixes the toner transferred on the recording medium 1305 by pressurizing and heating. Further, the discharge rollers 1314 and 1315 sandwich the recording medium 1305 discharged from the fixing device 1313 together with the pinch rollers 1316 and 1317 of the discharge unit and convey the recording medium 1305 to the recording medium stacker unit 1318. Note that the discharge rollers 1314 and 1315 rotate in conjunction with a drive source and a gear (not shown). As the exposure apparatus 1303c used here, the LED print head 1200 described with reference to FIG. 11 is used.

Next, the operation of the image forming apparatus having the above configuration will be described.
First, the recording medium 1305 stored in a stacked state in the paper cassette 1306 is separated from the top by the hopping roller 1307 and conveyed. Subsequently, the recording medium 1305 is sandwiched between conveying rollers 1310 and 1311 and pinch rollers 1308 and 1309 and conveyed to the photosensitive drum 1301a and the transfer roller 1312 of the process unit 1301. Thereafter, the recording medium 1305 is sandwiched between the photosensitive drum 1301a and the transfer roller 1312, and the toner image is transferred to the recording screen and simultaneously conveyed by the rotation of the photosensitive drum 1301a.

  Similarly, the recording medium 1305 sequentially passes through the process units 1302 to 1304, and the electrostatic latent images formed by the exposure devices 1301c to 1304c are developed by the developing devices 1301d to 1304d in the passing process. The toner images are sequentially transferred and superimposed on the recording screen. Then, after the toner images of the respective colors are superimposed on the recording surface, the recording medium 1305 on which the toner image is fixed by the fixing device 1313 is sandwiched between the discharge rollers 1314 and 1315 and the pinch rollers 1316 and 1317 to form an image. The recording medium stacker 1318 outside the apparatus 1300 is discharged. Through the above process, a color image is formed on the recording medium 1305.

  As described above, according to the light-emitting device 1 and the manufacturing method thereof according to the present embodiment, contact holes are formed and wired on the transferred light-emitting thyristor array with high accuracy regardless of misalignment during transfer. It becomes possible. For example, even if a misalignment of ± 5 μm occurs between the drive element and the light emitting element due to the transfer process, for example, by adopting a photolithography method using a stepper for the light emitting thyristor array (light emitting element), ± 0. Contact holes and wiring can be aligned with high accuracy of about 1 μm. Thereby, the wiring concerning a light emission part can be implemented with high precision, and the light-emitting device which suppressed the output light amount fall by the light shielding by wiring to the minimum can be provided.

Embodiment 2. FIG.
FIGS. 13 and 14 are manufacturing process diagrams for simplifying and explaining the method for manufacturing the light emitting device 1 according to the second embodiment of the present invention. Note that portions common to the portions described in the first embodiment are denoted by the same reference numerals, or omitted from the drawings and description thereof will be omitted, and different points will be mainly described.

  In the case of the first embodiment described above, for example, as shown in FIG. 5C, the epifilm 333 separated from the substrate 331 for manufacturing the epifilm has a one-to-one correspondence with each light emitting thyristor 320 (see FIG. 2). In the present embodiment, as shown in FIG. 13, the epitaxial film 333 formed in the same manner is transferred to the Si substrate 201 on which the drive terminal 203 (FIG. 1) of the drive circuit 202 is formed. An example is shown in which transfer is performed to a Si substrate 501 that can be individually transferred to a plurality (eight in this case) of transfer regions 502 in which corresponding drive circuits 202 are formed.

  Although omitted here, it is assumed that, in each transfer region 502, for example, an alignment mark 12b shown in FIG. 5 is formed, and an alignment mark 12a shown in FIG. 5 is also formed on the epi film 333.

  At the time of transfer, the alignment mark 12a marked with ◇ that moves integrally with the light-emitting thyristor array 302 is positioned so as to coincide with the alignment mark 12a marked with ◇ formed in each transfer region 502 of the transfer destination Si substrate 501. Therefore, it is possible to prevent positional deviation during transfer. As shown in FIG. 1, the position of each light emitting thyristor array 302 with respect to the alignment mark 12a marked with ◇ and the position of each drive circuit 202 in each transfer area 502 with respect to the alignment mark 12b marked with. It is assumed that the gate electrode 323 of 320 and the drive electrode of the drive circuit 202 are designed to face each other.

  After the epifilm 333 is individually transferred to a plurality (eight in this case) of transfer regions 502, the wiring process shown in FIG. 14 is performed in each transfer region 502 of the Si substrate 501, for example, by photolithography. Each wiring shown (wiring 107 (see FIG. 9E)) is formed. At this time, as a reference for alignment, in each transfer region 502, the + mark of the alignment mark 13 transferred integrally with the light emitting thyristor array 302 is used.

  In this wiring process, alignment is performed by using the + mark alignment mark 13 transferred integrally with the light emitting thyristor array 302. In each transfer region 502, the + alignment mark 13 and the light-emitting thyristor array 302 are integrally transferred, so that the relative positional relationship between them is not affected by misalignment in the transfer process. Here, as shown in FIG. 14, a distance W1 between the light emitting thyristors 320 (13 in this example) arranged in a straight line in the light emitting thyristor array 302 and an adjacent transfer region 502 are formed. In addition, it is assumed that the distance W2 between the adjacent end light emitting thyristors 320 of each light emitting thyristor array 302 is set to be equal.

  Accordingly, in each transfer region 502, alignment is performed using the + -marked alignment mark 13 during the wiring process, so that the light-emitting thyristor 320 (light-emitting element) is not affected by the misalignment during transfer. High-precision wiring can be applied. On the other hand, the accuracy of the wiring with respect to the drive circuit 202 formed on the Si substrate 501 decreases according to the misalignment at the time of transfer. For example, the drive terminal 203 of the drive circuit 202 is expanded correspondingly. By doing so, misalignment in the transfer process can be absorbed.

  As shown in FIG. 15, when the step of forming the wiring 107 by the photolithography method is completed, a plurality of (here, four) light emitting thyristor arrays 302 each formed on the Si substrate 501 are arranged in series (four here). The light emitting devices 1 are separated along the dicing line 110 in order to separate them individually. Therefore, each of the four light emitting devices 1 formed here is a light emitting device having a size in which four light emitting thyristor arrays 302 are arranged in series.

  In the present embodiment, a plurality of transfer regions 502 are provided on the Si substrate 501, and in each transfer region 502, integration by transfer of the epifilm 333 and wiring of the substrate after transfer are repeated in a large scale. Although the method that enables the light emitting device 1 to be formed has been described, the detailed formation process in each transfer region 502 is the same as the formation process described with reference to FIG. The description in is omitted.

  As described above, according to the manufacturing method of the light emitting device according to the present embodiment, with respect to each light emitting thyristor array 302 linearly transferred to the corresponding transfer region 502 of the Si substrate 501, the light emitting thyristor array 302 is highly accurate. Since wiring can be performed, a high-definition large-scale light-emitting device 1 can be manufactured.

  The present invention is not limited to the above embodiment, and other usage forms and modifications are possible. For example, the case where a light-emitting thyristor is used as the light-emitting element has been described. However, the present invention is not limited to this and can be applied to an LED, an organic EL element, and the like. In addition, the light emitting device of the present invention is applicable even if it is arranged in a row or matrix.

DESCRIPTION OF SYMBOLS 1 Light emitting device, 10 △ mark of alignment mark, 11 ○ mark of alignment mark, 12a ◇ mark of alignment mark, 12b ◇ mark of alignment mark, 13 + mark of alignment mark, 101 1st common wiring, 102 2nd common wiring , 103 individual wiring, 105 mother wiring, 107 wiring, 110 dicing line, 115 passivation film, 116 contact hole, 201 Si substrate, 202 driving circuit, 203 driving terminal, 205 planarization layer, 206 common electrode layer, 208 circuit configuration layer , 210 shift register, 211 passivation film, 212 interlayer insulating film, 302 light emitting thyristor array, 320 light emitting thyristor, 321 anode electrode, 322 cathode electrode, 323 gate electrode, 331 substrate for manufacturing epifilm 332 epitaxial layer, 333 epifilm, 351 GaAs substrate, 352 GaAs buffer layer, 353 AlAs release layer, 354 n-type AlGaAs layer, 355 n-type GaAs contact layer, 356 etching stop layer, 357 p-type AlGaAs layer, 358 n-type AlGaAs Layer, 359 InGaP etching stop layer, 360 p-type AlGaAs layer, 361 p-type GaAs contact layer, 363 alignment block, 501 Si substrate, 502 transfer region, 1200 LED print head, 1201 base member, 1201a opening, 1202 LED unit, 1203 rod lens array, 1204 lens holder, 1204a opening, 1205 clamper, 1300 image forming apparatus, 1301, 1302, 13 3, 1304 Process unit, 1301a to 1304a Photosensitive drum, 1303b Charging device, 1303c Exposure device, 1303d Developing device, 1303e Cleaning device, 1305 Recording medium, 1306 Paper cassette, 1307 Hopping roller, 1308, 1309 Pinch roller, 1310, 1311 Conveyance roller, 1312 transfer roller, 1313 fixing device, 1314, 1315 discharge roller, 1316, 1317 pinch roller, 1318 recording medium stacker unit.

Claims (16)

A substrate on which a drive circuit is disposed;
An adhesive layer formed on the substrate;
A light emitting element array disposed on the adhesive layer;
An alignment pattern disposed on the adhesive layer;
A light emitting device comprising: a wiring provided on the light emitting element array with reference to the alignment pattern.   2. The light emitting device according to claim 1, wherein a plurality of pairs of the light emitting element arrays and the alignment pattern are arranged in a straight line.   The light emitting device according to claim 1, wherein the light emitting element array is a light emitting thyristor array.   4. The light emitting device according to claim 3, wherein the wiring is an individual wiring that electrically connects a gate electrode of the light emitting thyristor array and a driving terminal of the driving circuit.   The light emitting device according to claim 4, wherein the drive terminal is formed to be extended to allow a wiring accuracy error of the individual wiring.   The light-emitting device according to claim 1, wherein the light-emitting element array includes an adhesion layer as a lowermost layer.   The light emitting device according to claim 1, wherein the alignment pattern includes an adhesion layer in a lowermost layer.   The light emitting device according to claim 1, wherein the driving circuit is formed on a driving circuit forming substrate and disposed on the adhesive layer. A first step of forming a light emitting element array and an alignment pattern on a light emitting element manufacturing substrate via a release layer;
A second step of transferring the light emitting element array and the alignment pattern peeled from the light emitting element manufacturing base material to the substrate on which the drive circuit is disposed without changing the relative positional relationship;
And a third step of performing wiring on the light emitting element array transferred to the substrate with the alignment pattern as a reference.   The method for manufacturing a light emitting device according to claim 9, wherein an adhesive layer on which the light emitting element array to be transferred and the alignment pattern are placed is provided on the substrate.   11. The method of manufacturing a light emitting device according to claim 9, wherein, in the second step, a plurality of pairs of the light emitting element arrays and the alignment pattern are transferred in a straight line.   The method of manufacturing a light emitting device according to claim 9, wherein the light emitting element array is a light emitting thyristor array.   13. The method of manufacturing a light emitting device according to claim 12, wherein in the third step, wiring is provided to an anode electrode of the light emitting thyristor array.   14. The light emission according to claim 9, further comprising a step of transferring the drive circuit formed on the substrate for forming a drive circuit to the substrate before the third step. Device manufacturing method. A substrate on which a drive circuit is disposed;
An adhesive layer formed on the substrate;
A light emitting element array disposed on the adhesive layer;
An alignment pattern disposed on the adhesive layer;
A light emitting device comprising: a wiring provided on the light emitting element array with reference to the alignment pattern;
A support for supporting the light emitting device;
A light emitting element printhead comprising: a lens array for guiding light from the light emitting element array. A substrate on which a drive circuit is disposed;
An adhesive layer formed on the substrate;
A light emitting element array disposed on the adhesive layer;
An alignment pattern disposed on the adhesive layer;
A light emitting device comprising: a wiring provided on the light emitting element array with reference to the alignment pattern;
A support for supporting the light emitting device;
A light emitting element printhead having a lens array for guiding light from the light emitting element array;
An image carrier that forms an electrostatic latent image by selectively irradiating the charged surface with light by the light emitting element printhead;
An image forming apparatus comprising: a developing unit that develops the electrostatic latent image; and forming an image developed by the developing unit on a recording medium.

Images