JP2012244786A - Full-wave rectifier circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain a capacitor input type full-wave rectifier circuit only with n-channel MOSFETs.SOLUTION: A resistor 101 is connected to the source sides of MOSFETs 22, 24, constitutes a current detection circuit which detects current flowing in the MOSFETs 22, 24, and outputs voltage corresponding to a current value to an inverted input terminal of a comparator 104. The comparator 104 compares a voltage which becomes a predetermined threshold to be set by predetermined division ratio of resistors 102, 103 with the voltage of the resistor 101, when it is regarded that the voltage of the resistor 101 becomes smaller than the predetermined threshold, and the current flowing in the resistor 101 becomes smaller than the predetermined threshold, prevents backflow of the current by a smooth capacitor 81 by turning transistors 105, 106 on to control the MOSFETs 22, 24 off. This technology is applicable to a capacitor input type full-wave rectifier circuit.

Description

  The present technology relates to a full-wave rectifier circuit, and more particularly to a full-wave rectifier circuit that reduces power loss and improves operational stability by protecting a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

  Conventionally, in order to reduce the size, weight, and efficiency of a switching power supply, it has been an important issue to reduce the power loss of the switching power supply. In particular, a full-wave rectifier circuit that is provided in a switching power supply device and full-wave rectifies an AC voltage has a large power loss, and reducing the loss of the full-wave rectifier circuit is an important issue.

  In response to this problem, the current flowing from the input power supply to the output side is rectified by the Pch-MOSFET (p-channel MOSFET), and the current fed back from the load side to the input power supply is rectified by the Nch-MOSFET (n-channel MOSFET). Thus, full-wave synchronous rectification is realized (see Patent Document 1).

  In addition, a MOSFET has been proposed that reduces the power loss by making all the MOSFETs to be used have an Nch type having a smaller on-resistance than a Pch type (see Patent Document 2).

  However, in the technique of Patent Document 1, the Pch-MOSFET has a larger on-resistance than the Nch-MOSFET, and there is a possibility that the loss is larger than when the Nch-MOSFET is used. Even when four comparators are used, there is a possibility that a voltage exceeding the withstand voltage between the gate and the source may be applied to the MOSFET because of the common-mode input of the comparator.

  Further, in the technology of Patent Document 2, it is composed of an Nch-MOSFET, and the loss is less than when a Pch-MOSFET is used. However, in the circuit configuration, a MOSFET that rectifies the current flowing from the AC power supply to the output side is input. Since the control method is used to turn off after the phase is reversed, a through current may flow.

  Therefore, there has been proposed a full-wave rectifier circuit technique that allows four MOSFETs to be configured by Nch-MOSFETs by controlling the MOSFETs to be turned off before the phase of the AC power supply is switched (see Patent Document 3). ).

Japanese Patent Laid-Open No. 9-131064 JP 2005-295627 A JP 2010-178519 A

  However, in the technique of Patent Document 3, when a so-called capacitor input type full-wave rectifier circuit in which a capacitor is connected in parallel with a load is configured, a through current may flow.

  This technology has been made in view of such a situation. In particular, even in the case of a capacitor input type full-wave rectifier circuit, the main components are composed of only Nch-MOSFETs, and the full-wave synchronous rectification is inexpensive. It is possible to realize full-wave rectification reliably with a simple circuit configuration.

  A full-wave rectifier circuit according to an aspect of the present technology is a full-wave rectifier circuit that full-wave rectifies an AC voltage input from an AC power supply, and a terminal corresponding to an anode in an internal parasitic diode is the first of the AC power supply. A first MOSFET (Metal Oxide Semiconductor Field Effect Transistor) connected to the first terminal, a second MOSFET whose terminal corresponding to the cathode of the internal parasitic diode is connected to the first terminal of the AC power supply, A terminal corresponding to the cathode of the internal parasitic diode is connected to a terminal corresponding to the cathode of the internal parasitic diode of the first MOSFET, and a terminal corresponding to the anode of the internal parasitic diode is the second terminal of the AC power supply. A third MOSFET connected to the terminal and a terminal corresponding to the cathode of the internal parasitic diode is connected to the second terminal of the AC power supply; A fourth MOSFET whose terminal corresponding to the anode of the internal parasitic diode is connected to a terminal corresponding to the anode of the internal parasitic diode of the second MOSFET, and an AC connected to the first terminal of the AC power supply A first phase detection circuit for detecting the phase of the voltage; a second phase detection circuit for detecting the phase of the AC voltage connected to the second terminal of the AC power supply; and detection by the first phase detection circuit. Based on the result, a first control circuit that turns on the first MOSFET, a second control circuit that turns on the third MOSFET based on the detection result of the second phase detection circuit, and the second And a current detection circuit for detecting a current value flowing through the fourth MOSFET, and when a current value as a detection result of the current detection circuit is smaller than a predetermined value, at least one of the first to fourth MOSFETs I will turn off one And a connected forced cutoff circuit.

  The pulsating current obtained by the voltage between the terminal corresponding to the cathode of the internal parasitic diode of the first and third MOSFETs and the terminal corresponding to the anode of the internal parasitic diode of the second and fourth MOSFETs A smoothing capacitor connected to smooth the voltage may be further included, and the current detection circuit detects a current between the smoothing capacitor and the second and fourth MOSFETs. And a comparator that outputs a signal depending on whether or not a current value flowing through the current detection resistor is smaller than a predetermined value.

  The lowest input terminal of the comparator can be connected to the sources or drains of the second and fourth MOSFETs via the current detection resistor.

  The forced cutoff control circuit may include a cutoff control circuit that turns off at least one of the second and fourth MOSFETs.

  The blocking circuit may include a resistor and a transistor, and one end of the resistor is connected to the output terminal of the comparator, and the other end of the resistor is connected to the base of the transistor. The collector of the transistor may be connected to at least one of the gates of the second and fourth MOSFETs.

  The first to fourth MOSFETs can be n-channel MOSFETs.

  The first control circuit may include a first charge pump circuit that generates a voltage higher than the voltage of the first terminal of the AC power supply. Based on the detection result, the photocoupler is connected to apply a voltage from the first charge pump circuit to the gate of the first MOSFET, and the potential of the first terminal is greater than the potential of the second terminal. Before the voltage decreases, the voltage between the gate and the source of the first MOSFET can be connected to be smaller than a predetermined value.

  The first charge pump circuit may include a first diode and a first capacitor, the anode of the first diode corresponding to the cathode of the internal parasitic diode of the first MOSFET. Or a second terminal of the AC power supply, and a first capacitor may be connected between the cathode of the first diode and the first terminal of the AC power supply. .

  A resistor can be included between the gate and source of the first MOSFET, and the resistance value of the resistor is determined based on the timing obtained from the detection result of the first phase detection circuit. The potential between the gate and the source is set to a value at which the first MOSFET can be surely turned off within the period until the voltage between the first terminal and the second terminal reaches the timing when the voltage switches from positive to negative or from negative to positive. be able to.

  The second control circuit may include a second charge pump circuit that generates a voltage higher than the voltage of the second terminal of the AC power supply. Based on the detection result, the photocoupler is connected to apply a voltage from the second charge pump circuit to the gate of the third MOSFET, and the potential of the second terminal is greater than the potential of the first terminal. Before the voltage decreases, the voltage between the gate and the source of the third MOSFET can be connected to be smaller than a predetermined value.

  The second charge pump circuit may include a second diode and a second capacitor, and the anode of the second diode corresponds to the cathode of the internal parasitic diode of the third MOSFET. Or a first terminal of the AC power supply, and a second capacitor may be connected between the cathode of the second diode and the second terminal of the AC power supply. .

  A resistor can be included between the gate and source of the third MOSFET, and the resistance value of the resistor is determined based on the timing obtained from the detection result of the second phase detection circuit. The potential between the gate and the source is set to a value at which the third MOSFET can be surely turned off within the period until the voltage between the first terminal and the second terminal reaches the timing when the voltage switches from positive to negative or from negative to positive. be able to.

  A power supply system including a full-wave rectifier circuit according to claim 1 of the present technology includes a power factor correction circuit, an inductor connected in series to a full-wave rectified output, a drain between the output of the inductor and ground, and A fifth MOSFET having a source connected thereto, and a sixth MOSFET connected so that a terminal corresponding to an anode of a parasitic diode of the MOSFET connected in series with the output of the inductor is an output of the inductor; The full-wave rectifier circuit according to item 1 can be further included, and the current detection circuit corresponds to a ground of the power factor correction circuit and an anode of a parasitic diode of the second and fourth MOSFETs. The current value between the terminals is detected, and the forced cutoff circuit controls the output signal of the power factor correction circuit based on the detection result of the current detection circuit of the AC power supply, If the flow value is less than the predetermined value, the at least first to fourth and sixth MOSFET, it can be made to turn off at least one.

  The full-wave rectifier circuit according to one aspect of the present technology is a full-wave rectifier circuit that full-wave rectifies an AC voltage input from an AC power supply, and is a parasitic element inside a first MOSFET (Metal Oxide Semiconductor Field Effect Transistor). A terminal corresponding to the anode of the diode is connected to the first terminal of the AC power supply, a terminal corresponding to the cathode of the parasitic diode inside the second MOSFET is connected to the first terminal of the AC power supply, The terminal corresponding to the cathode of the parasitic diode inside the third MOSFET is connected to the terminal corresponding to the cathode of the parasitic diode inside the first MOSFET, and the terminal corresponding to the anode of the internal parasitic diode is connected to the AC power supply. The second MOSFET is connected to the second terminal, and the fourth MOSFET is connected to the cathode of the internal parasitic diode. And a terminal corresponding to the anode of the internal parasitic diode is connected to a terminal corresponding to the anode of the internal parasitic diode of the second MOSFET, and the first phase detection circuit causes the first of the AC power source to be connected. The phase of the AC voltage connected to the terminal of the AC power supply is detected, the phase of the AC voltage connected to the second terminal of the AC power supply is detected by the second phase detection circuit, and the first control circuit The first n-channel MOSFET is turned on based on the detection result of the first phase detection circuit, and the third n-channel MOSFET is turned on by the second control circuit based on the detection result of the second phase detection circuit. Is turned on, the current value flowing through the second and fourth MOSFETs is detected by the current detection circuit, and the current value as a detection result of the current detection circuit is smaller than a predetermined value, By the braking cutoff circuit, among the first to fourth MOSFET, at least one is turned off.

  That is, in the full-wave rectifier circuit of the present technology, the first MOSFET is turned on based on the detection result of the first phase detection circuit, and the third wave detection circuit is based on the detection result of the second phase detection circuit. Since the MOSFET is turned on, the phase before and after the phase of the AC power supply switches from positive to negative or from negative to positive is detected, and the first MOSFET and the third MOSFET are turned off before the phase is switched. Thus, the gate-source voltage is discharged, and the gate-source voltage can be turned on at the timing when the gate-source voltage is discharged. In addition, the current detection circuit detects the current flowing through the second and fourth MOSFETs and forcibly shuts off at a timing when the current value is smaller than the predetermined value before and after the phase is switched. The circuit can turn off any of the first to fourth MOSFETs. As a result, in a so-called capacitor input type full-wave rectifier circuit in which a capacitor is connected in parallel with the load, the reverse current generated from the capacitor can be forcibly cut off, and the occurrence of a through current can be suppressed. .

  According to the present technology, a capacitor input type full-wave rectification can be realized with only an n-channel MOSFET, and the MOSFET can be protected, thereby reducing power loss and improving operation stability. It becomes possible.

It is a figure explaining the structural example of a general full wave rectifier circuit. It is a figure explaining operation | movement of the full wave rectifier circuit which replaced the diode of the full wave rectifier circuit of FIG. 1 with MOSFET. It is a figure explaining operation | movement of the full wave rectifier circuit which added the internal structure of MOSFET of FIG. It is a figure explaining a charge pump circuit. It is a figure explaining the structural example which adds a charge pump circuit to a full wave rectifier circuit. It is a figure explaining the structural example which adds a phase detection circuit to a full wave rectifier circuit. It is a figure explaining the path | route of the through current in a full wave rectifier circuit. It is a figure explaining the operation | movement for implement | achieving full wave synchronous rectification only by n channel MOSFET. It is a figure explaining the generation | occurrence | production path | route of the backflow current in a full wave rectifier circuit. It is a figure explaining the structural example in the case of providing a power factor improvement circuit in a full wave rectifier circuit. It is a wave form diagram explaining the waveform which generate | occur | produces in a capacitor | condenser input type full wave rectification. It is a wave form diagram explaining the waveform which generate | occur | produces in a capacitor | condenser input type full wave rectification. It is a figure explaining the structural example of 1st Embodiment of the full wave rectifier circuit to which this technique is applied. It is a wave form diagram explaining the operation | movement in the full wave rectifier circuit of FIG. It is a wave form diagram explaining the operation | movement in the full wave rectifier circuit of FIG. It is a figure explaining the detailed structural example for implement | achieving the full wave rectifier circuit of FIG. It is a figure explaining the generation | occurrence | production path | route of the electric current of the reverse direction produced by adding a power factor improvement circuit to a full wave rectifier circuit. It is a figure which shows the structural example of 2nd Embodiment of the full wave rectifier circuit to which this technique is applied.

Hereinafter, modes for carrying out the technology (hereinafter referred to as embodiments) will be described. The description will be given in the following order.
1. First embodiment (capacitor input type full-wave rectifier circuit)
2. Second embodiment (full-wave rectifier circuit including power factor correction circuit)

<1. First Embodiment>
[General full-wave rectifier circuit]
FIG. 1 is a diagram illustrating a configuration example of a general full-wave rectifier circuit. The full wave rectifier circuit 1 includes diodes 11 to 14, an AC power supply 2, and a load 3. The diode 11 has an anode connected to the first terminal 2 a of the AC power supply 2 and a cathode connected to one terminal of the load 3. The diode 12 has an anode connected to the other terminal of the load 3 and a cathode connected to the first terminal 2 a of the AC power supply 2. The diode 13 has an anode connected to the second terminal 2 b of the AC power supply 2 and a cathode connected to one terminal of the load 3. The diode 14 has an anode connected to the other terminal of the load 3 and a cathode connected to the second terminal 2 b of the AC power supply 2.

  With such a configuration, when the voltage of the first terminal 2a of the AC power supply 2 is higher than that of the second terminal 2b (when the phase in this case is 0 ° to 180 °), A current flows through a path indicated by a dotted line, and DC power is supplied to the load 3. Further, when the voltage of the second terminal 2b of the AC voltage 2 is higher than that of the first terminal 2a (when the phase is 180 ° to 360 °), current flows through the path indicated by the solid line in FIG. Is supplied with DC power.

[Full-wave rectifier circuit using MOSFET]
Incidentally, the full-wave rectifier circuit 1 shown in FIG. 1 includes four diodes 11 to 14, but it is known that a loss caused by generated heat or the like becomes a problem in the diode. Therefore, the diode loss problem can be solved by replacing the diode configuration with a MOSFET.

  FIG. 2 shows a configuration example of the full-wave rectifier circuit 1 in which MOSFETs 21 to 24 are used instead of the diodes 11 to 14.

  That is, when the phase is 0 ° to 180 °, the MOSFETs 21 and 24 are on and the MOSFETs 22 and 23 are off. When the phase is 180 ° to 360 °, the MOSFETs 21 and 24 are off, and When the MOSFETs 21 to 24 are controlled so that the MOSFETs 22 and 23 are turned on, a circuit equivalent to the full-wave rectifier circuit in FIG. 1 can be realized. In this case, all the diodes are MOSFETs. The problem of diode loss is eliminated. A circuit that realizes full-wave rectification by controlling on or off of the MOSFETs 21 to 24 in this manner is generally called a full-wave synchronous rectifier circuit. In the following, the full-wave synchronous rectifier circuit will be simply referred to as a full-wave rectifier circuit, and the description will be made assuming that synchronous rectification is performed.

[Parasitic diode]
A MOSFET called a parasitic diode (body diode) exists inside the MOSFET. FIG. 3 shows a configuration example of the full-wave rectifier circuit 1 in which the parasitic diodes of the MOSFETs 21 to 24 are diodes 31 to 34 and are added on the circuit diagram. That is, the diode 31 is a diode parasitic inside the MOSFET 21, and has an anode connected to the first terminal 2 a of the AC power supply 2 and a cathode connected to one terminal of the load 3. The diode 32 is a diode parasitic inside the MOSFET 22, and has an anode connected to the other terminal of the load 3 and a cathode connected to the first terminal 2 a of the AC power supply 2. The diode 33 is a diode parasitic inside the MOSFET 23, and has an anode connected to the second terminal 2 b of the AC power supply 2 and a cathode connected to one terminal of the load 3. The diode 34 is a diode that is parasitic inside the MOSFET 24, and has an anode connected to the other terminal of the load 3 and a cathode connected to the second terminal 2 b of the AC power supply 2.

  These diodes 31 to 34 carry a current even if their corresponding MOSFETs 21 to 24 are turned off. As a result, in the above-described full-wave rectifier circuit including the four diodes of FIG. It functions in the same manner as the diodes 11 to 14. Note that the diodes 31 to 34, which are parasitic diodes, can be represented on the circuit if it is considered that such diodes exist virtually due to the operational characteristics of the MOSFETs 21 to 24, and a circuit as a diode actually exists. It is not a thing.

  There are two types of MOSFETs, n-channel MOSFETs and p-channel MOSFETs, and it is generally known that n-channel MOSFETs have smaller resistance values than p-channel MOSFETs when the MOSFETs are turned on. The n-channel MOSFET is turned on when the gate voltage becomes higher than the source voltage by a certain level. In the n-channel MOSFET, the terminal corresponding to the anode of the internal parasitic diode is the source. The p-channel MOSFET is turned on when the gate voltage becomes lower than the source voltage by a certain level. In the p-channel MOSFET, the terminal corresponding to the anode of the internal parasitic diode is the drain. Therefore, for example, when using an n-channel MOSFET for the MOSFET 21, the source is connected to the first terminal 2a, and when using a p-channel MOSFET, the drain is connected to the first terminal 2a. That is, the connection method differs between the n-channel MOSFET and the p-channel MOSFET. The parasitic diodes 31 to 34 are assumed to be configured as shown in FIG. 3 even when not shown in the following drawings.

  For the above reasons, when p-channel MOSFETs are used for the MOSFETs 22 and 24, a voltage lower than that of the first terminal 2a and the second terminal 2b of the AC power supply 2 is necessary. Difficulties arise. When n-channel MOSFETs are used for the MOSFETs 22 and 24, the voltage at the terminal corresponding to the source is lower than the voltage at the first terminal 2a or the second terminal 2b of the AC power supply 2, and therefore n It is considered that control is easy when driving the channel MOSFET.

  When p-channel MOSFETs are used as the MOSFETs 21 and 23, the first terminal 2a or the second terminal 2b of the AC power supply 2 is lower than the source, so that it can be easily controlled in driving. On the other hand, when n-channel MOSFETs are used as the MOSFETs 21 and 23, the source is connected to the first terminal 2a or the second terminal 2b of the AC power source 2 as described above, and therefore the first terminal 2a or the second terminal A voltage higher than that of the terminal 2b is required.

  However, as described above, the on-resistance of the n-channel MOSFET is smaller than that of the p-channel MOSFET, so that the loss is reduced when the n-channel MOSFET is used for the MOSFETs 21 and 23. Therefore, a charge pump circuit can be considered as a technique for using n-channel MOSFETs for the MOSFETs 21 and 23.

[Charge pump circuit]
Here, the charge pump circuit will be described with reference to FIG. In the circuit of FIG. 4, one end of the switch S1 is connected to the positive terminal of the power supply VDD1, one switching terminal of the changeover switch S2 is connected to the negative terminal, the negative terminal of the power supply VDD2, and the other terminal of the capacitor C2. Is connected. The switch S1 has one terminal connected to the positive terminal of the power supply VDD1, and the other terminal connected to one terminal of the capacitor C1 and one terminal of the switch S3. One terminal of the capacitor C1 is connected to the other terminal of the switch S1 and one terminal of the switch S3. The other terminal of the capacitor C1 is connected to one terminal of the changeover switch S2. One terminal of the switch S2 is connected to the other terminal of the capacitor C1, and one switching terminal is connected to the negative terminals of the power supplies VDD1 and VDD2 and the other terminal of the capacitor C2. The other switching terminal of the switch S2 is connected to the positive terminal of the power supply VDD2. The positive terminal of the power supply VDD2 is connected to the other switching terminal of the changeover switch S2, and the negative terminal is connected to the negative terminal of the power supply VDD1, one switching terminal of the changeover switch S2, and the other terminal of the capacitor C2. . One terminal of the switch S3 is connected to the other terminal of the switch S1 and one terminal of the capacitor C1, and the other terminal is connected to one terminal of the capacitor C2. One terminal of the capacitor C2 is connected to the other terminal of the switch S3, and the other terminal is connected to the negative terminals of the power supplies VDD1 and VDD2 and one switching terminal of the changeover switch S2. In FIG. 4, the same circuit is shown in both the left part and the right part, but different operation states are shown. The power supplies VDD1 and VDD2 are both DC power supplies with a voltage VDD.

  For example, as shown in the left part of FIG. 4, when the switch S1 is turned on, the changeover switch S2 is connected to one changeover terminal, and the switch S3 is turned off, the capacitor C1 is driven by the voltage VDD of the power supply VDD1. Charged to VDD. From this state, as shown in the right part of FIG. 4, when the switch S1 is turned off, the changeover switch S2 is connected to the other changeover terminal, and the switch S3 is turned on, the capacitor C1 and the power supply VDD2 are Therefore, the voltage at the point a in the right part of FIG. 4 is twice that of VDD. At the same time, by turning on the switch S3, a voltage substantially boosted to the voltage VDD × 2 is obtained, so that the capacitor C2 is charged with the voltage VDD × 2. A circuit that generates a voltage higher than the input voltage by using the stored charge is a charge pump circuit. If this circuit is applied, a voltage higher than that of the first terminal 2a or the second terminal 2b of the AC power supply 2 can be generated.

  FIG. 5 shows a configuration example of the full-wave rectifier circuit 1 to which a charge pump circuit is added. In FIG. 5, components having the same functions as those of the full-wave rectifier circuit 1 in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted as appropriate. The full-wave rectifier circuit 1 of FIG. 5 is different from the full-wave rectifier circuit 1 of FIG. 3 in that a diode 51 and a capacitor 52 are connected in series and connected in parallel to the MOSFET 21. The anode of the diode 51 is connected to a terminal corresponding to the cathode of the parasitic diode 31 of the MOSFET 21, and the cathode is connected to one terminal of the capacitor 52. The capacitor 52 has one terminal connected to the cathode of the diode 51 and the other terminal connected to the terminal on the anode side of the parasitic diode 31 of the MOSFET 21.

  That is, as shown in FIG. 5, a diode 51 and a capacitor 52 connected in series and connected in parallel to the MOSFET 21 are configured as a charge pump circuit. When the phase is 180 ° to 360 ° by the full-wave rectifier circuit 1 of FIG. 5, the capacitor 52 is charged by the potential difference between the second terminal 2b and the first terminal 2a along the path indicated by the solid line in FIG. It becomes possible. Further, when the phase next becomes 0 ° to 180 °, electric charges are accumulated in the capacitor 52, so that a voltage higher than the input voltage can be obtained by the same principle as before. The maximum voltage obtained is the maximum value of the input voltage. For example, when the power supply voltage of the AC power supply 2 is 24 V AC, 24 V AC × 1.41≈33 V is obtained. Next, when the phase is 0 ° to 180 °, the MOSFET 21 may be turned on using the voltage stored in the capacitor 52. The anode of the diode 51 may be directly connected to the second terminal 2b of the AC power supply 2.

  Thus, for example, a full-wave rectifier circuit 1 as shown in FIG. 6 is conceivable as a configuration for controlling the MOSFET 21 to be turned on at the phase timing as described above.

  In the full-wave rectifier circuit 1 of FIG. 6, configurations having the same functions as those of the full-wave rectifier circuit 1 of FIG. 5 are denoted by the same reference numerals, and description thereof will be omitted as appropriate. The full wave rectifier circuit 1 of FIG. 6 is different from the full wave rectifier circuit 1 of FIG. 5 in that a resistor 61, a photodiode 62, a photocoupler 63, and a resistor 64 are newly provided. In the resistor 61 and the photodiode 62, one terminal of the resistor 61 is connected to the first terminal 2 a of the AC power supply 2, and the other terminal is connected to the anode of the photodiode 62. The photodiode 62 has an anode connected to the other terminal of the resistor 61 and a cathode connected to the second terminal 2 b of the AC power supply 2. The photocoupler 63 is physically configured to receive light emitted from the photodiode 62. That is, the resistor 61 and the photodiode 62 are connected in series so as to straddle the first terminal 2 a and the second terminal 2 b of the AC power supply 2. The photocoupler 63 can receive light when the photodiode 62 emits light, the emitter of the photocoupler 63 is connected to the gate of the MOSFET 21, the collector is connected to one terminal of the resistor 64, and the other of the resistor 64 is connected. Are connected to the cathode of the diode 51 and one terminal of the capacitor 52.

  With this configuration, the operation is performed as follows in accordance with the phase of each output voltage of the first terminal 2a and the second terminal 2b of the AC power supply 2. That is, when the phase is 180 ° to 360 °, the photodiode 62 does not emit light. Therefore, during this period, as shown in FIG. 5, the capacitor 52 is charged by the potential difference between the second terminal 2b and the first terminal 2a. When the phase is 0 ° to 180 °, the photodiode 62 emits light. Accordingly, during this time, the photocoupler 63 is turned on, and a voltage higher than that of the source (first terminal 2a) obtained by the charge pump circuit constituted by the diode 51 and the capacitor 52 is applied to the gate of the MOSFET 21. Therefore, the MOSFET 21 is turned on. That is, a phase detection circuit is configured to detect whether the resistor 61, the photodiode 62, the photocoupler 63, and the resistor 64 have a phase of 0 ° to 180 ° or 180 ° to 360 °. Yes. Based on the detection result of the phase detection circuit, the charge pump circuit charges the capacitor 52 with the voltage, and the on / off of the MOSFET 21 is controlled.

  Also in the MOSFET 23, a charge pump circuit in the MOSFET 21, a resistor 61, a photodiode 62, a photocoupler 63, and a resistor 64 are provided. However, in this case, the timing at which the MOSFET 23 is turned on needs to be configured to be 180 ° different from the timing at which the MOSFET 21 is turned on.

  By the way, the MOSFET always has an input capacitance, and the input capacitance is generally larger when the on-resistance is lower. Even if the voltage of the first terminal 2a is lower than the voltage of the second terminal 2b, even if the MOSFET 21 remains on, even if the MOSFET 23 is not on, As indicated by the dotted line, a through current may flow in a loop passing through the parasitic diode 33 of the MOSFET 23.

  Since such a through current is large, there is a high risk of destroying the element. Therefore, as shown in FIG. 8, the gate of the MOSFET 21 is applied only for a part of a half cycle, a period of time is made until the phase is reversed, and the charge charged in the capacitor 52 is completely discharged during this Δt. The through current described above can be prevented. FIG. 8 shows the waveform of the output voltage of the first terminal 2a. The time t0 to t3 shows the phase from 0 ° to 180 °, and the time t3 and after the phase is 180 ° to 360 °. . That is, the gate of the MOSFET 21 is applied from time t1 to t2 in the phase of 0 ° to 180 °, and the gate of the MOSFET 21 is not applied at Δt from time t2 to t3 in the vicinity of the phase change. That is, even if the voltage at the first terminal 2a is lower than the voltage at the second terminal 2b, the MOSFET 21 is turned off, so that no through current is generated by the path shown by the dotted line in FIG. . This technology has been filed by the present applicant in Japanese Patent Application Laid-Open No. 2010-178519. For details, refer to JP2010-178519A.

  However, for example, as shown in FIG. 9, when a capacitor is added to the output, an operation failure occurs. That is, when there is a capacitor with a large capacity at the output, the MOSFET is an element that allows current to flow in both directions. Therefore, when the power supply configuration is a capacitor input type, for example, while the MOSFET 21 is on, the AC power supply 2 The first terminal 2 a is clamped to the output voltage Vo of the AC power supply 2. On the other hand, at the timing when the phase is 0 ° to 180 ° when the MOSFET 21 is turned on, the MOSFET 24 is also turned on, so that the second terminal 2b of the AC power supply 2 is clamped to the ground potential. However, since the output voltage of the AC power supply 2 decreases in the phase of 90 ° to 180 ° during the phase, the output voltage is discharged through the AC power supply 2 as shown by the dotted line in FIG. Current flows backward. Therefore, as a result, the output voltage cannot maintain a direct current state, and therefore, if a fuse or the like is provided to protect various circuits due to an excessive reverse current, the output voltage may be blown out.

  In the technique disclosed in the above-mentioned Japanese Patent Application Laid-Open No. 2010-178519, as shown in FIG. 10, a circuit including a power factor correction circuit including an inductor 92 in the subsequent stage is assumed. Is provided. In the full-wave rectifier circuit 1 of FIG. 10, configurations having the same functions as those of the full-wave rectifier circuit 1 of FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted as appropriate. That is, the full-wave rectifier circuit 1 of FIG. 10 is different from the full-wave rectifier circuit 1 of FIG. 2 in that a smoothing capacitor 81, a MOSFET 91, an inductor 92, and a diode 93 are provided.

  The smoothing capacitor 81 is connected to the load 3 in parallel. Inductor 92 has one terminal connected to a terminal corresponding to the cathode of the parasitic diode of MOSFETs 21 and 23, and the other terminal connected to a terminal corresponding to the cathode of the parasitic diode of MOSFET 91. The diode 93 has an anode connected to the other terminal of the inductor 92, a parasitic diode of the MOSFET 91 connected to a terminal corresponding to the cathode, and a cathode connected to one terminal of the smoothing capacitor 81 and one terminal of the load 3. MOSFET 91 has a terminal corresponding to the cathode of the parasitic diode connected to the other terminal of inductor 92 and the anode of diode 93, and a terminal corresponding to the anode of the parasitic diode corresponding to the anode of the parasitic diode of MOSFETs 22 and 24. The terminal, the other terminal of the smoothing capacitor 81, and the other terminal of the load 3 are connected. With such a configuration, the power factor correction circuit is realized by controlling the MOSFET 91 to be turned on and off.

  The charge stored in the output of the smoothing capacitor 81 does not flow backward due to the effect of the diode 93. However, since the power factor correction circuit is not necessarily a required configuration, there are many cases where the power factor correction circuit is not required depending on the specification, and in this case, synchronous rectification is impossible.

  By the way, in the case of the capacitor input type full-wave rectifier circuit 1 as shown in FIG. 9, power is transmitted for one cycle of the output voltage output from the AC power supply 2 as shown in FIGS. 11 and 12. The period to be shortened. In FIG. 11 and FIG. 12, time t0 to t14 is one cycle of the output voltage. The period during which power is transmitted is from time t11 to t12, and the period from time t12 to t13 is a period during which power is not transmitted.

  This is to replace the pulsating voltage rectified by the smoothing capacitor 81 connected between the MOSFETs 21 and 23 and the MOSFTs 22 and 24 with a direct current, which is higher than the output voltage of the first terminal 2a of the alternating current power supply 2. Only when the current flows from the AC power source 2 (electric power is transmitted). 11 and 12, the dotted line indicates the output voltage of the first terminal 2 a of the AC power supply 2, the thick solid line indicates the current value of the first terminal 2 a, and the thin solid line indicates the charging voltage of the smoothing capacitor 81. The alternate long and short dash lines indicate the voltage applied to the gate of the MOSFET 21, respectively.

  Further, by the phase detection circuit described with reference to FIG. 6, for example, as indicated by a one-dot difference line in FIG. 12, the time is indicated by times t <b> 31 to t <b> 32 during one cycle of the first terminal 2 a of the AC power supply 2. The MOSFET 21 is on only for a certain period. Since the MOSFET 21 is an element that allows current to flow in both directions from the drain to the source and from the source to the drain in terms of characteristics, as shown in FIG. 9, while the MOSFET 21 is on, The voltage between the first terminal 2a and the low potential side (hereinafter referred to as ground) of the smoothing capacitor 81 is substantially the same as the output voltage. Therefore, if the MOSFET 21 is an n-channel MOSFET and the MOSFET 24 is also on in this state, a current flows through the path for discharging the charge stored in the smoothing capacitor 81 as shown in FIG. become.

[Full-wave rectifier circuit using this technology]
By preventing the occurrence of the reverse current generated by the smoothing capacitor 81 described above, a capacitor input type full-wave rectifier circuit can be realized by using only an n-channel MOSFET.

  FIG. 13 shows a configuration example of a capacitor input type full-wave rectifier circuit realized by only an n-channel MOSFET by preventing the generation of the reverse current generated by the smoothing capacitor 81 described above. In the full-wave rectifier circuit 1 of FIG. 13, the same reference numerals are given to components having the same functions as those of the full-wave rectifier circuit 1 of FIG. 9, and the description thereof will be omitted as appropriate. .

  That is, the full-wave rectifier circuit 1 of FIG. 13 is different from the full-wave rectifier circuit 1 of FIG. 9 in that resistors 101 to 103, a comparator 104, and transistors 105 and 106 are newly provided.

  The resistor 101 has one terminal connected to the anode side terminal of the parasitic diode of the MOSFETs 22 and 24, the other terminal connected to the other terminal of the load 3 and the smoothing capacitor 81, and the inverting input terminal of the comparator 104. It is connected to the. The resistor 101 functions as a current detection circuit that flows between the MOSFETs 22, 24 and the smoothing capacitor 81, and a voltage corresponding to the detected voltage value generated between both ends is input to the inverting input terminal of the comparator 104.

  The resistor 102 has one terminal connected to the other terminal of the resistor 103 and the non-inverting input terminal of the comparator 104, the other terminal connected to the anode side terminal of the parasitic diode of the MOSFETs 22 and 24, and one of the resistors 101. The terminal and the emitters of the transistors 105 and 106 are connected. The resistor 103 has one terminal connected to the cathode side terminal of the parasitic diode of the MOSFETs 21 and 23 and one terminal of the smoothing capacitor 81 and the load 3, and the other terminal connected to one terminal of the resistor 102, And connected to the non-inverting input terminal of the comparator 104. That is, the resistors 102 and 103 constitute a voltage dividing resistor for a voltage input to the non-inverting input terminal of the comparator 104. Accordingly, the resistance values of the resistors 102 and 103 are set so that the voltage input to the non-inverting input terminal of the comparator 104 becomes a predetermined threshold value.

  The comparator 104 has a non-inverting input terminal connected to one terminal of the resistor 102 and the other terminal of the resistor 103, an inverting input terminal connected to the other terminal of the resistor 101, the smoothing capacitor 81, and the other terminal of the load 3. And the output terminal is connected to the bases of the transistors 105 and 106. That is, the comparator 104 compares the detection result of the both-ends voltage of the resistor 101 constituting the current detection circuit with a predetermined threshold set by the voltage dividing ratio of the resistors 102 and 103, and compares the detection result of the resistor 101 constituting the current detection circuit. When the detection result of the both-end voltage falls below a voltage set as a predetermined threshold, the transistors 105 and 106 are turned on.

  The bases of the transistors 105 and 106 are connected to the output terminal of the comparator 104, the emitters are connected to the anode side terminals of the parasitic diodes of the MOSFETs 22 and 24, and the collectors are connected to the gates of the MOSFETs 22 and 24. ing. That is, when the transistors 105 and 106 are turned on by the comparator 104, the MOSFETs 22 and 24 are forcibly turned off. In FIG. 13, the parasitic diodes 31 to 34 are not shown. However, as described above, the parasitic diodes 31 to 34 are parasitic inside as shown in FIG.

[Description of Operation of Full-Wave Rectifier Circuit of FIG. 13]
Next, referring to the timing charts of FIGS. 14 and 15, the full-wave rectifier circuit 1 of FIG. 13 is based on the waveform of one cycle of the AC voltage output from the first terminal 2 a of the AC power supply 2. The operation will be described. In FIG. 14, the waveform indicated by the solid line is the voltage value controlled by the transistors 105 and 106 and applied to the gates of the MOSFETs 22 and 24 to control the MOSFETs 22 and 24, and the waveform indicated by the dotted line is the AC power supply. The waveform of the output voltage of the second first terminal 2a is indicated by a one-dot chain line, the waveform indicated by the two-dot chain line is the input voltage from the phase detection circuit supplied to the gate of the MOSFET 21 or 23, 1 shows the current value of one terminal 2a. FIG. 15 is an enlarged waveform diagram in the vicinity of times T5 and T6 in FIG.

  At times T0 to T1, none of the MOSFETs 21 to 24 is turned on, and the parasitic diodes 31 to 34 existing inside the MOSFETs 21 to 24 from the AC power supply 2 prevent backflow, There is no power supply.

  From time T1 to time T2, the MOSFET 21 changes from off to on when a signal is sent to the gate from the above-described phase detection circuit. At this time, the MOSFETs 22 to 24 are all kept off. The MOSFETs 21 to 24, the parasitic diodes 31 to 34 existing inside the MOSFETs 22 to 24, or the parasitic diodes 32 to 34 prevent backflow, and no power is supplied to the load 3. That is, at this timing, even if no signal is sent from the phase detection circuit to the gate of the MOSFET 21, a substantially similar state is obtained. This state is continued from time T2 to T3.

  From time T3 to time T4, the MOSFET 21 is turned on when a signal is sent to the gate from the above-described phase detection circuit. Further, the MOSFETs 22 to 24 are all off. At this time, since the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 becomes higher than the voltage of the smoothing capacitor 81, the load from the first terminal 2a of the AC power supply 2 via the MOSFET 21 is increased. 3, and a feedback current flows to the second terminal 2 b of the AC power supply 2 through the parasitic diode 34 of the MOSFET 24. For this reason, since the amount of current flowing through the first terminal 2a increases rapidly, the voltage across the resistor 101 increases correspondingly. At this time, the MOSFET 21 is also controlled to be turned off so that power is supplied from the first terminal 2a of the AC power supply 2 to the load 3 via the parasitic diode 31 of the MOSFET 21, and the parasitic diode 34 of the MOSFET 24 is The feedback current may be controlled to flow to the second terminal 2b of the AC power supply 2 through the AC power supply 2. Further, it is possible to control the MOSFET 21 to be turned off and the MOSFET 24 to be turned on. In this case, electric power is supplied to the load 3 side via the parasitic diode 31 of the MOSFET 21, and the AC power source is supplied via the MOSFET 24. A feedback current flows to the second terminal 2b.

  From time T4 to T5, the MOSFET 21 is turned on because a signal is supplied from the phase detection circuit to the gate, and at the same time, the voltage across the resistor 101 constituting the current detection circuit becomes equal to the voltage at the non-inverting input terminal of the comparator 104. As a result, the output from the comparator 104 is turned off, and accordingly, the transistors 105 and 106 are also turned off, so that both the MOSFETs 22 and 24 are turned on. Since the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 is higher than the voltage of the smoothing capacitor 81, power is supplied from the first terminal 2a of the AC power supply 2 to the load 3 via the MOSFET 21. Then, a feedback current flows to the second terminal 2 b of the AC power supply 2 through the MOSFET 24.

  From time T5 to T6, the MOSFET 21 is turned on when a signal is sent to the gate from the above-described phase detection circuit. However, it decreases with a change in the current flowing through the resistor 101 constituting the current detection circuit, and as shown in FIG. 15, at time T5 ′ immediately before time T5, the comparator 104 is supplied to the inverting input terminal. Therefore, the signal is output from the output terminal because it is lower than the threshold voltage input to the non-inverting input terminal. Accordingly, the transistors 105 and 106 are turned on, so that the MOSFETs 22 and 24 are turned off. Therefore, at time T5, the MOSFETs 22 to 24 are all off, and the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 is higher than the charging voltage of the smoothing capacitor 81. Then, electric power is supplied from the first terminal 2 a of the AC power supply 2 to the load 3 side through the MOSFET 21, and a feedback current flows to the second terminal 2 b of the AC power supply 2 through the parasitic diode 34 of the MOSFET 24. At this time, the MOSFET 21 may be controlled to be turned off and only the MOSFET 24 may be controlled to be turned on, or all of the MOSFETs 21 to 24 may be controlled to be turned off.

  At times T6 to T7, the MOSFET 21 is turned on and the MOSFETs 22 to 24 are all turned off. However, the internal parasitic diodes 32 to 34 of the MOSFETs 22 to 24 prevent backflow, and power is supplied to the load 3. Supply is not performed. At this time, the MOSFET 21 may be controlled to be turned off, and only the MOSFET 24 may be controlled to be turned on, or all of the MOSFETs 21 to 24 may be controlled to be turned off.

  From time T7 to time T8, the MOSFET 21 loses a signal from the phase detection circuit and changes from on to off. All of the MOSFETs 22 to 24 remain off, and the MOSFETs 21 to 24, or the internal parasitic diodes 31 to 34 of the MOSFETs 22 to 24, or 32 to 34 prevent backflow, and power supply to the load 3 is not performed. .

  At time T8 to T10, none of the MOSFETs 21 to 24 is turned on, the internal parasitic diodes 31 to 34 of the MOSFETs 21 to 24 prevent the backflow from the AC power supply 2, and no power is supplied to the load 3. . At time T9, the output voltage of the first terminal 2a is inverted from positive to negative.

  At times T10 to T11, the MOSFET 23 changes from off to on by the signal supplied to the gate from the phase detection circuit, and the MOSFETs 21, 22, and 24 remain off, and the MOSFETs 21 to 24, or 21, 22 24, the internal parasitic diodes 31 to 34 or 31, 32, and 34 prevent backflow, and power supply to the load 3 is not performed. At this time, control may be performed so that a signal supplied from the phase detection circuit to the gate of the MOSFET 23 is not sent.

  From time T11 to T12, the MOSFET 23 is turned on by a signal supplied to the gate from the phase detection circuit, the MOSFETs 21, 22, and 24 are all kept off, and the internal parasitic diode 31 of the MOSFETs 21, 22, and 24 , 32 and 34 prevent backflow, and no power is supplied to the load 3. At this time, the same effect can be obtained even if the MOSFET 23 is also turned off. )

  From time T12 to time T13, the MOSFET 23 is turned on by a signal supplied to the gate from the phase detection circuit, and the MOSFETs 21, 22, and 24 are all turned off. In addition, since the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 becomes higher than the voltage of the smoothing capacitor 81, the load 3 side from the second terminal 2b of the AC power supply 2 via the MOSFET 23 is increased. Power is supplied, and a feedback current flows to the first terminal 2 a of the AC power supply 2 through the parasitic diode 32 of the MOSFET 22. At this time, the MOSFET 23 is also turned off, power is supplied to the load 3 via the parasitic diode 33 of the MOSFET 23, and a feedback current is supplied to the second terminal 2 b of the AC power supply 2 via the parasitic diode 32 of the MOSFET 22. You may make it flow. Further, the MOSFET 23 may be turned off and the MOSFET 22 may be controlled to turn on. In that case, electric power is supplied to the load 3 side via the parasitic diode 33 of the MOSFET 23, and a feedback current flows to the second terminal 2 b of the AC power supply 2 via the MOSFET 22.

  At times T13 to T14, the MOSFETs 22 and 23 are on, and the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 is higher than the voltage of the smoothing capacitor 81. Current flows from the terminal 2b to the load 3 via the MOSFET 23, and a feedback current flows to the first terminal 2a of the AC power supply 2 via the MOSFET 22.

  At times T14 to T15, the MOSFET 23 is turned on, the MOSFETs 21, 22, and 24 are both turned off, and the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 is charged to the smoothing capacitor 81. Since the voltage is higher than the voltage, a current flows from the second terminal 2 b of the AC power supply 2 to the load 3 side via the MOSFET 23, and a feedback current flows to the first terminal 2 a of the AC power supply 2 via the parasitic diode 32 of the MOSFET 22. . That is, similarly to the time T5 to T6, it decreases with a change in the current flowing through the resistor 101 constituting the current detection circuit, and at the timing immediately before time T15 (the timing corresponding to time T5 ′), the comparator 104 Since the voltage supplied to the inverting input terminal is lower than the threshold voltage input to the non-inverting input terminal, a signal is output from the output terminal. Accordingly, the transistors 105 and 106 are turned on, so that the MOSFETs 22 and 24 are turned off. At this time, the MOSFET 23 may be turned off and only the MOSFET 22 may be turned on, or all the MOSFETs 21 to 24 may be turned off.

  From time T15 to T16, the MOSFET 23 is turned on, the MOSFETs 21, 22, and 24 are all turned off, and the internal parasitic diodes 31, 32, and 34 of the MOSFETs 21, 22, and 24 prevent backflow, and the load No power is supplied to 3. At this time, the MOSFET 23 may be turned off and only the MOSFET 22 may be turned on, or all the MOSFETs 21 to 24 may be turned off.

  At time T16 to T17, the MOSFET 23 changes from on to off, and the MOSFETs 21, 22, and 24 are all turned off, and the internal parasitic diodes 31 to 34 of the MOSFETs 21 to 24 or 21, 22, 24, or 31, 32, and 34 prevent backflow, and power supply to the load 3 is not performed.

  At times T17 to T18, all the MOSFETs 21 to 24 are not turned on, and all the MOSFETs 21 to 24 from the AC power supply 2 prevent the internal parasitic diodes 31 to 34 from backflowing, so that power supply to the load 3 is performed. Absent.

  That is, as shown at times T4 to T5, the reverse flow path is established by turning off one or both of the n-channel MOSFETs 21 and 24 and the n-channel MOSFETs 22 and 23, which were the carriers for discharging the electric charge stored in the smoothing capacitor 81. Can be completely shut off.

  In addition, a parasitic diode always exists in the n-channel MOSFETs 21 to 24 from the source to the drain. Therefore, even if the power of the smoothing capacitor 81 is turned on in the zero state, the parasitic diodes 31 to 34 of the MOSFETs 21 to 24 are responsible for current transmission until the power is turned on in the steady state. In other words, even if the MOSFETs 21 to 24 that have been current bearers are suddenly turned off, the current flows through the parasitic diodes 31 to 34 of the MOSFETs 21 to 24, so that back electromotive force is generated and the blocking is destroyed. There is no.

  With such a configuration, since the MOSFETs 22 and 24 can be turned off before the current is inverted, the capacitor input type synchronous rectification is possible.

[Full-wave rectification circuit applying the full-wave rectification circuit of FIG. 13]
Next, a detailed configuration example of the full-wave rectifier circuit 1 for realizing the full-wave rectifier circuit 1 of FIG. 13 will be described with reference to FIG. In the full-wave rectifier circuit 1 of FIG. 16, the same reference numerals are given to components having the same functions in the full-wave rectifier circuit 1 of FIG. 6 and FIG. And

  That is, the source of the n-channel MOSFET 21 in the full-wave rectifier circuit 1 of FIG. 16 is connected to the first terminal 2 a of the AC power supply 2. The n-channel MOSFET 22 has a drain connected to the first terminal 2 a of the AC power supply 2. The n-channel MOSFET 23 has a drain connected to the drain of the n-channel MOSFET 21 and a source connected to the second terminal 2 b of the AC power supply 2. The n-channel MOSFET 24 has a drain connected to the second terminal 2 b of the AC power supply 2 and a source connected to the source of the n-channel MOSFET 22.

  The diode 51-1 has an anode connected to the drain of the n-channel MOSFET 21. The capacitor 52-1 is charged by the voltage between the cathode of the diode 51-1 and the first terminal 2a of the AC power supply 2, and constitutes a charge pump circuit for driving the MOSFET 21 together with the diode 51-1. The diode 51-2 has an anode connected to the drain of the n-channel MOSFET 23. The capacitor 52-2 is charged by the voltage between the cathode of the diode 51-2 and the second terminal 2b of the AC power supply 2, and constitutes a charge pump circuit for driving the MOSFET 23 together with the diode 51-2.

  The photodiode 62-1 drives the MOSFET 21 that detects the phase of the AC voltage connected to the first terminal 2a of the AC power supply 2 together with the diode 62a-1, the Zener diode 255-1, and the resistor 61-1. The phase detection circuit for this is comprised.

  The NPN transistor 253-1 has a collector connected to the capacitor 52-1, an emitter connected to the gate of the n-channel MOSFET 21, and a base connected to the first terminal 2a of the AC power supply 2 via the Zener diode 252-1. The The resistor 64-1 has one terminal connected to the capacitor 52-1, and the other terminal connected to the collector on the light receiving side of the photocoupler 63-1. The emitter on the light receiving side of the photocoupler 63-1 is connected to the base of the NPN transistor 253-1. The resistor 251-1, the Zener diode 252-1, the NPN transistor 253-1, the capacitor 52-1, the photocoupler 63-1, and the resistor 64-1 are detected results of the phase detection circuit for driving the MOSFET 21, that is, A control circuit is configured to send a signal for turning on the n-channel MOSFET 21 based on the presence or absence of light emission from the photodiode 62-1.

  The control circuit for sending a signal for turning on the n-channel MOSFET 21 drives the MOSFET 21 by the photocoupler 63-1, based on the light emission state of the photodiode 62-1, which is the detection result of the phase detection circuit for driving the MOSFET 21. A voltage is applied to the gate of the MOSFET 21 from the charge pump circuit, and the voltage between the gate and the source of the MOSFET 21 becomes a predetermined value before the potential of the first terminal 2a becomes lower than the potential of the second terminal 2b. Control to make it smaller.

  The resistor 254-1 is connected between the source and gate of the n-channel MOSFET 21, and constitutes a discharge circuit of the MOSFET 21. The resistance value of the resistor 254-1 constituting the discharge circuit is the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 based on the timing obtained from the detection result of the phase detection circuit that drives the MOSFET 21. However, the gate-source potential is set to a value that allows the MOSFET 21 to be reliably turned off within a period until the timing of switching from positive to negative or from negative to positive.

  The photodiode 62-2 drives the MOSFET 23 that detects the phase of the AC voltage connected to the second terminal 2b of the AC power supply 2 together with the diode 62a-2, the Zener diode 255-2, and the resistor 61-2. The phase detection circuit for this is comprised.

  The NPN transistor 253-2 has a collector connected to the capacitor 52-2, an emitter connected to the gate of the n-channel MOSFET 23, and a base connected to the second terminal 2b of the AC power supply 2 via the Zener diode 252-2. Is done. The resistor 64-2 has one terminal connected to the second capacitor 52-2 and the other terminal connected to the light-receiving side collector of the photocoupler 63-2. The emitter on the light receiving side of the photocoupler 63-2 is connected to the base of the NPN transistor 253-2. The resistor 251-2, the Zener diode 252-2, the NPN transistor 253-2, the capacitor 52-2, the photocoupler 63-2, and the resistor 64-2 are detected results of the phase detection circuit for driving the MOSFET 23, that is, Based on the presence or absence of light emission from the photodiode 62-2, a control circuit for sending a signal for turning on the n-channel MOSFET 23 is configured.

  The control circuit that sends a signal to turn on the n-channel MOSFET 23 drives the MOSFET 23 by the photocoupler 63-2 based on the light emission state of the photodiode 62-2, which is the detection result of the phase detection circuit for driving the MOSFET 23. The charge pump circuit is connected to apply a voltage to the gate of the MOSFET 23, and the voltage between the gate and the source of the MOSFET 23 becomes a predetermined value before the potential of the second terminal 2b becomes lower than the potential of the first terminal 2a. Control to make it smaller.

  The resistor 254-2 is connected between the source and gate of the n-channel MOSFET 23 and constitutes a discharge circuit of the MOSFET 23. The resistance value of the resistor 254-2 constituting the discharge circuit is the voltage between the first terminal 2a and the second terminal 2b of the AC power supply 2 based on the timing obtained from the detection result of the phase detection circuit that drives the MOSFET 23. However, the gate-source potential is set to a value that allows the MOSFET 23 to be reliably turned off within a period until the timing of switching from positive to negative or from negative to positive.

  Resistors 262-1 and 264-1 are connected between the source and gate of the n-channel MOSFET 22 for the first drive voltage obtained by dividing the voltage between the second terminal 2b of the AC power source 2 and the sources of the n-channel MOSFETs 22 and 24. A first voltage dividing circuit to be applied is configured.

  Resistors 261-1 and 262-2 divide the voltage between the first terminal 2 a of the AC power supply 2 and the sources of the n-channel MOSFETs 22 and 24 between the source and gate of the n-channel MOSFET 24. A second voltage dividing circuit to be applied is configured.

  Smoothing capacitor 81 is charged by a voltage between the drains of n-channel MOSFETs 21 and 23 and the sources of n-channel MOSFETs 22 and 24.

  The resistor 101 forms a current detection circuit that detects a current value connected to the smoothing capacitor 81 and the sources of the n-channel MOSFETs 22 and 24.

  The resistors 102 and 103 constitute a third voltage dividing circuit that divides the voltage between the drains of the MOSFETs 21 and 23 and the sources of the MOSFETs 22 and 24.

  In the comparator 104, the voltage divided by the third voltage dividing circuit is applied to the non-inverting input terminal, and the smoothing capacitor 81 and the n-channel MOSFET 22 detected by the resistor 101 constituting the current detection circuit are applied to the inverting input terminal. A voltage corresponding to the value of the current flowing between the 24 sources is input, and the comparison result is output to the bases of the transistors 105 and 106.

  The transistors 105 and 106 are each configured to turn off the MOSFETs 22 and 24 in accordance with the output of the comparator 104, and together with the resistors 211 to 214, configure the control circuit 100 for turning off the MOSFETs 22 and 24.

  16 is a detailed configuration for realizing the operation of the full-wave rectifier circuit 1 in FIG. 13, and the operation itself is the same as that of the full-wave rectifier circuit 1 in FIG. The description is omitted.

<Second Embodiment>
[Problems when power factor correction circuit is included]
In the above, the configuration for realizing the capacitor input type full-wave rectifier circuit has been described. However, when the configuration including the power factor correction circuit is realized, when synchronous rectification is realized, a reverse current is generated as follows. There is a risk of failure.

  That is, for example, in the case of the configuration shown in FIG. 17, there is a possibility that a current that flows backward through a path indicated by a one-dot chain line in the drawing may be generated.

  The circuit in FIG. 17 includes a power transformer 310 that converts AC 100V to AC 24V, and a plurality of power units 320-1 to 320-n connected to the power transformer 310. The power supply unit 320-1 includes a rectifier circuit 330 that rectifies AC24V using a synchronous rectifier bridge, a power factor improvement circuit 340 that improves the power factor of the rectified voltage, and an output circuit 350 that outputs a DC voltage. Yes. The power factor correction circuit 340 includes an inductor L, FET1, which is a MOSFET, FET2, and a control circuit 352 that controls switching of the FET1 and FET2, and the control circuit 352 adjusts the duty ratio of the FET1 and FET2. .

[Full-wave rectifier circuit including power factor correction circuit]
In the above, the problem is that the MOSFET for controlling on / off on the high side indicated by the FET 1 in FIG. 17 can be turned on at the timing when the backflow current is generated. Therefore, the current detection circuit described above is configured, and stable synchronous rectification is performed by a full-wave rectifier circuit with a power factor correction circuit by controlling the high-side MOSFET to be turned off at the timing immediately before the backflow current is generated. Can be realized.

  FIG. 18 shows a full-wave rectifier circuit 1 with a power factor correction circuit. In the full-wave rectifier circuit 1 of FIG. 18, the same reference numerals are given to configurations having the same functions as the configurations of the full-wave rectifier circuit 1 of FIGS. 3, 6, 13, and 16. The description will be omitted as appropriate. Further, in the full-wave rectifier circuit 1 of FIG. 18, the configuration for realizing synchronous full-wave rectification, that is, the MOSFETs 21 to 24 and the like have the same functions as the full-wave rectifier circuit 1 of FIG. Since it operates, only the power factor correction circuit will be described here.

  The power factor correction circuit in the full-wave rectifier circuit 1 of FIG. 18 includes a power factor correction control circuit 401, an on-time delay circuit 402, an inverting circuit 403, an on-time delay circuit 404, a low-side on / off circuit 405, and a high-side on / off circuit 406. , MOSFETs 407 and 408, and an inductor 409. Further, a comparator 104 ′ is provided instead of the comparator 104. The function of the comparator 104 ′ is substantially the same as that of the comparator 104, but a voltage corresponding to the current value of the resistor 101 constituting the current detection circuit is input to the non-inverting input terminal side, and a fixed voltage is input to the inverting input terminal side. A difference is that a fixed voltage value supplied from a power supply 410 that outputs a value is input as a threshold voltage value, and an output terminal is connected to a high-side on / off circuit 406.

  In the power factor correction control circuit 401, a voltage that is synchronously rectified is input to the input terminal Vin, power is supplied from a power supply (not shown) from the power supply terminal Vcc, and the current detection terminal IS is connected to the sources of the MOSFETs 22 and 24. The feedback voltage input terminal FB is connected to the drain of the MOSFET 408, the ground terminal GND is grounded, and the output terminal out is connected to the on-time delay circuit 402 and the inverting circuit 403. The on-time delay circuit 402 delays a signal for turning on the low-side MOSFET 407 output from the power factor correction control circuit 401 by a predetermined time and supplies the delayed signal to the low-side on / off circuit 405. The low-side on / off circuit 405 controls the MOSFET 407 to be turned on based on a signal for controlling the low-side MOSFET 407 supplied from the on-time delay circuit 402 to be turned on, and otherwise controls it to be turned off. The inverting circuit 403 inverts the signal for controlling the low-side MOSFET 407 supplied from the power factor correction control circuit 401 to an on-control signal so that the high-side MOSFET 408 is turned into the on-time delay circuit 404. Supply. The on-time delay circuit 404 delays a signal for turning on the high-side MOSFET 408 output from the inverting circuit 403 by a predetermined time and supplies the delayed signal to the high-side on / off circuit 406. The high-side on / off circuit 406 controls the MOSFET 408 to be turned on based on a signal for controlling the high-side MOSFET 408 supplied from the on-time delay circuit 404 to be turned on.

  With such a configuration, the power factor is improved by the on / off control of the MOSFETs 407 and 408 and the inductor 409.

  Next, an operation for forcibly turning off the high-side MOSFET 408 will be described.

  The comparator 104 ′ outputs an output signal that becomes Hi when the voltage between both ends corresponding to the amount of current flowing through the resistor 101 constituting the current detection circuit is higher than a predetermined voltage value. In this case, the high-side on / off circuit 406 is supplied with a Hi signal when the output signal of the on-time delay circuit 404 is Hi and the output signal of the comparator 104 ′ is Hi, and otherwise the Low signal is Low. This signal is supplied. Therefore, if the signal supplied from the comparator 104 ′ is a Hi signal, the output signal itself of the on-time delay circuit 404 is substantially supplied to the high-side on / off circuit 406. On the other hand, when the voltage at both ends corresponding to the current value flowing through the resistor 101 constituting the current detection circuit becomes lower than a predetermined voltage and approaches the condition where a reverse current flows, a low signal is output from the comparator 104 ′. Thus, a low signal is supplied to the high-side on / off circuit 406 regardless of the output signal from the on-time delay circuit 404. As a result, the high-side on / off circuit 406 can prevent the backflow as shown in FIG. 17 by turning off the MOSFET 408.

  As in the case of FIG. 13 or FIG. 16, a signal corresponding to the output result of the comparator 104 ′ is supplied to the gates of the MOSFETs 22 and 24 to forcibly turn off the MOSFETs 22 and 24. Good. Further, the MOSFETs 21 to 24 and the MOSFET 408 may be controlled to be turned off in response to the output signal of the comparator 104 ′, or any one of them may be controlled to be turned off. Also good.

  As described above, according to the present technology, it is possible to reduce a loss due to full-wave rectification. That is, the loss of the full-wave rectifier circuit is determined by the average current x forward voltage VF when it is composed of a diode.For example, if the AC voltage is 100V AC and the load is 200W, the average current will be about 1A, and VF Assuming = 1.1V, 1 × 1.1 = 1.1W, and the total loss of four diodes is about 4.4W.

  On the other hand, in synchronous rectification using a MOSFET, the loss of the MOSFET is determined by RMS current × RMS current × ON resistance. Under the same conditions as described above, the RMS current is about 1.5 A and the ON resistance is 50 mΩ. Then, 1.5 × 1.5 × 0.05≈0.11 W, and the total loss of the four MOSFETs is about 0.44 W, and the loss can be reduced by 3.96 W.

  Furthermore, as in the amusement industry, when the AC voltage input to the switching power supply is 24V AC, the withstand voltage of the MOSFET is sufficient at present (withstand voltage: 60V). . On the other hand, the forward voltage VF of the diode does not drop drastically even if the breakdown voltage of the diode is lowered, and is about 0.6V. If the forward voltage VF of the diode is 0.6V and the on-resistance of the MOSFET is 4mΩ, the loss can be reduced by about 9.3W.

  Due to these effects, diodes are conventionally attached to large heatsinks to take measures against heat generation. However, since higher efficiency eliminates the need for heatsinks, one package can be realized. .

  In addition, according to the full-wave rectifier circuit of the present technology, it is possible to prevent a phenomenon called a through current that simultaneously flows through the n-channel MOSFET 21 and the n-channel MOSFET 23.

  On the other hand, in the case of capacitor input type full-wave rectification, as shown in FIG. 11, the period during which power is transmitted for one cycle of the output voltage output from the AC power supply 2 is shortened. This is to replace the pulsating voltage rectified by the smoothing capacitor 81 connected between the MOSFETs 21 and 23 and the sources of the MOSFETs 22 and 24 with a direct current, and only when the alternating voltage is higher than the output voltage. Current flows from the AC power supply 2 (power is supplied). Further, by the phase detection circuit, for example, as shown in FIG. 14, the MOSFET is in an on state only for a certain period of one cycle. Therefore, the MOSFET is an element that allows a bidirectional current to flow from the source to the source and from the source to the drain. Therefore, as shown in FIG. The voltage between the terminal 2b and the low potential side (hereinafter referred to as ground) of the smoothing capacitor 81 is substantially the same as the output voltage. Therefore, at this time, if the n-channel MOSFETs 22 and 24 are in the ON state, current flows through a path for discharging the electric charge stored in the smoothing capacitor 81 as shown in FIG.

  However, when the value of the current flowing through the resistor 101 that constitutes the current detection circuit becomes lower than a predetermined value, the comparator 104 connected to the resistor 101 that constitutes the current detection circuit detects it. 24 is turned off. By operating in this way, as shown in FIG. 14, the n-channel MOSFETs 21 and 24, or the n-channel MOSFETs 22 and 23, which were responsible for discharging the charge stored in the smoothing capacitor 81, are turned off. By doing so, the reverse flow path can be completely blocked.

  In addition, a parasitic diode always exists in the n-channel MOSFET from the source to the drain. For this reason, even if the power of all the capacitors is turned on in the zero state, the MOSFET parasitic diode is responsible for current transfer until the steady state is reached. In other words, even if the MOSFET that was the current bearer is suddenly turned off as shown in FIG. 14, it is possible to prevent the device from being destroyed due to the generation of counter electromotive force due to the current flowing through the parasitic diode of the MOSFET. It becomes possible.

  As a result, as shown in FIG. 15, the capacitor input type synchronous rectification can be performed by turning off the MOSFETs 22 and 24 at the timing immediately before the current is inverted.

  As described above, according to the present technology, the power loss can be reduced and the n-channel MOSFET can be protected, so that the operation stability can be improved. In addition, since the current flowing in the reverse direction can be interrupted, it is possible to prevent a failure due to the reverse current, and even in the case where a power factor correction circuit is attached, the reverse control is performed by the same control. It is possible to prevent a failure caused by a current flowing through the.

  Further, in this specification, the system represents the entire apparatus constituted by a plurality of apparatuses.

1 Full-wave rectifier circuit 11 to 14 Diode 21 to 24 MOSFET
31 to 34 Parasitic diode 51 Diode 52 Capacitor 62 Photodiode 63 Photocoupler 81 Smoothing capacitor 101 Resistor 104, 104 'Comparator 105, 106 Transistor 401 Power factor improvement control circuit 402 On-time delay circuit 403 Inverting circuit 404 On-time delay circuit 405 Low side ON / OFF circuit 406 High side ON / OFF circuit 407, 408 MOSFET
409 inductor

Claims (13)

In a full-wave rectification circuit that full-wave rectifies the AC voltage input from the AC power supply,
A first MOSFET (Metal Oxide Semiconductor Field Effect Transistor) in which a terminal corresponding to an anode in an internal parasitic diode is connected to a first terminal of the AC power supply;
A second MOSFET having a terminal corresponding to the cathode of an internal parasitic diode connected to the first terminal of the AC power supply;
A terminal corresponding to the cathode of the internal parasitic diode is connected to a terminal corresponding to the cathode of the internal parasitic diode of the first MOSFET, and a terminal corresponding to the anode of the internal parasitic diode is the second terminal of the AC power supply. A third MOSFET connected to the
A terminal corresponding to the cathode of the internal parasitic diode is connected to the second terminal of the AC power supply, and a terminal corresponding to the anode of the internal parasitic diode corresponds to the anode of the internal parasitic diode of the second MOSFET. A fourth MOSFET connected to the terminal;
A first phase detection circuit for detecting a phase of an AC voltage connected to the first terminal of the AC power supply;
A second phase detection circuit for detecting the phase of the AC voltage connected to the second terminal of the AC power supply;
A first control circuit that turns on the first MOSFET based on a detection result of the first phase detection circuit;
A second control circuit for turning on the third MOSFET based on a detection result of the second phase detection circuit;
A current detection circuit for detecting a current value flowing through the second and fourth MOSFETs;
And a forcible cutoff circuit connected to turn off at least one of the first to fourth MOSFETs when a current value as a detection result of the current detection circuit becomes smaller than a predetermined value. Wave rectifier circuit. The pulsating current obtained by the voltage between the terminal corresponding to the cathode of the internal parasitic diode of the first and third MOSFETs and the terminal corresponding to the anode of the internal parasitic diode of the second and fourth MOSFETs A smoothing capacitor connected to smooth the voltage;
The current detection circuit is
A current detection resistor for detecting a current between the smoothing capacitor and the second and fourth MOSFETs;
The full-wave rectifier circuit according to claim 1, further comprising a comparator that outputs a signal depending on whether or not a value of a current flowing through the current detection resistor is smaller than a predetermined value. The full-wave rectifier circuit according to claim 2, wherein the lowest input terminal of the comparator is connected to the sources or drains of the second and fourth MOSFETs via the current detection resistor. The full-wave rectifier circuit according to claim 2, wherein the forced cutoff circuit includes a cutoff control circuit that turns off at least one of the second and fourth MOSFETs. The cutoff control circuit includes a resistor and a transistor, one end of the resistor is connected to the output terminal of the comparator, the other end of the resistor is connected to the base of the transistor, and the collector of the transistor The full-wave rectifier circuit according to claim 4, wherein the full-wave rectifier circuit is connected to at least one of the gates of the second and fourth MOSFETs. The full-wave rectifier circuit according to claim 1, wherein the first to fourth MOSFETs are n-channel MOSFETs. The first control circuit includes:
A first charge pump circuit that generates a voltage higher than the voltage of the first terminal of the AC power supply;
Based on the detection result of the first phase detection circuit, the photocoupler is connected to apply a voltage from the first charge pump circuit to the gate of the first MOSFET, and the potential of the first terminal is 2. The full-wave rectifier circuit according to claim 1, wherein the full-wave rectifier circuit is connected so that a voltage between a gate and a source of the first MOSFET becomes smaller than a predetermined value before the potential becomes lower than the potential of the second terminal. The first charge pump circuit includes:
Including a first diode and a first capacitor;
The anode of the first diode is connected to a terminal corresponding to the cathode of the internal parasitic diode of the first MOSFET, or to the second terminal of the AC power source, and the cathode of the first diode and the second terminal of the AC power source. The full-wave rectifier circuit according to claim 7, wherein a first capacitor is connected between the first terminal and the first terminal. A resistance is included between the gate and the source of the first MOSFET, and the resistance value of the resistance is determined based on the timing obtained from the detection result of the first phase detection circuit and the second terminal of the AC power supply. 8. The value according to claim 7, wherein the first MOSFET can reliably turn off the potential between the gate and the source within a period until the voltage to the terminal switches from positive to negative or from negative to positive. Wave rectifier circuit. The second control circuit includes:
A second charge pump circuit that generates a voltage higher than the voltage of the second terminal of the AC power supply;
Based on the detection result of the second phase detection circuit, the photocoupler is connected to apply a voltage from the second charge pump circuit to the gate of the third MOSFET, and the potential of the second terminal is The full-wave rectifier circuit according to claim 1, wherein the full-wave rectifier circuit is connected so that a voltage between a gate and a source of the third MOSFET becomes smaller than a predetermined value before the potential becomes lower than the potential of the first terminal. The second charge pump circuit includes:
Including a second diode and a second capacitor;
The anode of the second diode is connected to the terminal corresponding to the cathode of the internal parasitic diode of the third MOSFET, or the first terminal of the AC power supply, and the cathode of the second diode and the first of the AC power supply The full-wave rectifier circuit according to claim 10, wherein a second capacitor is connected between the two terminals. A resistance is included between the gate and source of the third MOSFET, and the resistance value of the resistance is determined based on the timing obtained from the detection result of the second phase detection circuit and the second terminal of the AC power supply. The value according to claim 10, wherein the third MOSFET can reliably turn off the potential between the gate and the source within a period until the timing at which the voltage between the terminals switches from positive to negative or from negative to positive. Wave rectifier circuit. A power factor correction circuit;
An inductor connected in series with the full-wave rectified output;
A fifth MOSFET having a drain and a source connected between the output of the inductor and ground;
A sixth MOSFET connected such that a terminal corresponding to the anode of the parasitic diode of the MOSFET connected in series with the output of the inductor becomes the output of the inductor;
The current detection circuit detects a current value between the ground of the power factor correction circuit and a terminal corresponding to the anode of the parasitic diodes of the second and fourth MOSFETs;
The forced cutoff circuit controls an output signal of the power factor correction circuit based on a detection result of the current detection circuit of the AC power supply, and when the current value is smaller than a predetermined value, at least first to first The power supply system including the full-wave rectifier circuit according to claim 1, wherein at least one of the fourth and sixth MOSFETs is turned off.

Images