JP2012054423A - Light-emitting diode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light-emitting diode capable of downsizing while ensuring sufficient amount of emitted light and capable of providing excellent productivity and yield.SOLUTION: A light-emitting diode 100 comprises a substrate 30, a metal wiring layer 31 disposed on the substrate 30, and semiconductor light-emitting elements 10 provided on the metal wiring layer 31. Each of the semiconductor light-emitting elements 10 comprises: a semiconductor light-emitting layer 6 that has a side length of 450 μm or more and includes a first semiconductor layer 5, an active layer 4, and a second semiconductor layer 3 that are stacked in this order from the substrate 30 side; a transparent insulating film 7 provided on the substrate 30 side of the semiconductor light-emitting layer 6; and a first electrode 16 and a second electrode 17 that are provided on the substrate 30 side of the transparent insulating film 7 via separation regions 18 and 19 and are electrically connected to the metal wiring layer 31. The first electrode 16 is electrically connected to the first semiconductor layer 5 by a first contact portion 12 provided through the transparent insulating film 7. The second electrode 17 is electrically connected to the second semiconductor layer 3 by a second contact portion 11 provided through the transparent insulating film 7, the first semiconductor layer 5, and the active layer 4.

Description

  The present invention relates to a light emitting diode, and more particularly to a light emitting diode having a structure in which two electrodes formed on a substrate side of a semiconductor light emitting element are connected to a wiring on the substrate.

  In recent years, a light-emitting diode (hereinafter referred to as an LED), which is a semiconductor light-emitting element, has achieved high light-electric conversion efficiency by improving crystal quality (see, for example, Patent Document 1). Since the luminous efficiency is high, the influence of heat generation is reduced, and it is possible to use it with a large current, the application to lighting light sources that require higher brightness than the LED for display is expanding. .

  In order to increase the output of the element, it is necessary to increase the size of the element and to ensure resistance to large input power. As an effective structure for increasing the output and efficiency of LEDs, there is a flip chip structure (see, for example, Patent Documents 2 and 3). In this structure, a predetermined semiconductor layer is grown on a transparent substrate, a first electrode and a second electrode for current injection are formed on the opposite side of the substrate, and the substrate side is used as a light extraction surface. In the LED of the flip chip structure, since the light from the light emitting part is emitted from the transparent substrate without being blocked, high light extraction efficiency can be realized.

JP 2009-200188 A JP 2008-78225 A JP 2009-88190 A

  However, for example, in flip-chip mounting using bumps as in Patent Document 2, in order to mount one LED, it is necessary to form a large number of bumps. However, it is difficult to align and join the LED mounting, and it is difficult to improve productivity and yield.

  In Patent Document 3, it is proposed that bumps are formed by a plating method. However, when bumps are formed by plating, an oxide film or impurities are formed on the surface of the plated bumps. In addition, a process of cleaning the surface of the bump, for example, a process of removing an oxide film or the like by plasma or ion beam treatment is required, resulting in an increase in the number of processes. There is also a problem of waste solution treatment of the plating solution.

  On the other hand, in an LED having an upper and lower electrode structure in which electrodes are provided above and below the semiconductor light emitting element, in the case of a large semiconductor light emitting element having a semiconductor light emitting element size of 450 μm to 500 μm, current diffusion is performed as the upper electrode on the surface of the semiconductor light emitting element It is necessary to provide a branch electrode. Compared to a small semiconductor light emitting device, the large semiconductor light emitting device is less affected by light blocking by the branch electrodes, but the area of the branch electrode on the surface increases as the light emitting device increases in size. Furthermore, the branch electrode needs to be formed thick so that it can withstand a large current, and this further blocks light extraction by the branch electrode.

  An object of the present invention is to provide a light-emitting diode using a large-sized semiconductor light-emitting element that has good heat dissipation and light-emitting characteristics and can realize high productivity and yield.

A first aspect of the present invention includes a substrate, a metal wiring layer disposed on the substrate, and a semiconductor light emitting element provided on the metal wiring layer.
The semiconductor light emitting element has one side of 450 μm or more,
In order from the substrate side, a semiconductor light emitting layer including a first semiconductor layer, an active layer, and a second semiconductor layer, a transparent insulating film provided on the substrate side of the semiconductor light emitting layer, and the substrate side of the transparent insulating film A first electrode part and a second electrode part that are electrically connected to the metal wiring layer.
The first electrode portion is electrically connected to the first semiconductor layer by a first contact hole provided through the transparent insulating film, and the second electrode portion includes the transparent insulating film and the first semiconductor. A light emitting diode electrically connected to the second semiconductor layer by a second contact portion provided through the layer and the active layer.

  According to a second aspect of the present invention, in the light emitting diode according to the first aspect, a plurality of the semiconductor light emitting elements are provided on the metal wiring layer.

  According to a third aspect of the present invention, in the light-emitting diode according to the first or second aspect, the first electrode portion and / or the second electrode portion includes a metal reflective layer.

  According to a fourth aspect of the present invention, in the light-emitting diode according to any one of the first to third aspects, an insulator is provided in the separation region between the first electrode portion and the second electrode portion. It has been.

  According to a fifth aspect of the present invention, in the light-emitting diode according to any one of the first to fourth aspects, the first electrode portion and the second electrode portion have a bonding layer, and the bonding layer is interposed therebetween. Bonded to the metal wiring layer.

  According to a sixth aspect of the present invention, in the light-emitting diode according to any one of the first to fifth aspects, the surface of the second semiconductor layer opposite to the active layer side is subjected to roughening light extraction. Surface.

  According to a seventh aspect of the present invention, in the light-emitting diode according to any one of the first to sixth aspects, the second contact hole portion is provided on the second electrode portion, and the first semiconductor layer and the active layer And an Au-based material provided so as to be covered with the insulating material.

  According to an eighth aspect of the present invention, in the light-emitting diode according to any one of the first to seventh aspects, the metal wiring layer is formed in a pattern in which a plurality of the semiconductor light-emitting elements are connected in series.

  According to a ninth aspect of the present invention, in the light-emitting diode according to any one of the first to eighth aspects, a light-transmitting conductive film is formed on the light extraction surface.

  According to the present invention, it is possible to obtain a light emitting diode using a large-sized semiconductor light emitting element, which has good heat dissipation and light emission characteristics and can realize high productivity and yield.

It is sectional drawing which shows the light emitting diode which concerns on one Embodiment of this invention. It is a figure which shows the connection relation of the some semiconductor light-emitting element in the light emitting diode of one Embodiment of this invention. It is sectional drawing which shows an example of the manufacturing process which manufactures the light emitting diode which concerns on one Embodiment of this invention. It is sectional drawing which shows an example of the manufacturing process which manufactures the light emitting diode which concerns on one Embodiment of this invention. It is sectional drawing which shows an example of the manufacturing process which manufactures the light emitting diode which concerns on one Embodiment of this invention. It is sectional drawing which shows an example of the manufacturing process which manufactures the light emitting diode which concerns on one Embodiment of this invention. It is a figure which shows the connection relation of the some semiconductor light-emitting element in the light emitting diode which concerns on other embodiment of this invention. It is sectional drawing which shows the light emitting diode which concerns on other embodiment of this invention. It is sectional drawing which shows the light emitting diode which concerns on other embodiment of this invention. It is sectional drawing to which some light extraction surfaces in the light emitting diode which concern on other embodiment of this invention were expanded. It is sectional drawing which shows the light emitting diode of the comparative example of a flip-chip structure. It is a graph which shows the relationship between element size and a light beam with respect to the Example and comparative example of this invention. It is a graph which shows the relationship between a forward current and a light beam with respect to the Example which has a semiconductor light emitting element from which element size differs. It is a histogram which shows the dispersion | variation in the light beam with respect to the Example and comparative example of this invention.

  Hereinafter, an embodiment of a light emitting diode according to the present invention will be described with reference to the drawings.

[First embodiment]
FIG. 1 shows a light emitting diode according to a first embodiment of the present invention.
The light emitting diode 100 of this embodiment includes a substrate 30, a metal wiring layer 31 disposed on the substrate 30, and a plurality of semiconductor light emitting elements 10 provided on the metal wiring layer 31.
The semiconductor light emitting element 10 includes, in order from the substrate 30 side, a semiconductor light emitting layer 6 including a first semiconductor layer 5, an active layer 4, and a second semiconductor layer 3, and a transparent insulating film provided on the substrate 30 side of the semiconductor light emitting layer 6. 7 and a first electrode portion 16 and a second electrode portion 17 provided on the substrate 30 side of the transparent insulating film 7 via a separation region 18.
The first electrode portion 16 and the second electrode portion 17 include a bonding layer 15 on the substrate 30 side, and the first electrode portion 16 and the second electrode portion 17 are joined to the metal wiring layer 31 by the bonding layer 15. . The first electrode portion 16 is electrically connected to the first semiconductor layer 5 by a first contact portion 12 provided through the transparent insulating film 7. The second electrode portion 17 is electrically connected to the second semiconductor layer 3 by a second contact portion 11 provided through the transparent insulating film 7, the first semiconductor layer 5, and the active layer 4.
In particular, the semiconductor light emitting element 10 is a large semiconductor light emitting element having an element size of 450 μm or more.

In the present embodiment, the first electrode portion 16 and the second electrode portion 17 are configured by sequentially laminating a metal reflection layer 13, a diffusion suppression layer 14, and a bonding layer 15 from the transparent insulating film 7 side. The metal wiring layer 31 is formed by sequentially laminating an adhesion layer 32 and a bonding metal layer 33 from the substrate 30 side.
The metal reflection layer 13 is a layer for reflecting the light emitted from the active layer 4 and coming to the transparent insulating film 7 side to the semiconductor light emitting layer 6 side to improve the light extraction efficiency. For example, a metal having high reflectivity, such as Au, Ag, Cu, Al, or an alloy containing at least one of these metals is used.
The diffusion suppression layer 14 suppresses the material constituting the bonding layer 15 and the like from the substrate 30 side of the metal reflection layer 13 from diffusing into the metal reflection layer 13 and suppresses the deterioration of the reflection characteristics of the metal reflection layer 13. For example, Ti, Pt or the like is used.

  The first electrode portion 16 and the second electrode portion 17 are bonded to the metal wiring layer 31 through the bonding layer 15. The bonding layer (joining metal layer) 15 of the first electrode part 16 and the second electrode part 17 and the joining metal layer 33 of the metal wiring layer 31 are joined by, for example, thermocompression bonding or eutectic bonding. The For example, Au or an Au eutectic alloy is used as the material for the bonding layer 15 and the bonding metal layer 33. A plurality of metal wirings positioned on substantially the same plane as the surface (bonding surface, bonding surface) of the bonding layer 15 of the plurality of first electrode portions 16 and second electrode portions 17 positioned on substantially the same plane. Flip chip mounting using bumps (see FIG. 11) because it is a surface bonding method (bonding method) in which the surface (bonding surface, bonding surface) of the metal layer 33 for bonding of the layer 31 is bonded by thermocompression bonding or the like. ), The joining becomes easier and the occurrence of poor joining can be suppressed.

  The surface of the second semiconductor layer 3 opposite to the active layer 4 side is a light extraction surface 3a that has been roughened. Since no electrode is formed on the light extraction surface 3a of the semiconductor light emitting device 10, the light extraction efficiency is high.

  In the present embodiment, the metal wiring layer 31 disposed on the substrate 30 is formed in a pattern in which a plurality of semiconductor light emitting elements 10 are connected in series as shown in FIG. That is, for example, in FIG. 2, among the three semiconductor light emitting elements 10 arranged in the left-right direction, a current flows from the semiconductor light emitting element 10 at the left end to the semiconductor light emitting element 10 at the right end through the central semiconductor light emitting element 10. . Specifically, the current supplied from the metal wiring layer 31 connected to the first electrode portion 16 of each semiconductor light emitting element 10 is supplied to the first semiconductor layer 5 through the first electrode portion 16 and the first contact portion 12. The semiconductor light emitting element 10 flows through the first semiconductor layer 5, the active layer 4, and the second semiconductor layer 3 from the second contact portion 11 to the second electrode portion 17, and from the second electrode portion 17 through the metal wiring layer 31. Flows to the first electrode portion 16 of the semiconductor light emitting element 10 adjacent to the right side of. The pattern of the metal wiring layer 31 on the substrate 30 can be changed not only in series connection but also in parallel connection, series and parallel connection by appropriately changing the electrode part / metal wiring layer structure of the semiconductor light emitting element 10. it can.

According to the light emitting diode 100 of the present embodiment, the first electrode portion 16 and the second electrode portion 17 of the semiconductor light emitting element 10 are bonded to the metal wiring layer 31 on the substrate 30 by a surface bonding method (bonding method). Therefore, there is no shadow electrode (shielding object) on the light extraction surface 3a side, and the light extraction efficiency is high. Moreover, even if it is the light emitting diode 100 which has the some semiconductor light-emitting device 10 by employ | adopting the structure which joins the 1st electrode part 16 and the 2nd electrode part 17, and the metal wiring layer 31 by the said surface bonding system, Occurrence of bonding failure can be suppressed, light emission unevenness can be suppressed, bonding can be facilitated, and productivity and yield of the light emitting diode can be improved. Further, since the surface bonding is performed, the heat generated in the semiconductor light emitting element 10 can be efficiently released from the first electrode portion 16 and the second electrode portion 17 to the substrate 30 side through the metal wiring layer 31, and the semiconductor light emitting device It is also possible to increase the amount of electricity to 10 and increase the luminance and light emission amount. Further, by providing a plurality of semiconductor light emitting elements 10 in series, the current value and the luminance can be easily adjusted.
As described above, the light-emitting diode of the present embodiment has good heat dissipation and light-emitting characteristics, can achieve high productivity and yield, and uses a large-sized semiconductor light-emitting element having an element size of 450 μm or more on one side. It is suitable for.

In general, a light emitting element having a size of 200 μm square to 300 μm square has a power consumption of several tens of mW, and heat generation of the light emitting element is unlikely to be a problem. However, if it becomes 450 μm square size or more, the power consumption exceeds 100 mW, and special mounting is required. Unless special mounting is performed, problems such as a decrease in light emission efficiency and a decrease in reliability occur due to heat generation. However, the light emitting diode of this embodiment can improve heat dissipation without special mounting.
It is suitable for a light emitting diode using a large semiconductor light emitting element having an element size of 450 μm or more on the side.

  Below, the light emitting diode of this embodiment is demonstrated in detail with the manufacturing process of the light emitting diode of this embodiment. 3 to 6 show an example of a manufacturing process for manufacturing the light emitting diode 100 according to this embodiment.

(Process for forming a metal wiring layer on a substrate)
The substrate (support substrate) 30 does not need transparency to light. For example, single crystal substrates such as sapphire, Si, GaN, AlN, ZnO, SiC, BN, ZnS, substrates made of ceramics such as Al ₂ O ₃ , AIN, BN, MgO, ZnO, SiC, C, and mixtures thereof. Can be used. In particular, the material of the substrate 30 is desirably a material having high resistance and high thermal conductivity.
As shown in FIG. 3A, the metal wiring layer 31 is preferably formed by sequentially forming an adhesion layer 32 and a bonding metal layer 33 on a substrate 30 and forming a wiring pattern by photolithography and etching. . The adhesion layer 32 is preferably formed of Ti or Pt with a thickness of 1 nm to 50 nm. As the bonding metal layer 33, Au, an Au eutectic alloy or the like is used, and 0.5.
It is good to form in thickness of micrometer-2.0micrometer.

(Epitaxial layer formation process on growth substrate)
When forming an AlGaInP-based epitaxial layer that is a III-V group compound semiconductor, the semiconductor light emitting device 10 is first formed as a growth substrate, for example, with a thickness of 300 μm and Si-doped n as shown in FIG. A GaInP etching stop layer 2 and a Si-doped n-type AlGaInP cladding layer 3 as a second semiconductor layer on the n-type GaAs substrate 1 by a MOVPE (metal organic chemical vapor deposition) method. An undoped AlGaInP active layer 4 formed including a quantum well structure as an active layer and an Mg-doped p-type AlGaInP cladding layer 5 as a first semiconductor layer are sequentially grown to form an epitaxial wafer. In addition to the above epitaxial layer, for example, a p-type contact layer made of p-type GaP or the like may be formed on the p-type AlGaInP cladding layer 5.
More specifically, in an AlGaInP-based semiconductor light emitting device that emits red light having a peak wavelength of around 630 nm, the active layer 4 is an undoped layer. It is formed with a quantum well structure. The emission wavelength can be controlled by the thickness of the well layer. The n-type cladding layer 3 includes an n-type dopant such as Si or Se at a predetermined concentration. As an example, the n-type cladding layer 3 is formed of an n-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P layer doped with Si. The p-type cladding layer 5 contains a p-type dopant such as Zn or Mg at a predetermined concentration. As an example, the p-type cladding layer 5 is formed of a p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P layer doped with Mg.

(Formation process of a 1st contact part and a 2nd contact part)
Next, as shown in FIG. 3C, a p-type AlGaInP cladding layer 5 and an AlGaInP active layer are formed to form an n-type contact portion 11 as a second contact portion by using a photolithography method and an etching method. 4 is formed, and for example, a SiO ₂ film 7 is formed as a transparent insulating film on the entire surface of the epitaxial wafer. As a material for the transparent insulating film, SiN or the like may be used in addition to SiO ₂ .
Further, holes 9 for forming a p-type contact portion 12 as a first contact portion are formed in the SiO ₂ film 7 which is a transparent insulating film. At this time, an insulating film for insulating the p-type cladding layer 5 and the active layer 4 is formed on the side surface of the hole 8 for the n-type contact portion 11.
The thickness of the epitaxial layer in which the hole 8 is formed is about 1 μm, whereas the diameter of the hole 8 is about 5 to 10 μm (the aspect ratio of the hole 8 is about 0.1 to 0.2). Therefore, the conductive layer forming the n-type contact portion 11, the p-type cladding layer 5, and the active layer 4 can be formed without forming an insulating film around the conductive layer such as a metal forming the n-type contact portion 11. It is possible to prevent a short circuit between them.

Next, the electrical connection to the n-type cladding layer 3 by the n-type contact portion 11 and the electrical connection to the p-type cladding layer 5 by the p-type contact portion 12 are as shown in FIG. This is done by providing Au-based metal in the holes 8 and 9. As an example, the n-type contact portion 11 is formed by laminating an AuGe layer (ohmic contact layer) / Ni layer (diffusion prevention layer) / Au layer (bonding layer) from the n-type cladding layer 3 side. As an example, the p-type contact portion 12 is formed by laminating an AuBe layer (ohmic contact layer) / Ni layer (diffusion prevention layer) / Au layer (bonding layer) from the p-type cladding layer 5 side.
The transparent insulating film 7, the n-type contact portion 11, and the p-type contact portion 12 form a current confinement structure. The n-type contact portion 11 and the p-type contact portion 12 may be formed in a plurality of dots as shown in FIG. 2, or may be continuously formed in a ring shape or a branch shape.

(Formation process of a 1st electrode part and a 2nd electrode part)
Next, on the transparent insulating film 7, the n-type contact part 11, and the p-type contact part 12, as shown in FIG. 4B, the p-side electrode part 16 and the second electrode part which are the first electrode parts. For example, a metal reflection layer 13 made of Au, a diffusion suppression layer 14 made of Ti, and a bonding metal layer 15 made of Au are formed by an evaporation method or the like as an electrode layer for constituting an n-side electrode portion 17. .
Further, on the transparent insulating film 7 of the epitaxial wafer, the metal reflection layer 13, the diffusion suppression layer 14, and the bonding metal layer are formed so that the region serving as the p-side electrode portion 16 and the region serving as the n-side electrode portion 17 do not conduct. 15, an electrode isolation groove 18 and an element isolation groove 19 are formed as separation regions. Thereby, the p-side electrode portion 16 and the n-side electrode portion 17 are formed separately.

Note that an insulator such as SiO ₂ may be provided in the electrode separation groove 18 which is a separation region between the p-side electrode portion 16 and the n-side electrode portion 17. When an insulator is provided in the electrode separation groove 18, the electrical insulation between the p-side electrode portion 16 and the n-side electrode portion 17 becomes more reliable. Similarly, an insulator may be provided in the element isolation groove 19. Further, an adhesion layer may be formed between the transparent insulating film 7 and the metal reflection layer 13. The adhesion layer is preferably a Ni layer, a Ti layer, or an Al layer, and the adhesion layer is preferably formed to a thickness of about 10 nm or less so as to reduce light absorption loss.
In addition, when a plurality of semiconductor light emitting elements 10 are provided in series as in the present embodiment, the element is formed so that the metal reflection layer 13, the diffusion suppression layer 14, and the bonding metal layer 15 between the adjacent semiconductor light emitting elements 10 are left. Separation can also be performed. By leaving the metal reflective layer 13 and the bonding metal layer 15 between the semiconductor light emitting elements 10, the conductivity and heat dissipation can be improved.

(Lamination process)
The substrate (support substrate) 30 on which the metal wiring layer 31 shown in FIG. 3A was formed, and the semiconductor light emitting element 10 having the p-side electrode portion 16 and the n-side electrode portion 17 shown in FIG. 4B were formed. The epitaxial wafer is bonded together as shown in FIG. 5A to produce a bonded wafer.
Specifically, using a bonding apparatus with an alignment function for a micromachine, the metal wiring layer 31 is aligned with the p-side electrode portion 16 and the n-side electrode portion 17 to bond the metal wiring layer 31. The metal layer 33 and the bonding metal layer 15 of the p-side electrode part 16 and the n-side electrode part 17 are brought into close contact and bonded together by thermocompression bonding. Specifically, the support substrate 30 and the epitaxial wafer are set in a bonding apparatus, respectively, heated to 350 ° C. and pressurized to be in a close contact state under high vacuum. After maintaining this state for 1 hour, the temperature is lowered to room temperature, the pressure is released, and the pressure is returned to atmospheric pressure, whereby a bonded wafer is obtained. The bonding of the substrate 30 and the epitaxial wafer may be performed by eutectic bonding or the like in addition to bonding by thermocompression bonding.

(Growth substrate removal, roughening process)
In order to remove the growth substrate 1 of the bonded wafer, the growth substrate 1 is bonded to a polishing plate so that the growth substrate 1 side of the bonded wafer is facing, and the growth substrate 1 is polished by lapping. Then, when the remaining thickness of the growth substrate 1 reaches a predetermined thickness, for example, 30 μm, the polishing is stopped, the bonded wafer is removed from the polishing plate, the wax for bonding is removed from the bonded wafer, and then completely etched. Then, the growth substrate 1 is removed. The removal of the growth substrate 1 is not limited to the method of combining lapping and etching as described above, but can be performed only by lapping or only by etching.
When a GaAs substrate is used as the growth substrate 1, a mixed solution of ammonia water and hydrogen peroxide water or the like can be used as an etching solution for GaAs. By forming the etching stop layer 2 at the interface with the growth substrate 1, the growth substrate 1 can be completely removed without requiring complicated management. After removing the GaAs substrate 1 as a growth substrate, the etching solution is changed and the etching stop layer 2 is removed (FIG. 5B). When the etching stop layer 2 is formed of GaInP, a hydrochloric acid-based etching solution may be used.

After removing the GaAs substrate 1 and the etching stop layer 2, the surface of the exposed n-type cladding layer 3 that becomes the light extraction surface 3a is roughened. For roughening, for example, as shown in FIG. 6A, concavity and convexity having an acute tip portion may be formed on the light extraction surface 3a by using a photolithography technique. Thereby, the light extraction efficiency to the outside of the semiconductor light emitting element 10 can be improved.
As shown in FIG. 10, an ITO (indium tin oxide) film, a metal thin film, or the like is formed on the roughened surface (light extraction surface) 3a of the n-type cladding layer 3 in order to improve current dispersion. It is preferable to form the conductive film 25 having such translucency. Further, by providing the light-transmitting conductive film 25, the roughened surface 3a is protected, and the outermost surface of the light extraction surface is a gentle wave-shaped curved surface. An improvement in efficiency can also be expected.

(Element isolation and dicing process)
Next, as shown in FIG. 6B, the semiconductor light emitting layer 6 and the transparent insulating film located above the element isolation trench 19 formed between the first electrode portion 16 and the second electrode portion 17. 7 is removed by a photolithography method and an etching method, and an element isolation groove 20 is formed to separate the plurality of semiconductor light emitting elements 10 having a predetermined size. When a pad electrode is formed on the metal wiring layer 31, the semiconductor light emitting layer 6 and the like in the region where the pad electrode is formed are also etched to expose the metal wiring layer 31.
After separating into each semiconductor light emitting element 10, a groove (not shown) for cutting is formed in the semiconductor light emitting layer 6 or the like in a predetermined shape by etching so as to become a light emitting diode having a predetermined number of semiconductor light emitting elements 10. Then, the substrate 30 or the like is cut by a dicing blade at the position of the cutting groove, and is cut into light-emitting diodes of a predetermined size. Note that a transparent insulating film having a low refractive index may be formed on the side surface of the semiconductor light emitting device 10 to protect the side surface of the semiconductor light emitting device 10 and improve the light extraction efficiency. For example, SiO ₂ or SiN is used for the transparent insulating film.
Thereafter, an adhesion layer 34 for die bonding is formed on the back surface of the substrate 30 so that the light emitting diode can be securely fixed when mounted on the stem or the like.

[Other Embodiments]
In the first embodiment, the light emitting diode 100 in which a plurality of semiconductor light emitting elements 10 are connected in series has been described. However, a plurality of semiconductor light emitting elements 10 are connected in parallel, or a combination of series and parallel is connected. You may do it. FIG. 7A shows an example of an electrode portion / wiring structure in which three semiconductor light emitting elements 10 are connected in parallel. FIG. 7B shows an electrode portion / wiring structure in which two semiconductor light emitting elements 10 connected in series on the right side and two semiconductor light emitting elements 10 connected in series on the left side are connected in parallel. An example of

  In the above embodiment, a light emitting diode in which a plurality of semiconductor light emitting elements 10 are connected in series or in parallel has been described. However, the light emitting diode of the present invention has one semiconductor light emitting element 10 on a substrate 30 as shown in FIG. Of course, a one-element type light emitting diode in which is formed may be used.

  Further, as shown in FIG. 9, a back contact portion 35 that is electrically connected to the metal wiring layer 31 by forming a through hole (through hole) in the substrate 30 and filling the through hole with a conductive material. May be formed. By employing the back contact portion 35, it is not necessary to provide a pad electrode region in the metal wiring layer 31, which contributes to downsizing of the light emitting diode. Further, in the structure having the back contact portion 35, the wire bonding step is not required, and the structure and connection of the electrode portion and the wiring can be further simplified.

Further, although the light emitting diode of the above embodiment has an AlGaInP semiconductor light emitting element formed on a substrate, it can also be applied to a light emitting diode in which a gallium nitride semiconductor light emitting element is formed. In this case, for example, sapphire is used as a growth substrate to form a gallium nitride based semiconductor light emitting layer.
In the above embodiment, the n-type and p-type conductivity types of the semiconductor light emitting layer 6 may be reversed.

  Next, examples of the present invention will be described.

Based on the structure of the light emitting diode according to the first embodiment of the present invention, a light emitting diode (LED) according to an example was manufactured.
The semiconductor light emitting device has an n-type cladding layer made of n-type AlGaInP, an active layer (light-emitting layer) made of a quantum well structure, and a p-type cladding layer made of p-type AlGaInP. It was formed from a SiO ₂ film. Further, the p-type contact portion was formed by providing an AuBe layer / Ni layer / Au layer from the p-type cladding layer side. The n-type contact flange was formed by providing an AuGe layer / Ni layer / Au layer from the n-type cladding layer side. In the n-type contact flange portion, an insulating film made of SiO ₂ was provided on the side surface side of the p-type cladding layer and the active layer to ensure insulation from the p-type cladding layer and the active layer. In the n-side electrode portion and the p-side electrode portion, an Au layer was used as the metal reflection layer, a Ti layer was used as the diffusion prevention layer (alloying suppression layer), and an Au layer was used as the bonding metal layer. An ITO film having a thickness of 0.1 μm was formed as a light-transmitting conductive film on the light extraction surface which is the surface of the roughened n-type cladding layer.
In addition, a high resistance insulating Si substrate having a thickness of 100 μm was used as a support substrate having a metal wiring layer bonded to the semiconductor light emitting device. A Ti layer was used as the adhesion layer of the metal wiring layer, and an Au layer was used as the bonding metal layer. An Au layer was formed on the back surface of the Si substrate as an adhesion layer for die bonding. In addition, LED of the Example was made into 1 element type LED with which one semiconductor light emitting element was formed on Si substrate.

In order to investigate the relationship between the element size of the semiconductor light emitting element and the light emission output, three types of LEDs (Examples 1 to 3) having different element sizes of the semiconductor light emitting element were produced. The element size of the semiconductor light emitting element of Example 1 is 500 μm × 500 μm in a top view, the element size of the semiconductor light emitting element of Example 2 is 1000 μm × 1000 μm, and the element size of the semiconductor light emitting element of Example 3 is 2000 μm. × 2000 μm.
Three types of LEDs (LED chips) having different element sizes of these semiconductor light emitting elements were die-bonded on a TO-46 metal stem with AuSn eutectic and wired with bonding wires. The reason why AuSn is used is that the thermal resistance of the die bonding is small and the heat from the light emitting layer is easily escaped. LED chips mounted on these stems were molded with a transparent epoxy resin to produce evaluation LEDs.

(Comparative example)
For comparison with the embodiment, as shown in FIG. 11, a semiconductor light emitting device having a flip chip structure in which bumps 213 are formed on two electrodes 211 and 212 provided on one side of a chip having an element size of 1000 μm square ( LED chip) 210 was used, semiconductor light emitting element 210 was mounted on metal wiring 214 on substrate 215 via bump 213, and a comparative LED was fabricated. The LED of this comparative example was mounted on a TO-46 metal stem in the same manner as in the example and molded with a transparent epoxy resin to produce a comparative evaluation LED.

  Evaluation of luminous flux / forward current characteristics was performed on the evaluation LEDs of the above examples and comparative examples. In this evaluation, an integrating sphere evaluation system was used, and the evaluation LED was fixed with a screw to a fixing jig whose temperature was controlled by a Peltier element.

FIG. 12 shows the results of evaluating the luminous flux / forward current characteristics of the LED of Example 2 and the LED of the comparative example.
Comparing the LED of Example 2 and the LED of the comparative example of the bump method, in the low current region where the forward current is about 400 mA, both have no upper electrode, so the absolute value of the luminous flux is high, and the luminous flux This indicates that the forward current relationship is linear and has the same characteristics with almost overlapping (in addition, in a conventional LED chip having an upper electrode on the light extraction surface of the light emitting element, the low current is low Since the light emission output (luminous flux) has already shown a low value from the current range and the heat escape is also poor, the forward current value at which the luminous flux is maximized is also about 700 mA, even compared with the comparative example of the bump method. Low value).

However, when the forward current exceeds 400 mA, a difference in luminous flux occurs between the two LEDs as shown in FIG. 12, and the difference in luminous flux increases as the current increases. Compared with the comparative example using the bump method, the luminous flux is clearly higher. The current value at which the luminous flux shows a peak is also higher for the LED of the example, and the peak value of the luminous flux is about 20% higher for the LED of the example.
This indicates that the heat release from the LED chip when a current is flowing is superior to the embodiment. Furthermore, when the active layer temperature was measured by the ΔVf method (junction temperature determination method using the temperature dependence of the forward voltage), the active layer temperature when the peak of the luminous flux was the same in both LED chips was the same. I confirmed that there was.

  FIG. 13 shows the measurement results of the luminous flux / forward current characteristics of the LEDs of Examples 1 to 3 having different element sizes. Table 1 shows the element size (μm) of Examples 1 to 3, the operating current (mA), the luminous flux (lm), and the operating voltage (V) at the time of measurement. Table 1 shows the luminous fluxes when the operating current was applied so that the current densities flowing in the semiconductor light emitting devices of Examples 1 to 3 were the same.

As shown in FIG. 13, it can be seen that as the element size increases, the region where the light flux and the current are linear also extends to the high current region, and the current value at which the light flux exhibits a peak also increases. Table 1 also shows that the LED chip of Example 3 having a 2000 μm square can obtain good light emission efficiency of 66.7 (lm / W) even when driven at a large current of 2 A.

  FIG. 14 shows a histogram of the light flux variation of the LED of Example 2 and the light flux variation of the LED of the comparative example of the bump system. FIG. 14 shows the result of the variation in luminous flux of LED chips in the Si wafer surface when a large number of LEDs (LED chips) are formed on the Si wafer surface. Compared with the LED of the structure of this embodiment, the LED of the comparative example of the bump method has a large variation in luminous flux, and the distribution spreads to low luminance, and LEDs with low luminance appear scattered scattered on the low luminance side. Yes. When a reliability test was performed on the low-luminance LED, it was confirmed that the lifetime was short. Furthermore, when the emission intensity distribution on the surface of the LED chip of the comparative example is measured, dark portions are confirmed at several locations of bump bonding, and defects are generated in the active layer where the bump bonding is not successful. I understood.

1 Growth substrate 3 Second semiconductor layer (n-type cladding layer)
3a Light extraction surface 4 Active layer 5 First semiconductor layer (p-type cladding layer)
6 Semiconductor light emitting layer 7 Transparent insulating film (SiO ₂ film)
10 Semiconductor Light Emitting Element 11 Second Contact Part (n-type Contact Part)
12 First contact part (p-type contact part)
13 Metal reflection layer 14 Diffusion prevention layer 15 Bonding layer (metal layer for bonding)
16 1st electrode part (p side electrode part)
17 2nd electrode part (n side electrode part)
18 Separation area (electrode separation groove)
19 Separation region (element isolation groove)
20 element isolation trench 25 translucent conductive film 30 substrate 31 metal wiring layer 33 bonding metal layer 35 back contact portion 100 light emitting diode

Claims (9)

A substrate,
A metal wiring layer disposed on the substrate;
A semiconductor light emitting device provided on the metal wiring layer,
The semiconductor light emitting element is
One side is 450 μm or more,
In order from the substrate side, a semiconductor light emitting layer including a first semiconductor layer, an active layer, and a second semiconductor layer;
A transparent insulating film provided on the substrate side of the semiconductor light emitting layer;
A first electrode portion and a second electrode portion that are provided on the substrate side of the transparent insulating film via a separation region and are electrically connected to the metal wiring layer;
The first electrode part is electrically connected to the first semiconductor layer by a first contact part provided through the transparent insulating film,
The second electrode part is electrically connected to the second semiconductor layer by a second contact part provided through the transparent insulating film, the first semiconductor layer, and the active layer.
A light emitting diode characterized by that.   The light emitting diode according to claim 1, wherein a plurality of the semiconductor light emitting elements are provided on the metal wiring layer.   The light emitting diode according to claim 1 or 2, wherein the first electrode part and / or the second electrode part includes a metal reflective layer.   The light emitting diode according to any one of claims 1 to 3, wherein an insulator is provided in the separation region between the first electrode portion and the second electrode portion.   The said 1st electrode part and the said 2nd electrode part have a bonding layer, and are joined to the said metal wiring layer via the said bonding layer. Light emitting diode.   6. The light emitting diode according to claim 1, wherein the surface of the second semiconductor layer opposite to the active layer is a light extraction surface subjected to a roughening process.   The second contact hole part is provided on the second electrode part, and is provided with an insulating material for insulating from the first semiconductor layer and the active layer, and an Au-based material provided so as to be covered with the insulating material. The light-emitting diode according to claim 1, wherein   The light emitting diode according to claim 1, wherein the metal wiring layer is formed in a pattern in which a plurality of the semiconductor light emitting elements are connected in series.   The light-emitting diode according to claim 6, wherein a translucent conductive film is formed on the light extraction surface.

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