JP2011096117A - Integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control the operating state of each function block contained in an integrated circuit device in a desirable state at the execution of software. <P>SOLUTION: An integrated circuit device 1 includes a plurality of function blocks 2, observation parts 3, and a counter 4. The power state of each function block 2 is controlled independently when the integrated circuit device 1 executes the software. The observation part 3 observes the operating state of each function block 2. The counter 4 collects information on the operating states of the respective function blocks 2 from the observation parts 3. A software developer acquires information on the operating states and power states of the respective function blocks 2 at the execution of the software from the counter 4. Based on the acquired information, a software developer can tune the software so as to reduce power consumption when the integrated circuit device 1 executes the software. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an integrated circuit device.

  2. Description of the Related Art Conventionally, a power consumption reduction system for an arithmetic device that can realize low power consumption is known. As one of such systems, for example, there is a system in which a clock control block supplies a gated clock to a function operation block of a function block and stops the gated clock for each function operation block. (For example, refer to Patent Document 1). There is also known a power control apparatus in which the user can finely define the low power consumption operation of the processor and realizes an event driven system. As one of such devices, for example, a power table having a plurality of power control registers for storing each power control information in a rewritable manner and a plurality of operating conditions (for example, a comparison address for a program counter) can be rewritten. To determine which of the plurality of operating conditions the current operation of the processor satisfies and to supply an index signal to select one of the plurality of power control registers according to the result of the determination And a voltage / clock controller for controlling the power consumption of the circuit block to be controlled in accordance with the power control information in the power control register selected by the index signal (see, for example, Patent Document 2) .) There is also known a software development support device having a function of predicting power consumption based on the actual usage state of a microcomputer. In one such device, for example, an emulator that provides a debug environment is connected to a microcontroller system that includes a microcontroller unit (MCU) and controls the execution of programs. During execution of the program, the logging unit sequentially records the operation start time and operation end time of the main functions (CPU high-speed operation mode, etc.) of the MCU. In the power consumption data table, power consumption data of the function to be logged is stored in advance. After the operation of the microcontroller system is completed, the calculation unit obtains the accumulated time during which each function has been operated based on the logging data, and obtains the power consumption of the MCU by multiplying with the power consumption data of each function (for example, Patent Document 3). reference.).

JP 2004-70737 A JP 2002-182807 A JP 11-338744 A

  However, in the conventional technology, it is difficult to grasp the operation of the integrated circuit device when the software is executed in the integrated circuit device for each functional block included in the integrated circuit device in the software development stage. Therefore, it is difficult to control the operation state of each functional block included in the integrated circuit device to a preferable state when executing software.

  An object of the present invention is to provide an integrated circuit device capable of controlling the operation state of each functional block included in the integrated circuit device to a preferable state when executing software.

  This integrated circuit device includes a plurality of functional blocks, an observation unit, and a counter unit. Each functional block is independently controlled in power state. The observation unit observes the operating state of each functional block. The counter unit collects information on the operation state of each functional block from the observation unit.

  According to this integrated circuit device, it is possible to control the operation state of each functional block included in the integrated circuit device to a preferable state when executing software.

1 is a block diagram illustrating an integrated circuit device according to Embodiment 1. FIG. FIG. 6 is a block diagram illustrating an integrated circuit device according to a second embodiment. FIG. 6 is a block diagram illustrating an observation unit according to a second embodiment. FIG. 10 is a block diagram illustrating an example of functional blocks according to a second embodiment. It is explanatory drawing which shows an example of the finite state transition machine concerning Example 2. FIG. It is explanatory drawing which shows an example of the relationship between the state of the finite state transition machine concerning Example 2, and the operation state of a functional block. 12 is a time chart illustrating an example of an operation transition with respect to a command movement according to the second embodiment; FIG. 10 is a block diagram illustrating an example of a counter unit according to the second embodiment. 12 is a flowchart illustrating an example of a software modification procedure using the integrated circuit device according to the second embodiment. 12 is a flowchart illustrating an example of an algorithm of software to be modified according to a second embodiment. It is explanatory drawing which shows an example of the operation information concerning Example 2. It is explanatory drawing which shows an example of the electric power state concerning Example 2. FIG.

  Hereinafter, preferred embodiments of the integrated circuit device will be described in detail with reference to the accompanying drawings.

Example 1
FIG. 1 is a block diagram of an integrated circuit device according to the first embodiment. As shown in FIG. 1, the integrated circuit device 1 includes a plurality of function blocks 2, an observation unit 3, and a counter unit 4, for example, A to F. Each functional block 2 is independently controlled in power state when the integrated circuit device 1 executes software. The observation unit 3 observes the operation state of each functional block 2. The counter unit 4 collects information on the operation state of each functional block 2 from the observation unit 3. In the example shown in FIG. 1, the observation unit 3 is provided for each functional block 2, but one observation unit 3 may be provided in common for two or more functional blocks 2. In FIG. 1, the connection relationship between the observation unit 3 and the counter unit 4 is indicated by a solid line (the same applies to FIG. 2). The connection relationship between the functional blocks 2 and the connection relationship between the functional block 2 and the outside of the integrated circuit device 1 are indicated by broken lines (the same applies to FIG. 2).

  According to the first embodiment, when the software is executed in the integrated circuit device 1, the operation state of each functional block 2 is collected in the counter unit 4. Therefore, by referring to the counter unit 4, information on the operation state of each functional block 2 when the integrated circuit device 1 executes software is obtained. For example, when software under development is executed in the integrated circuit device 1 in the software development stage, information on the operation state of each functional block 2 is obtained. The information may include information that, for example, when a certain process is performed, a certain functional block is not operating in spite of being in a low power state. Software developers can obtain such information and modify the software based on the information. For example, the software developer can insert a code indicating the power state into the software under development so that the power state of each functional block is suitable for the operation state of the functional block for each process. . Therefore, the software developer can finally control the power state of each functional block 2 to a preferable state suitable for the operation state by executing the software under development using the integrated circuit device 1. Software can be developed. If the information about the operating status of each functional block is not available at the development stage, the software developer does not have information to control the power status of each functional block, so it is suitable for the operating status of each functional block. It is difficult to develop software with a high power state. According to the first embodiment, it is possible to develop software in a power state suitable for the operation state of each functional block. By executing the software thus developed on a general-purpose processor or a processor for an embedded device, the power consumption of the general-purpose processor or the processor for an embedded device can be reduced.

(Example 2)
FIG. 2 is a block diagram of an integrated circuit device according to the second embodiment. As shown in FIG. 2, the integrated circuit device 11 includes, for example, a plurality of functional blocks 12 of A to E, an observation unit 13, a counter unit 14, and a control unit (CPU: Central Processing Unit) 15. The control unit 15 is a kind of functional block. The control unit 15 controls the counter unit 14 to start and stop counting. The control unit 15 controls the counter unit 14 to read the count value. The integrated circuit device 11 includes an input / output interface (IO) with the outside as a kind of functional block. For example, the observation unit 16 is also provided in the input / output interface.

  The functional block 12, the control unit 15, and the input / output interface are units whose power state is controlled by software executed by the CPU. That is, the power state is controlled for each functional block 12, the control unit 15, and each input / output interface. For example, a clock gating technique, a power gating technique, and a DVFS (Dynamic Voltage and Frequency Scaling) technique are applied to each functional block 12, the control unit 15, and each input / output interface. The rest of the function block 12, the control unit 15 as the function block, the observation units 13 and 16, and the counter unit 14 are the same as in the first embodiment.

  FIG. 3 is a block diagram of an observation unit according to the second embodiment. As shown in FIG. 3, the observation unit 13 includes an analysis unit 21 and a detection unit 22. The analysis unit 21 analyzes a state of a finite state machine (FSM) 23 of the functional block 12. The analysis unit 21 outputs the state of the finite state transition machine 23 as the operation state of the functional block 12. The detection unit 22 detects the power state of the functional block 12 when the integrated circuit device 11 is executing software. The detection unit 22 outputs the power state of the functional block 12 as the low power mode. The same applies to the observation unit 16 of the input / output interface.

  FIG. 4 is a block diagram of an example of functional blocks according to the second embodiment. An example of a functional block is a bus bridge unit. FIG. 4 shows an example in which the functional block is a bus bridge unit. The bus bridge unit 31 mediates (bridges) the bus between the module G32 and the module H33. As shown in FIG. 4, for example, the bus bridge unit 31 receives a data read request from the module G32 and passes the data read request to the module H33. For example, the bus bridge unit 31 receives a data return from the module H33 and returns the data to the module G32.

  FIG. 5 is an explanatory diagram of an example of the finite state transition machine according to the second embodiment. As shown in FIG. 5, for example, in the case of the bus bridge unit 31, the state of the finite state transition machine 23 includes idle (Idle), command (Command), wait (Wait), and data (Data) states.

  FIG. 6 is an explanatory diagram of an example of the relationship between the state of the finite state transition machine and the operation state of the functional block according to the second embodiment. As shown in a chart 41 of FIG. 6, for example, in the case of the bus bridge unit 31, the finite state transition machine 23 is in an idle state when the bus bridge unit 31 is in an idle state. When the bus bridge unit 31 is in an operating state, the finite state transition machine 23 is in a command, wait, or data state. In other words, when the finite state transition machine 23 is in a command, wait, or data state, the bus bridge unit 31 is operating.

  FIG. 7 is a time chart illustrating an example of a transition of an operation with respect to a command movement according to the second embodiment. FIG. 7 shows, as an example, a time chart 42 when the module G32 reads data from the module H33 in the configuration shown in FIG. As shown in FIG. 7, the finite state machine 23 is in an idle state until there is a read request from the module G32. In this state, the bus bridge unit 31 is in an idle state. When the bus bridge unit 31 receives a read request from the module G32, the finite state transition machine 23 enters a command state. The bus bridge unit 31 is in operation. When the bus bridge unit 31 passes a read request to the module H33, the finite state transition machine 23 enters a wait state. The bus bridge unit 31 remains in operation. When the bus bridge unit 31 receives the return of data from the module H33, the finite state transition machine 23 enters the data state. The bus bridge unit 31 remains in operation. When the bus bridge unit 31 returns data to the module G32, the finite state transition machine 23 enters an idle state. The bus bridge unit 31 is in an idle state. Note that the state type and the event of the state transition of the finite state transition machine 23 are not limited to the examples illustrated in FIGS.

  FIG. 8 is a block diagram of an example of the counter unit according to the second embodiment. As illustrated in FIG. 8, the counter unit 14 includes a counter 51 and a power mode storage unit 52. The counter 51 and the power mode storage unit 52 are provided for each of the observation units 13 and 16, that is, for each functional block to be observed. The counter 51 counts the operation amount of the functional block during execution of software. The counter 51 starts and stops counting under the control of the control unit 15. Reading of the count value of the counter 51 is controlled by the control unit 15. The counter 51 outputs a count value under the control of the control unit 15. The power mode storage unit 52 stores the power state of the function block being executed by the software. The power mode storage unit 52 outputs the stored power state under the control of the control unit 15.

  As an application example of the integrated circuit device 11 according to the second embodiment, for example, a device that executes original software in a software development stage can be cited. By causing the integrated circuit device 11 to execute the original software, the operation state and the power state of each functional block 12, the control unit 15 and the input / output interface of the integrated circuit device 11 when the integrated circuit device 11 executes the software. Information is obtained. Based on the obtained information, the software developer can change the original software into a low-power version of the software. The original software is not sufficiently low power. The software modification procedure will be described below.

  FIG. 9 is a flowchart of an example of a software modification procedure using the integrated circuit device according to the second embodiment. As shown in FIG. 9, first, a software developer prepares original software 61. Then, the software developer embeds the measurement point in the original software 61 (step S1). The software developer may set a measurement point for each meaningful unit in software. An example of a meaningful unit in software is a function delimiter. For example, a software developer embeds a code for starting and stopping a count of each counter 51 at the start time and end time of a meaningful unit in software. In this way, measurement software 62 in which measurement points are embedded in original software 61 is obtained.

  Next, the software developer executes the measurement software 62 in the integrated circuit device 11 according to the second embodiment. Thereby, each counter 51 starts counting at the start time of the measurement point, and stops counting at the end time of the measurement point. Then, information on the operation state and power state of each functional block 12, the control unit 15, and each input / output interface at the measurement point is obtained (step S2). When a plurality of measurement points are set, the process returns to step S1 and another measurement point is embedded in the original software 61. Then, by executing the measurement software 62, information on the operation state and power state of each functional block 12, the control unit 15, and each input / output interface at the other measurement point is obtained.

  By repeating Step S1 and Step S2 for all measurement points, the operation information 63 of each functional block is obtained. The operation information 63 of each function block includes information on the operation state and power state of each function block 12, the control unit 15, and each input / output interface for all measurement points. Based on the operation information 63 of each functional block, the software developer can change the power state of which functional block 12, the control unit 15, and the input / output interface at which measurement point of the original software 61 Can be judged. Therefore, the software developer performs a process of inserting a program code for controlling the power state into an appropriate portion of the original software 61 based on the determination result, and modifies the software (step S3). As a result, a low-power version of software 64 that consumes less power than the original software 61 is obtained.

  FIG. 10 is a flowchart of an example of the algorithm of the software to be modified according to the second embodiment. As shown in FIG. 10, in this algorithm example, for example, after the input process from the user (step S11), the process 1 (step S12), the process 2 (step S13), the process 3 (step S14), and the process 4 ( Step S15) is performed sequentially. Finally, input / output processing (IO processing) (step S16) is performed, and the process returns to step S11. In the measurement software 62, for each of the processing 1, processing 2, processing 3 and processing 4, a count start instruction 71 is embedded at the beginning of the processing and a count stop instruction 72 is embedded at the end of the processing. For example, in processing 1 to processing 4, moving image data is processed. As an example of the processing of the moving image data, for example, a process of expanding and displaying the compressed image data can be given.

  FIG. 11 is an explanatory diagram of an example of operation information according to the second embodiment. FIG. 12 is an explanatory diagram of an example of a power state according to the second embodiment. For example, assume that the result shown in the chart 81 of FIG. 11 is obtained as a result of executing the software shown in FIG. 10 on the integrated circuit device 11 according to the second embodiment. In the chart 81 of FIG. 11, a field “measurement target time” is provided. The measurement target time in each process is measured by, for example, a clock function or a timer function (not shown) of the integrated circuit device 11. An example of the relationship between the power mode and the specific operation state in the chart 81 of FIG. 11 is shown in the chart 82 of FIG. Mode 1 is a deep low power state that is power gated. Mode 2 is a slightly deep low-power state in which the voltage and frequency are reduced by DVFS. Mode 3 is a shallow low power state with the clock stopped. Mode 4 is a full speed state. The deeper the low power state, the lower the power consumption, and the shallower the low power state, the more power consumption.

  As shown in FIG. 11, the count value of function A is 0 in process 4. Therefore, in the process 4, the function A does not perform any process. Nevertheless, in process 4, function A is not in a low power state. Therefore, the software developer can determine that the function A should be set to a deep low power state such as power gating in the process 4 based on the chart 81 of FIG. Since function A is performing heavy processing in process 3, it can be seen that, for example, function A should be set to mode 4 in process 3 and transition to mode 1 immediately before execution of process 4. Further, in the processing 3 and the processing 4, the function B performs a light processing. Nevertheless, in process 3 and process 4, function B is not in a low power state. Therefore, the software developer can determine based on the chart 81 of FIG. 11 that the function B should be in a slightly deep low-power state such as a reduction in operating frequency in the processing 3 and the processing 4. Since the function B is a somewhat heavy process in the process 2, it can be seen that, for example, the function B is set to the mode 3 in the process 2 and the mode 2 is changed to just before the process 3 is executed.

  According to the second embodiment, the same effect as the first embodiment can be obtained. In addition, since information on the measurement target time is obtained for each measurement point, the following effects can be obtained. For example, it is assumed that it is preferable to reset the power state of a certain functional block in a certain process to a deeper low power state, and that the time required for the process is short from the measurement target time information. In this case, the transition to and return from the deep low-power state takes time, so software developers can set the deep low-power state to avoid degrading the performance of the integrated circuit device. It can be determined that it is preferable not to rework. In the first and second embodiments, the present invention can also be applied to an apparatus in which each functional block and control unit is an independent semiconductor chip and the semiconductor chip is mounted on a circuit board.

DESCRIPTION OF SYMBOLS 1,11 Integrated circuit device 2,12 Functional block 3,13,16 Observation part 4,14 Counter part 15 Control part 21 Analysis part 22 Detection part 23 Finite state transition machine

Claims (5)

A plurality of functional blocks whose power states are controlled independently;
An observation unit for observing the operation state of each functional block;
A counter unit for aggregating information on the operating state of each functional block from the observation unit;
An integrated circuit device comprising:   The integrated circuit device according to claim 1, wherein the observation unit includes an analysis unit that analyzes a state of the finite state transition machine of each functional block.   The integrated circuit device according to claim 2, wherein the observation unit includes a detection unit that detects a power state of each functional block during execution of software.   The integrated circuit device according to claim 1, wherein the counter unit counts an operation amount of each functional block during execution of software.   5. The integrated circuit device according to claim 4, further comprising a control unit that controls start and stop of counting and reading of the count value with respect to the counter unit.

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