JP5353227B2 - Information processing apparatus having performance measurement program, performance measurement method, and performance measurement function. - Google Patents

Description

  The present invention relates to a technique for measuring the performance of a virtual machine system.

  In recent years, virtual computer systems have come to be widely used in the field of personal computers and servers using microprocessors due to higher performance of hardware and the development of hypervisors. The virtual computer system is a system in which a plurality of virtually different computer environments are provided by simultaneously operating a plurality of identical or different OSs on a single physical machine.

  FIG. 8 is a system configuration diagram illustrating a configuration example of a virtual machine system. The virtual computer system 101 includes a hardware layer 110 including a CPU 111, a memory 112, and an I / O device 113, a hypervisor layer 120 that controls the hardware layer 110 and adjusts between each virtual machine, and a hypervisor layer 120. It is common to include a virtual machine layer 130 operating on the above.

  The virtual machine system 101 is a system in which a plurality of virtual machines 131, 132, 133 share hardware resources. The hypervisor 121 is virtualization software that controls the guest OS of the plurality of virtual machines 131, 132, and 133.

  Each virtual machine 131, 132, 133 constituting the virtual machine layer 130 includes a guest OS 141, 142, 143 and an application, respectively. The guest OS corresponding to each virtual machine is not limited to the same OS, but may be the same type of OS with different versions, or may be a different type of OS such as Linux and Windows (registered trademark).

  CPUs with a performance monitoring mechanism are commercially available for performance analysis and optimization of computer systems. For example, Intel Xeon (registered trademark) processor, AMD Opteron (registered trademark) processor, or IBM PowerPC (registered trademark) processor, etc., the number of execution clocks, number of executed instructions, number of cache misses, etc. And a function for measuring an event of exchange with the outside.

  A CPU having a performance monitoring mechanism has a plurality of counters and a setting register for selecting and setting an event measured by each counter from various events. In addition, a CPU equipped with a performance monitoring mechanism has a function to generate an interrupt to a specific vector or a specified vector when a specified event is detected, and it is possible to collect accompanying information when the event occurs. Yes.

  A general performance analysis method using a performance monitoring mechanism is a method of reading the counter value at the start and end of the program to be monitored and obtaining the number of events during execution of the target program from the difference in the counter value. .

  Next, with reference to FIG. 9, consider performing performance measurement for each virtual machine in the virtual machine system. In a virtual machine system, when an execution right assigned to a virtual machine ends for a certain period of time or when the process is suspended or abandoned, the execution right is changed from a virtual machine that has been executed until now to another virtual machine that is in an executable state. The hypervisor performs switching control to move Accordingly, the execution time of a different virtual machine B is included between the start and end of execution of the measurement target program in the virtual machine A.

  For this reason, even if the value of the performance monitoring counter is read at the start and end of the program executed as the virtual machine A, and the number of events is obtained from the difference, the value is executed by the same CPU. The number of events by another virtual machine B is included. This is because the performance monitoring mechanism built in the microprocessor is shared among a plurality of virtual machines, and there is no means for the virtual machine to recognize when the hypervisor switches execution of each virtual machine.

  In a virtual machine system using a microprocessor equipped with such a performance monitoring mechanism, if you want to measure the performance of each virtual machine, modify the hypervisor to control the performance monitoring mechanism and collect performance information. Need to add.

  However, when using virtualization products such as VMware's VMware Infrastructure and Microsoft's Hyper-V, it is practically impossible to modify the hypervisor because the source code is not provided.

Further, as a conventional technique related to performance measurement of a virtual machine system, a technique for efficiently collecting performance information by adding a mechanism for supporting a virtual machine to CPU hardware is known. According to this technique, a plurality of counters for counting performance indexes, a means for identifying an operating virtual machine, and a switching means for switching whether or not the counting operation is allowed for each counter corresponding to the operating virtual machine are provided. During the operation of the virtual machine system, only the counters that are allowed to count can count the performance index, and the counters that are not allowed can hold the count results, so that the count value of the performance index for each virtual machine is obtained. It is done.
VMware Infrastructure (searched July 31, 2008, URL1: http://www.vmware.com/jp/products/vi) Hyper-V: Major functions of Windows Server2008 (searched July 31, 2008, URL2: http://www.microsoft.com/japan/windowsserver2008/virtualization/default.mspx) JP 2008-129931 A Japanese Patent Publication No. 8-33851

  However, the techniques described in Patent Documents 1 and 2 detect switching of a virtual machine inside a processor by dedicated hardware and switch a plurality of counters. Therefore, in a virtual machine system using an off-the-shelf microprocessor, there is a problem that it cannot be applied to a performance monitor for each virtual machine.

  In view of the above problems, the object of the present invention is to execute on a virtual machine in a virtual computer system using an off-the-shelf microprocessor equipped with a performance monitoring mechanism without changing the hardware including the CPU and the hypervisor. It is to provide a technique capable of efficiently collecting highly accurate operation information of a program to be executed.

The disclosed technology is an information processing apparatus having a performance measurement function for measuring the performance of a virtual machine operating on a physical machine including a CPU and a memory having a performance monitoring mechanism having a performance monitoring counter, and should be counted. means for counting the selected events specified in the performance monitoring counter events, means for generating said interrupt switching destination virtual machine for performance monitoring in front Symbol performance monitoring mechanism when switching of the virtual machine When, and means for recording the time information of the time the interrupt handler of the virtual machines before Symbol interrupt has occurred read the performance monitoring counter value of the performance monitoring counter to memory.

  According to the disclosed technology, in a virtual computer system using an off-the-shelf microprocessor equipped with a performance monitoring counter without using dedicated hardware for detecting the switching of the virtual machine, the program executed on the virtual machine is high. Accurate operation information can be collected and analyzed efficiently.

  Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a system configuration diagram of a virtual computer system according to an embodiment of the present invention in which a performance measurement program operates.

  In FIG. 1, the virtual machine system 1 includes a hardware layer 11, a hypervisor layer 12, and a virtual machine layer 13. The hardware layer 11 includes a CPU 111 having a performance monitoring mechanism 111a, a memory 112, and an I / O device 113.

  The CPU 111 is a commercially available microprocessor, and includes a performance monitoring mechanism 111a such as an Intel Xeon (registered trademark) processor, an AMD Opteron (registered trademark) processor, or an IBM PowerPC (registered trademark) processor. Processor.

  The performance monitoring mechanism 111a has a plurality of pairs of a counter that counts a designated event and a setting register that is arranged for each counter and selects and sets an event measured by the counter from various events. In addition, the setting register specifies the interrupt frequency setting section that specifies how many times a set event occurs, and whether to generate this interrupt (ON) or not (OFF). An interrupt on / off setting unit is provided.

  As a result, the CPU 111 having the performance monitoring mechanism 111a realizes a function of generating an interrupt to a specific vector or a specified vector when a specified event is detected, and collects accompanying information at the time of the event occurrence. It is possible.

  The hypervisor layer 12 includes a hypervisor 121 that is virtualization software. The hypervisor 121 is virtualization software that operates on the hardware layer 11 to control the hardware layer 11 and controls the guest OSes 31 to 33 of the virtual machine layer 13. The hypervisor 121 has a scheduling function that assigns the execution right of the CPU 111 in the hardware layer to each virtual machine, which will be described later, and a memory management function that assigns the machine address space of the memory 112 to each virtual machine.

  Furthermore, the hypervisor 121 has a function of performing a performance monitoring interrupt that is a software interrupt to a virtual machine that is being executed, which will be described later, based on a performance monitoring mechanism interrupt that is a hardware interrupt generated by the performance monitoring mechanism 111a.

  The virtual machine layer 13 includes virtual machines 21, 22 and 23. The number of virtual machines depends on the capabilities of the hardware layer 11 and, in some cases, the hypervisor layer 21, and is not limited to three as shown in FIG.

  The virtual machines 21, 22, and 23 are provided with corresponding guest OSes 31, 32, and 33, respectively. The hypervisor 121 selects one of the guest OSs 31, 32, and 33, and assigns the execution right of the CPU 111 for a predetermined time to the selected guest OS. Here, assuming that the selected guest OS is the guest OS 32, the guest OS 32 to which the execution right of the CPU 111 is assigned uses the memory 112 assigned by the hypervisor 121, and the guest OS 32 itself and an application (not shown) under the guest OS 32 itself. Execute. The hypervisor 121 picks up the execution right of the CPU 111 from the guest OS 32 when the predetermined time when the execution right is assigned to the guest OS 32 elapses or when the execution cannot be continued due to waiting for input / output or occurrence of an exception. The virtual machine is switched by selecting another guest OS and assigning the execution right of the CPU 111 thereto.

  The guest OSs 31, 32, and 33 include interrupt handlers 31a, 32a, and 33a that process performance monitoring interrupts that are software interrupts from the performance monitoring mechanism 111a via the hypervisor 121, respectively.

  The operation of these interrupt handlers 31a, 32a, 33a is as follows. First, in S101, when the execution right for a certain period of time assigned to the running virtual machine is completed, or when the running virtual machine interrupts / discards the process, the hypervisor 121 switches the virtual machine. Take control. In step S102, the performance monitoring mechanism 111a detects an event that occurs when the virtual machine is switched, and causes the hypervisor 121 to generate a performance monitoring mechanism interrupt that is a hardware interrupt. Next, in S103, the hypervisor 121 raises a performance monitoring interrupt, which is a software interrupt, to the interrupt handler 31a of the guest OS 31 of the virtual machine 21 to be switched, so that the guest OS 31 detects virtual machine switching. The interrupt handler 31a reads the performance monitoring counter value stored in the performance monitoring mechanism 111a and records it in the memory 112, and also records in the memory 112 the time information of the clock level at the time when the performance monitoring counter value is read. .

  The performance monitoring mechanism 111a and the interrupt handlers 31a, 32a, 33a included in the guest OSs 31, 32, 33 provide the memory 112 with the performance monitoring counter value and the time information at which the value is read every time the virtual machine is switched. To be recorded.

  Next, with reference to the virtual machine switching term chart of FIG. 2, how to use the performance monitoring counter value read for each virtual machine switching and the time information for reading the value will be described. For example, consider that a performance data collection program operating on the virtual machine A counts the number of events of a certain event with a performance monitoring counter (hereinafter abbreviated as PMC (Perfomance Monitoring Counter)). Here, it is assumed that the virtual machine A and the virtual machine B are executed in a time division manner.

  For performance measurement, a performance data collection program is executed on the virtual machine A, and the number of occurrences of an event that occurs from the start to the end of execution of the performance data collection program is obtained.

  The event count value of PMC at the start time ta of the performance data collection program is Na. Next, it is assumed that switching from the virtual machine A to the virtual machine B occurs at time tb. At this time, a performance monitoring mechanism interrupt is generated from the PMC to the hypervisor by switching the virtual machine, and the hypervisor issues a performance monitoring interrupt that is a software interrupt to the virtual machine B to be switched. The interrupt handler of the virtual machine B records the PMC value Nb and time information at time tb in the memory.

  Next, assume that switching from the virtual machine B to the virtual machine A occurs at time tc. At this time as well, an interruption occurs in the virtual machine A, and the virtual machine A records the PMC value Nc and time information at time tc in the memory. Next, switching from the virtual machine A to the virtual machine B occurs at time td, and the PMC value at this time is set to Nd. Next, it is assumed that switching from the virtual machine B to the virtual machine A occurs at time te. At this time, an interruption occurs in the virtual machine A, and the virtual machine A records the PMC value Ne and the time information at this time in the memory. Finally, the performance data collection program is terminated at time tf, and the PMC value at this time is set to Nf.

  As a result of executing the performance data collection program, the PMC value and the time information at which the PMC value is acquired are recorded in the memory every time the virtual machine is switched. Therefore, the event occurrence count during the execution of the performance data collection program by the virtual machine A is the value of the number of events from which the influence of the virtual machine B is removed by Nf−Na − ((Nc−Nb) + (Ne−Nd)). Can be calculated.

  Next, with reference to FIG. 3 to FIG. 7, a virtual computer system including an embodiment of the performance measurement program according to the present invention will be described in detail. FIG. 3 is a diagram showing a flow of performance measurement on a system diagram showing a configuration example of the virtual machine system 1. FIG. 4 is a diagram for explaining a setting example of the performance monitoring counter. FIG. 5 is a flowchart of the performance information collection control / aggregation program. FIG. 6 is a flowchart of the performance data collection program. FIG. 7 is a flowchart of the guest OS PMC interrupt handler.

  3, the virtual machine system 1 includes a CPU 111, a memory 112, a hypervisor 121, virtual machines 21, 22,..., 2N, and a control machine 41.

  The CPU 111 is an off-the-shelf microprocessor incorporating a performance monitoring mechanism 111a such as an Intel Xeon processor, an AMD Opteron processor, or an IBM PowerPC processor. It does not have special hardware for performance monitoring.

  The performance monitoring mechanism 111a includes a plurality of performance monitoring counters (PMC), and can generate a PMC interrupt from the PMC when an event to be measured is detected.

  The hypervisor 121 is control software that performs control of hardware such as the CPU 111 and the memory 112 and adjustment between the virtual machines. The hypervisor 121 is provided with an interrupt table 121a for accepting interrupts from hardware including PMC interrupts and transferring the processing to the interrupt handler. The interrupt table 121a holds, for each number, called a vector for identifying an interrupt, for example, a segment address of a segment storing a handler and an offset (intra-segment address) to the first instruction of the handler as an entry. ing.

  The hypervisor 121 is a virtualized product such as VMware Infrastructure (Non-patent Document 1) of VMware or Hyper-V (Non-patent Document 2) of Microsoft, and is modified for performance monitoring of virtual machines. It is not. Therefore, it is possible to use a hypervisor whose source code is not disclosed.

  The guest OS 31 of the virtual machine 21 includes an interrupt handler 31a and a performance data collection program 31b as performance measurement programs according to an embodiment of the present invention. The interrupt handler 31a and the performance data collection program 31b are provided in each of the virtual machines 21, 22, ..., 2N. The interrupt handler 31a is registered in the interrupt table 121a of the hypervisor 121 and processes interrupts by the performance monitoring mechanism 111a. In other words, the segment and offset of the interrupt handler 31a of the operating virtual machine are stored in the entry of the interrupt table 121a corresponding to the interrupt vector of the PMC interrupt.

  The performance data collection program 31b registers the interrupt handler 31a that processes an interrupt from the performance monitoring mechanism 111a in the interrupt table 121a of the hypervisor 121. Further, the performance data collection program 31b of any virtual machine sets an event to be measured in each performance monitoring counter of the performance monitoring mechanism 111a, whether or not an interrupt is generated from each performance monitoring counter, and how many counts Set whether to generate an interrupt with a number.

  The control machine 41 includes a performance information collection control / aggregation program 51. The performance information collection control / aggregation program 51 instructs the measurement preparation of the performance data collection program 31b or reads out the measurement values of the performance measurement from the memory 112 in accordance with the measurement value read instruction from the performance data collection program 31b. In FIG. 3, the control machine 41 may be a machine such as a console independent of the virtual machines 21 to 2N, or the control machine 41 may be one of the virtual machines 21 to 2N. .

  Next, the flow of performance measurement will be described. First, in S1, the performance information collection control / aggregation program 51 of the control machine 41 instructs the performance data collection program 31b operating on the virtual machine 21 to prepare for measurement.

  Next, in S2, the performance data collection program 31b registers the segment and offset of the interrupt handler 31a in the interrupt table 121a of the hypervisor 121 based on an instruction from the performance information collection control / aggregation program 51.

  Next, in S3, the performance data collection program 31b of the performance measurement target virtual machine sets an event to be counted in each PMC.

  FIG. 4 is a diagram illustrating a setting example of the performance monitoring counter (PMC). In the event setting area of the PMC for setting an event, as shown in the performance monitoring counter n, a part for setting an event type to be counted, and an interrupt on that specifies whether or not an interrupt is caused by the set event There is a part for setting / off, and a part for setting an interrupt frequency for designating how many times an event occurs.

  In the example of FIG. 4, “TLB flush”, that is, invalidation of TLB entry, “interrupt on” as interrupt on / off, and “every time” as interrupt frequency are set in the performance monitoring counter 0. Yes. Accordingly, the virtual machine can be interrupted by the TLB invalidation process that occurs every time the virtual machine is switched, and the PMC and time information can be read by the interrupt handler of the virtual machine. In the performance monitoring counter 1, “the number of executed instructions” is set as an event to be measured, and on / off of the interrupt is set to “interrupt off”. A PMC set to interrupt off does not generate an interrupt due to the occurrence of an event that it counts. In addition, the event type and the interrupt off are set in each performance monitoring counter for the number of events to be measured.

  Returning to FIG. 3, in S4, the performance data collection program 31b causes the PMC to start counting. Next, in S5, when the hypervisor detects that the running virtual machine has used up a certain period of time during which execution rights have been given, or the running virtual machine has suspended or abandoned processing, the hypervisor 121 detects that the virtual machine Switch. At the time of virtual machine switching, context switching is involved, so the TLB entry is invalidated. At this time, since the performance monitoring counter 0 is set with TLB flush, interrupt on, and interrupt every time as events to be measured, as shown in S6, the TLB entry is invalidated. A hardware interrupt is generated from the performance monitoring mechanism 111a to the hypervisor 121. Since this hardware interrupt vector is set to point to the PMC interrupt entry in the interrupt table 121, the hypervisor 121 activates the interrupt handler 31a of the guest OS 31 as shown in S7. Will be.

  Here, the guest OS interrupted from 121 is a guest OS corresponding to any of the virtual machines 21 to 2N to which execution rights are newly given by virtual machine switching, and is assumed to be a guest OS 31 here.

  Next, in S8, the interrupt handler 31a of the guest OS 31 reads from the performance monitoring mechanism 111a of the CPU 111 the PMC value in which the event counted in S3 is set. Next, in S9, the PMC value read in S8 by the interrupt handler 31a is stored in the memory 112. At this time, the time information when the PMC value is read in S8 or the time information when the PMC value is written to the memory is stored in the memory 112 in the same manner.

  The time information may be read from a dedicated time stamp counter (TSC: Time Stamp Counter) or a high definition event timer (HPET: High Precision Event Timer) that measures time information provided in the CPU 111. Further, the time information may be read including the number of clocks counted at the time of PMC reading by setting a clock as an event to be measured in one of the PMCs. In the following description, it is assumed that time information is acquired by reading TSC.

  Steps S5 to S9 are repeated each time virtual machine switching occurs before the execution of the performance data collection program 31b is completed.

  Next, in S10, when the performance data collection program 31b ends, the performance data collection program 31b instructs the performance information collection control / aggregation program 51 to read out the PMC read value and TSC value stored in the memory 112 by each interrupt handler. Is called. Next, in S11, in response to this read instruction, the performance information collection control / aggregation program 51 reads the PMC value and TSC value stored for each virtual machine switching from the memory 112, and each virtual machine interrupts virtual machine switching by interruption. Extract the recognized time.

  Then, the performance information collection control / aggregation program 51 determines whether or not the virtual machine has been switched by the hypervisor 121 within the period from the measurement start to the measurement end of the measurement target program. If there is a virtual machine switch, the performance information collection control / aggregation program 51 recognizes the virtual machine switch sequence and, as shown in FIG. 2, the number of events in the virtual machine that has executed the performance data collection program 31b. Is calculated.

  Next, processing performed by the performance information collection control / aggregation program 51 operating on the control machine will be described with reference to FIG. Processing executed in accordance with the performance information collection control / aggregation program 51 includes preprocessing and postprocessing. As shown in FIG. 5A, the pre-processing is ended by designating the performance data collection program 31b to start measurement in S21. This corresponds to S1 in FIG. As shown in FIG. 5B, in the post-processing, first, in S22, the PMC value and the TSC value collected by the interrupt handler of each virtual machine and stored in the memory are integrated according to the time series of the TSC value to measure the performance. Identify the scheduling during which the virtual machine switch occurred. Next, in S23, for each event to be counted, the PMC count corresponding to the time during which the performance data collection program, which is the performance measurement target program, was executed is calculated.

  Thereby, it is possible to obtain the count number for each event when the performance data collection program is executed in the virtual machine. S22 and S23 correspond to S11 in FIG.

  Next, processing performed by the performance data collection program 31b operating on each virtual machine will be described with reference to FIG. The processing based on the performance data collection program 31b includes preprocessing and postprocessing. In the preprocessing, as shown in FIG. 6A, the segment and offset of the interrupt handler 31a of the guest OS are registered in the interrupt table 121a of the hypervisor 121 in S31.

  Next, in S32, an event counted by one PMC is set. In this example, it is assumed that a TLB flush that always occurs at the time of virtual machine switching is set in the performance monitoring counter 0 shown in FIG. 4 as an event counted by the PMC. At this time, an interrupt on is set in the PMC so that an interrupt from the PMC in which the event is set is generated, and “1” is set as the interrupt frequency, and an interrupt is generated every time an event occurs. Set to Here, the event that is always generated when the virtual machine is switched is not limited to the TLB flash, but an event that the hypervisor executes only once when the virtual machine is switched, such as a transition instruction from the hypervisor mode to the guest OS mode. May be set as Furthermore, an event that occurs at the time of virtual machine switching, such as switching of a virtual machine control table or switching of an I / O mapping table, may be set as an event. Next, in S33, events to be measured by other PMCs, for example, the number of execution clocks, the number of execution instructions, the number of cache misses at each of the levels L1, L2, and L3, the number of branch successes (branch GO), the branch failure (branch NO GO). Number, branch prediction success number, branch prediction failure number, memory read number, memory write number, etc. In S34, PMC counting is started, and the preprocessing of the performance data collection program 31b is terminated.

  As shown in FIG. 6B, the post-processing of the performance data collection program 31b ends in S35 by instructing the performance information collection control / aggregation program 51 to read out the measured values and perform the aggregation processing.

  Next, the interrupt handler 31a will be described with reference to the flowchart of FIG. The interrupt handler 31a first reads the PMC count value in S41, and writes the read count value to a predetermined area of the memory 112. This operation is performed for the number of PMCs for which measurement events are set. Next, in S42, the PMC interrupt handler 31a reads the value of the time stamp counter (TSC), writes this count value in a predetermined area of the memory 112, and ends. S41 and S42 may be switched in order.

  As described above, according to this embodiment, in a virtual machine system using an off-the-shelf microprocessor equipped with a performance monitoring counter, a performance monitoring interrupt is caused to the virtual machine to be switched every time the virtual machine is switched. Since the interrupt handler of the virtual machine that processes the interrupt stores the PMC value and time information (TSC value) in the memory, the sequence of virtual machine switching is determined by reading the memory after the performance measurement program ends. Thus, it is possible to provide a performance measurement program that can efficiently collect and analyze high-precision operation information of a program in a virtual machine to be measured.

  In addition, this performance measurement program can be created as an OS device driver on a virtual machine. In the past, virtual machine switching detection, which could not be collected without hardware modification or hypervisor manipulation, and each virtual machine Machine performance information can be collected accurately.

  In addition, the performance monitoring counter function is a function that the CPU normally has, and an event that occurs when a virtual machine is switched (for example, TLB entry invalidation event) is also used by Intel Xeon (registered trademark) or AMD Opteron (registered trademark). ) And many other CPUs. For this reason, many CPUs having the corresponding functions can be realized without adding or changing any hardware, so that the application range is wide.

1 is a system configuration diagram illustrating a configuration example of a virtual machine system to which the present invention is applied. It is a figure explaining the performance measurement value of the virtual machine A in case the virtual machine A and the virtual machine B are performed by a time division. It is the figure which showed the flow of the performance measurement in an Example on the system diagram which shows the structural example of the virtual computer system 1. FIG. It is a figure explaining the example of a setting of a performance monitoring counter. It is a flowchart which shows the Example of a performance information collection control and totalization program. It is a flowchart which shows the Example of a performance data collection program. It is a flowchart which shows the Example of the interrupt handler of a guest OS. It is a block diagram explaining a virtual machine system. It is a figure explaining the problem in the performance measurement of the virtual machine in the conventional virtual computer system.

Explanation of symbols

1 Virtual machine system 21, 22, ..., 2N Virtual machine 31 Guest OS
31a Interrupt handler 31b Performance data collection program 41 Control machine 51 Performance information collection control / aggregation program 111 CPU
111a Performance monitoring mechanism 112 Memory 121 Hypervisor 121a Interrupt table

Claims (5)

A performance measurement program for causing a virtual machine operating on a physical machine including a CPU and a memory having a performance monitoring mechanism having a performance monitoring counter to execute a procedure for measuring the performance of each virtual machine included in the virtual machine. And
In the virtual machine ,
A procedure for selecting an event to be counted and causing the performance monitoring counter to count the specified event ;
A step of generating the interrupt switching destination virtual machine for performance monitoring in front Symbol performance monitoring mechanism at the time of switching the virtual machines,
And instructions for recording the time information of the time the interrupt handler of the virtual machines before Symbol interrupt has occurred read the performance monitoring counter value of the performance monitoring counter to the memory,
Performance measurement program for running The physical machine further comprises a hypervisor having an interrupt table ;
In the virtual machine ,
The performance measurement program according to claim 1, further causing a procedure for setting a link to the interrupt handler in the interrupt table of the hypervisor. In the virtual machine ,
A procedure for setting the TLB entry invalidation in the performance monitoring counter as an event to be counted;
3. The method according to claim 1, further comprising executing a procedure for starting the interrupt handler by interrupting the performance monitoring counter interrupt to a hypervisor every time a TLB entry is invalidated. 4. Performance measurement program. In a virtual machine operating on a physical machine comprising a CPU and a memory having a performance monitoring mechanism having a performance monitoring counter, a method for measuring the performance of each virtual machine included in the virtual machine,
Selecting events to be counted and counting the events specified in the performance monitoring counter;
A step of generating the interrupt switching destination virtual machine for performance monitoring in front Symbol performance monitoring mechanism at the time of switching the virtual machines,
A process for recording the time information of time when the interrupt handler of the virtual machines before Symbol interrupt has occurred read the performance monitoring counter value of the performance monitoring counter to the memory,
A method for measuring performance, comprising: A processing apparatus having a performance measurement function for measuring the performance of a virtual machine operating on a physical machine including a CPU and a memory having a performance monitoring mechanism having a performance monitoring counter ,
Means for selecting events to be counted and counting the events specified in the performance monitoring counter;
It means for generating an interrupt to the switching destination virtual machine for performance monitoring in front Symbol performance monitoring mechanism at the time of switching the virtual machines,
And means for recording the time information of the time the interrupt handler of the virtual machines before Symbol interrupt has occurred read the performance monitoring counter value of the performance monitoring counter to the memory,
An information processing apparatus having a performance measurement function.

Images