JP2011061309A - Image processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image processing apparatus which allows data at a RAM to be held even in a power saving mode and high-speed reset to take place and can automatically or manually select a "power saving preferred" operation or a "reset time preferred" operation, wherein, power is supplied to the RAM and high-speed reset is carried out using the held data at the "reset time preferred"operation, while power is shut down to the RAM and power consumption is reduced in the power saving mode at the "power saving preferred" operation. <P>SOLUTION: The image processing apparatus includes a RAM 104 for holding data required for a CPU 101 to operate, an ASIC (Application Specific Integrated Circuit) 102 for supplying or shutting down power to the RAM 104 in the power saving mode according to a power consumption value under control by the CPU 101, a controller 100 for exerting control to perform a power saving preferred operation or a reset time preferred operation when a condition for return from the power saving mode to the normal operation mode is satisfied. The controller 100 controls the ASIC 102 to supply power to the RAM 104 during the reset time preferred operation, while it controls the ASIC 102 to shut down power supply to the RAM 104 during the power saving preferred operation. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an image processing apparatus.

  Conventionally, an image processing apparatus has a mode (power saving mode) in which power is not supplied to devices, modules, and units that operate during normal operation but do not operate during standby. It is known that the recovery time is shortened by a form (STR: Suspend to RAM) that stores data necessary for returning to the normal operation mode.

  For example, Patent Document 1 discloses a configuration in which power is supplied to the RAM even in the power saving mode for the purpose of returning to the normal operation mode at high speed.

  However, in the technique disclosed in Patent Document 1 as described above, although it is possible to quickly return from the power saving mode to the normal operation mode, power consumption increases wastefully when the high speed recovery is unnecessary. The problem of end was not solved. In other words, an image processing apparatus that retains data in the RAM and can recover at high speed even in the power saving mode always supplies power to the RAM, and consumes power wastefully when high-speed recovery is not required. There was a problem.

  The present invention has been made in view of the above, and automatically or manually sets “power saving priority” or “recovery time priority” automatically even in an image processing apparatus capable of retaining RAM data and recovering at high speed even in a power saving mode. In the case of “priority for recovery time”, the data stored in the RAM is restored at high speed. In the case of “priority for power saving”, the power supply of the RAM is cut off. Thus, an object is to reduce power consumption in the power saving mode.

  In order to solve the above-described problems and achieve the object, the present invention includes a power saving mode shift function for shifting to a power saving mode that consumes less power than the normal operation mode, and a return function for returning to the normal operation mode. And an image processing apparatus that executes processing of image data by a control means that controls each part of the apparatus, the data holding means holding data necessary for the control means to operate, and the control means The power control means for supplying or cutting off power to the data holding means in the power saving mode according to the power consumption value when the control is executed, and the return condition from the power saving mode to the normal operation mode Main body control means for controlling power saving priority or return time priority, and the main body control means supplies power to the data holding means when the return time priority is given. Supplies, and controlling the power control means to cut off the power supply to the data holding means when said power saving priority.

  The image processing apparatus according to the present invention selects “power saving priority” or “recovery time priority” in the user or inside the apparatus even in the power saving mode, even in the image processing apparatus in which the data holding means holds the data and can be restored at high speed. When “priority for recovery time” is selected, power is supplied to the data holding means, and the stored data is used for fast recovery. When “power saving priority” is specified, power supply to the data holding means is interrupted. Even in the power saving mode, an image processing apparatus capable of returning to high speed by supplying power to the data holding means and holding data necessary for returning to the normal operation mode does not require high speed return to the normal operation mode. In this case, there is an effect that further reduction of power consumption in the power saving mode can be realized.

FIG. 1 is a block diagram showing the system configuration of the image processing apparatus according to this embodiment. FIG. 2 is a block diagram showing a power supply state to the RAM when the power to the CPU in the configuration of FIG. 1 is cut off. FIG. 3 is a block diagram showing a state of power interruption to the CPU and RAM in the configuration of FIG. FIG. 4 is an explanatory diagram illustrating a display selection screen example (1) of “return time priority” in the operation unit. FIG. 5 is an explanatory diagram showing a display selection screen example (2) of “return time priority” in the operation unit. FIG. 6 is an explanatory diagram illustrating a display selection screen example (3) of “return time priority” in the operation unit. FIG. 7 is an explanatory diagram showing a display selection screen example (4) of “return time priority” in the operation unit. FIG. 8 is a flowchart showing an operation example of the image processing apparatus according to this embodiment. FIG. 9 is a block diagram showing another system configuration of the image processing apparatus according to this embodiment.

  Hereinafter, an embodiment of an image processing apparatus according to the present invention will be described in detail with reference to the accompanying drawings.

(Embodiment)
The present invention has the following characteristics when shifting to the power saving mode and returning to the normal operation mode. In short, the power supply for supplying power to the RAM is controlled to be turned off and on, and when the CPU is started, the RAM is restored from the STR (holding data necessary for returning to the normal operation mode) state or the RAM Detects whether the data is restored from the state where it is not retained. If it is necessary to quickly return to the normal operation mode, the power supply to the CPU is cut off when the power saving mode is entered, but the data required for the return is retained while the power to the RAM remains supplied. In addition, when returning to the normal operation mode, power supply to the CPU is resumed, and the CPU determines that the CPU is returning from the STR state, and uses the data held in the RAM to return at high speed. In addition, when it is not necessary to quickly return to the normal operation mode, power supply to the CPU and RAM is interrupted when the power saving mode is shifted, and power supply to the CPU and RAM is resumed when returning to the normal operation mode. The CPU determines that it is a return from a state in which no data is held in the RAM, and starts up by executing a process of developing a program in the RAM as in the case of normal power ON. Hereinafter, a specific configuration and operation will be described. Note that STR is an abbreviation for Suspend to RAM, and is hereinafter referred to as STR.

  FIG. 1 is a block diagram showing the system configuration of the image processing apparatus according to this embodiment. In FIG. 1, reference numeral 100 is a controller as a main body control means, reference numeral 101 is a CPU (central processing unit) as control means for controlling each part of the apparatus, reference numeral 102 is a power saving mode and detection function, and power to the CPU 101 and RAM 104. ASIC (Application Specific Integrated Circuit) having a power control function such as supply or cutoff, reference numeral 103 is a network I / F (interface), reference numeral 104 is a RAM (Random Access Memory) as a data holding means, and reference numeral 105 is a ROM (Read). Only Memory (NVRAM) 106 is a non-volatile RAM (NVRAM) as a non-volatile storage means, and 200 is a code for the user. An operation unit having operation input keys and an operation display panel, 201 is an operation unit switch, 300 is a scanner for reading an original image, and 301 is an opening / closing of a pressure plate for pressing an original placed on a contact glass. A pressure plate open / close detection sensor for detecting a document, a reference numeral 302 is a document set detection sensor for detecting that a document is set at a predetermined position, a reference numeral 401 is a power source A for supplying power to the CPU 101, the ROM 105, and the NVRAM 106, and a reference numeral 402 is a power for the RAM 104. A power supply B, 500a to 500n, is a host computer (hereinafter referred to as a host PC) connected to the controller 100 via the network I / F 103 so as to be able to communicate with each other.

  The controller 100 of the image processing apparatus is included in a copying machine or a multifunction machine having multiple functions such as a copying function, a printer function, and a facsimile mechanism, and is an engine control unit (for controlling an image forming engine for forming an image). (Not shown) and connected to each other so as to be able to communicate with each other.

  The controller 100 of the image processing apparatus includes a CPU 101 that performs main control, a ROM 105 that stores a startup program, an NVRAM 106 that stores various setting values, and a RAM 104 that expands and executes the program.

  Furthermore, the controller 100 includes an ASIC 102 having a power saving mode control controller, various I / O controllers including a network, a DMA controller, an interrupt controller, and the like. The CPU 101 performs control in the normal operation mode, but has shifted to the power saving mode. In such a case, the power supply to the CPU 101 is cut off, and the ASIC 102 performs control. However, the control in the power saving mode may not be performed by the ASIC 102 and may be performed by the CPU 101. However, if the power consumption of the ASIC 102 is smaller than that of the CPU 101, it is better not to supply power to the CPU 101. The ASIC 102 may not be an ASIC, and may be a CPU that consumes less power than the CPU 101.

  In the figure, only the power source A 401 supplies power to the CPU 101. However, when the CPU 101 requires a plurality of different voltages, a plurality of power sources are used. Similarly, other devices may require a plurality of power supplies. Further, power is supplied from the power source A 401 to the RAM 104, ROM 105, and NVRAM 106, but it is necessary to prepare a power source separately when the voltage is different from that of the CPU.

  Next, a method for cutting off the power supply to the CPU 101 in the power saving mode will be described with reference to FIGS. As a method for shutting off the power supply to the CPU 101 in the power saving mode, for example, an Enable terminal (a terminal for controlling ON / OFF of the power supply) of the power supply A 401 that supplies power to the CPU 101 is connected to the ASIC 102. When the CPU 101 shifts to the power saving mode, the CPU 101 turns off the power supply A 401 that supplies power to the CPU 101 under the register control of the ASIC 102 (see FIGS. 2 and 3).

  The power control to the RAM 104 is the same, and the power supply to the RAM 104 is cut off by negating the Enable terminal of the power supply B402 by the register control of the ASIC 102 (see FIG. 3).

  Whether or not to supply power to the RAM 104 in the power saving mode is selected, for example, if the ASIC 102 includes a STR transition register and the value of this register is set to 1, the Enable terminal of the power supply B402 also in the power saving mode Remains asserted (while power is being supplied to the RAM 104) (see FIG. 3), and when the value of this register is set to 0, the Enable terminal of the power supply B402 is negated when the power saving mode is entered (see FIG. 3). The power supply to the RAM 104 is cut off) (see FIG. 2).

  For example, as shown in FIG. 4, “return time priority” or “power saving priority” is displayed on the operation unit 200 in a selectable manner, and “return time priority” or “power saving priority” is selected by key operation or touch panel operation. select. When “priority for return time” is selected, power is supplied to the RAM 104 even in the power saving mode in order to retain the data in the RAM 104, and 1 is set in the STR transition register of the ASIC 102. When “power saving priority” is selected, 0 is set in the STR transition register of the ASIC 102.

  Further, if the setting value of the STR transition register here is also stored in the NVRAM 106, even if the apparatus is turned off, the previous setting value can be known when the power is turned on next time. By setting the STR shift register, it is possible to save the user from setting it every time the power is turned off and on.

  Further, as shown in FIG. 5, when the power consumption in the power saving mode in both the “return time priority” and “power saving priority” states is displayed, the user may be able to know the information. In addition, as shown in FIG. 6, the time required for return in both the “return time priority” and “power saving priority” states may be displayed. FIG. 7 is a combination of those shown in FIGS. 5 and 6, and this display is also preferable.

  On the other hand, the above-described method is to switch between the power saving mode and the fast return or the reduction of power consumption through a person such as a user or a service person, but instead, inside the apparatus, that is, without a person. There are also means to perform.

  For example, in the case of a device that activates a plurality of application programs and the number or capacity of applications to be activated is equal to or less than a certain value, the CPU 101 may detect this and turn off the power of the RAM 104 in the power saving mode. . If there are few application programs, the time to develop them in the RAM 104 is not large. Therefore, even if the power of the RAM 104 is turned off in the power saving mode and the program is loaded in the RAM 104 at the time of recovery, the restoration time increases greatly. This is because there is not. Further, when a hardware option can be used, if the option continues to supply power even in the power saving mode, power consumption at that time increases. Representative examples of such options include I / F options such as a wireless LAN (Local Area Network) and a FAX (facsimile apparatus). Then, the CPU 101 detects the power consumption in the power saving mode at the time of adding an option, and if it is less than a certain value, the power may be supplied to the RAM 104 even in the power saving mode to prioritize the return time. .

  In addition, when there are multiple devices in the same space, they are connected via a LAN (Local Area Network) etc. so that they can be linked, and some devices are prioritized for power saving and some are prioritized for recovery time. The method which becomes may be sufficient. Then, when the user wants to return quickly and use the device, the device with priority on the recovery time can be used, and when the recovery time can be delayed, the device with priority on the power saving mode can be used.

  FIG. 8 is a flowchart showing an operation example of the image processing apparatus according to this embodiment. This operation is comprehensively executed by the controller 100. First, the controller 100 determines whether or not a power saving mode transition condition has occurred (step S101). Here, when a certain condition is met, the mode shifts to the power saving mode. Examples of the conditions for shifting to the power saving mode include pressing of the operation unit switch 201 of the operation unit 200 and an operation request from the user for a certain time or more. There is no such thing. When these transition conditions occur (step S101: YES), a module that is not required at the time of stopping the processing being executed, notification of transition to the power saving mode for modules other than the controller, and the power saving mode such as the engine or HDD A power saving mode transition process such as power OFF is executed (step S102).

  Subsequently, the controller 100 determines whether or not to shift to STR (step S103). Here, depending on whether the STR shift register is 1 or 0, it is determined whether to shift to STR holding data necessary for returning to the normal operation mode. If the STR transition register is read in step S103 and is 0 (determination NO), the power supply to the RAM 104 is also cut off in the power saving mode, so that the power supply A401 is turned off and the power supply B402 is also turned off (step S104).

  On the other hand, if the STR transition register is read in step S104 and is 1 (determination YES), the power supply A401 is turned off and the power supply B402 is turned on in the power saving mode, but the power of the CPU 101 is turned off. The command cannot be issued. Therefore, while the CPU 101 is turned on, the RAM 104 is put into a self-refresh mode (Self Refresh mode) (step S105), and the power source A401 is turned off (step S106).

  After shifting to the power saving mode according to the above procedure, it is determined whether or not a factor for returning to the normal operation mode has occurred (step S107). Until a factor for returning to the normal operation mode occurs (determination YES), the power saving mode is set, and power consumption can be reduced. The normal operation mode return factor here refers to pressing of the operation unit switch 201 provided in the operation unit 200, opening / closing of a document set and a pressure plate in the scanner 300, or an operation request (print job) from the host PCs 500a to 500n. , Image storage in HDD (hard disk drive), image reading).

  If a normal operation mode return factor is generated in step S107 (determination YES), a return process is started, and it is determined whether the STR transition register is 1 or 0 (step S108). Here, when the STR transition register is read and 0 (determination NO), it means that the power supply B402 of the RAM 104 is also turned off, so the power supply A401 and the power supply B402 are turned on (step S109). The program is loaded into the RAM 104 and started (step S110). On the other hand, if the STR transition register is read at step S108 and it is 1 (determination YES), it means that the data is held in the RAM 104, so the power supply A401 is turned on (step S111) and the data is started using the data (step S111). Step S112). As a result, time for initialization of the RAM 104 and development of the program can be omitted.

  By the way, when returning from the power saving mode to the normal operation mode, the CPU 101 detects whether data is held in the RAM 104 during the power saving mode. Whether or not to initialize the RAM 104 based on the detection information. Therefore, the RAM 104 cannot be used at the time of detection.

  On the other hand, since the ASIC 102 performs various I / O control including the network, it is necessary to transfer a large amount of data at a high speed. Usually, the CPU 101 and the ASIC 102 are I / F capable of high-speed communication, for example, PCI (Peripheral Component Interconnect). ) Or PCI-Express.

  However, since these high-speed I / Fs (interfaces) may include complicated processing, it is preferable to initialize and start communication control in a state where the RAM 104 can be used. Therefore, it is preferable to have another communication means to know the value of the STR transition register of the ASIC 102 without initializing the high-speed I / F (interface) such as PCI when the RAM 104 at the time of return cannot be used. An example of the configuration will be described with reference to FIG. Note that the functional elements in FIG. 9 that are the same as those in FIG. 1 are given the same reference numerals, and redundant descriptions are omitted.

  In FIG. 9, first, a single control line (power saving mode notification signal 107) is connected between the CPU 101 and the ASIC 102, and the ASIC 102 side is an output port and the CPU 101 side is an input port. The output port on the ASIC 102 side outputs, for example, a low level when the STR shift register is 0, and outputs a high level when it is 1. Alternatively, the output port on the ASIC 102 side may be a general-purpose output port, and the output level of this general-purpose output port may be set when setting the STR transition register. Then, the level of the power saving mode notification signal 107 is input to the input port of the CPU 101, the level is reflected in the register of the CPU 101, and the CPU 101 determines whether the data is held in the RAM 104 during the power saving mode with the value of the register. Judgment.

  Therefore, according to the above-described embodiment, the user or the apparatus itself selects “power saving priority” or “recovery time priority” even in the image processing apparatus that can hold the data in the RAM 104 and can recover at high speed even in the power saving mode. In the case of “priority for recovery time”, power can be supplied to the RAM 104, and high-speed recovery can be performed using the stored data. However, in the case of “priority for power saving”, power supply to the RAM 104 is possible. Therefore, in the image processing apparatus capable of high-speed recovery by STR, when the high-speed recovery is unnecessary, it is possible to further reduce the power consumption in the power saving mode.

  As described above, the image processing apparatus according to the present invention is useful for a copying machine, a printer, a facsimile machine, or a multifunction machine including these functions. In particular, the image processing apparatus is quickly restored from the power saving mode to the normal operation mode. Suitable for power saving.

100 controller 101 CPU
102 ASIC
103 Network I / F
104 RAM
105 ROM
106 NVRAM
200 Operation Unit 201 Operation Unit Switch 300 Scanner 301 Pressure Plate Open / Close Detection Sensor 302 Document Set Detection Sensor 401 Power Supply A
402 Power supply B
500a-n Host PC

Japanese Patent No. 3798353

Claims (10)

Processing of image data by a control means having a power saving mode transition function for shifting to a power saving mode that consumes less power than the normal operation mode and a return function for returning to the normal operation mode, and controlling each part of the apparatus An image processing apparatus for executing
Data holding means for holding data necessary for the control means to operate;
Power control means for supplying or cutting off power to the data holding means in a power saving mode according to a power consumption value when the control means executes control;
When it becomes the return condition from the power saving mode to the normal operation mode, the main body control means for controlling the power saving priority or the recovery time priority,
With
The main body control unit controls the power control unit to supply power to the data holding unit when priority is given to the return time and to cut off power supply to the data holding unit when priority is given to power saving. An image processing apparatus. The control means is an image processing apparatus that activates a plurality of application programs,
The image processing apparatus according to claim 1, wherein the main body control unit cuts off power supply to the data holding unit in a power saving mode when the number or capacity of application programs to be activated is equal to or less than a predetermined value. . An image processing apparatus that supplies power to optional hardware in a power saving mode,
When the control unit detects that the power consumption of the optional hardware is below a certain value, the main body control unit supplies power to the data holding unit in the power consumption mode and prioritizes the return time. The image processing apparatus according to claim 1. An image processing apparatus in which a plurality of devices are connected to each other in a cooperating manner,
The image processing apparatus according to claim 1, wherein the main body control unit controls part of the devices to prioritize power saving and the other to prioritize recovery time. Processing of image data by a control means having a power saving mode transition function for shifting to a power saving mode that consumes less power than the normal operation mode and a return function for returning to the normal operation mode, and controlling each part of the apparatus An image processing apparatus for executing
Data holding means for holding data necessary for the control means to operate;
Return factor detection means for detecting a return factor from the power saving mode;
A power saving mode selection means for selecting whether to hold power by supplying power to the data holding means in the power saving mode;
Power control means for controlling power supply to the data holding means according to selection information by the power saving mode selection means;
Selection accepting means for accepting selection of power saving priority or restoration time priority by the user from the power saving mode selecting means when returning to the normal operation mode;
Body control means for controlling the power control means to supply power to the data holding means in the case of priority on the return time, and to cut off power supply to the data holding means in the case of priority on power saving;
An image processing apparatus comprising:   When the control unit returns to the normal operation mode, the control unit determines whether to resume the operation using the data held in the data holding unit according to the detection information by the power saving mode detection unit. The image processing apparatus according to claim 5, wherein: Furthermore, a nonvolatile storage means is provided,
The image processing apparatus according to claim 5, wherein the control unit stores selection information from the power saving mode selection unit in the nonvolatile storage unit. Furthermore, two or more communication means between the control means and the power saving mode detection means,
The image processing apparatus according to claim 5, wherein at least one of the communication units is operable without using the data holding unit.   The power consumption value when the data holding unit supplies power to the data holding unit during the power saving mode and when the data is not held is notified at the time of selection by the power saving mode selection unit. The image processing apparatus according to any one of the above.   10. The time required for returning when power is supplied to the data holding unit in the power saving mode and data is not held and when the data is not held are notified at the time of selection by the power saving mode selecting unit. The image processing apparatus according to any one of the above.

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