JP2010197905A - Method for driving plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the image display quality without increase of noise even in a high-definition plasma display panel. <P>SOLUTION: In a method for driving a plasma display panel which has a display region for image display, wherein the display region includes a plurality of discharge cells having display electrode pairs comprising scan electrodes and sustain electrodes, a plurality of sub-fields each of which has an initialization period, a write period, and a sustain period are provided within one field period, and sustain pulses of which the number results from multiplying brightness weights set per sub-field by a prescribed brightness scale factor are alternately applied to the display electrode pairs in sustain periods, and a ratio of a region wherein a signal level of an input image signal is equal to or higher than a prescribed value, to the display region (high-brightness region ratio) is detected, and when the high-brightness region ratio is lower than a preliminarily determined threshold, brightness weights of sub-fields to which greater brightness weights are set are increased to increase the sum total of brightness weights in one field period in comparison with the case that the high-brightness region ratio is equal to or higher than the threshold. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for driving a plasma display panel used in a wall-mounted television or a large monitor.

  A typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front plate and a back plate arranged to face each other. In the front plate, a plurality of display electrode pairs each consisting of a pair of scan electrodes and sustain electrodes are formed in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrode pairs. Yes. The back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of barrier ribs in parallel with the data electrodes formed on the back glass substrate. A phosphor layer is formed on the side walls of the barrier ribs. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas containing, for example, 5% xenon is enclosed in the internal discharge space. Has been. Here, a discharge cell is formed at a portion where the display electrode pair and the data electrode face each other. In the panel having such a configuration, ultraviolet rays are generated by gas discharge in each discharge cell, and the phosphors of red (R), green (G) and blue (B) colors are excited and emitted by the ultraviolet rays, thereby performing color display. It is carried out.

  As a method of driving the panel, a subfield method, that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields is generally used.

  Each subfield has an initialization period, an address period, and a sustain period. In the initializing period, initializing discharge is generated, wall charges necessary for the subsequent address operation are formed on each electrode, and priming particles (excited particles) for stably generating the address discharge are generated.

  In the address period, a scan pulse is sequentially applied to the scan electrodes (hereinafter, this operation is also referred to as “scan”), and an address pulse corresponding to an image signal to be displayed is applied to the data electrodes (hereinafter, these operations are performed). Are collectively referred to as “writing”). Thereby, an address discharge is selectively generated between the scan electrode and the data electrode, and a wall charge is selectively formed.

  In the subsequent sustain period, a predetermined number of sustain pulses corresponding to the luminance to be displayed are alternately applied to the display electrode pair composed of the scan electrode and the sustain electrode. Thereby, a discharge is selectively caused in the discharge cell in which the wall charge is formed by the address discharge, and the discharge cell is caused to emit light. Thereby, an image is displayed.

  In addition, among the subfield methods, initializing discharge is performed using a slowly changing voltage waveform, and further, initializing discharge is selectively performed on discharge cells that have undergone sustain discharge. A driving method is disclosed in which the light emission that is not generated is reduced as much as possible to improve the contrast ratio.

  Specifically, among the plurality of subfields, in the initialization period of one subfield, an all-cell initializing operation for generating an initializing discharge in all discharge cells is performed, and in an initializing period of the other subfield. Performs a selective initializing operation in which initializing discharge is generated only in the discharge cells that have undergone sustain discharge in the immediately preceding sustain period. By driving in this way, the luminance of the black display area that changes depending on the light emission not related to the image display (hereinafter abbreviated as “black luminance”) is only weak light emission in the all-cell initialization operation, High-contrast image display is possible (see, for example, Patent Document 1).

In a plasma display device incorporating such a panel, various power consumption reduction techniques have been proposed in order to reduce power consumption.
Focusing on the fact that the panel is a capacitive load as one of the technologies to reduce power consumption, LC resonance between the inductor and the load capacity of the panel is performed by a resonance circuit including the inductor as a component, and the load capacity of the panel In other words, a so-called power recovery circuit is disclosed in which the power stored in is recovered in a power recovery capacitor and the recovered power is reused for driving the panel (see, for example, Patent Document 2).

  In this technology, for example, the power recovered from the panel is reused to apply the sustain pulse voltage to the scan electrode and the sustain electrode in the sustain period, and the power consumed in the sustain period is reduced, thereby reducing the power consumption. Can be realized.

  On the other hand, it is important to display an image in an easy-to-view manner as well as to reduce power consumption, and various proposals have been made regarding techniques for brightly displaying an image for easy viewing.

  As a technique for brightly displaying an image, a technique for controlling the number of sustain pulses in the sustain period is disclosed. In the panel, the brightness (light emission luminance) of one light emission generated by one discharge in the sustain period is substantially the same, but the light emission period is short, so that the display cell having a larger number of light emission in one field period It appears to be brightly lit. In this technique, this principle is used. For example, one field is a first subfield to an eighth subfield (hereinafter, the first subfield is abbreviated as a first SF and the second subfield is abbreviated as a second SF). The number of sustain pulses of the first SF is 1, the number of sustain pulses of the second SF is 2, and the number of sustain pulses from the 3rd SF to the 8th SF is 4, 8, 16, 32, 64, respectively. When the value is 128, the number of sustain pulses from the first SF to the eighth SF is doubled to 2, 4, 8, 16, 32, 64, 128, 256, respectively, and the sustain from the first SF to the eighth SF The number of pulses is tripled, and the subfield sustain pulse number is changed from 1 to 2 times, 3 times, and 4 times in the same manner as in the 3 times mode in which the number of pulses is tripled, and similarly in the 4 times mode in which the number of pulses is quadrupled (hereinafter referred to as “4 times”). Sustain pulse number is abbreviated as luminance magnification to a magnification) by controlling the number of light emission in the sustain period by adjusting the brightness of the screen. By using this technology, an average luminance level (APL: Average Picture Level) of an image signal is detected, a luminance magnification is switched based on the detected APL, and a dark image is increased by increasing the luminance magnification when the APL is low. It becomes possible to display brighter (see, for example, Patent Document 3).

In addition, a technique is disclosed in which the number of sustain pulses in the sustain period can be performed not only for an integral multiple but also for multiples of a numerical value after the decimal point so that the change in brightness is smoother (see, for example, Patent Document 4). ).
JP 2000-242224 A Japanese Examined Patent Publication No. 7-109542 JP-A-8-286636 Japanese Patent Laid-Open No. 11-231833

  In recent years, with an increase in screen size and definition, a further improvement in display quality in a plasma display device is desired.

  On the other hand, the higher definition of the panel increases the number of scan electrodes that must be scanned, so that the time required for one address period is increased and the length of the subfield is increased. For example, if the length of the subfield increases and the upper limit of the number of subfields constituting one field period is suppressed, the gradation that can be used for image display is limited, the gradation becomes rough, and noise increases. There is a fear.

  The present invention has been made in view of the above problems, and provides a plasma display device and a panel driving method capable of improving image display quality without increasing noise even in a high-definition panel. The purpose is to provide.

  The present invention includes a display area having an image display area, wherein the display area includes a plurality of discharge cells each having a display electrode pair including a scan electrode and a sustain electrode. A plurality of subfields each having a write period and a sustain period are provided in one field period, and the number of sustain pulses obtained by multiplying the brightness weight set for each subfield in the sustain period by a predetermined brightness magnification is set to the display electrode pair. Are alternately applied to detect the ratio of the area where the signal level of the input image signal is equal to or higher than a predetermined value to the display area, and when the detected ratio is less than a predetermined threshold, the ratio is equal to or higher than the threshold. Compared to the case of, the luminance weight of the subfield with large luminance weight is increased to increase the total luminance weight in one field period. And wherein the Kusuru.

  According to the present invention, it is possible to provide a method for driving a plasma display panel that can improve image display quality without increasing noise, even if the panel has a higher definition.

  Hereinafter, a plasma display device according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is an exploded perspective view showing the structure of panel 10 according to an embodiment of the present invention. A plurality of display electrode pairs 24 each including a scanning electrode 22 and a sustaining electrode 23 are formed on a glass front substrate 21. A dielectric layer 25 is formed so as to cover the scan electrode 22 and the sustain electrode 23, and a protective layer 26 is formed on the dielectric layer 25. The protective layer 26 is made of a material mainly composed of magnesium oxide (MgO).

  A plurality of data electrodes 32 are formed on the back substrate 31, a dielectric layer 33 is formed so as to cover the data electrodes 32, and a grid-like partition wall 34 is formed thereon. A phosphor layer 35 that emits light of each color of red (R), green (G), and blue (B) is provided on the side surface of the partition wall 34 and on the dielectric layer 33.

  The front substrate 21 and the rear substrate 31 are arranged to face each other so that the display electrode pair 24 and the data electrode 32 intersect each other with a minute discharge space interposed therebetween, and the outer periphery thereof is sealed with a sealing material such as glass frit. Has been. A mixed gas of neon and xenon is sealed as a discharge gas in the internal discharge space. In the present embodiment, a discharge gas having a xenon partial pressure of about 10% is used in order to improve luminous efficiency. The discharge space is partitioned into a plurality of sections by partition walls 34, and discharge cells are formed at the intersections between the display electrode pairs 24 and the data electrodes 32. These discharge cells discharge and emit light to display an image.

  Note that the structure of the panel 10 is not limited to the above-described structure, and for example, the panel 10 may include a stripe-shaped partition wall. Further, the mixing ratio of the discharge gas is not limited to the above-described numerical values, and may be other mixing ratios.

  FIG. 2 is an electrode array diagram of panel 10 according to the embodiment of the present invention. The panel 10 includes n scan electrodes SC1 to SCn (scan electrodes 22 in FIG. 1) and n sustain electrodes SU1 to SUn (sustain electrodes 23 in FIG. 1) that are long in the row direction. M data electrodes D1 to Dm (data electrodes 32 in FIG. 1) that are long in the column direction are arranged. A discharge cell is formed at a portion where one pair of scan electrode SCi (i = 1 to n) and sustain electrode SUi intersects one data electrode Dj (j = 1 to m), and the discharge cell is in the discharge space. M × n are formed. One pixel is constituted by three adjacent discharge cells (three discharge cells provided with phosphor layers 35 that emit light of each color of R, G, and B), and m × n discharge cells are formed. This area becomes the display area of the panel 10.

  Next, a driving voltage waveform for driving the panel 10 and an outline of the operation will be described. The plasma display device according to the present embodiment performs gradation display by subfield method, that is, by dividing one field period into a plurality of subfields and controlling light emission / non-light emission of each discharge cell for each subfield. Each subfield has an initialization period, an address period, and a sustain period.

  In each subfield, initializing discharge is generated in the initializing period, and wall charges necessary for subsequent address discharge are formed on each electrode. In addition, it has a function of generating priming particles for reducing discharge delay and generating address discharge stably. The initializing operation at this time is an all-cell initializing operation in which initializing discharge is generated in all discharge cells, and an initializing discharge is selectively generated only in the discharge cells that have undergone sustain discharge in the immediately preceding subfield. There is a selective initialization operation.

  In the address period, an address discharge is selectively generated in the discharge cells to emit light in the subsequent sustain period to form wall charges. In the sustain period, a number of sustain pulses proportional to the luminance weight are alternately applied to the display electrode pair 24 to generate a sustain discharge in the discharge cells that have generated the address discharge, thereby causing light emission. The proportionality constant at this time is “luminance magnification”.

  In the present embodiment, one field period is composed of nine subfields (first SF, second SF,..., Ninth SF), and each subfield is, for example, (1, 2, 4, 7, 13). , 24, 41, 64, 100). Then, the all-cell initialization operation is performed in the initialization period of the first SF, and the selective initialization operation is performed in the initialization period of the second SF to the ninth SF. As a result, the light emission not related to the image display is only the light emission due to the discharge of the all-cell initialization operation in the first SF, and the black luminance, which is the luminance of the black display area that does not generate the sustain discharge, is weak in the all-cell initialization operation. Only the emission of light makes it possible to display an image with high contrast. In the sustain period of each subfield, the number of sustain pulses obtained by multiplying the luminance weight of each subfield by a predetermined luminance magnification is applied to each display electrode pair 24.

  Note that the luminance weight value of each subfield described above is merely an example in the present embodiment. In this embodiment, the average luminance level (hereinafter abbreviated as “APL”) of the image signal is detected, and the luminance weight value is changed based on the detected APL. Details of this will be described later.

  FIG. 3 is a drive voltage waveform diagram applied to each electrode of panel 10 in one embodiment of the present invention. FIG. 3 shows a driving voltage waveform of two subfields, that is, a first subfield (first SF) of a subfield performing an all-cell initializing operation (hereinafter referred to as “all-cell initializing subfield”), A second subfield (second SF) of a subfield (hereinafter referred to as “selective initialization subfield”) for performing a selective initialization operation is shown, but the drive voltage waveforms in the other subfields are substantially the same. is there. Further, scan electrode SCi, sustain electrode SUi, and data electrode Dk in the following represent electrodes selected from the respective electrodes based on image data.

  First, the first SF, which is an all-cell initialization subfield, will be described.

  In the first half of the initializing period of the first SF, 0 (V) is applied to data electrode D1 to data electrode Dm and sustain electrode SU1 to sustain electrode SUn, respectively, and sustain electrode SU1 to sustain is applied to scan electrode SC1 to scan electrode SCn. A ramp waveform voltage (hereinafter referred to as “up-ramp waveform voltage”) that gently rises from voltage Vi1 that is equal to or lower than the discharge start voltage to voltage Vi2 that exceeds the discharge start voltage is applied to electrode SUn. In this embodiment, the up-ramp waveform voltage is generated with a slope of about 1.3 V / μsec.

  While the rising ramp waveform voltage rises, weak initializing discharges are continuously generated between scan electrode SC1 through scan electrode SCn, sustain electrode SU1 through sustain electrode SUn, and data electrode D1 through data electrode Dm. Negative wall voltage is accumulated above scan electrode SC1 through scan electrode SCn, and positive wall voltage is accumulated above data electrode D1 through data electrode Dm and sustain electrode SU1 through sustain electrode SUn. The wall voltage above the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.

  In the latter half of the initialization period, positive voltage Ve1 is applied to sustain electrode SU1 through sustain electrode SUn, 0 (V) is applied to data electrode D1 through data electrode Dm, and scan electrode SC1 through scan electrode SCn. , A ramp waveform voltage that gradually falls from voltage Vi3 that is equal to or lower than the discharge start voltage to sustain voltage SUn with respect to sustain electrode SU1 to voltage Vi4 that exceeds the discharge start voltage (hereinafter referred to as “down-ramp waveform voltage”). Is applied. During this time, weak initializing discharges are continuously generated between scan electrode SC1 through scan electrode SCn, sustain electrode SU1 through sustain electrode SUn, and data electrode D1 through data electrode Dm. Then, the negative wall voltage above scan electrode SC1 through scan electrode SCn and the positive wall voltage above sustain electrode SU1 through sustain electrode SUn are weakened, and the positive wall voltage above data electrode D1 through data electrode Dm is used for the write operation. It is adjusted to a suitable value. Thus, the all-cell initializing operation for performing the initializing discharge on all the discharge cells is completed.

  Note that, as shown in the initialization period of the second SF in FIG. 3, a drive voltage waveform in which the first half of the initialization period is omitted may be applied to each electrode. That is, voltage Ve1 is applied to sustain electrode SU1 through sustain electrode SUn, and 0 (V) is applied to data electrode D1 through data electrode Dm, respectively, and a voltage that is equal to or lower than the discharge start voltage (for example, 0) (V)) is applied to the ramp-down waveform voltage that gradually falls toward the voltage Vi4. As a result, a weak initializing discharge is generated in the discharge cell in which the sustain discharge has occurred in the sustain period of the previous subfield, and the wall voltage above scan electrode SCi and sustain electrode SUi is weakened. Further, in a discharge cell in which a sufficient positive wall voltage is accumulated on the data electrode Dk (k = 1 to m) by the last sustain discharge, an excessive portion of the wall voltage is discharged, and the wall voltage suitable for the address operation is obtained. Adjusted to On the other hand, the discharge cells that did not cause the sustain discharge in the previous subfield are not discharged, and the wall charges at the end of the initialization period of the previous subfield are maintained as they are. Thus, the initializing operation in which the first half is omitted is a selective initializing operation in which initializing discharge is performed only on the discharge cells that have undergone the sustain operation in the sustain period of the immediately preceding subfield.

  In the subsequent address period, a scan pulse voltage is sequentially applied to scan electrode SC1 through scan electrode SCn, and data electrode Dk (k = 1) corresponding to a discharge cell to emit light is applied to data electrode D1 through data electrode Dm. To m), a positive address pulse voltage Vd is applied to selectively generate an address discharge in each discharge cell.

  In the address period, voltage Ve2 is first applied to sustain electrode SU1 through sustain electrode SUn, and voltage Vc is applied to scan electrode SC1 through scan electrode SCn. The negative scan pulse voltage Va is applied to the scan electrode SC1 in the first row, and the data electrode Dk (k = 1 to m) of the discharge cell that should emit light in the first row among the data electrodes D1 to Dm. A positive write pulse voltage Vd is applied to. At this time, the voltage difference at the intersection between the data electrode Dk and the scan electrode SC1 is the difference between the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1 due to the difference in externally applied voltage (Vd−Va). It becomes the sum and exceeds the discharge start voltage. As a result, in the discharge cell to be lit in the first row, a discharge is generated between data electrode Dk and scan electrode SC1, and a discharge is generated between sustain electrode SU1 and scan electrode SC1. Thus, an address discharge occurs in the discharge cell to emit light, a positive wall voltage is accumulated on scan electrode SC1, a negative wall voltage is accumulated on sustain electrode SU1, and a negative wall voltage is also accumulated on data electrode Dk. Accumulated.

  In this manner, an address operation is performed in which an address discharge is caused in the discharge cells to be lit in the first row and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of data electrode D1 to data electrode Dm to which scan pulse SC1 is not applied with address pulse voltage Vd does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, first, positive sustain pulse voltage Vs is applied to scan electrode SC1 through scan electrode SCn, and the ground potential serving as the base potential, that is, 0 (V), is applied to sustain electrode SU1 through sustain electrode SUn. Then, in the discharge cell in which the address discharge has occurred, the voltage difference between scan electrode SCi and sustain electrode SUi is the difference between the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi. Exceeding the discharge start voltage.

  Then, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and phosphor layer 35 emits light by the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. Further, a positive wall voltage is accumulated on the data electrode Dk. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.

  Subsequently, 0 (V) as the base potential is applied to scan electrode SC1 through scan electrode SCn, and sustain pulse voltage Vs is applied to sustain electrode SU1 through sustain electrode SUn. Then, in the discharge cell in which the sustain discharge has occurred, the voltage difference between the sustain electrode SUi and the scan electrode SCi exceeds the discharge start voltage, so that the sustain discharge occurs again between the sustain electrode SUi and the scan electrode SCi. A negative wall voltage is accumulated on SUi, and a positive wall voltage is accumulated on scan electrode SCi. Thereafter, similarly, sustain electrodes of the number obtained by multiplying the luminance weight by the luminance magnification are applied alternately to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn, and a potential difference is given between the electrodes of display electrode pair 24. As a result, the sustain discharge is continuously performed in the discharge cells that have caused the address discharge in the address period.

  At the end of the sustain period, a ramp waveform voltage (hereinafter referred to as “erase ramp waveform voltage”) that gradually increases from 0 (V) as the base potential toward voltage Vers is applied to scan electrode SC1 through scan electrode SCn. Apply). For example, the erase ramp waveform voltage rises with a slope of about 10 V / μsec. As a result, a weak discharge is continuously generated, and some or all of the wall voltages on scan electrode SCi and sustain electrode SUi are erased while the positive wall voltage on data electrode Dk remains.

  Subsequent subfield operations are substantially the same as those described above except for the number of sustain pulses in the sustain period, and thus description thereof is omitted. The above is the outline of the drive voltage waveform applied to each electrode of panel 10 in the present embodiment.

  Next, the configuration of the plasma display device in the present embodiment will be described. FIG. 4 is a circuit block diagram of the plasma display device in one embodiment of the present invention. The plasma display apparatus 1 includes a panel 10, an image signal processing circuit 41, a data electrode driving circuit 42, a scan electrode driving circuit 43, a sustain electrode driving circuit 44, a timing generation circuit 45, and a power supply circuit ( (Not shown).

  The image signal processing circuit 41 converts the input image signal sig into subfield data which is image data indicating light emission / non-light emission for each subfield in the discharge cell.

  The timing generation circuit 45 generates various timing signals for controlling the operation of each circuit based on the horizontal synchronization signal H and the vertical synchronization signal V, and supplies them to the respective circuits.

  Scan electrode drive circuit 43 is an initialization waveform generating circuit for generating an initialization waveform voltage to be applied to scan electrode SC1 to scan electrode SCn in the initialization period, and is applied to scan electrode SC1 to scan electrode SCn in the sustain period. A sustain pulse generation circuit for generating a pulse and a scan pulse generation circuit for generating a scan pulse voltage to be applied to scan electrode SC1 to scan electrode SCn in the address period, having a plurality of scan ICs. Then, each scan electrode SC1 to scan electrode SCn is driven based on the timing signal.

  The data electrode drive circuit 42 drives the data electrodes D1 to Dm based on the subfield data and timing signals output from the image signal processing circuit 41.

  Sustain electrode drive circuit 44 includes a sustain pulse generation circuit and a circuit for generating voltage Ve1 and voltage Ve2, and drives sustain electrode SU1 through sustain electrode SUn based on a timing signal.

  FIG. 5 is a circuit block diagram of the image signal processing circuit 41 according to the embodiment of the present invention. FIG. 5 shows circuit blocks related to luminance magnification control and luminance weight control in this embodiment, and other circuit blocks are omitted.

  The image signal processing circuit 41 includes an A / D conversion circuit 60, a gamma correction circuit 61, an APL detection circuit 62, an error diffusion circuit 63, a multiplication circuit 64, a subfield data creation circuit 65, a memory 66, A signal level region detection circuit 67 and a luminance magnification setting circuit 68 are provided.

  The A / D conversion circuit 60 performs generally known A / D conversion (Analog Digital Conversion), and converts an analog image signal input to the image signal processing circuit 41 into, for example, a 10-bit digital image signal. .

  The gamma correction circuit 61 performs gamma correction generally performed in the processing of a television signal on the digital image signal output from the A / D conversion circuit 60. In gamma correction, a process of multiplying an image signal by a correction value that changes according to a gradation value called a gamma curve is performed. At this time, the digital image signal is expanded to digital data (for example, 16-bit data) larger than the uncorrected image signal (for example, 10-bit data) by multiplication processing by gamma correction and output from the gamma correction circuit 61. The

  The APL detection circuit 62 detects the average brightness (APL) of the image signal by a generally known calculation method such that the luminance signal of the image signal is cumulatively added over one field period. Normalize to numbers up to% and output.

  The signal level area detection circuit 67 detects the luminance signal of the image signal for each pixel over one field period, and cumulatively adds the number of pixels within a predetermined luminance signal range, for example, from 0%. Output as a percentage normalized to a numerical value up to 100%. In this embodiment, the number of pixels whose luminance signal is greater than or equal to a predetermined value is cumulatively added. That is, the signal level area detection circuit 67 calculates the ratio of the high luminance area (area where the signal level is high) where the signal level is a predetermined value or higher (the ratio of the high luminance area to the display area of the panel 10 and the area ratio). If the entire display area is a high luminance area, 100% is output. Here, the ratio of the high luminance region output from the signal level region detection circuit 67 is referred to as “high luminance region ratio”.

  When there is a difference between the gradation value of the image signal and the gradation value for display, the error diffusion circuit 63 diffuses the difference to surrounding pixels, thereby converting the displayed gradation value to the image signal. A generally known error diffusion process such as approaching the gradation value is performed. In the error diffusion circuit 63, the image signal (for example, 16-bit data) output from the gamma correction circuit 61 is converted into an image signal (for example, 9-bit data) in which the number of gradations (the number of gradation values used for display) is limited. Data) and output.

  In the memory 66, a plurality of pieces of subfield information (hereinafter referred to as “subfield configuration”) having different combinations of luminance weights in each subfield in one field period and a plurality of coding data corresponding to the subfield configuration are stored in advance. It is remembered. The coding data is data that predetermines which gradation value is used for image display and how to combine a subfield to be lit and a non-lighting subfield to display the gradation value. That is, under one subfield configuration, there are a plurality of predetermined coding data based on the subfield configuration, and such a plurality of coding data is set in each subfield configuration and stored in the memory 66. It is remembered. Then, the memory 66 outputs internal data to the subfield data creation circuit 65 under the control of the subfield data creation circuit 65.

  In the present embodiment, the plurality of subfield configurations stored in memory 66 include subfield configurations with different sums of luminance weights in one field period.

  The subfield data creation circuit 65 selects one subfield configuration according to the high luminance region ratio detected by the signal level region detection circuit 67, and among the plurality of coding data created under the subfield configuration. Then, the coding data corresponding to the gradation value of the image signal is selected and read from the memory 66. The data read in this way is output to the data electrode drive circuit 42 as subfield data. Also, luminance weight information of each subfield in the selected subfield configuration is output to the timing generation circuit 45.

  In the present embodiment, as described above, a plurality of subfield configurations include subfield configurations in which the sum of luminance weights in one field period is different. Therefore, the image signal must be changed to digital data corresponding to the sum of luminance weights. Therefore, the multiplication circuit 64 performs a process of changing the number of gradations of the image signal based on the sum of luminance weights of the subfield configuration selected by the subfield data creation circuit 65. For example, when the sum of the luminance weights of the subfield configuration selected by the subfield data creation circuit 65 is 256, the multiplication circuit 64 outputs the image signal (for example, 9-bit, 512-gradation digital signal) output from the error diffusion circuit 63. Data) is changed to 256 gradation digital data, and when the sum of luminance weights is 322, the image signal output from the error diffusion circuit 63 is changed to 322 gradation digital data.

  Then, the luminance magnification setting circuit 68 sets the luminance magnification according to the APL detected by the APL detection circuit 62 and outputs the luminance magnification to the timing generation circuit 45. In this embodiment, since the subfield configuration (in this case, the luminance weight of each subfield) is changed based on the high luminance region detected by the signal level region detection circuit 67, the luminance magnification is changed to the subfield configuration. It must be changed to the combined value. Therefore, the luminance magnification setting circuit 68 performs processing for changing the luminance magnification of the image signal based on the sum of the luminance weights of the subfield configuration selected by the subfield data creation circuit 65.

  The data electrode drive circuit 42 performs a write operation based on the subfield data output from the subfield data generation circuit 65, and the timing generation circuit 45 performs luminance weight information and luminance output from the subfield data generation circuit 65. Based on the luminance magnification output from the magnification setting circuit 68, the number of sustain pulses generated in the sustain period of each subfield is controlled.

  Next, the APL detected by the APL detection circuit 62 in the present embodiment, the high luminance area ratio detected by the signal level area detection circuit 67, the subfield configuration and the luminance selected by the subfield data creation circuit 65 The relationship of the luminance magnification set in the magnification setting circuit 68 will be described. First, the relationship between the total number of sustain pulses generated in one field period and APL will be described. Note that the APL used in the following description is an APL detected by the APL detection circuit 62.

  FIG. 6 is a characteristic diagram showing an example of the relationship between the APL, the total number of sustain pulses generated in one field period, and the power consumption in one embodiment of the present invention. FIG. 6A is a characteristic diagram showing an example of the relationship between the APL and the total number of sustain pulses generated in one field period in the present embodiment, and the horizontal axis indicates the APL detected by the APL detection circuit 62. The vertical axis represents the total number of sustain pulses generated in one field period (hereinafter simply referred to as “total number of sustain pulses”). FIG. 6B is a characteristic diagram showing an example of the relationship between APL and power consumption in the present embodiment. The horizontal axis represents the APL detected by the APL detection circuit 62, and the vertical axis represents the plasma display. The power consumption in the apparatus 1 is represented.

  In the present embodiment, as shown in FIG. 6A, the total number of sustain pulses is about 918 when displaying an image with APL less than 24%, and is maintained when displaying an image with 100% APL. Depending on the APL, the total number of pulses is 239, and when displaying images with APL of 24% or more, the total number of sustain pulses gradually decreases from 918 to 239 from APL 24% to APL 100%. The subfield configuration and brightness magnification are changed. At this time, in this embodiment, from APL 24% to APL 100%, the total number of sustain pulses is controlled so that the power consumption is constant as shown in FIG. 6B. In the present embodiment, the change at this time is performed in 120 stages.

  As described above, when the APL of the image to be displayed is low, the total number of sustain pulses is increased because a dark image is displayed brighter by increasing the total number of sustain pulses generated when the APL is low. This is because it becomes possible. In an image with a low APL, the luminance value is generally low, or the luminance value is increased because there are many areas in which a region with a high luminance value exists while the luminance value is generally low. Thus, the luminance difference between the dark portion and the bright portion can be further increased, and a more dynamic and powerful image can be displayed.

  On the other hand, since an image with a high APL is an image with a high luminance value as a whole, even if the total number of sustain pulses is increased to increase the luminance, the dynamics of the image do not change so much only by increasing the overall luminance. . Furthermore, when the luminance is further increased in an image having a high APL, there is a problem that the power consumption increases accordingly. Therefore, when the APL of the image to be displayed is high, the total number of sustain pulses is reduced, and driving is performed with priority on reducing power consumption.

  Thus, by adopting a configuration in which the total number of sustain pulses is changed according to APL, it is possible to display a dynamic and powerful image while suppressing power consumption.

  Here, when the panel 10 has a higher definition and the number of scan electrodes that need to be scanned increases, the time required for one writing period increases and the length of the subfield may increase. If the length of the subfield increases and the number of subfields constituting one field period is limited, the gradation value that can be used for displaying an image is limited, which may increase noise in the display image. . For example, when one field period must be composed of nine subfields, the noise of the display image may increase compared to when one field period is composed of twelve subfields.

  On the other hand, the present inventor has a rough gradation value change in a high gradation value area by suppressing the ratio of the luminance weight of the subfield having a large luminance weight to the total luminance weight in an image having a large high luminance area. It was confirmed that noise can be reduced. In addition, it was confirmed that an area with a low gradation value can be displayed smoothly by reducing the ratio of the luminance weight of the subfield with a small luminance weight to the sum of the luminance weights in an image with a small high luminance area. Thus, it has been found that the image display quality can be improved by changing the subfield configuration in accordance with the size of the high luminance region.

  Therefore, in the present embodiment, when the subfield configuration is changed according to the size of the high luminance area and an image having a large high luminance area is displayed, the luminance weight of the subfield having a large luminance weight with respect to the sum of the luminance weights is changed. When the ratio is suppressed and an image with a small high luminance area is displayed, the sum of the luminance weights is increased to reduce the ratio of the luminance weights of the subfields with the smaller luminance weights to the sum of the luminance weights.

  FIG. 7 is a characteristic diagram showing an example of the relationship between the high luminance region and the sum of luminance weights in one field period (hereinafter simply referred to as “total luminance weight”) in one embodiment of the present invention. FIG. 7A is a characteristic diagram showing an example of the relationship between the high luminance area ratio and the sum of luminance weights in the present embodiment, and the horizontal axis indicates the high luminance detected by the signal level area detection circuit 67. The area ratio is represented, and the vertical axis represents the sum of luminance weights. FIG. 7B is a characteristic diagram illustrating an example of luminance weight control with respect to temporal change of the high luminance area ratio in the present embodiment, where the horizontal axis represents time, and the vertical axis represents the high luminance area ratio. , And represents the change over time of the sum of the luminance weights corresponding to it. Here, the curve indicating the temporal change in the high luminance area ratio is an example for explaining the present embodiment. FIG. 8 is a diagram showing an example of the distribution of luminance weights of each subfield according to the high luminance area ratio in the present embodiment.

  In the present embodiment, when displaying an image with a large high luminance area, the luminance weight of each subfield is set so that the ratio of the luminance weight of the subfield having a large luminance weight to the sum of the luminance weights can be suppressed. Specifically, the high luminance area detected by the signal level area detection circuit 67 is an area having a signal level of 60% or more, and the high luminance area ratio is a threshold value (5%) as shown in FIGS. In the above, the luminance weight of each subfield (first SF to ninth SF) is (1, 2, 4, 7, 13, 24, 41, 64, 100), the sum of the luminance weights is set to 256, and the luminance weight sub is large. The luminance weight of the field, for example, the eighth SF and the ninth SF is suppressed to a relatively small value such as 64,100.

  Thereby, it is possible to suppress a change in gradation value from becoming rough in a region having a high gradation value, and to reduce noise when an image having a large high luminance region is displayed. In this embodiment, when displaying an image with a high APL, the luminance magnification is gradually decreased from 3.561 to 0.93 in accordance with the APL, and the total number of sustain pulses is decreased from 908 to 239. As shown in FIG. 6, the power consumption is controlled to be constant at APL 24% or more.

  In addition, when displaying an image with a small high luminance area, a subfield configuration is used in which the ratio of the luminance weight of the subfield having a small luminance weight to the total luminance weight is smaller. Specifically, as shown in FIGS. 7 and 8, when the high luminance area ratio is less than the threshold (5%), the luminance weight of each subfield (first SF to ninth SF) is set to (1, 2, 4, 7). , 13, 25, 46, 82, 142), and the sum of the luminance weights is set to 322. When this luminance weight is compared with the luminance weight when the high luminance area ratio is 5% or more, it is the same in the subfields with small luminance weight (here, the first SF to the fifth SF), and the subfield with large luminance weight ( Here, it is increased from the sixth SF to the ninth SF). In particular, among the subfields having a large luminance weight, the subfield having the larger luminance weight has a higher luminance weight increase rate (for example, the increase rate in the ninth SF is 142/100 = 1.42 times).

  Thus, by making the ratio of the luminance weight of the subfield with a small luminance weight relative to the sum of the luminance weights relatively small, the change of the gradation value in the region with a low gradation value is made relatively fine, and the high luminance It is possible to more smoothly display an area with a low gradation value that occupies most of the display image with an image having a small area. In addition, in a small image with a high luminance region, noise in a region with a high gradation value is relatively inconspicuous, so even if the luminance weight of a subfield with a large luminance weight is increased, the effect on the display image is very small. It doesn't matter. Therefore, by increasing the luminance weight of the subfield having a large luminance weight to increase the sum of the luminance weights, it is possible to smoothly display a region having a low gradation value without increasing noise.

  Also, as shown in FIGS. 7B and 8, when the high luminance area ratio changes from an image having a high luminance area ratio of 5% or more to an image having a high luminance area ratio of less than 5%, the total number of luminance weights is changed from 256 to 322. And increase. On the other hand, when the high luminance area ratio changes from an image with a high luminance area ratio of less than 5% to an image with a high luminance area ratio of 5% or more, the total number of luminance weights is reduced from 322 to 256. At this time, a transition period for gradually changing the total number of luminance weights is provided so that the luminance weights do not change suddenly. Specifically, when the high luminance area ratio is less than 5% to 5% or more, the total number of luminance weights is gradually changed from 322 to 256 at a predetermined time interval (for example, one second interval) in the transition period. To decrease. On the other hand, when the high luminance area ratio is 5% or more and less than 5%, the total number of luminance weights is gradually increased from 256 to 322 at a predetermined time interval (for example, one second interval) in the transition period. To go. At this time, the luminance weights of the subfields with small luminance weights (here, the first SF to the fifth SF) are not changed, and the luminance weights of the subfields with large luminance weights (here, the eighth SF and the ninth SF) are changed more. Each luminance weight is set so that For example, the luminance weights of the first SF to the fifth SF remain constant at 1, 2, 4, 7, and 13, the luminance weight of the eighth SF is changed between 64 and 82, and the luminance weight of the ninth SF is set to 100. And 142. Thereby, the change of the luminance weight due to the change of the signal level can be smoothed, and the image display quality can be improved. In order to prevent control oscillation, a general sampling process or a filter process may be performed to determine the high luminance region.

  7 and 8, the luminance weight of each subfield (first SF to ninth SF) is (1, 2, 4, 7, 13, 25, 46, 82, 142), the sum of the luminance weights is made constant at 322, and the luminance weight of each subfield (first SF to ninth SF) is set to (1, 2, 4, 7, 13, 24, 41, 64, 100), and the sum of the luminance weights is fixed at 256, but this is merely an example of setting. Also, the numerical values and the number of subfields constituting one field are merely examples, and are not limited to these numerical values. These numerical values and settings may be optimally set according to the characteristics of the panel and the specifications of the plasma display device.

  In this embodiment, the total number of luminance weights is increased when displaying a small image in a high luminance area. However, if the luminance magnification is fixed, the total number of sustain pulses is increased according to the total number of luminance weights. Increase and the duration of the maintenance period increases. Therefore, when the time that can be allocated to the sustain period is limited, it is desirable to reduce the luminance magnification in accordance with the increase in the total number of luminance weights and keep the total number of sustain pulses constant. . FIG. 7 and FIG. 8 in the present embodiment show a configuration in which the luminance magnification is changed from 2.889 to 3.558 in accordance with the total number of luminance weights in the transition period, and the total number of sustain pulses is maintained at about 918. Yes. Such a configuration is effective when driving a high-definition panel in which the time that can be allocated to the sustain period is limited, and can suppress changes in apparent brightness.

  As described above, according to the present embodiment, when the subfield configuration is changed according to the size of the high luminance area and an image with a large high luminance area is displayed, the luminance weight is large with respect to the sum of the luminance weights. When displaying an image with a small luminance in a high-luminance area while suppressing the ratio of the luminance weight of the subfield, the luminance weight of the subfield with a large luminance weight is increased to increase the luminance weight sum, and the luminance weight relative to the luminance weight sum is increased. The luminance weight ratio of the small subfield is reduced. That is, when the high luminance area ratio is less than a predetermined threshold, the luminance weight of the subfield having a large luminance weight is increased and the luminance weight in one field period is larger than when the high luminance area ratio is equal to or higher than the threshold. The sum is increased. As a result, in an image with a large high-luminance region, noise is reduced by suppressing a rough change in the gradation value in a region with a high gradation value, and in an image with a small high-luminance region, the gradation is increased without increasing noise. Since a low-value area can be displayed smoothly, image display quality can be improved without increasing noise. Further, by adopting a configuration in which the total number of sustain pulses is changed according to APL, it is possible to display a dynamic and powerful image while keeping power consumption constant when displaying an image with a high APL. .

  In the embodiment of the present invention, scan electrode SC1 to scan electrode SCn are divided into a first scan electrode group and a second scan electrode group, and an address period is a scan electrode belonging to the first scan electrode group. Of a panel by so-called two-phase driving, which includes a first address period in which a scan pulse is applied to each of the first and second address periods in which a scan pulse is applied to each of the scan electrodes belonging to the second scan electrode group. The present invention can also be applied to a driving method, and the same effect as described above can be obtained.

  In the embodiment of the present invention, the scan electrode and the scan electrode are adjacent to each other, and the sustain electrode and the sustain electrode are adjacent to each other, that is, the arrangement of the electrodes provided on the front substrate 21 is “... scan electrode”. , Scan electrode, sustain electrode, sustain electrode, scan electrode, scan electrode,...

  It should be noted that the specific numerical values shown in the present embodiment are set based on the characteristics of a 50-inch panel having 1080 display electrode pairs, and are merely examples of the embodiment. The present invention is not limited to these numerical values, and is desirably set optimally according to the characteristics of the panel, the specifications of the plasma display device, and the like. Each of these numerical values is allowed to vary within a range where the above-described effect can be obtained.

  The present invention is useful as a plasma display device and a panel driving method because the image display quality can be improved without increasing noise even in a panel with high definition.

The disassembled perspective view which shows the structure of the panel in one embodiment of this invention. Electrode arrangement of the panel Drive voltage waveform diagram applied to each electrode of the panel The circuit block diagram of the plasma display apparatus in one embodiment of the present invention 1 is a circuit block diagram of an image signal processing circuit according to an embodiment of the present invention. The characteristic view which shows an example of the relationship between APL, the total number of the sustain pulses generated in 1 field period, and power consumption in one embodiment of this invention The characteristic view which shows an example of the relationship between the high-intensity area | region, luminance weight, and the sum total of the luminance weight in one field period in one embodiment of this invention The figure which shows an example of distribution of the luminance weight of each subfield in each high-intensity area | region in one embodiment of this invention

DESCRIPTION OF SYMBOLS 1 Plasma display apparatus 10 Panel 21 Front substrate 22 Scan electrode 23 Sustain electrode 24 Display electrode pair 25,33 Dielectric layer 26 Protective layer 31 Back substrate 32 Data electrode 34 Partition 35 Phosphor layer 41 Image signal processing circuit 42 Data electrode drive circuit 43 Scan electrode drive circuit 44 Sustain electrode drive circuit 45 Timing generation circuit 60 A / D conversion circuit 61 Gamma correction circuit 62 APL detection circuit 63 Error diffusion circuit 64 Multiplication circuit 65 Subfield data creation circuit 66 Memory 67 Signal level region detection circuit 68 Brightness magnification setting circuit

Claims (3)

In the method for driving a plasma display panel comprising a plurality of discharge cells each having a display electrode pair consisting of a scan electrode and a sustain electrode, the display region includes an initialization period and an address period. A plurality of subfields having a sustain period are provided in one field period, and a number of sustain pulses obtained by multiplying the luminance weight set for each subfield in the sustain period by a predetermined luminance magnification are alternately applied to the display electrode pairs. When the ratio of the area where the signal level of the input image signal is equal to or higher than the predetermined value is detected with respect to the display area, and the detected ratio is less than a predetermined threshold, the ratio is higher than that when the ratio is equal to or higher than the threshold. Therefore, the luminance weight of the subfield having a large luminance weight is increased to increase the total luminance weight in one field period. The driving method of a plasma display panel according to claim. When the ratio changes from the threshold value or more to less than the threshold value, a transition period is provided in which the sum of luminance weights in one field period is increased stepwise, and when the ratio changes from less than the threshold value to the threshold value or more, 1 2. The method of driving a plasma display panel according to claim 1, further comprising a transition period in which the sum of luminance weights in the field period is gradually reduced. 3. The plasma display according to claim 2, wherein in the transition period, the luminance magnification is changed in accordance with the sum of the luminance weights in one field period, and the total number of sustain pulses in one field period is kept substantially constant. Panel drive method.

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