JP2010157664A - Circuit substrate with electric and electronic component incorporated therein, and method of manufacturing the same - Google Patents

Circuit substrate with electric and electronic component incorporated therein, and method of manufacturing the same Download PDF

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JP2010157664A
JP2010157664A JP2009000196A JP2009000196A JP2010157664A JP 2010157664 A JP2010157664 A JP 2010157664A JP 2009000196 A JP2009000196 A JP 2009000196A JP 2009000196 A JP2009000196 A JP 2009000196A JP 2010157664 A JP2010157664 A JP 2010157664A
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Prior art keywords
land portion
circuit board
electric
electronic component
thin layer
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Yoshio Imamura
圭男 今村
Toru Matsumoto
徹 松本
Ryoichi Shimizu
良一 清水
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Meiko Co Ltd
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Meiko Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit substrate with electric and electronic components incorporated therein which is thin relative to a conventional circuit substrate with a component incorporated therein, and capable of increasing the number of surface-mounted components. <P>SOLUTION: In this circuit substrate with electric and electronic components incorporated therein, the electric and electronic components 2 and an intermediate circuit substrate 3 having, in a surface thereof, a component penetration hole 7 allowing the electric and electronic components 2 to penetrate therein, and having a first land part 6A on the upper surface 3a and a second land part 6B on the undersurface 3b are embedded in an insulation base material 1 having a third land part 4A on the upper surface 1a and a fourth land part 4B on the undersurface 1b; and all the third land part 4A, the first land part 6A and the second land part 6B are electrically connected to the first land part 6A, the second land part 6B and the fourth land part 4B through plating material filled vias 9a, 8, 9b, respectively. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は電気・電子部品内蔵回路基板とその製造方法に関し、更に詳しくは、従来の部品内蔵回路基板に比べて薄型で、しかも表面の部品実装面積も実質的に広くなっている電気・電子部品内蔵回路基板とその製造方法に関する。   The present invention relates to a circuit board with built-in electric / electronic components and a method for manufacturing the same, and more specifically, is an electric / electronic component that is thinner than a conventional circuit board with a built-in component and has a substantially large surface area for mounting components. The present invention relates to a built-in circuit board and a manufacturing method thereof.

各種の電気・電子機器の小型化、薄型化、軽量化、多機能化が急速に進んでいるが、とくに携帯電話、ノートパソコン、デジタルカメラなどの分野では、多機能化と並んで小型化、薄型化への要求が非常に強くなっている。
このような動向を背景にして、これら電気・電子機器に組み込まれる回路基板に関しては、各種の電気・電子部品を表面実装すると同時にこれら部品を回路基板の絶縁層を構成する絶縁基材に内蔵した構造の回路基板や、それを複数層積層して成る多層回路基板が注目を集めている。このような部品内蔵回路基板は、基板に実装する部品点数が同数であれば、完成した基板全体としては薄型化、小型化するからであり、また全体の配線長は短くなるので、最近進んでいる伝送信号の高周波化に伴う信号ノイズの発生を低減することができるからである。 Various electric and electronic devices are rapidly becoming smaller, thinner, lighter, and multifunctional, but especially in the fields of mobile phones, notebook computers, digital cameras, etc. The demand for thinning has become very strong.
Against the background of these trends, regarding circuit boards to be incorporated in these electric and electronic devices, various electric and electronic components are surface-mounted, and at the same time, these components are embedded in an insulating base material that constitutes an insulating layer of the circuit board. A circuit board having a structure and a multilayer circuit board formed by laminating a plurality of layers are attracting attention. Such a component-embedded circuit board has the same number of parts to be mounted on the board, because the completed board is made thinner and smaller, and the overall wiring length is shortened. This is because it is possible to reduce the occurrence of signal noise accompanying the increase in the frequency of the transmitted signal.

このような部品内蔵回路基板は、一般に次のようにして製造されている。
まず、絶縁基材の両面に銅箔が貼着されている両面銅張り積層板を用意し、銅箔にフォトリソグラフィー技術とエッチング技術を適用して、当該銅箔を所定パターンの導体回路Ｃ１に加工し、図１７で示したようなコア基板Ｃ０を製造する。
ついで、導体回路の所定位置に例えばはんだリフロー処理によって所定の電気・電子部品を表面実装したのち、その上に例えばプリプレグシートのような絶縁基材と銅箔をこの順序で重ね合わせて配置し、全体を熱圧プレスして当該電気・電子部品を絶縁基材に埋設する。 Such a component built-in circuit board is generally manufactured as follows.
First, a double-sided copper-clad laminate in which copper foil is adhered to both sides of an insulating substrate is prepared, and the copper foil is applied to a photolithography technique and an etching technique, and the copper foil is applied to a conductor circuit C 1 having a predetermined pattern. processed into, for manufacturing a core substrate C 0, as shown in FIG. 17.
Next, after a predetermined electrical / electronic component is surface-mounted by a solder reflow process, for example, at a predetermined position of the conductor circuit, an insulating base material such as a prepreg sheet and a copper foil are placed on top of each other in this order. The whole is hot-pressed to embed the electric / electronic component in an insulating substrate.

そして銅箔を所定パターンの導体回路に加工したのち、絶縁基材の厚み方向にスルーホールをドリル加工し、その表面に例えば無電解銅めっきと電解銅めっきを順次行って、上面と下面、導体回路と内蔵部品の間の導通をとる。
したがって、製造された部品内蔵回路基板は、図１８で示したように、厚み方向の中心部にはコア基板Ｃ０の絶縁基材が位置し、上面と下面の導体回路の間、および導体回路と内蔵部品Ｃ２の間は、全体の厚み方向に形成されたスルーホールを介して導通をとる構造になっている。 Then, after processing the copper foil into a conductor circuit with a predetermined pattern, drill through holes in the thickness direction of the insulating base material, and sequentially perform, for example, electroless copper plating and electrolytic copper plating on the surface. Provide continuity between the circuit and internal components.
Therefore, as shown in FIG. 18, the manufactured circuit board with a built-in component has the insulating base material of the core substrate C 0 positioned at the center in the thickness direction, between the upper and lower conductor circuits, and the conductor circuit. and between the internal components C 2 has a structure that takes the conduction through the through hole formed in the entire thickness direction.

上記した方法で製造された従来の部品内蔵回路基板の場合、出発素材として図１７で示したコア基板Ｃ０が用いられるので、全体の厚みには、用いたコア基板Ｃ０の絶縁基材の厚みが必ず含まれてくる。つまり、完成した部品内蔵回路基板においては、コア基板Ｃ０の絶縁基材の厚み相当分を薄くすることはできないことになる。
更に、従来の部品内蔵回路基板の場合、導体回路間の電気的接続はスルーホールを形成して実現されているのであるが、このスルーホールの径は一般に１００〜３００μｍ程度と大きな値であり、また上面と下面におけるスルーホールのランド部も２００〜４００μｍ程度の大きさになっている。 For conventional component built-in circuit board manufactured by the method described above, since the core substrate C 0 shown in FIG. 17 is used as a starting material, the total thickness of the insulating base material of the core substrate C 0 using Thickness is always included. That is, in the component built-in circuit board finished, so that it is impossible to reduce the thickness equivalent of the insulating base material of the core substrate C 0.
Furthermore, in the case of a conventional circuit board with a built-in component, electrical connection between conductor circuits is realized by forming a through hole, and the diameter of this through hole is generally a large value of about 100 to 300 μm, Further, the land portions of the through holes on the upper surface and the lower surface have a size of about 200 to 400 μm.

そのため、この部品内蔵回路基板の上面と下面においては、部品を実装するための実質的な面積は制限を受けることになり、それは表面実装する部品点数を減少させ、多機能化という目標を制限することになる。
本発明は、コア基板Ｃ０を用いて製造され、層間接続をスルーホールで実現している従来の部品内蔵回路基板における上記した問題を解決し、全体は薄型化していて、また部品の実質的な表面実装面積も大きくなっている新規構造の電気・電子部品内蔵回路基板とその製造方法の提供を目的とする。 Therefore, on the upper and lower surfaces of this component built-in circuit board, the substantial area for mounting components is limited, which reduces the number of components to be surface-mounted and limits the goal of multi-functionality. It will be.
The present invention may be manufactured using a core substrate C 0, to solve the above problems in the conventional component-embedded circuit board that implements the inter-layer connection through-hole, the whole is not thinned, also substantially of components An object of the present invention is to provide a circuit board with a built-in electric / electronic component having a large surface mounting area and a manufacturing method thereof.

上記した目的を達成するために、本発明においては、
電気・電子部品と、前記電気・電子部品が貫入できる部品貫入孔を有し、かつ、上面に第１ランド部、下面に第２ランド部を有する中間回路基板とが、上面に第３ランド部、下面に第４ランド部を有する絶縁基材に中に埋設され、前記第３ランド部と前記第１ランド部の間、前記第１ランド部と前記第２ランド部の間、および、前記第２ランド部と前記第４ランド部の間は、全て、めっき材充填ビアで電気的に接続されていることを特徴とする電気・電子部品内蔵回路基板が提供される。 In order to achieve the above object, in the present invention,
An intermediate circuit board having an electrical / electronic component and a component penetration hole through which the electrical / electronic component can be inserted and having a first land portion on the upper surface and a second land portion on the lower surface, and a third land portion on the upper surface Embedded in an insulating base material having a fourth land portion on the lower surface, between the third land portion and the first land portion, between the first land portion and the second land portion, and An electric / electronic component built-in circuit board is provided in which the two land portions and the fourth land portion are all electrically connected by plating material filled vias.

また本発明においては、
支持部材と前記支持部材の上に密着して配置された導電薄層とから成る２層構造の板状体の前記導電薄層の上に、内蔵すべき電気・電子部品との接続端子部を形成する工程１；
前記接続端子部に前記電気・電子部品を実装する工程２；
面内に前記電気・電子部品を貫入できる部品貫入孔が形成され、加熱により流動化する第１絶縁基材と、面内に前記電気・電子部品を貫入できる部品貫入孔が形成され、上面および下面にはそれぞれ第１ランド部と第２ランド部が形成され、かつ両面間の導通構造がレーザで厚み方向に穿設されたビアにめっき材を充填して成るめっき材充填ビアで形成されている中間回路基板と、面内に前記電気・電子部品を貫入できる部品貫入孔が形成され、加熱により流動化する第２絶縁基材と、導電シートとをこの順序で積層して前記導電薄層の上に配置する工程３；
全体に熱圧プレスを施して前記第１絶縁基材と前記第２絶縁基材が一体化した絶縁基材にすると同時にそこに前記電気・電子部品および前記中間回路基板が埋設されている一体化物を製造する工程４；
前記一体化物から前記支持部材を除去して前記導電薄層を表出させる工程５；
前記導電シートおよび前記導電薄層にそれぞれ第３ランド部と第４ランド部を形成するとともに、前記第３ランド部と前記第４ランド部の形成箇所の前記絶縁基材に前記中間回路基板の前記第１ランド部と前記第２ランド部とに接続するめっき材充填ビアをそれぞれ形成する工程６；
を備えていることを特徴とする電気・電子部品内蔵回路基板の製造方法が提供される。
そして、前記工程１で用いる板状体としては、前記導電薄層が銅箔であり、前記支持部材が前記銅箔よりも肉厚の銅箔であることが好ましく、また前記導電薄層がめっき銅から成り、前記支持部材が例えば銅箔やステンレス鋼板のような肉厚で高い剛性を有する導電性部材であることが好ましい。 In the present invention,
On the conductive thin layer of a two-layered plate-shaped body composed of a support member and a conductive thin layer arranged in close contact with the support member, a connection terminal portion for electrical / electronic components to be incorporated is provided. Forming step 1;
Step 2 of mounting the electrical / electronic component on the connection terminal portion;
A component penetration hole through which the electric / electronic component can be penetrated is formed in a plane, a first insulating base material that is fluidized by heating, a component penetration hole through which the electrical / electronic component can be penetrated is formed in a plane, A first land portion and a second land portion are respectively formed on the lower surface, and a conductive structure between both surfaces is formed by a plating material filled via formed by filling a plating material into a via drilled in a thickness direction by a laser. The conductive thin layer is formed by laminating an intermediate circuit board, a component penetration hole through which the electrical / electronic component can be penetrated in a plane, and a conductive sheet and a second insulating substrate fluidized by heating in this order. Placing on top of 3;
An integrated product in which the first insulating base material and the second insulating base material are integrated by subjecting the whole to a heat pressure press, and at the same time, the electric / electronic component and the intermediate circuit board are embedded therein. Manufacturing step 4;
Removing the support member from the integrated product to expose the conductive thin layer 5;
Forming a third land portion and a fourth land portion on the conductive sheet and the conductive thin layer, respectively, and forming the third land portion and the fourth land portion on the insulating base material on the intermediate substrate. Forming a plating material filled via connected to the first land portion and the second land portion, respectively; 6;
A method of manufacturing a circuit board with built-in electric / electronic components is provided.
And as a plate-shaped object used at the above-mentioned process 1, it is preferred that the conductive thin layer is a copper foil, the support member is a copper foil thicker than the copper foil, and the conductive thin layer is plated. It is preferable that the supporting member is made of copper and is a conductive member having a large thickness and high rigidity such as a copper foil or a stainless steel plate.

また、前記工程１における前記接続端子部が、前記導電薄層の上面に導電ペーストをスクリーン印刷する工程（以下、工程１Ａという）で形成されるか、または、前記導電薄層の上面にソルダーレジスト層を形成し、そのソルダーレジスト層の前記接続端子部を形成すべき箇所に前記導電薄層にまで至る開口部を形成し、ついで前記開口部にソルダーペーストをスクリーン印刷する工程（以下、工程１Ｂという）によって形成されることが好ましい。   Further, the connection terminal portion in the step 1 is formed in a step of screen printing a conductive paste on the upper surface of the conductive thin layer (hereinafter referred to as step 1A), or a solder resist is formed on the upper surface of the conductive thin layer. Forming a layer, forming an opening reaching the conductive thin layer at a position where the connection terminal portion of the solder resist layer is to be formed, and then screen-printing a solder paste in the opening (hereinafter, step 1B) It is preferable to be formed by.

本発明の電気・電子部品内蔵回路基板は、絶縁基材の上面と下面に形成されている第３ランド部と第４ランド部からそれぞれ引き出されて配線されている導体回路の一方に内蔵部品は接続されており、そして第３ランド部と第４ランド部間が、第３ランド部−絶縁基材内のめっき材充填ビア−中間回路基板の第１ランド部−中間回路基板のめっき材充填ビア−第２ランド部−絶縁基材内のめっき材充填ビア−第４ランド部の積層構造で電気的に接続されていて、全体としては、従来のスルーホールに比べるとその径は３０〜１５０μｍと大幅に小さく、またランド部も５０〜２５０μｍと大幅に小さいレーザビアにめっき材を充填して成るめっき材充填ビアで導通構造が形成されているので、部品を表面実装できる面積はスルーホールで層間接続をとる従来の部品内蔵回路基板に比べて大きくなり、しかも全体の厚みは薄くなる。   The circuit board with a built-in electric / electronic component according to the present invention has a built-in component on one of the conductor circuits drawn and wired from the third land portion and the fourth land portion formed on the upper surface and the lower surface of the insulating base, respectively. Between the third land portion and the fourth land portion, the third land portion—the plating material filling via in the insulating base material—the first land portion of the intermediate circuit board—the plating material filling via of the intermediate circuit board is connected. -Second land portion-Plated material filled via in insulating base-It is electrically connected in a laminated structure of the fourth land portion, and as a whole, its diameter is 30-150 μm compared to conventional through holes Since the conductive structure is formed by plating material filled vias, which are significantly smaller and the land part is also 50 to 250 μm and is filled with a plating material in a laser via, the area where the parts can be surface-mounted is indirectly through layers. Compared to the conventional circuit board with built-in components, the overall thickness is reduced.

本発明の電気・電子部品内蔵回路基板Ａを示す断面図である。It is sectional drawing which shows the electric / electronic component built-in circuit board A of this invention. 本発明の電気・電子部品内蔵回路基板Ｂを示す断面図である。It is sectional drawing which shows the electric / electronic component built-in circuit board B of this invention. 出発素材である板状体を示す断面図である。It is sectional drawing which shows the plate-shaped body which is a starting material. 中間体Ａ１を示す断面図である。Is a sectional view showing an intermediate A 1. 中間体Ａ２を示す断面図である。Is a sectional view showing an intermediate A 2. 工程３を説明するための断面図である。11 is a cross-sectional view for explaining a step 3. FIG. 中間体Ａ３を示す断面図である。Is a sectional view showing an intermediate A 3. 中間体Ａ４を示す断面図である。Is a sectional view showing an intermediate A 4. 板状体にソルダーレジスト層を形成した状態を示す断面図である。It is sectional drawing which shows the state which formed the soldering resist layer in the plate-shaped object. フォトレジスト層に開口部を形成した状態を示す断面図である。It is sectional drawing which shows the state which formed the opening part in the photoresist layer. ソルダーレジスト層に凹孔を形成した状態を示す断面図である。It is sectional drawing which shows the state which formed the concave hole in the soldering resist layer. 中間体Ｂ１を示す断面図である。FIG. 3 is a cross-sectional view showing an intermediate B1. 中間体Ｂ２を示す断面図である。Is a sectional view showing an intermediate B 2. 中間体Ｂ３を示す断面図である。Is a sectional view showing an intermediate B 3. 中間体Ｂ４を示す断面図である。Is a sectional view showing an intermediate B 4. 本発明の基板Ｂをコア基板にして組み上げた電気・電子部品内蔵多層回路基板の１例を示す断面図である。It is sectional drawing which shows an example of the multilayer board | substrate with a built-in electric / electronic component assembled by making the board | substrate B of this invention into the core board | substrate. 従来のコア基板の１例Ｃ０を示す断面図である。It is a sectional view of an example C 0 of the conventional core substrate. コア基板Ｃ０を用いて組み上げた電気・電子部品内蔵回路基板の１例を示す断面図である。Is a sectional view showing an example of electric and electronic part-containing circuit board is assembled with the core substrate C 0.

本発明の電気・電子部品内蔵回路基板の基本構造を図１と図２に示す。図１の基板Ａは、後述する工程１において、内蔵部品の端子部と表面の導体回路とを接続するための接続端子部を導電薄層に形成する際に、前記した工程１Ａを採用したときに得られる基板であり、図２の基板は工程１Ｂを採用したときに得られる基板である。
基板Ａ、基板Ｂは、いずれも、絶縁基材１の中に電気・電子部品２と中間回路基板３が埋設されている。 The basic structure of the circuit board with built-in electric / electronic parts of the present invention is shown in FIGS. The substrate A in FIG. 1 adopts the above-described step 1A when forming the connection terminal portion for connecting the terminal portion of the built-in component and the conductive circuit on the surface in the conductive thin layer in the step 1 described later. The substrate shown in FIG. 2 is a substrate obtained when Step 1B is adopted.
In both the substrate A and the substrate B, the electric / electronic component 2 and the intermediate circuit substrate 3 are embedded in the insulating base material 1.

最初に基板Ａについて説明する。
絶縁基材１は、後述する工程４で第１絶縁基材と第２絶縁基材が熱圧プレス処理によって一体化して成るものであって、その上面１ａと下面１ｂにはそれぞれ第３ランド部４Ａと第４ランド部４Ｂが形成されている。そして第３ランド部４Ａからは導体回路４ａ、第４ランド部４Ｂからは導体回路４ｂがそれぞれ引き出され、それらは所定のパターンで絶縁基材１の表面に配線されている。 First, the substrate A will be described.
The insulating base material 1 is formed by integrating the first insulating base material and the second insulating base material by a hot press process in Step 4 to be described later, and the upper surface 1a and the lower surface 1b have third land portions respectively. 4A and the 4th land part 4B are formed. A conductor circuit 4a is drawn from the third land portion 4A, and a conductor circuit 4b is drawn from the fourth land portion 4B, and these are wired on the surface of the insulating base 1 in a predetermined pattern.

電気・電子部品２は、例えばランドのような接続部２ａが、後述する工程１Ａで導電薄層の上に形成される接続端子部５ａを介して絶縁基材１の下面１ａに配線されている導体回路４ｂと電気的に接続された状態で、絶縁基材１の中に埋設されている。
中間回路基板３は、それ自身が信号処理機能を有する１個の回路基板であって、その上面３ａには第１ランド部６Ａ、下面３ｂには第２ランド部６Ｂがそれぞれ形成されていて、第１ランド部６Ａからは導体回路６ａ、第２ランド部６Ｂからは導体回路６ｂがそれぞれ引き出され、それら導体回路は中間回路基板３の表面に所定のパターンで配線されている。 In the electrical / electronic component 2, for example, a connecting portion 2a such as a land is wired to the lower surface 1a of the insulating base 1 via a connecting terminal portion 5a formed on the conductive thin layer in step 1A described later. It is embedded in the insulating base material 1 while being electrically connected to the conductor circuit 4b.
The intermediate circuit board 3 itself is a circuit board having a signal processing function, and the first land portion 6A is formed on the upper surface 3a, and the second land portion 6B is formed on the lower surface 3b. A conductor circuit 6a is drawn from the first land portion 6A, and a conductor circuit 6b is drawn from the second land portion 6B, and these conductor circuits are wired on the surface of the intermediate circuit board 3 in a predetermined pattern.

この中間回路基板３の面内には、内蔵すべき電気・電子部品２を貫入できる大きさと形状の部品貫入孔７が形成されていて、電気・電子部品２は、この部品貫入孔７の箇所において前記した態様で導体回路４ｂと電気的に接続されている。
そして中間回路基板３の厚み方向には、後述するめっき材充填ビア８が柱状導体として形成され、その上部と下部はそれぞれ第１ランド部６Ａ、第２ランド部６Ｂと電気的に接続されている。したがって、この中間回路基板の場合、上面３ａの導体回路６ａと下面３ｂの導体回路６ｂの間には、第１ランド部６Ａ−めっき材充填ビア（柱状導体）８−第２ランド部６Ｂという形態で導通構造が形成されている。 In the surface of the intermediate circuit board 3, a component penetration hole 7 having a size and a shape capable of penetrating the electrical / electronic component 2 to be incorporated is formed, and the electrical / electronic component 2 is located at the location of the component penetration hole 7. Are electrically connected to the conductor circuit 4b in the manner described above.
In the thickness direction of the intermediate circuit board 3, a plating material filled via 8 described later is formed as a columnar conductor, and the upper and lower portions thereof are electrically connected to the first land portion 6A and the second land portion 6B, respectively. . Therefore, in the case of this intermediate circuit board, the form of the first land portion 6A—the plating material filled via (columnar conductor) 8—the second land portion 6B is formed between the conductor circuit 6a on the upper surface 3a and the conductor circuit 6b on the lower surface 3b. A conductive structure is formed.

また、中間回路基板３の第１ランド部６Ａの上面側と、第２ランド部６Ｂの下面側に位置している絶縁基材１の箇所にも、それぞれ、同様なめっき材充填ビア９ａ、９ｂが第１ランド部６Ａ、第２ランド部６Ｂとそれぞれ接続して形成され、これらは、更にそれぞれ絶縁基材１の表面に形成されている第３ランド部４Ａ、第４ランド部４Ｂと電気的に接続されている。   Further, similar plating material filling vias 9a and 9b are also provided at the location of the insulating base 1 located on the upper surface side of the first land portion 6A and the lower surface side of the second land portion 6B of the intermediate circuit board 3, respectively. Are connected to the first land portion 6A and the second land portion 6B, respectively, and these are electrically connected to the third land portion 4A and the fourth land portion 4B formed on the surface of the insulating base 1, respectively. It is connected to the.

したがって、この基板Ａにあっては、上面１ａに配線されている導体回路４ａと下面１ｂに配線されている導体回路４ｂの間には、第３ランド部４Ａ−絶縁基材内のめっき材充填ビア９ａ−第１ランド部６Ａ−中間回路基板のめっき材充填ビア８−第２ランド部６Ｂ−絶縁基材内のめっき材充填ビア９ｂ−第４ランド部４Ｂという絶縁基材の厚み方向に積層して成る導通構造が形成されている。   Therefore, in this board | substrate A, between the conductor circuit 4a wired on the upper surface 1a and the conductor circuit 4b wired on the lower surface 1b, it fills with the plating material in 3rd land part 4A-insulation base material. Via 9a-first land portion 6A-intermediate circuit board plating material filled via 8-second land portion 6B-insulating base material plated via 9b-fourth land portion 4B laminated in the thickness direction of the insulating base material A conductive structure is formed.

工程１Ｂを経由して製造され、図２で示した基板Ｂは、絶縁基材１の下面１ｂと導体回路４ｂの間に、厚みが接続端子部５ｂの高さと等しいソルダーレジスト層１０が介在し、また接続端子部５ｂがソルダーペーストで形成されていることを除いては、前記した基板Ａの場合と同じ構造になっている。すなわち、この基板Ｂでは、基板Ａにおける１枚の絶縁基材１が絶縁基材１とソルダーレジスト層１０の積層体になっているのである。   The substrate B manufactured through the step 1B and shown in FIG. 2 has a solder resist layer 10 having a thickness equal to the height of the connection terminal portion 5b between the lower surface 1b of the insulating base 1 and the conductor circuit 4b. Moreover, it has the same structure as the case of the above-mentioned board | substrate A except the connection terminal part 5b being formed with the solder paste. That is, in this substrate B, one insulating base material 1 on the substrate A is a laminate of the insulating base material 1 and the solder resist layer 10.

次に製造方法について説明する。
これらの基板Ａ、基板Ｂのいずれにおいても、製造に当たっては、図３で示した板状体４を出発素材とする。
この板状体４は、導電材料から成る導電薄層４Ｃと、この導電薄層４Ｃよりも厚い支持部材４Ｄを例えば剥離可能に貼着して積層した２層構造になっている。 Next, a manufacturing method will be described.
In either of these substrates A and B, the plate-like body 4 shown in FIG. 3 is used as a starting material in manufacturing.
The plate-like body 4 has a two-layer structure in which a conductive thin layer 4C made of a conductive material and a support member 4D thicker than the conductive thin layer 4C are detachably attached and laminated.

導電薄層４Ｃは、最終的には、基板Ａの下面１ｂに配線されている導体回路４ｂや、基板Ｂのソルダーレジスト層１０に配線されている導体回路４ｂに加工されるので、導電材料で構成されていることを必須の要件とするが、支持部材４Ｄの方は、導電薄層４Ｃを支持するための支持材であって、必ずしも導電材料である必要はなく、例えば各種の樹脂フィルムであってもよい。   The conductive thin layer 4C is finally processed into a conductor circuit 4b wired on the lower surface 1b of the substrate A or a conductor circuit 4b wired on the solder resist layer 10 of the substrate B. The supporting member 4D is a supporting material for supporting the conductive thin layer 4C, and is not necessarily a conductive material. For example, various resin films are used. There may be.

このような板状体としては、導電薄層４Ｃが薄い銅箔であり、支持部材４Ｄが厚い銅箔（当て銅と呼ばれる）であるものとして例えば古河サーキットフォイル社製のキャリア銅箔として市販されているものや、または支持部材４Ｄを厚いステンレス鋼板とし、その表面に銅めっきを行い、そのめっき銅で導電薄層４Ｃを形成したものなどを使用することができる。   As such a plate-like body, the conductive thin layer 4C is a thin copper foil, and the support member 4D is a thick copper foil (called copper), for example, commercially available as a carrier copper foil manufactured by Furukawa Circuit Foil. Or the support member 4D made of a thick stainless steel plate, copper-plated on the surface thereof, and the conductive thin layer 4C formed with the plated copper can be used.

工程１。
この工程は、板状体４の導電薄層４Ｃの上に、基板Ａ、基板Ｂのいずれの場合においても、内蔵する電気・電子部品２の接続部２ａと導体回路４ｂの間を接続するための接続端子部５ａ、５ｂを形成する工程である。
その場合、工程１としては工程１Ａと工程１Ｂを実施することができるのであるが、工程１Ａを実施すれば最終的には図１で示した基板Ａが製造され、工程１Ｂを実施すれば図２で示した基板Ｂが製造される。 Step 1.
This step is for connecting the connecting portion 2a of the built-in electric / electronic component 2 and the conductor circuit 4b on the conductive thin layer 4C of the plate-like body 4 in both cases of the substrate A and the substrate B. The connection terminal portions 5a and 5b are formed.
In that case, step 1A and step 1B can be carried out as step 1, but if step 1A is carried out, substrate A shown in FIG. 1 is finally produced, and step 1B is carried out. The substrate B indicated by 2 is manufactured.

そこで、最初に工程１Ａを採用して実施する基板Ａの製造方法について説明する。
工程１Ａにおいては、板状体４の導電薄層４Ｃの上面に導電ペーストを用いたスクリーン印刷を行い、図４で示したように、導電ペーストから成り、パッド部も含む接続端子部５ａが所定の位置に形成されている中間体Ａ１を製造する。
工程２。 Therefore, first, a method for manufacturing the substrate A, which is performed by adopting the step 1A, will be described.
In Step 1A, screen printing using a conductive paste is performed on the upper surface of the conductive thin layer 4C of the plate-like body 4, and as shown in FIG. 4, the connection terminal portion 5a made of the conductive paste and including the pad portion is predetermined. is the formation in a position to produce the intermediate a 1 is.
Step 2.

この工程は、工程１で得られた中間体Ａ１の接続端子部５ａに内蔵すべき電気・電子部品を実装する工程である。
具体的には、導電薄層４Ｃの上面に突設されている接続端子部５ａと電気・電子部品の端子部２ａを重ね合わせたのち、電気・電子部品を軽く押圧しながら所定温度に加熱する。その結果、接続部２ａと導電ペーストが接着し、かつ当該導電ペーストは熱硬化して、図５で示したように、導電薄層４Ｃの上面に接続端子部５ａを介して電気・電子部品２が実装されている中間体Ａ２が得られる。 This step is a step of mounting the electric and electronic components to be incorporated in the resultant intermediate A 1 connecting terminal portions 5a in step 1.
Specifically, the connection terminal portion 5a protruding from the upper surface of the conductive thin layer 4C and the terminal portion 2a of the electric / electronic component are overlapped, and then heated to a predetermined temperature while lightly pressing the electric / electronic component. . As a result, the connection portion 2a and the conductive paste are bonded, and the conductive paste is thermally cured. As shown in FIG. 5, the electric / electronic component 2 is connected to the upper surface of the conductive thin layer 4C via the connection terminal portion 5a. There intermediate A 2 is obtained that is implemented.

この中間体Ａ２の場合、実装されている電気・電子部品の下面と導電薄層４Ｃの上面の間には、接続端子部５ａの高さとほぼ等しい微小クリアランスδが形成されている。
工程３。
この工程は、中間体Ａ２に実装されている電気・電子部品を絶縁基材に埋設するための予備工程である。 In this case the intermediate A 2, between the upper surface of the lower surface and the conductive thin layer 4C of electric and electronic components mounted approximately equal small clearance δ and the height of the connection terminal portions 5a are formed.
Step 3.
This step is a preliminary step for embedding the electric and electronic components mounted on the intermediate A 2 in the insulating substrate.

工程３においては、図６で示したように、まず中間体Ａ２の上に、第１絶縁基材１１、中間回路基板３、第２絶縁基材１２、および導電シート１３をこの順序で重ね合わせて配置する。
ここで、第１絶縁基材１１，第２絶縁基材１２、中間回路基板３には、それぞれの面内に中間体Ａ２の実装部品２が貫入できる形状と大きさの部品貫入孔１１ａ、１２ａ、７が形成されている。 In step 3, as shown in FIG. 6, on the preform A 2 First, overlapped first insulating base material 11, the intermediate circuit board 3, the second insulating substrate 12 and the conductive sheet 13, in this order Place them together.
Here, the first insulating base material 11, second insulating substrate 12, the intermediate circuit board 3, each implementation component 2 of Intermediate A 2 can penetrate into the surface shape and size of the part penetrating holes 11a, 12a and 7 are formed.

用いる第１絶縁基材１１，第２絶縁基材１２としては、例えばガラスクロス、ガラス繊維、アラミド繊維などを補強材とし、ここに未硬化のエポキシ樹脂、フェノール樹脂、不飽和ポリエステル樹脂のような絶縁樹脂を含浸させた絶縁樹脂シートが好適であるが、含浸させた樹脂を半硬化させたプリプレグ材であってもよい。これらの材料では、後述する熱圧プレス時に加熱されて含浸樹脂が流動化する。   As the first insulating base material 11 and the second insulating base material 12 to be used, for example, glass cloth, glass fiber, aramid fiber or the like is used as a reinforcing material, and uncured epoxy resin, phenol resin, unsaturated polyester resin or the like is used here. An insulating resin sheet impregnated with an insulating resin is suitable, but a prepreg material obtained by semi-curing the impregnated resin may also be used. In these materials, the impregnating resin is fluidized by being heated at the time of the hot press described later.

また導電シートとしては、好適には銅箔が用いられる。
中間回路基板３は、１個の独立した回路基板であって、通常、薄いフレキシブルフィルム回路基板が使用され、その上面３ａには導体回路６ａ、下面１ｂには導体回路６ｂがそれぞれ形成されている。そして、導体回路６ａと導体回路６ｂの間は、中間回路基板３の厚み方向にレーザ加工することによって形成されたレーザビア（貫通孔）の中に、電解めっきによってめっき材を充填して成るめっき材充填ビア（柱状導体）８で導通がとられている。めっき材としては通常銅が用いられる。 As the conductive sheet, a copper foil is preferably used.
The intermediate circuit board 3 is an independent circuit board, and usually a thin flexible film circuit board is used, and a conductor circuit 6a is formed on the upper surface 3a, and a conductor circuit 6b is formed on the lower surface 1b. . And between the conductor circuit 6a and the conductor circuit 6b, the plating material which fills a plating material by electrolytic plating in the laser via (through-hole) formed by carrying out laser processing in the thickness direction of the intermediate circuit board 3 Conduction is made by a filled via (columnar conductor) 8. Copper is usually used as the plating material.

工程４。
この工程は、上記した各部材を中間体Ａ２の上に配置したのち、全体に熱圧プレスを施して第１絶縁基材１２と第２絶縁基材１２を一体化し、同時にこの一体化された絶縁基材の中に実装部品２が埋設されている一体化物を製造する工程である。
熱圧プレスされると、絶縁基材１１，１２は含浸されている絶縁樹脂が一旦軟化して流動化し、その軟化・流動化した絶縁樹脂は、加圧環境下にあるので実装部品２と導電薄層４Ｃの間の微小クリアランスδや、中間回路基板３の部品貫入孔７と実装部品２の間のクリアランスにも流入して実装部品２と中間回路基板３の全体を包み込み、その後、熱硬化して一体化した絶縁基材に転化する。 Step 4.
This step, after placing the respective members described above on the intermediate A 2, integral with the first insulating substrate 12 is subjected to hot pressing the entire of the second insulating substrate 12, is the integral time This is a process for manufacturing an integrated product in which the mounting component 2 is embedded in the insulating base.
When hot-pressed, the insulating base materials 11 and 12 are once softened and fluidized in the impregnated insulating resin. Since the softened and fluidized insulating resin is in a pressurized environment, the insulating base material 11 and 12 are electrically conductive with the mounting component 2. It flows into the micro clearance δ between the thin layers 4C and the clearance between the component penetration hole 7 of the intermediate circuit board 3 and the mounting component 2 so as to wrap the entire mounting component 2 and the intermediate circuit board 3, and then thermosetting. And converted into an integrated insulating substrate.

その結果、図７で示したように、中間体Ａ２の上には、第１絶縁基材１１と第２絶縁基材１２が一体化して成る絶縁基材１の中に実装部品２と中間回路基板３とが埋設され、絶縁基材１の表面に導電シート１３が貼着されている一体化物（中間体Ａ３）が得られる。
なお、この工程４では、実装部品２と導電薄層４Ｃとの間の微小クリアランスδや、実装部品２と第１絶縁基材１１，第２絶縁基材１２，および中間回路基板３におけるそれぞれの部品貫入孔１１ａ、１２ａ、および７とのクリアランスを各絶縁基材の含浸樹脂が満たすために必要な量を確保できるように、用いる第１絶縁基材１１，１２の厚みを設定しておく。 As a result, as shown in FIG. 7, on the intermediate body A 2 , the mounting component 2 and the intermediate are formed in the insulating base material 1 in which the first insulating base material 11 and the second insulating base material 12 are integrated. An integrated product (intermediate A 3 ) in which the circuit board 3 is embedded and the conductive sheet 13 is adhered to the surface of the insulating base 1 is obtained.
In this step 4, the minute clearance δ between the mounting component 2 and the conductive thin layer 4 </ b> C, the mounting component 2, the first insulating base material 11, the second insulating base material 12, and the intermediate circuit board 3, respectively. The thicknesses of the first insulating base materials 11 and 12 to be used are set so that a necessary amount for the impregnating resin of each insulating base material to satisfy the clearances with the component penetration holes 11a, 12a, and 7 can be secured.

工程５。
この工程は、中間体Ａ３から支持部材を除去する工程である。具体的には、中間体Ａ３から支持部材を剥離除去する。
その結果、図８で示したように、実装部品２と中間回路基板３を埋設する絶縁基材１の上面と下面がそれぞれ導電シート１３と導電薄層４Ｃで被覆されている中間体Ａ４が得られる。 Step 5.
This step is a step of removing the support member from the intermediate A 3. Specifically, peeled off the support member from the intermediate A 3.
As a result, as shown in FIG. 8, the intermediate body A 4 in which the upper surface and the lower surface of the insulating base material 1 in which the mounting component 2 and the intermediate circuit board 3 are embedded is covered with the conductive sheet 13 and the conductive thin layer 4C, respectively. can get.

工程６。
この工程は中間体Ａ４の導電シート１３と導電薄層４Ｃに常法のフォトリソグラフィー技術とエッチング技術を適用して、導電シートを所定パターンの導体回路４ａに、導電薄層を所定パターンの導体回路４ｂに加工し、また絶縁基材１にめっき材充填ビア９ａ、９ｂを形成して図１で示した基板Ａにする工程である。 Step 6.
This process applies a photolithography and etching techniques conventional methods to the conductive sheet 13 and the conductive thin layer 4C of Intermediate A 4, the conductive sheet to the conductor circuit 4a having a predetermined pattern, a conductive thin layer of a predetermined pattern conductor This is a step of processing the circuit 4b and forming the plating material filled vias 9a and 9b on the insulating base material 1 to form the substrate A shown in FIG.

めっき材充填ビアの形成に際しては、中間回路基板３のめっき材充填ビア８と接続する第１ランド部６Ａ、第２ランド部６Ｂの上（および下）に位置する導電シート１３と導電薄層４Ｃの該当個所をエッチング除去して絶縁基材１を表出させ、ついで表出した絶縁基材に上記第１ランド部６Ａ、第２ランド部６Ｂにまで至るレーザ孔を形成し、ここに常法の電解めっき法によりめっき材を充填し、更にその上に電解めっきで第３ランド部４Ａ、第４ランド部４Ｂを形成すればよい。   When forming the plating material filled via, the conductive sheet 13 and the conductive thin layer 4C located above (and below) the first land portion 6A and the second land portion 6B connected to the plating material filled via 8 of the intermediate circuit board 3. The insulating base material 1 is exposed by etching away the corresponding portions of the above, and then the laser holes extending to the first land portion 6A and the second land portion 6B are formed in the exposed insulating base material. The plating material may be filled by the electrolytic plating method, and the third land portion 4A and the fourth land portion 4B may be formed thereon by electrolytic plating.

なお、中間回路基板３，また基板Ａに形成されるめっき材充填ビアのめっき材としては銅が好適である。
次に工程１Ｂを採用した場合の製造方法について説明する。
工程１Ｂでは、図９で示したように、まず導電薄層４Ｃの上面全体に、形成すべき接続端子部の高さと同じ厚みでソルダーレジストを塗布してソルダーレジスト層１４を形成する。 Note that copper is suitable as the plating material for the plating material-filled via formed on the intermediate circuit board 3 and the substrate A.
Next, a manufacturing method when step 1B is employed will be described.
In step 1B, as shown in FIG. 9, first, a solder resist is applied to the entire upper surface of the conductive thin layer 4C with the same thickness as the height of the connection terminal portion to be formed to form the solder resist layer.

ついで、このソルダーレジスト層１４を被覆してフォトレジスト層１５を形成したのち、ここにフォトリソグラフィー技術とエッチング技術を適用して、図１０で示したように、形成すべき接続端子部の位置に下層のソルダーレジスト層１４にまで至る開口部１６を形成する。
ついで、エッチャントを用いて開口部１６の下に位置するソルダーレジスト層１４の部分をエッチング除去して、接続端子部を形成すべき箇所に導電薄層４Ｃにまで至る凹孔を形成したのち、フォトレジスト層１５を除去する。 Next, after coating the solder resist layer 14 and forming the photoresist layer 15, a photolithography technique and an etching technique are applied to the solder resist layer 14, and as shown in FIG. An opening 16 reaching the lower solder resist layer 14 is formed.
Next, a portion of the solder resist layer 14 located below the opening 16 is etched away using an etchant to form a concave hole reaching the conductive thin layer 4C at a position where the connection terminal portion is to be formed. The resist layer 15 is removed.

その結果、ソルダーレジスト層１４には、図１１で示したように、底部からは導電薄層４Ｃの表面が表出している凹孔１４ａが形成されている板状体が得られる。
ついで、ソルダーレジスト層１４にソルダーペーストを用いたスクリーン印刷を行って凹孔１４ａにソルダーペーストを充填する。その結果、図１２で示したように、ソルダーレジスト層１４の所定箇所には、導電薄層４Ｃと接続し、ソルダーペースト５ｂから成る接続端子部を有する中間体Ｂ１が得られる。 As a result, as shown in FIG. 11, the solder resist layer 14 is obtained as a plate-like body in which a concave hole 14 a in which the surface of the conductive thin layer 4 </ b> C is exposed is formed from the bottom.
Next, screen printing using a solder paste is performed on the solder resist layer 14 to fill the concave holes 14a with the solder paste. As a result, as shown in FIG. 12, an intermediate B 1 having a connection terminal portion made of the solder paste 5b is obtained at a predetermined location of the solder resist layer 14 and connected to the conductive thin layer 4C.

この中間体Ｂ１は工程２に移送され、そこで、導電薄層４Ｃに形成されている接続端子部５ｂに電気・電子部品２の端子部２ａを重ね合わせたのち、全体を所定温度のリフロー炉に通し、ついで室温まで冷却する。
ソルダーペーストから成る接続端子部５ｂは、リフロー処理時に一旦溶融して端子部２ａと接合したのち冷却されることにより、端子部２ａが接続端子部５ａに固着され、ここに、図１３で示したように、接続端子部５ａに電気・電子部品２が実装されている中間体Ｂ２が得られる。 This intermediate B 1 is transferred to step 2, where the terminal portion 2a of the electric / electronic component 2 is superposed on the connection terminal portion 5b formed in the conductive thin layer 4C, and the whole is then reflowed at a predetermined temperature. And then cool to room temperature.
The connection terminal portion 5b made of solder paste is once melted at the time of reflow processing, joined to the terminal portion 2a, and then cooled, whereby the terminal portion 2a is fixed to the connection terminal portion 5a, and is shown in FIG. as such, intermediate B 2 is obtained electric and electronic parts 2 are mounted to the connection terminal portion 5a.

この中間体Ｂ２の場合、前記した基板Ａの場合と異なり、中間体Ａ２で形成されていた実装部品２と導電薄層４Ｃの間の微小クリアランスδがソルダーレジスト層１４で満たされた状態の構造物になっている。
中間体Ｂ２は工程３を経由して工程４に移送され、そこで、図１４で示したように、実装部品２と中間回路基板３が絶縁基材1に埋設され、その表面には導電シート１３が貼着されている一体化物（中間体）Ｂ３が製造される。 In the case of this intermediate B 2 , unlike the case of the substrate A described above, a state in which the minute clearance δ between the mounting component 2 and the conductive thin layer 4 C formed with the intermediate A 2 is filled with the solder resist layer 14. It is a structure.
The intermediate B 2 is transferred to the step 4 via the step 3, where the mounting component 2 and the intermediate circuit board 3 are embedded in the insulating base 1 as shown in FIG. An integrated product (intermediate body) B 3 to which 13 is attached is produced.

この中間体Ｂ３は工程５に移送され、そこで、板状体４の支持部材４Ｄを剥離除去して、下面と上面がそれぞれ導電薄層４Ｃと導電シート１３で被覆されている中間体Ｂ４を得る。
ついで、この中間体Ｂ４を工程６に移送し、中間体Ａ４の場合と同様にして、導電シート１３と導電薄層４Ａに第３ランド部４Ａ、第４ランド部４Ｂ、導体回路４ａ、４ｂをそれぞれ形成し、あわせて絶縁基材1にめっき材充填ビア９ａ、９ｂを形成して、図２で示した基板Ｂにする。 This intermediate B 3 is transferred to step 5, where the support member 4D of the plate-like body 4 is peeled and removed, and the intermediate B 4 whose lower and upper surfaces are covered with the conductive thin layer 4C and the conductive sheet 13, respectively. Get.
Then transferring this intermediate B 4 to step 6, as in the case of Intermediate A 4, the third land portion 4A to the conductive sheet 13 and the conductive thin layer 4A, the fourth land portion 4B, the conductor circuits 4a, 4b is formed, and plating material filled vias 9a and 9b are formed in the insulating base material 1 together to form the substrate B shown in FIG.

以上のようにして製造される本発明の基板Ａ，Ｂは、例えば図１６に示したように、回路基板Ｂをコア基板とすることにより、ここに常法のビルドアップ工法で所定のプリント配線板構造を順次組み上げることにより、電気・電子部品が内蔵された多層回路基板の製造に利用することができる。   The boards A and B of the present invention manufactured as described above are, for example, as shown in FIG. 16, by using the circuit board B as a core board. By sequentially assembling the plate structure, it can be used to manufacture a multilayer circuit board with built-in electric / electronic components.

本発明の電気・電子部品回路基板は、全体の表面には導体回路が配線されているので、例えばマザーボードに搭載するモジュール基板として使用することもでき、また上記したように、ビルドアップ工法におけるコア基板としても使用することができる。   Since the electric / electronic component circuit board of the present invention has a conductor circuit wired on the entire surface, it can be used, for example, as a module board mounted on a mother board. It can also be used as a substrate.

１ 絶縁基材
１ａ 絶縁基材１の上面
１ｂ 絶縁基材１の下面
２ 電気・電子部品
２ａ 電気・電子部品２の接続部
３ 中間回路基板
３ａ 中間回路基板３の上面
３ｂ 中間回路基板３の下面
４ 板状体
４Ａ 第３ランド部
４Ｂ 第４ランド部
４Ｃ 導電薄層
４Ｄ 支持部材
４ａ、４ｂ、６ａ、６ｂ 導体回路
５ａ 接続端子部（導電ペースト）
５ｂ 接続端子部（ソルダーペースト）
７ 中間回路基板３の部品貫入孔
８、９ａ、９ｂ めっき材充填ビア
１０ ソルダーレジスト層
１１ 第１絶縁基材
１１ａ 第１絶縁基材の部品貫入孔
１２ 第２絶縁基材
１２ａ 第２絶縁基材の部品貫入孔
１３ 導電シート
１４ ソルダーレジスト層
１４ａ 凹孔 DESCRIPTION OF SYMBOLS 1 Insulating base material 1a Upper surface of insulating base material 1b Lower surface of insulating base material 2 Electric / electronic component 2a Connection part of electric / electronic component 2 3 Intermediate circuit board 3a Upper surface of intermediate circuit board 3b Lower surface of intermediate circuit board 3 4 Plate-like body 4A 3rd land part 4B 4th land part 4C Conductive thin layer 4D Support member 4a, 4b, 6a, 6b Conductor circuit 5a Connection terminal part (conductive paste)
5b Connection terminal (solder paste)
7 Component penetration hole of intermediate circuit board 8, 9a, 9b Plating material filled via 10 Solder resist layer 11 First insulating substrate 11a Component penetration hole of first insulating substrate 12 Second insulating substrate 12a Second insulating substrate Part penetration hole 13 Conductive sheet 14 Solder resist layer 14a Concave hole

Claims (10)

電気・電子部品と、前記電気・電子部品が貫入できる部品貫入孔を有し、かつ、上面に第１ランド部、下面に第２ランド部を有する中間回路基板とが、上面に第３ランド部、下面に第４ランド部を有する絶縁基材の中に埋設され、前記第３ランド部と前記第１ランド部の間、前記第１ランド部と前記第２ランド部の間、および、前記第２ランド部と前記第４ランド部の間が、全て、めっき材充填ビアで電気的に接続されていることを特徴とする電気・電子部品内蔵回路基板。   An intermediate circuit board having an electrical / electronic component and a component penetration hole through which the electrical / electronic component can be inserted and having a first land portion on the upper surface and a second land portion on the lower surface, and a third land portion on the upper surface Embedded in an insulating base material having a fourth land portion on the lower surface, between the third land portion and the first land portion, between the first land portion and the second land portion, and A circuit board with built-in electric / electronic parts, wherein two land portions and the fourth land portion are all electrically connected by a plating material filled via. 前記絶縁基材の上面には前記第３ランド部と接続する導体回路が形成され、前記絶縁基材の下面には前記第４ランド部と接続する導体回路が形成されている請求項１の電気・電子部品内蔵回路基板。   The electrical circuit according to claim 1, wherein a conductor circuit connected to the third land portion is formed on an upper surface of the insulating base material, and a conductor circuit connected to the fourth land portion is formed on a lower surface of the insulating base material.・ Electronic component built-in circuit board. 前記中間回路基板の上面には前記第１ランド部と接続する導体回路が形成され、前記中間回路基板の下面には前記第２ランド部と接続する導体回路が形成されている請求項１の電気・電子部品内蔵回路基板。   2. The electrical circuit according to claim 1, wherein a conductor circuit connected to the first land portion is formed on an upper surface of the intermediate circuit board, and a conductor circuit connected to the second land portion is formed on a lower surface of the intermediate circuit board.・ Electronic component built-in circuit board. 支持部材と前記支持部材の上に密着して配置された導電薄層とから成る２層構造の板状体の前記導電薄層の上に、内蔵すべき電気・電子部品との接続端子部を形成する工程１；
前記接続端子部に前記電気・電子部品を実装する工程２；
面内に前記電気・電子部品を貫入できる部品貫入孔が形成され、加熱により流動化する第１絶縁基材と、面内に前記電気・電子部品を貫入できる部品貫入孔が形成され、上面および下面にはそれぞれ第１ランド部と第２ランド部が形成され、かつ両面間の導通構造がレーザで厚み方向に穿設されたビアにめっき材を充填して成るめっき材充填ビアで形成されている中間回路基板と、面内に前電気・電子部品を貫入できる部品貫入孔が形成され、加熱により流動化する第２絶縁基材と、導電シートとをこの順序で積層して前記導電薄層の上に配置する工程３；
全体に熱圧プレスを施して前記第１絶縁基材と前記第２絶縁基材が一体化した絶縁基材にすると同時に、前記絶縁基材に前記電気・電子部品および前記中間回路基板を埋設させて一体化物を製造する工程４；
前記一体化物から前記支持部材を除去して前記導電薄層を表出させる工程５；
前記導電シートおよび前記導電薄層にそれぞれ第３ランド部と第４ランド部を形成するとともに、前記第３ランド部と前記第４ランド部の形成箇所の前記絶縁基材に前記中間回路基板の前記第１ランド部と前記第２ランド部とに接続するめっき材充填ビアをそれぞれ形成する工程６；
を備えていることを特徴とする電気・電子部品内臓回路基板の製造方法。 On the conductive thin layer of a two-layered plate-shaped body composed of a support member and a conductive thin layer arranged in close contact with the support member, a connection terminal portion for electrical / electronic components to be incorporated is provided. Forming step 1;
Step 2 of mounting the electrical / electronic component on the connection terminal portion;
A component penetration hole through which the electric / electronic component can be penetrated is formed in a plane, a first insulating base material that is fluidized by heating, a component penetration hole through which the electrical / electronic component can be penetrated is formed in a plane, A first land portion and a second land portion are respectively formed on the lower surface, and a conductive structure between both surfaces is formed by a plating material filled via formed by filling a plating material into a via drilled in a thickness direction by a laser. The conductive thin layer is formed by laminating an intermediate circuit board, a component penetration hole through which a front electric / electronic component can be penetrated in a plane, and a conductive sheet, which are fluidized by heating, in this order. Placing on top of 3;
The whole is subjected to hot-pressing to form an insulating base material in which the first insulating base material and the second insulating base material are integrated, and at the same time, the electric / electronic component and the intermediate circuit board are embedded in the insulating base material. Step 4 for producing an integrated product by
Removing the support member from the integrated product to expose the conductive thin layer 5;
Forming a third land portion and a fourth land portion on the conductive sheet and the conductive thin layer, respectively, and forming the third land portion and the fourth land portion on the insulating base material on the intermediate substrate. Forming a plating material filled via connected to the first land portion and the second land portion, respectively; 6;
A method for manufacturing an electric / electronic component-embedded circuit board. 前記工程１で用いる前記板状体の前記導電薄層が銅箔であり、前記支持部材が前記銅箔よりも肉厚の銅箔である請求項４の電気・電子部品内蔵回路基板の製造方法。   The method for manufacturing a circuit board with built-in electric / electronic components according to claim 4, wherein the conductive thin layer of the plate-like body used in step 1 is a copper foil, and the support member is a copper foil having a thickness greater than that of the copper foil. . 前記工程１で用いる前記板状体の前記導電薄層がめっき銅から成り、前記支持部材が前記導電薄層より肉厚で高い剛性を有する導電性部材から成る請求項４の電気・電子部品内蔵回路基板の製造方法。   5. The electric / electronic component built-in according to claim 4, wherein the conductive thin layer of the plate-like body used in the step 1 is made of plated copper, and the support member is made of a conductive member that is thicker and higher in rigidity than the conductive thin layer. A method of manufacturing a circuit board. 前記工程１における前記接続端子部が、前記導電薄層の上面に導電ペーストをスクリーン印刷して形成される請求項４〜６のいずれかの電気・電子部品内蔵回路基板の製造方法。   7. The method for manufacturing an electric / electronic component built-in circuit board according to claim 4, wherein the connection terminal portion in the step 1 is formed by screen-printing a conductive paste on an upper surface of the conductive thin layer. 前記工程１における前記接続端子部が、前記導電薄層の上面にソルダーレジスト層を形成し、前記ソルダーレジスト層の前記接続端子部を形成すべき箇所に前記導電薄層の上面にまで至る開口部を形成し、ついで前記開口部にソルダーペーストをスクリーン印刷して形成される請求項４〜６のいずれかの電気・電子部品内蔵回路基板の製造方法。   The connection terminal portion in the step 1 forms a solder resist layer on the upper surface of the conductive thin layer, and an opening that reaches the upper surface of the conductive thin layer at a location where the connection terminal portion of the solder resist layer is to be formed And then forming the circuit board with built-in electric / electronic components according to any one of claims 4 to 6 by forming a solder paste on the opening. 前記導電シートが銅箔である請求項４〜８のいずれかの電気・電子部品内蔵回路基板の製造方法。   The method for manufacturing a circuit board with built-in electric / electronic components according to claim 4, wherein the conductive sheet is a copper foil. 請求項１〜３のいずれかの電気・電子部品内蔵回路基板が組み込まれている電気・電子部品内蔵多層回路基板。   A multilayer circuit board with built-in electric / electronic components, in which the circuit board with built-in electric / electronic components according to claim 1 is incorporated.
JP2009000196A 2009-01-05 2009-01-05 Circuit substrate with electric and electronic component incorporated therein, and method of manufacturing the same Pending JP2010157664A (en)

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