JP2010124363A - Simulation apparatus for image processing circuit, simulation method for image processing circuit, design method of image processing circuit, and image processing circuit simulation program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a simulation apparatus for an image processing circuit capable of finding out an optimal combination of image processing modules in a short time. <P>SOLUTION: The simulation apparatus for the image processing circuit includes: a plurality of image processing modules that is executable on a computer and includes functions corresponding to partial image processing circuits; a means 61 for selecting image processing modules to be executed from among the plurality of image processing modules; a means 62 for setting an execution procedure of the selection image processing modules; a means 63 for performing image processing on image data to be input by sequentially implementing the image processing modules in accordance with the set execution procedure; and a means 7 for outputting result image data after image processing of image data by the executed image processing modules. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an image processing circuit simulation apparatus, an image processing circuit simulation method, an image processing circuit design method, and an image processing circuit simulation program.

2. Description of the Related Art Conventionally, programs for simulating results of executing various functions are known for function evaluation and debugging of software systems that can execute a plurality of functions.
For example, the test sequencer described in Patent Document 1 is configured to include a management module and an execution module. When a new function is added to a test executive to be tested or a function is modified, other functions The one that can easily check whether or not it interferes with is proposed.

Further, in the software test apparatus described in Patent Document 2, an apparatus that interfaces with input and output to software to be verified and receives and evaluates an output group according to an operation procedure, setting contents, and the like has been proposed. Yes.
Further, in the software component system described in Patent Document 3, pre-condition definition information indicating a state before executing another software component and post-condition definition information indicating a subsequent state are stored in the database in executing the software component. Aside, it has been proposed to accurately test software components.

By the way, in an image display device such as a projector and an FPD (Flat Panel Display), an image process is performed on input image data to form an appropriate display image. Is expanding.
Therefore, it is possible to form an image processing circuit capable of performing multi-functional image processing by combining various image processing such as color conversion, resolution conversion, gamma conversion and the like into a partial image processing circuit that is chipped in units of image processing. Has been done.
Conventionally, when designing such an image processing circuit, a technique has been adopted in which partial image processing circuits are prototyped, combined with each other to form an image processing circuit and evaluated.

JP 2006-53924 A JP 2006-48310 A JP 2006-91944 A

However, the trial production of such a partial image processing circuit has a problem that not only error verification takes time but also the trial production cost increases.
Also, even if verification is actually incorporated into the image processing circuit, there are many partial image processing circuits that are incorporated into the image processing circuit as the functions increase, and it is very difficult to identify where the error has occurred. There is a problem that there is.
Furthermore, even though there is no problem with individual functions, there are errors that are first revealed when functions are combined, and it is very difficult to verify this.
In general, a display image formed by an image display device is composed of a large number of pixels. However, it is difficult to evaluate the result of processing by the partial image processing circuit for each pixel. 3 cannot simply be applied to the world of image display devices.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an image processing circuit simulation device, an image, and an image processing circuit that can find an optimum combination of partial image processing circuits in a short time when an image processing circuit is formed by combining a plurality of partial image processing circuits. A processing circuit simulation method, an image processing circuit design method, and an image processing circuit simulation program are provided.

An image processing circuit simulation apparatus according to the present invention includes:
An image processing circuit simulation apparatus for simulating the operation of an image processing circuit configured by combining a plurality of partial image processing circuits,
A plurality of image processing modules executable on a computer and having a function corresponding to each partial image processing circuit;
Module selecting means for selecting an image processing module to be executed from among the plurality of image processing modules;
Module execution procedure setting means for setting the execution procedure of the image processing module selected by the module selection means;
Module execution means for sequentially executing the image processing modules selected by the module selection means according to the execution procedure set by the module execution procedure setting means, and performing image processing of input image data;
Output means for outputting the result image data after the image processing of the image data by the image processing module executed by the module execution means.

Here, the result image data output from the output means is not only image data that simply gives a result image after image processing, but also data such as a determination result obtained by performing some evaluation on the image data after image processing. It is a concept that includes.
According to the present invention, a combination of partial image processing circuits to be mounted on an image processing circuit is obtained on software as an image processing module corresponding to the partial image processing circuit by module selection means, module execution procedure setting means, and module execution means. Since it is possible to combine them and the result of image processing can be confirmed by the output means, it is not necessary to prototype the partial image processing circuit, etc. Processing simulation can be performed.
In addition, by performing such combination simulation on software, it is possible to perform simulation for all combinations in a short time, and to find an optimal combination of hardware image processing modules.

In the present invention, it is preferable that the image processing module selected by the module selection unit and a writing unit for writing the execution procedure set by the module execution procedure setting unit to a recording medium are provided.
According to the present invention, since the writing means is provided, it is possible to check the combination of the simulation performed in the past and the execution result at any time while reading from the recording medium. By referring to this, it is possible to set a more efficient combination of image processing modules and an execution procedure.

In the present invention, it is preferable that the output unit includes a result image display unit that displays a result image after image processing on the image display device based on the output result image data.
Here, the result image display unit may display the image processing result in each image processing module as a result image, or may display the image processing results of a plurality of image processing modules as a result image.
According to the present invention, since the observer can visually confirm the result image by each image processing module and the result of the plurality of image processing by the combination of the plurality of image processing modules, at which stage or in which execution procedure This makes it easy to check whether image quality degradation occurs.

In the present invention, it is preferable that the output unit includes a result image data writing unit that writes the result image data to be output on a recording medium.
According to the present invention, since the result image data is written in the recording medium, the comparison between the input image data and the result image data can be compared on the data. Can be used to automatically quantify and evaluate the degree of image quality degradation.

In the present invention, it is preferable that the plurality of image processing modules include at least a resolution conversion module, a color conversion module, and a gamma characteristic conversion module.
Among various types of image processing, resolution conversion, color conversion, and gamma characteristic conversion include color conversion processing, sharpness processing, and contrast processing in a module that executes each image processing. Therefore, image processing is performed according to the order of these image processing. There may be a difference in the image quality of the subsequent result image. Therefore, a combination of image processing modules capable of obtaining an optimum result image can be found by including a plurality of image processing modules at least.

The present invention is established not only as the image processing circuit simulation apparatus described above but also as an image processing circuit simulation method, and can enjoy the same operations and effects as those described above.
Specifically, the image processing circuit simulation method according to the present invention includes:
An image processing circuit simulation method for simulating the operation of an image processing circuit configured by combining a plurality of partial image processing circuits,
Selecting an image processing module to be executed on the computer from among a plurality of image processing modules executable on the computer and having a function corresponding to each partial image processing circuit;
Setting an execution procedure for the selected image processing module;
Sequentially executing the selected image processing modules according to the set execution procedure, and performing image processing of the input image data;
The step of outputting the result image data after the image processing result of the image data by the executed image processing module is performed on a computer.

The image processing circuit design method according to the present invention includes:
An image processing circuit design method configured by combining a plurality of partial image processing modules,
After performing the above-described simulation method of the image processing circuit of the present invention to obtain an optimal combination of image processing modules,
A combination of partial image processing circuits in the image processing circuit is determined.
According to the present invention, as described above, the optimum combination of image processing modules can be obtained on the software by the image processing circuit simulation method of the present invention. In addition, it can be determined at low cost, and the design of the image processing circuit, and hence the manufacturing cost can be greatly reduced.
Furthermore, an image processing circuit simulation program according to the present invention causes a computer to execute the above-described image processing circuit simulation method, and can enjoy the same operations and effects as described above.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a simulation apparatus 1 according to an embodiment of the present invention. The simulation device 1 is configured as a computer including an arithmetic processing device 2 and a memory 3. The simulation apparatus 1 can simulate the operation of an image processing circuit configured by combining a plurality of partial image processing circuits.
In the memory 3, a program for executing the image processing circuit simulation according to the present embodiment and a plurality of image processing modules are stored. Each image processing module is software executable on a computer and has a function corresponding to each partial image processing circuit.
Although not shown in the figure, the input side of the simulation apparatus 1 is connected to an image data output device such as a scanner, a digital camera, or a hard disk device, and an evaluation input for evaluating an image after the image processing result from each device. Image data VIDEO is input.

On the other hand, on the output side of the simulation apparatus 1, a hard disk device 4 as a storage medium and a display 5 as an image display device are connected.
As will be described in detail later, the hard disk device 4 stores the image processing module selected by the simulation device 1, its execution procedure, and the image data obtained as a result of image processing performed by each image processing module.
A display image is formed on the display 5 based on the result image data obtained by performing the image processing of the image processing module.

  The arithmetic processing unit 2 includes a module management unit 6, an output unit 7, and a writing unit 8, and these functional units 6 to 8 are executed on the OS (Operating System) of the arithmetic processing unit 2. Is configured as a program group. These functional means 6 to 8 are stored in the memory 3 and are activated when a predetermined icon displayed on the display 5 is selected while the simulation apparatus 1 is activated. By displaying a screen G1 as shown in FIG. 2, the operator is prompted to input, and an image processing module is selected and an execution procedure is set based on a selection result based on the operator's input.

The module name displayed by default on the screen G1 reads and displays the image processing module stored in the memory 3 in advance. In order to read out a new image processing module, a new image processing module can be read out by clicking the register value reading button G8 at the lower right on the screen G1 and selecting it on the selection screen. .
Note that the image processing module needs to cover all image processing performed by the image display device to be subjected to image processing. In particular, the conversion processing from the RGB color space to the Yuv color space, and the inverse of the color space conversion processing. Examples include conversion processing, gamma characteristic conversion, and conversion processing from high resolution to low resolution.
These image processings are common in that sharpness processing, contrast processing, and color conversion processing are performed in the in-module processing. Depending on the order of image processing, the processing may interfere with each other in the image resulting from the image processing. Phenomena such as general defects and color unevenness of the entire image may occur.

The module management means 6 is a part for selecting an image processing module, setting an execution procedure for the selected image processing module, and executing the image processing module. The module selection means 61, the module execution procedure setting means 62, and The module execution means 63 is provided.
The module selection means 61 is a part for selecting an image processing module. As shown in FIG. 2, the module selection means 61 displays a screen G1 for prompting the operator to select on the display 5, and the operator selects on the screen G1. The image processing module is selected as the image processing module to be executed.

The selection on the screen G1 by the operator is performed by checking the check box G2 displayed on the left side of the screen G1 with an input device such as a keyboard or a mouse.
A box G3 on the right side of the check box G2 is used to set whether to output result image data and display output of the result image. When the box G3 is clicked with a mouse, for example, the box G3 is white, blue, red. In the case of white (the white box in FIG. 2), the result image and the result image data are not output, and in the case of blue (the box with the right-downward diagonal line in FIG. 2), the result image is displayed. When the result image data is not displayed on the hard disk device 5 and only the result image data is output to the hard disk device, the result image is displayed on the display 5 and the result image data is displayed on the hard disk device 4. It can be set to output to.

  The module execution procedure setting unit 62 is a part for setting the execution procedure of the image processing module selected by the module selection unit 61. The module execution procedure setting means 62 causes the operator to select an image processing module to be operated on the screen G1 shown in FIG. The image processing module selected by the operator is displayed in a state surrounded by a rectangle G4 on the screen G1. The operator can move the selected image processing module up and down by clicking the execution procedure change buttons G5 and G6 at the bottom of the screen G1.

Then, the selection and execution procedure of the image processing module set in this way is written on the memory 3. The writing on the memory 3 is written as a table T1, for example, as shown in FIG. This table T1 records the name of the selected module, presence / absence of execution, presence / absence of image output, presence / absence of image data output (data output), and a register value name used in each image processing module. .
The register value is an operation parameter value at the time of execution of each image processing module. For example, in the case of a curve gamma value conversion module, a value such as γ = 2.2 is stored. This register value is stored in the memory 3 together with the module management means 6.

  The module execution means 63 is a part for sequentially executing the image processing modules selected by the module selection means 61 based on the execution procedure set by the module execution procedure setting means 62. Image processing by the selected image processing module is sequentially executed on the evaluation input image data VIDEO.

Specifically, the module execution means 63 executes the image processing module from the upper level of the table T1 shown in FIG. 3 described above, while referring to the presence / absence of execution and the register value name in the table T1. The image processing module stored in the memory 3 is searched, and image processing by the searched image processing module is performed. In the present embodiment, the image processing module is executed by clicking the execution button G7 in FIG. 2, and one image processing module is executed each time the operator clicks the button G7.
Image data obtained as a result of the image processing by the module execution unit 63 is output to the output unit 7.

The output unit 7 is a part that outputs the result of the image processing of the input image data VIDEO by the image processing module in the module execution unit 63, and includes a result image display unit 71 and a result image data writing unit 72.
The result image display unit 71 is a part for displaying the image processing result of the input image data VIDEO by the image processing module on the display 5, and whether or not to display it is a column of presence / absence of image output in the table T1 in FIG. Judgment based on.
The result image data writing unit 72 is a part for writing the image processing result of the input image data VIDEO by the image processing module as the result image data to the hard disk device 4, and whether or not to write the data output of the table T1 in FIG. Judgment based on the presence / absence column.

  The writing unit 8 is a part that writes the execution procedure of the image processing module set by the module management unit 6 to the hard disk device 4. The writing means 8 is a table T1 showing the execution procedure of the image processing module set on the screen G1 shown in FIG. Is written in the hard disk device 4 as follows.

Next, the operation of the present embodiment will be described based on the flowchart shown in FIG.
When activated, the module management means 6 displays a screen G1 shown in FIG. 2 on the display 5 and prompts the operator to select an image processing module.
When the operator selects an image processing module to be executed by clicking the check box G2 with a mouse or the like, the module selection unit 61 sets the execution of the selected image processing module in the table T1 as “present” and executes the image processing module. Is selected (step S1).

Next, the module execution procedure setting means 62 changes the execution procedure in the table T1 according to the execution procedure changed by pressing the buttons G5 and G6 for the image processing module selected by the operator using the rectangle G4, and selects the selected image processing module. The execution procedure is set (step S2).
Then, the output means 7 outputs the presence / absence of output of the result image of the table T1 and the output of the result image data based on the state of the box G3 set by the operator clicking the mouse or the like on the screen G1 in FIG. Presence / absence is set (step S3).
In this embodiment, the execution procedure is set by the module execution procedure setting unit 62 first, and then the result image or the presence / absence of output of the result image data is set later. However, the present invention is not limited to this. The output setting of the result image data may be performed first.

  When the selection of the image processing module and the setting of the execution procedure are completed as described above, the writing unit 8 monitors whether or not the operator clicks the execution procedure write button G9 on the screen G1 (step S4). When clicked, the table T1 set on the screen G1 is written and stored in the hard disk device 4 (step S5). The execution procedure is written by the operator at this timing in the present embodiment, but actually, after the execution of all the image processing modules by the module execution unit 63 is completed or during the execution of the module execution unit 63. It can be possible at any timing.

Next, the module execution unit 63 executes the image processing module selected according to the order set in the table T1.
First, the module execution means 63 reads the input image data VIDEO based on the description in the first row of the table T1 (step S6).
Next, the module execution means 63 reads the register value based on the register value name described in the third row (not executed in the second row) of the table T1 (step S7), and performs image processing on the same row. Based on the module name, the corresponding image processing module is acquired by searching the memory 3 (step S8).
The module execution means 63 executes the searched image processing module and performs image processing on the input image data VIDEO (step S9).

When the image processing by the image processing module is completed, the result image display unit 71 of the output unit 7 determines whether or not the result image is output from the table T1 of the image processing module (step S10). Then, the result image of the image processing is displayed on the display 5 (step S11).
Similarly, the result image data writing unit 72 of the output means 7 determines whether or not data is output from the table T1 (step S12). If the result image data is set to “present”, the result image data is stored in the hard disk device 4. Write and store (step S13).
Thereafter, the module execution means 63 determines whether there is an image processing module to be executed next from the table T1 (step S14). If there is, repeats the procedure from step S7, otherwise ends the simulation.

In this way, various combinations of image processing modules are simulated to select an image processing module and an execution procedure so as to obtain an optimal image processing result, and to design an image processing circuit for mounting a partial image processing circuit. Do.
Specifically, the mounting layout of the partial image processing circuit in the image processing circuit may be designed so that the image processing procedure is similar to the execution procedure of the image processing module.

  In such a simulation apparatus 1, for example, as shown in the data configuration diagram of FIG. 5, a series of image processing modules of Module 1 to Module N can be sequentially executed by the module management unit 6. By displaying the intermediate output image on the display 5, it is possible to easily confirm which image processing module has caused the image quality degradation. In FIG. 5, the management information associated with each of Modules 1 to N means the presence / absence of module execution, presence / absence of result image output, and presence / absence of result image data set on the screen G1 described above.

For example, in FIG. 5, when evaluating the image processing result of Module 2, an intermediate image is output before and after Module 2, and when image processing by Module 2 is performed, FIG. 6 (A) As shown in FIG. 6B, what is not a problem before the image processing is shown in FIG. 6B. As shown in FIG. 6B, after the image processing, the operator shows that horizontal line-shaped image quality deterioration has occurred in the area A1. Can be easily confirmed on the display 5.
It should be noted that image quality degradation due to image processing is not limited to locally occurring as shown in FIG. 6B, but also color unevenness that occurs on the entire screen, jaggy and block noise that occurs during conversion from high resolution to low resolution, It may appear as blurring of the entire screen, and these image quality degradations can be evaluated by visual comparison.

In addition, since the operator can freely set the combination of image processing modules on the screen G1, simulation can be performed by easily changing the selection of image processing modules and the order of image processing. It is easy to find a combination of various image processing modules easily and in a short time.
Further, since the result image data writing unit 72 can write the result image data to the hard disk device 4, the comparison evaluation with the input image data VIDEO is performed on the computer by executing known evaluation software. It is also possible to do. As a comparative evaluation method, for example, if the luminance, color unevenness, etc. of each pixel are converted into numerical values and compared, and statistical processing is performed and the change exceeds a certain threshold, it is regarded as image quality deterioration. A method that determines that there is no deterioration in image quality can be employed unless the value exceeds.

1 is a block diagram illustrating a simulation apparatus for an image processing circuit according to an embodiment of the present invention. The schematic diagram showing the execution screen of the simulation apparatus of the image processing circuit in the said embodiment. The schematic diagram showing the state of selection of the image processing module in the said embodiment, and an execution procedure. 6 is a flowchart showing the operation of the image processing circuit simulation apparatus according to the embodiment. The data block diagram for demonstrating the effect | action of the simulation apparatus of the image processing circuit in the said embodiment. The schematic diagram showing the example of the state of image quality degradation before and behind the image processing result of the image processing module in the said embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Simulation apparatus, 2 ... Arithmetic processing apparatus, 3 ... Memory, 4 ... Hard disk apparatus, 5 ... Display, 6 ... Module management means, 7 ... Output means, 8 ... Writing means, 61 ... Module selection means, 62 ... Module Execution procedure setting means, 63 ... module execution means, 71 ... result image display section, 72 ... result image data writing section, A1 ... area, G1 ... screen, G2 ... check box, G3 ... box, G4 ... rectangle, G5, G6 ... Execution procedure change button, G7 ... Execution button, G8 ... Register value read button, G9 ... Execution procedure write button, T1 ... Table, VIDEO ... Input image data

Claims (8)

An image processing circuit simulation apparatus for simulating the operation of an image processing circuit configured by combining a plurality of partial image processing circuits,
A plurality of image processing modules executable on a computer and having a function corresponding to each partial image processing circuit;
Module selecting means for selecting an image processing module to be executed from among the plurality of image processing modules;
Module execution procedure setting means for setting the execution procedure of the image processing module selected by the module selection means;
Module execution means for sequentially executing the image processing modules selected by the module selection means according to the execution procedure set by the module execution procedure setting means, and performing image processing of input image data;
An image processing circuit simulation apparatus comprising: output means for outputting result image data after image processing of the image data by the image processing module executed by the module execution means. The image processing circuit simulation apparatus according to claim 1,
A simulation apparatus for an image processing circuit, comprising: an image processing module selected by the module selecting means; and a writing means for writing the execution procedure set by the module execution procedure setting means to a recording medium. In the simulation apparatus of the image processing circuit according to claim 1 or 2,
The image processing circuit simulation device, wherein the output means includes a result image display unit that displays a result image after image processing on the image display device based on the output result image data. In the simulation apparatus of the image processing circuit according to any one of claims 1 to 3,
The image processing circuit simulation apparatus, wherein the output means includes a result image data writing unit for writing the output result image data onto a recording medium. The image processing circuit simulation apparatus according to any one of claims 1 to 4,
The image processing circuit simulation apparatus, wherein the plurality of image processing modules include at least a resolution conversion module, a color conversion module, and a gamma characteristic conversion module. An image processing circuit simulation method for simulating the operation of an image processing circuit configured by combining a plurality of partial image processing circuits,
Selecting an image processing module to be executed on the computer from among a plurality of image processing modules executable on the computer and having a function corresponding to each partial image processing circuit;
Setting an execution procedure for the selected image processing module;
Sequentially executing the selected image processing modules according to the set execution procedure, and performing image processing of the input image data;
A method for simulating an image processing circuit, comprising: executing on a computer a step of outputting result image data after the image processing result of the image data by the executed image processing module. An image processing circuit design method configured by combining a plurality of partial image processing circuits,
After carrying out the image processing circuit simulation method according to claim 6 to obtain an optimal combination of image processing modules,
A design method for an image processing circuit, wherein a combination of partial image processing circuits in the image processing circuit is determined.   An image processing circuit simulation program for causing a computer to execute the image processing circuit simulation method according to claim 6.

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