JP2008251126A - Information recording and reproducing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To propose a nonvolatile information recording and reproducing device having reduced power consumption and high thermal stability. <P>SOLUTION: The information recording and reproducing device includes: a recording layer; and a recording means generating resistance variation originated in a phase change in the recording layer by applying a voltage to the recording layer to record information. The recording layer includes at least a first compound having a LiMoN<SB>2</SB>structure. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an information recording / reproducing apparatus having a high recording density.

  In recent years, small portable devices have spread worldwide, and at the same time, with the rapid progress of high-speed information transmission networks, the demand for small and large-capacity nonvolatile memories has been rapidly expanding. Among them, the NAND flash memory and the small hard disk drive (HDD) have achieved a rapid development of the recording density and have formed a large market.

  On the other hand, several new memory ideas aiming to greatly exceed the limit of recording density have been proposed. For example, ternary oxides containing transition metal elements such as perovskite and spinel (for example, Patent Documents 1 and 2) and binary oxides of transition metals (for example, Patent Document 3) have been studied. When these materials are used, a low resistance state (ON) and a high resistance state (OFF) can be repeatedly changed by applying a voltage pulse, and these two states are represented by binary data “0”, “1”. The principle that data is recorded in correspondence with "is adopted.

  For writing / erasing, for example, there are three ways to apply reverse pulses when changing from a low resistance state phase to a high resistance state phase and when changing from a high resistance state phase to a low resistance state phase. Used in system oxides. On the other hand, in binary oxides, writing / erasing may be performed by applying pulses having different pulse amplitudes and pulse widths.

Reading is performed by passing a small read current that does not cause writing / erasing to the recording material and measuring the electrical resistance of the recording material. In general, the ratio of the resistance in the high resistance state phase to the resistance in the low resistance state phase is about 10 ³ . The biggest feature of these materials is that they can operate in principle even if the device size is reduced to about 10 nm. In this case, a recording density of about 10 Tbpsi (tera bite par square inch) can be realized. One of the candidates for higher recording density.

  As an operation mechanism of such a new memory, there are the following proposals. For perovskite materials, diffusion of oxygen vacancies, charge accumulation at interface states, and the like have been proposed. On the other hand, the binary oxide includes oxygen ion diffusion and Mott transition. Although it is difficult to say that the details of the mechanism have been clarified, the same resistance change has been observed in various material systems, and therefore, it has been attracting attention as one candidate for increasing the recording density.

  In addition to these, a MEMS memory using MEMS (micro electro mechanical systems) technology has been proposed. The greatest feature of such a MEMS memory is that the recording density can be drastically improved because it is not necessary to provide a wiring in each recording section for recording bit data. Various recording media and recording principles have been proposed, and attempts have been made to achieve great improvements in terms of power consumption, recording density, operating speed, etc. by combining MEMS technology and new recording principles.

However, a new information recording medium using such a new recording material has not been realized. One of the reasons is pointed out that the power consumption is large and the thermal stability of each resistance state is low (see, for example, Non-Patent Document 1).
JP 2005-317787 A JP 2006-80259 A JP 2006-140464 A S. Seo et al., Applied Physics Letters, vol.85, pp5655-5657, (2004) DJSingh, Physical Review B, vol. 46, pp9332-9335, (1992)

  The present invention proposes a nonvolatile information recording / reproducing apparatus with low power consumption and high thermal stability.

In order to achieve the above object, one embodiment of the present invention provides:
A recording layer, and a recording unit that records information by applying a voltage to the recording layer to cause a resistance change in the recording layer due to a phase change,
The information recording / reproducing apparatus is characterized in that the recording layer includes at least a first compound having a LiMoN ₂ structure.

In one example of the present invention, the first compound has the chemical formula 1: XaYbN ₂ (0.5 ≦ a ≦ 1.1, 0.7 ≦ b ≦ 1.0; X: at least one metal element, Y : At least one transition metal element, N: nitrogen).

  In this case, X is Cu, Ag, Au, Hg, Tl, Li, Na, K, Rb, Cs, Be, Mg, Ca, Sr, Ba, Ra, Ti, V, Cr, Mn, Fe, Co. , Ni, Zn, Ge, Pd, Cd, Yb, Nb, Ta, Y, lanthanoid, and at least one element selected from the group of actinoids. The Y may contain at least one element selected from the group consisting of Cr, Mn, Mo, W, Ru, Rh, Re, Os, Nb, Ta, and Ir.

  In order to achieve the above object, the present inventors have focused on oxides as a recording layer constituting an information recording / reproducing apparatus. In this case, the write / erase to the recording layer is performed, for example, by applying a voltage to the recording layer to change from the low resistance state phase to the high resistance state phase, or from the high resistance state phase to the low resistance state phase. By doing. The binary data “0” and “1” can correspond to the low resistance state and the high resistance state, respectively.

  Therefore, in the information recording / reproducing apparatus using the oxide in the recording layer, the signal relating to the binary data can be recorded and reproduced with low power consumption, and the present inventor is required to maintain high thermal stability. Et al. Conducted intensive studies to find the mechanism of the high resistance state phase and the low resistance state phase in the oxide. As a result, it has been found that the diffusion of cations in the oxide and the accompanying valence change of the ions contribute to the resistance change phenomenon.

  That is, it has been found that in order to cause a large resistance change with low power consumption, it is only necessary to facilitate the diffusion of cations in the recording layer. On the other hand, in order to improve the thermal stability of each resistance state, it has been found that it is important to stably maintain the state after the cation is diffused. That is, when the cation is diffused, the site of the material constituting the recording layer becomes the void site, and electrons for neutralizing the charge in the recording layer are generated. Since the recording layer becomes insufficient and the recording layer becomes structurally unstable, it has been found that it is important that the recording layer separately holds an element capable of supplying the insufficient electrons.

From such a viewpoint, in the above aspect of the present invention, the recording layer is configured to include at least a first compound having a LiMoN ₂ structure. For example, the first compound is represented by the chemical formula 1: XaYbN ₂ (0.5 ≦ 0.5). a ≦ 1.1, 0.7 ≦ b ≦ 1.0; X: at least one kind of metal element, Y: at least one kind of transition metal element, and N: nitrogen). The Y can easily diffuse in the recording layer as cations, and the Y can easily perform charge neutralization in the recording layer. Therefore, recording and reproduction with respect to the recording layer can be performed with low power consumption, and the structural stability, that is, thermal stability of the recording layer can be maintained.

  In one embodiment of the present invention, X may include at least one element selected from the group consisting of Cu, Ag, Au, Hg, Tl, Li, Na, K, Rb, and Cs. Since these elements are monovalent cations, Y can include at least one element selected from the group of Mo, W, Ru, and Re in order to perform the charge neutralization described above. Since these elements change in valence between pentavalent and hexavalent, neutralization of charges after the cation diffuses and escapes from the recording layer can be effectively carried out.

  In another embodiment of the present invention, X is Be, Mg, Ca, Sr, Ba, Ra, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ge, Pd, Ag. , Cd, Yb may be included. Since these elements are divalent cations, the Y is at least one element selected from the group consisting of Cr, Mn, Mo, W, Ru, Re, and Os in order to perform the charge neutralization described above. Can be included. Since these elements change in valence between tetravalent and hexavalent, neutralization of charges after the cation diffuses and escapes from the recording layer can be effectively performed.

  Furthermore, in another embodiment of the present invention, X may include at least one element selected from the group of Y, lanthanoid, and actinoid. Since these elements are trivalent cations, Y is at least one element selected from the group consisting of Cr, Mn, Mo, Ru, Re, Os, and Ir in order to perform the charge neutralization described above. Can be included. Since these elements change in valence between trivalent and arbitrary valences, neutralization of charges after the cation diffuses and escapes from the recording layer is effectively performed. be able to.

In the embodiment of the present invention, X may include at least one element of Cu and Ag. Since these elements themselves change in valence between monovalent and divalent, even if Y does not change the valence, it effectively neutralizes the charge after it escapes from the recording layer. Can be implemented. Therefore, Y in this case can be, for example, Nb and / or Ta which does not cause a valence change that cannot be more than six.
X may include at least one element selected from the group consisting of Fe, Co, and Ni. Since these elements themselves change in valence between divalent and trivalent, similarly, neutralization of the charge after leaving the recording layer can be effectively performed. As a candidate for Y in this case, for example, Ti which cannot take pentavalent or higher can be mentioned.

  In another aspect of the present invention, the second compound having a void site capable of accommodating the X can be provided in contact with the first compound.

  As described above, according to the above aspect of the present invention, it is possible to obtain a nonvolatile information recording / reproducing apparatus with low power consumption and high thermal stability.

  Hereinafter, other features and advantages of the present invention will be described based on embodiments with reference to the drawings.

A. Information recording / reproducing apparatus (first embodiment)
The information recording / reproducing apparatus according to this embodiment has a recording unit having a stack structure of an electrode layer, a recording layer, and an electrode layer (or a protective layer). The following description focuses on the recording layer that is a characteristic part. . Here, a representative example will be described in the case of a compound that takes a combination of a monovalent X ion and a pentavalent Y ion at equilibrium.

  FIG. 1 shows the structure of a recording unit in the information reproducing apparatus of this embodiment. Reference numeral 11 denotes an electrode layer, 12 denotes a recording layer, and 13 denotes an electrode layer (or protective layer). Small white circles in the recording layer 12 represent X ions, and small black circles represent N ions. Large white circles represent Y ions.

  When a voltage is applied to the recording layer 12 to generate a potential gradient in the recording layer 12, some of the X ions move through the crystal. Therefore, in the example of the present invention, the initial state of the recording layer 12 is a conductor (low resistance state), and for information recording, the recording layer 12 is phase-shifted by a potential gradient, and the recording layer 12 loses conductivity ( (High resistance state).

  First, for example, a state in which the potential of the electrode layer 13 is relatively lower than the potential of the electrode layer 11 is created. If the electrode layer 11 is set to a fixed potential (for example, ground potential), a negative potential may be applied to the electrode layer 13.

  At this time, some of the X ions in the recording layer 12 move to the electrode layer (cathode) 13 side, and the X ions in the recording layer (crystal) 12 decrease relative to the N ions. The X ions that have moved to the electrode layer 13 side receive electrons from the electrode layer 13 and are deposited as metal, so that the metal layer 14 is formed.

  Inside the recording layer 12, N ions become excessive, and as a result, the valence of Y ions in the recording layer 12 is increased to 6 valences. That is, since the recording layer 12 loses its electronic conductivity due to carrier injection, information recording (set operation) is completed. At this time, the metal layer 14 is isolated without forming a conductive path between the electrode layer 13 and the electrode layer 11, so that the resistance state of the information recording portion is not affected.

  Information reproduction can be easily performed by passing a current pulse through the recording layer 12 and detecting the resistance value of the recording layer 12. However, the current pulse needs to be a minute value that does not cause a phase change in the material constituting the recording layer 12.

  The above process is a kind of electrolysis. On the electrode layer (anode) 11 side, an oxidizing agent is generated by electrochemical oxidation, and on the electrode layer (cathode) 13 side, a reducing agent is generated by electrochemical reduction. Can be considered.

  Therefore, in order to return the information recording state (high resistance state) to the initial state (low resistance state), for example, the recording layer 12 is Joule-heated by a large current pulse to promote the oxidation-reduction reaction of the recording layer 12. Just do it. That is, the recording layer 12 returns to the conductor due to the residual heat after the interruption of the large current pulse (reset operation).

  The reset operation can also be performed by an operation opposite to the set operation, that is, by applying a positive potential to the electrode layer 13 when the electrode layer 11 is set to the ground potential.

  By the way, “set operation” usually refers to changing the high-resistance state to the low-resistance state, but the explanation is reversed because it is in an equilibrium state (initial state). The relationship between “set” and “reset” is convenient. When it is better to place the entire surface of the medium in a high resistance state as an initial state as in a probe memory to be described later, it is preferable to perform the “set operation” on the entire surface before shipment and perform information recording by “reset”. This is because even if there is an insulating portion in the shape of an island, if there is a conductor portion around it, the current will flow there.

In the embodiment as described above, the compound (first compound) constituting the recording layer 12 is represented by the chemical formula 1: XaYbN ₂ (0.5 ≦ a ≦ 1.1, 0.7 ≦ b ≦ 1.0; X: at least In the case of exhibiting a chemical formula of one kind of metal element, Y: at least one kind of transition metal element, and N: nitrogen), for example, X is Cu, Ag, Au, Hg, Tl, Li, Na, K, Rb, This can be realized when at least one element selected from the group of Cs is included, and the Y includes at least one element selected from the group of Mo, W, Ru, and Re.

  The above description is the same for a compound that takes a combination of a divalent ion and a tetravalent ion at equilibrium. In this embodiment, for example, the X is Be, Mg, Ca, Sr, Ba, Ra, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ge, Pd, Ag, Cd, or Yb. It can be carried out when it contains at least one element selected from a group, and the Y contains at least one element selected from the group of Cr, Mn, Mo, W, Ru, Re, Os. .

  Further, even when the X includes at least one element selected from the group of Y, lanthanoid, and actinoid, the same effect can be obtained. Since these elements are trivalent cations, Y is at least one element selected from the group consisting of Cr, Mn, Mo, Ru, Re, Os, and Ir in order to perform the charge neutralization described above. Can be included. Since these elements change in valence between trivalent and arbitrary valences, neutralization of charges after the cation diffuses and escapes from the recording layer is effectively performed. be able to.

(Second Embodiment)
On the other hand, when the X ion can take a plurality of valences other than the metal state (0 valence) such as monovalent and divalent, or divalent and trivalent, the following operation principle is also possible.

  FIG. 2 shows the structure of the recording unit in the information reproducing apparatus of this embodiment. Reference numeral 11 denotes an electrode layer, 12 denotes a recording layer, and 13 denotes an electrode layer (or protective layer). Large white circles in the recording layer 12 indicate Y ions, small black circles indicate N ions (nitrogen ions), and small white circles indicate X ions. Here, the initial state of the recording layer 12 is a conductor (low resistance state) phase, the recording layer 12 is changed in phase by a potential gradient, and the recording layer 12 loses conductivity (high resistance state phase). Make a record.

  When a voltage is applied to the recording layer 12 and a potential gradient is generated in the recording layer 12 as before, a part of X ions move to the electrode layer (cathode) 13 side in the crystal. At this time, X ions in the recording layer (crystal) 12 decrease relative to N ions. The X ions that have moved to the electrode layer 13 side receive electrons from the electrode layer 13 and precipitate as X atoms that are metal to form the metal layer 14. Therefore, in the region close to the electrode layer 13, X ions are reduced and behave like a metal.

  Inside the recording layer 12, N ions become excessive but do not increase the valence of Y ions, but as a result, increase the valence of X ions left without diffusion as indicated by small white circles. Let At this time, if the X ions are selected so that the electric resistance increases when the valence increases, the electric resistance in the recording layer 12 decreases due to the movement of the X ions, so that the recording layer as a whole enters the high resistance state phase. And phase change. That is, information recording (set operation) is completed.

The compound constituting the recording layer 12 (first compound) has the chemical formula 1: XaYbN ₂ (0.5 ≦ a ≦ 1.1, 0.7 ≦ b ≦ 1.0; X: at least one metal element, Y : At least one transition metal element, N: nitrogen), the above principle of operation tends to work if an element that cannot take a valence higher than pentavalent, such as Nb or Ta, is selected as the Y ion. In this case, X can be Cu and / or Ag. The information reproduction and reset operation are the same as described above.

  However, in order to put these operating principles into practical use, it is necessary to confirm that the reset operation does not occur at room temperature (a sufficiently long retention time is ensured) and that the power consumption of the reset operation is sufficiently small.

(Consideration on structural stability of recording layer)
Subsequently, the stability of the matrix structure after the diffusion of X ions will be described. In addition, the consideration shown below is a consideration based on the research results of the present inventors to the last, and does not affect the feasibility of the present invention at all.

When the Y ions in the first half of the principle of operation described in FIG. 1 are accompanied by valence changes, elements such as Mo and W whose ionic radii do not change greatly depending on the valence are particularly preferred as Y ions. When the ionic radius changes greatly depending on the valence, residual stress is generated in the base structure and is likely to change. If the matrix structure is changed, the X ions may not return, which is not preferable. In addition to Mo and W, Ru, Rh, Re, Os, and Ir (element) are preferable as Y ions because the change in radius when the valence changes is relatively small. In the LiMoN ₂ structure, since the Y ions are present in a six-coordinate system, the above elements are also preferable from the viewpoint that Y can stably take a six-coordinate state.

  Furthermore, as in the latter half of the principle of operation described with reference to FIG. 2, when X ions diffuse and then change their valence and satisfy the neutral condition of the charge, Y changes with resistance change. There is no change in the valence of ions. In this case, there is no change in the ionic radius that accompanies the change in valence, so that it is essentially stable. However, the limiting conditions for X ions become severe. That is, as described above, the valence of X ions needs to change before and after the diffusion of X ions. Therefore, it is preferable that X is a transition element having a d orbital in which electrons are incompletely filled, because various valences can be stably obtained.

Furthermore, as described above, when the X ions are divalent, the diffusion of X ions and the thermal stability are satisfied at the same time. Therefore, the X ions are preferably divalent. In other words, depending on the manufacturing method, monovalent ions are easy to move, so it is difficult to maintain the memory state (retention is short). Since power consumption tends to increase, divalent X ions are often easy to use as a comparison. When monovalent ions are selected, it is preferable to select an element having an ionic radius larger than that of Li. Furthermore, in the LiMoN ₂ structure, since X ions exist in a six-coordinate state, X can stably take a six-coordinate state, and the ionic radius is relatively close to Li, such as Cr, Cu, Ag, Mg, Zn, Ge, etc. are more preferable.

  In order for intercalation / disintercalation of X ions as shown in FIG. 1 to occur efficiently with respect to the applied voltage, the direction in which the X ions diffuse and the direction in which the electric field is applied match. Preferably it is.

(Material composition of each component constituting the recording unit)
Next, the material composition of each component constituting the recording unit will be described.

<Recording layer 12>
As described with reference to FIG. 1, since the structure in which X ions are eliminated can exist stably, the mixing ratio of X ions is optimized so that the resistance in each state or the diffusion coefficient of X ions becomes an optimum value. It is possible. If the mixing ratio of X ions is too small, it becomes difficult to stably produce and maintain the crystal structure, and if the mixing ratio of X ions is too large, diffusion of ions becomes difficult.

Therefore, in the above-described embodiment, the compound (first compound) constituting the recording layer 12 has the chemical formula 1: XaYbN ₂ (0.5 ≦ a ≦ 1.1, 0.7 ≦ b ≦ 1.0; X: In the case of exhibiting a chemical formula of at least one metal element, Y: at least one transition metal element, and N: nitrogen, the mixing ratio of X ions is preferably 0.5 ≦ a ≦ 1.1. In order to suppress manufacturing unevenness, the mixing ratio of X ions is more preferably 0.7 ≦ a ≦ 1.0.

  Since the crystal structure of Y ions can exist stably even if there are some defects, the mixing ratio of Y ions is preferably 0.7 ≦ b ≦ 1. Furthermore, in order to suppress manufacturing unevenness, it is more preferable that 0.9 ≦ b ≦ 1. Here, the upper limit of Y ions is set to 1 because when Y ions are present in the X ion diffusion path, X ions are difficult to diffuse.

<Electrode layer 11>
Since an oxidizing agent is generated on the electrode layer (anode) 11 side after the setting operation, the electrode layer 11 may be composed of a material that is difficult to oxidize (for example, electrically conductive nitride, electrically conductive oxide, etc.). preferable. Moreover, as such a material, the thing which does not have ion conductivity is good. Examples of such a material include those shown below. Among them, LaNiO ₃ can be said to be the most preferable material from the viewpoint of comprehensive performance in consideration of good electrical conductivity and the like.

・ M1N
M1 is at least one element selected from the group consisting of Ti, Zr, Hf, V, Nb, and Ta. N is nitrogen.
・ M1O _x (spinel or rams delight)
M1 is selected from the group of Mn, V, Cr, Fe, Co, Ni, Cu, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Ir, Os, Pt At least one element. The molar ratio x shall satisfy 1 ≦ x ≦ 4.
・ AM1O ₃
A is at least one element selected from the group consisting of La, K, Ca, Sr, Ba, and Ln (Lanthanide).
M1 is selected from the group of Mn, Ti, V, Cr, Fe, Co, Ni, Cu, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Ir, Os, Pt At least one element.
O is oxygen.
・ A ₂ M1O ₄
A is at least one element selected from the group of K, Ca, Sr, Ba, and Ln (Lanthanide).
・ M2 metal
M2 is at least one element selected from the group of Pd, Ta, W, Re, Ir, Os, and Pt.
M1 is selected from the group of Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zr, Nb, Mo, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Ir, Os, Pt At least one element.
O is oxygen.

<Protective layer 13 or electrode layer 13>
In addition, since a reducing agent is generated on the protective layer (cathode) 13 side after the setting operation, the protective layer 13 preferably has a function of preventing the recording layer 12 from reacting with the atmosphere.
Examples of such a material include semiconductors such as amorphous carbon, diamond-like carbon, and SnO ₂ .

  The electrode layer 13 may function as a protective layer for protecting the recording layer 12, or a protective layer may be provided instead of the electrode layer 13. In this case, the protective layer may be an insulator or a conductor.

In order to efficiently heat the recording layer 12 in the reset operation, a heater layer (a material having a resistivity of about 10 ⁻⁵ Ωcm or more) may be provided on the cathode side, here, on the electrode layer 13 side.

(Third embodiment)
FIG. 3 is a diagram showing a configuration of an information recording / reproducing apparatus according to the third embodiment of the present invention. The present embodiment corresponds to an application example or a modification of the first embodiment and the second embodiment described above.

  As shown in FIG. 3, the recording layer 12 includes the first compound 12A described above and a second compound 12B described in detail below, and has a configuration in which each is stacked on each other. In the recording layer 12, when a potential gradient is generated in the recording layer 12 by applying a potential to the electrode layers 11 and 13 so that the first compound 12A is on the anode side and the second compound 12B is on the cathode side, the first compound 12A is generated. A part of the X ions move in the crystal and enter the second compound 12B on the cathode side.

Since there are void sites that can accommodate X ions in the crystal of the second compound 12B, the X ions that have moved from the first compound 12A are accommodated in the void sites. Accordingly, in the first compound 12A, the valence of a part of the Y ions is increased to, for example, Y ⁶⁺ ions, and in the second compound 12B, the valence of the M ions is decreased. Therefore, the M ion needs to be an ion composed of a transition element.

  That is, assuming that the first and second compounds 12A and 12B are in the low resistance state (conductor) in the initial state (reset state), a part of the X ions in the first compound 12A is the second compound 12B. By moving in, the conductive carriers in the crystals of the first and second compounds 12A and 12B disappear, and both of them have electrical insulation properties.

  As described above, by applying the current / voltage pulse to the recording layer 12, the electric resistance value of the recording layer 12 is reduced, so that the set operation (recording) is realized.

  At the same time, electrons move from the first compound 12A toward the second compound 12B, but the electron Fermi level of the second compound 12B is higher than the electron Fermi level of the first compound 12A. The total energy of the recording layer 12 increases.

The second compound is
Chemical formula 2: □ xMZ ₂ (□: void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh At least one element, Z: at least one element selected from O, S, Se, N, Cl, Br, I, 0.3 ≦ x ≦ 1),
Chemical formula 3: □ xMZ ₃ (□ is a void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh At least one element selected from the group consisting of Z: O, S, Se, N, Cl, Br, I, 1 ≦ x ≦ 2),
Chemical formula 4: □ xMZ ₄ (□ is a void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh At least one element selected from the group consisting of Z: O, S, Se, N, Cl, Br, I, 1 ≦ x ≦ 2),
Chemical formula 5: □ xMPOz (□ is a void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh It is preferably at least one element, P: phosphorus element, O: oxygen element, 0.3 ≦ x ≦ 3, 4 ≦ z ≦ 6). Thereby, the above-described operational effects can be realized more effectively.

The second compound, hollandite structure, ramsdellite structure, anatase structure, brookite structure, pyrolusite structure, ReO ₃ structure, MoO _1.5 PO ₄ structure, TiO _0.5 PO ₄ structure and FePO ₄ structure, BetaMnO ₂ structure, GanmaMnO ₂ The structure can have one of the λMnO ₂ structures. In this case, the second compound having the above chemical formula can be stably obtained.

B. Application Example of Information Recording / Reproducing Device Next, an application example of a specific memory device using the above-described information reproducing / recording device will be briefly described.

(1) Probe Memory FIGS. 4 and 5 show a probe memory according to an example of the present invention.
A recording medium is disposed on the XY scanner 14. A probe array is arranged to face the recording medium.

  The probe array includes a substrate 23 and a plurality of probes (heads) 24 arranged in an array on one surface side of the substrate 23. Each of the plurality of probes 24 is constituted by a cantilever, for example, and is driven by multiplex drivers 25 and 26.

  Each of the plurality of probes 24 can be individually operated using the microactuator in the substrate 23. Here, an example will be described in which all of the probes 24 are collectively operated to access the data area of the recording medium. .

  First, using the multiplex drivers 25 and 26, all the probes 24 are reciprocated in the X direction at a constant cycle, and the position information in the Y direction is read from the servo area of the recording medium. The position information in the Y direction is transferred to the driver 15. The driver 15 drives the XY scanner 14 based on this position information, moves the recording medium in the Y direction, and positions the recording medium and the probe. When the positioning of both is completed, data reading or writing is performed simultaneously and continuously on all the probes 24 on the data area.

  Data reading and writing are continuously performed because the probe 24 reciprocates in the X direction. Data reading and writing are performed line by line in the data area by sequentially changing the position of the recording medium in the Y direction.

  Note that the recording medium may be reciprocated in the X direction at a constant period to read position information from the recording medium, and the probe 24 may be moved in the Y direction.

  The recording medium includes, for example, a substrate 20, an electrode layer 21 on the substrate 20, and a recording layer 22 on the electrode layer 21.

  The recording layer 22 has a plurality of data areas and servo areas arranged at both ends of the plurality of data areas in the X direction. The plurality of data areas occupy the main part of the recording layer 22.

  A servo burst signal is recorded in the servo area. The servo burst signal indicates position information in the Y direction within the data area.

  In addition to these pieces of information, an address area for recording address data and a preamble area for synchronization are arranged in the recording layer 22.

  The data and servo burst signal are recorded on the recording layer 22 as recording bits (electric resistance fluctuation). The “1” and “0” information of the recording bit is read by detecting the electric resistance of the recording layer 22.

  In this example, one probe (head) is provided corresponding to one data area, and one probe is provided for one servo area.

  The data area is composed of a plurality of tracks. A track in the data area is specified by an address signal read from the address area. The servo burst signal read from the servo area is used to move the probe 24 to the center of the track and eliminate the recording bit reading error.

  Here, by making the X direction correspond to the down-track direction and the Y direction correspond to the track direction, it becomes possible to use the head position control technology of the HDD.

  Next, the recording / reproducing operation of the probe memory shown in FIGS. 4 and 5 will be described. FIG. 6 shows a state during recording (set operation).

  The recording medium is composed of an electrode layer 21 on a substrate (for example, a semiconductor chip) 20, a recording layer 22 on the electrode layer 21, and a protective layer 13B on the recording layer 22. The protective layer 13B is made of, for example, a thin insulator. The recording operation is performed by applying a voltage to the surface of the recording bit 27 of the recording layer 22 and generating a potential gradient inside the recording bit 27. Specifically, a current / voltage pulse may be given to the recording bit 27.

<First example>
In the first example, the material shown in FIG. 1 is used for the recording layer. First, as shown in FIG. 7, a state in which the potential of the probe 24 is relatively lower than the potential of the electrode layer 21 is created. If the electrode layer 21 is set to a fixed potential (for example, ground potential), a negative potential may be applied to the probe 24. The current pulse is generated by emitting electrons from the probe 24 toward the electrode layer 21 using, for example, an electron generation source or a hot electron source. Alternatively, the voltage pulse may be applied by bringing the probe 24 into contact with the surface of the recording bit 27.

  At this time, for example, in the recording bit 27 of the recording layer 22, some of the X ions move to the probe (cathode) 24 side, and the X ions in the crystal decrease relative to the N ions. The X ions that have moved to the probe 24 side receive electrons from the probe 24 and are deposited as metal. In the recording bit 27, N ions become excessive, and as a result, the valence of X ions in the recording bit 27 is increased. That is, since the recording bit 27 has electron conductivity due to carrier injection due to phase change, the resistance in the film thickness direction decreases, and recording (set operation) is completed.

  Note that the current pulse for recording can also be generated by creating a state in which the potential of the probe 24 is relatively higher than the potential of the electrode layer 21.

  FIG. 8 shows the reproduction. Reproduction is performed by passing a current pulse through the recording bit 27 of the recording layer 22 and detecting the resistance value of the recording bit 27. However, the current pulse is set to a minute value so that the material constituting the recording bit 27 of the recording layer 22 does not change in resistance. For example, a read current (current pulse) generated by the sense amplifier S / A is passed from the probe 24 to the recording bit 27, and the resistance value of the recording bit 27 is measured by the sense amplifier S / A.

If the material according to the example of the present invention is used, a difference in resistance value between the set / reset states of 10 ³ or more can be secured. In reproduction, continuous reproduction is possible by scanning the recording medium with the probe 24 (scanning).

  The erase (reset) operation is performed by heating the recording bit 27 of the recording layer 22 with a large current pulse to promote the redox reaction in the recording bit 27. Alternatively, a pulse that gives a potential difference in the opposite direction to that in the set operation may be applied.

  The erasing operation can be performed for each recording bit 27, or can be performed in units of a plurality of recording bits 27 or blocks.

<Second example>
The second example is a case where the material shown in FIG. 3 is used for the recording layer. First, as shown in FIG. 9, a state is created in which the potential of the probe 24 is relatively lower than the potential of the electrode layer 21. If the electrode layer 21 is set to a fixed potential (for example, ground potential), a negative potential may be applied to the probe 24.

  At this time, some of the X ions in the first compound (anode side) 12A of the recording layer 22 move in the crystal and fall within the void sites of the second compound (cathode side) 12B. Along with this, the valence of the X ions in the first compound 12A increases, and the valence of the M ions in the second compound 12B decreases. As a result, conductive carriers are generated in the crystals of the first and second compounds 12A and 12B, and both of them have electrical conductivity. Thereby, the set operation (recording) is completed.

  Regarding the recording operation, if the positional relationship between the first and second compounds 12A and 12B is reversed, the setting operation may be performed with the potential of the probe 24 relatively higher than the potential of the electrode layer 21. it can.

  FIG. 10 shows a state during reproduction. The reproduction operation is performed by passing a current pulse through the recording bit 27 and detecting the resistance value of the recording bit 27. However, the current pulse is set to a minute value that does not cause a resistance change of the material constituting the recording bit 27.

For example, a read current (current pulse) generated by the sense amplifier S / A is passed from the probe 24 to the recording layer (recording bit) 22 and the resistance value of the recording bit is measured by the sense amplifier S / A. If the new material described above is used, the difference in resistance between the set / reset states can be maintained at 10 ³ or more.

  The reproduction operation can be continuously performed by scanning the probe 24.

  The reset (erase) operation uses Joule heat generated by flowing a large current pulse to the recording layer (recording bit) 22 and its residual heat, so that X ions are transferred from the void sites in the second compound 12B to the first compound. What is necessary is just to promote the effect | action which is going to return in 12A. Alternatively, a pulse that gives a potential difference in the opposite direction to that in the set operation may be applied.

  The erasing operation can be performed for each recording bit 27, or can be performed in units of a plurality of recording bits 27 or blocks.

<Experimental example>
As a sample, a recording medium having the structure shown in FIG. 6 is used, and evaluation may be performed using a probe pair whose tip diameter is sharpened to 10 nm or less. The electrode layer 21 is, for example, a Pt film formed on a semiconductor substrate. In order to improve the adhesiveness between the semiconductor substrate and the lower electrode, Ti of about 5 nm may be used as the adhesive layer.

For example, the recording layer 22 is manufactured as follows. When LiMoN ₂ is used as the recording layer, Li ₂ MoO ₄ is first prepared as a precursor. In order to obtain this precursor, RF magnetron sputtering is performed in a mixed gas of argon and oxygen while using a target whose components are adjusted so as to obtain a desired composition ratio and keeping the temperature of the disk at a high temperature of about 600 ° C. Do. Next, when this precursor is heat-treated in ammonia gas at about 710 ° C., which is slightly higher than the melting point, desired LiMoN ₂ is obtained. Furthermore, as a protective layer, for example, diamond-like carbon may be formed by a CVD method. The thickness of each layer can be designed to optimize the resistance ratio between the low resistance state and the high resistance state, the energy required for switching, the switching speed, and the like. For example, a desired film thickness can be obtained by adjusting the sputtering time.

  The probe pair is brought into contact with the protective layer 13, and writing / erasing is performed using one of them. For example, writing is performed by applying a voltage pulse of 1 V to the recording layer 22 with a width of, for example, 10 nsec. On the other hand, for example, erasing can be performed by applying a voltage pulse of 0.2 V to the recording layer 22 with a width of, for example, 100 nsec.

  Also, reading is performed using the other one of the probe pair between the writing / erasing. Reading can be performed by applying a voltage pulse of 0.1 V with a width of 10 nsec to the recording layer 22 and measuring the resistance value of the recording layer (recording bit) 22.

For example, in the case of using the NaMoN ₂ having LiMoN ₂ structure as the recording layer, since the Na ions, Mo ions, N ions present in layers, the diffusion of Na ions occurs efficiently. In addition, after the Na ions diffuse, the valence of Mo ions remaining in the recording layer increases to 6 and the resistance of the recording layer can be increased. At this time, hexavalent Mo ions with large atomic weights do not have much different ionic radii from pentavalent Mo ions, and the bond length with N ions does not change greatly, so the crystal structure is stable even after Na ions diffuse. Easy to hold on. Further, the monovalent Na ions so easy to take the six-coordinate structure, it is possible to obtain a NaMoN ₂ with readily LiMoN ₂ structure. Instead of NaMoN ₂ , for example, GeWN ₂ that is a combination of divalent Ge and tetravalent W may be used.

(2) Semiconductor Memory FIG. 11 shows a cross-point type semiconductor memory according to an example of the present invention.
Word lines WLi−1, WLi, and WLi + 1 extend in the X direction, and bit lines BLj−1, BLj, and BLj + 1 extend in the Y direction.

  One end of the word lines WLi-1, WLi, WLi + 1 is connected to the word line driver & decoder 31 via a MOS transistor RSW as a selection switch, and one end of the bit lines BLj-1, BLj, BLj + 1 is used as a selection switch. The bit line driver & decoder & read circuit 32 is connected via the MOS transistor CSW.

  Selection signals Ri-1, Ri, Ri + 1 for selecting one word line (row) are inputted to the gate of the MOS transistor RSW, and one bit line (column) is inputted to the gate of the MOS transistor CSW. Selection signals Ci-1, Ci, Ci + 1 are input to select.

  Memory cell 33 is arranged at the intersection of word lines WLi-1, WLi, WLi + 1 and bit lines BLj-1, BLj, BLj + 1. This is a so-called cross-point cell array structure. The memory cell 33 is provided with a diode 34 for preventing a sneak current during recording / reproduction.

FIG. 12 shows the structure of the memory cell array portion of the semiconductor memory of FIG.
On the semiconductor chip 30, word lines WLi-1, WLi, WLi + 1 and bit lines BLj-1, BLj, BLj + 1 are arranged, and memory cells 33 and diodes 34 are arranged at intersections of these wirings.

  The feature of such a cross-point cell array structure is that it is advantageous for high integration because it is not necessary to individually connect a MOS transistor to the memory cell 33. For example, as shown in FIGS. 14 and 15, it is possible to stack the memory cells 33 to make the memory cell array have a three-dimensional structure.

  For example, as shown in FIG. 13, the memory cell 33 has a stack structure of a recording layer 22, a protective layer 13, and a heater layer 35. One memory cell 33 stores 1-bit data. The diode 34 is disposed between the word line WLi and the memory cell 33.

  Next, the recording / reproducing operation will be described with reference to FIGS. Here, it is assumed that the memory cell 33 surrounded by the dotted line A is selected, and the recording / reproducing operation is executed for this.

<First example>
In the first example, the material shown in FIG. 1 is used for the recording layer. In recording (set operation), it is only necessary to apply a voltage to the selected memory cell 33 and generate a potential gradient in the memory cell 33 to flow a current pulse. For example, the potential of the word line WLi is set to the bit line BLj. It creates a state that is relatively lower than the potential. If the bit line BLj is set to a fixed potential (eg, ground potential), a negative potential may be applied to the word line WLi.

  At this time, in the selected memory cell 33 surrounded by the dotted line A, some of the X ions move to the word line (cathode) WLi side, and the X ions in the crystal decrease relative to the N ions. . Further, X ions that have moved to the word line WLi side receive electrons from the word line WLi and are deposited as metal.

  In the selected memory cell 33 surrounded by the dotted line A, N ions become excessive, and as a result, the valence of X ions in the crystal is increased. That is, since the selected memory cell 33 surrounded by the dotted line A has electron conductivity due to carrier injection due to phase change, recording (set operation) is completed.

  During recording, it is preferable that the unselected word lines WLi−1 and WLi + 1 and the unselected bit lines BLj−1 and BLj + 1 are all biased to the same potential. In standby before recording, it is preferable to precharge all the word lines WLi-1, WLi, WLi + 1 and all the bit lines BLj-1, BLj, BLj + 1. The current pulse for recording may be generated by creating a state in which the potential of the word line WLi is relatively higher than the potential of the bit line BLj.

Reproduction is performed by passing a current pulse through the selected memory cell 33 surrounded by the dotted line A and detecting the resistance value of the memory cell 33. However, the current pulse needs to be a minute value that does not cause a resistance change of the material constituting the memory cell 33. For example, a read current (current pulse) generated by the read circuit is passed from the bit line BLj to the memory cell 33 surrounded by the dotted line A, and the resistance value of the memory cell 33 is measured by the read circuit. If the new material already explained is adopted, the difference in resistance value between the set / reset states can be secured at 10 ³ or more.

  The erase (reset) operation is performed by heating the selected memory cell 33 surrounded by the dotted line A with a large current pulse to promote the oxidation-reduction reaction in the memory cell 33.

<Second example>
The second example is a case where the material shown in FIG. 3 is used for the recording layer. In the recording operation (set operation), it is only necessary to apply a voltage to the selected memory cell 33 and generate a potential gradient in the memory cell 33 to flow a current pulse. For example, the potential of the word line WLi is set to the bit line. It is relatively lower than the potential of BLj. If the bit line BLj is set to a fixed potential (eg, ground potential), a negative potential may be applied to the word line WLi.

  At this time, in the selected memory cell 33 surrounded by the dotted line A, some of the X ions in the first compound move to the void sites of the second compound. For this reason, the valence of X ions in the first compound increases, and the valence of M ions in the second compound decreases. As a result, conductive carriers are generated in the crystals of the first and second compounds, and both have electrical conductivity. Thereby, the set operation (recording) is completed.

  During recording, it is preferable that the unselected word lines WLi−1 and WLi + 1 and the unselected bit lines BLj−1 and BLj + 1 are all biased to the same potential. In standby before recording, it is preferable to precharge all the word lines WLi-1, WLi, WLi + 1 and all the bit lines BLj-1, BLj, BLj + 1. The current pulse may be generated by creating a state in which the potential of the word line WLi is relatively higher than the potential of the bit line BLj.

  The reproduction operation is performed by passing a current pulse through the selected memory cell 33 surrounded by the dotted line A and detecting the resistance value of the memory cell 33. However, the current pulse needs to be a minute value that does not cause a resistance change of the material constituting the memory cell 33.

For example, a read current (current pulse) generated by the read circuit is passed from the bit line BLj to the memory cell 33 surrounded by the dotted line A, and the resistance value of the memory cell 33 is measured by the read circuit. If the new material already explained is adopted, the difference in resistance value between the set / reset states can be secured at 10 ³ or more.

  The reset (erase) operation uses Joule heat generated by flowing a large current pulse to a selected memory cell 33 surrounded by a dotted line A and its residual heat, so that the X ion element becomes a void in the second compound. What is necessary is just to accelerate | stimulate the effect | action which is going to return in a 1st compound from a site. In this case, since the use of returning to equilibrium by heating is used, the Fermi level of the electrons of the first compound needs to be lower than the Fermi level of the electrons of the second compound. In the example of the semiconductor memory shown here, since each element has a diode, the reset method of applying a potential difference opposite to that in the setting operation as in paragraph [0096] cannot be used.

(3) Flash Memory FIG. 16 shows a memory cell of the flash memory according to the present invention. The memory cell of the flash memory is composed of a MIS (metal-insulator-semiconductor) transistor. A diffusion layer 42 is formed in the surface region of the semiconductor substrate 41. A gate insulating layer 43 is formed on the channel region between the diffusion layers 42. A recording layer (RRAM: Resistive RAM) 44 according to an example of the present invention is formed on the gate insulating layer 43. A control gate electrode 45 is formed on the recording layer 44.

  The semiconductor substrate 41 may be a well region, and the semiconductor substrate 41 and the diffusion layer 42 have opposite conductivity types. The control gate electrode 45 becomes a word line and is made of, for example, conductive polysilicon. The recording layer 44 is made of the material shown in FIG. 1, FIG. 2, or FIG.

  Next, the basic operation will be described with reference to FIG. The set (write) operation is performed by applying the potential V1 to the control gate electrode 45 and applying the potential V2 to the semiconductor substrate 41. The difference between the potentials V1 and V2 needs to be large enough for the recording layer 44 to undergo phase change or resistance change, but the direction is not particularly limited. That is, either V1> V2 or V1 <V2 may be used.

  For example, assuming that the recording layer 44 is an insulator (high resistance) in the initial state (reset state), the gate insulating layer 43 is substantially thickened, so that the threshold value of the memory cell (MIS transistor) is reached. Get higher. If the recording layer 44 is changed to a conductor (low resistance) by applying the potentials V1 and V2 from this state, the gate insulating layer 43 is substantially thinned. Therefore, the threshold value of the memory cell (MIS transistor) is , Get lower. Although the potential V2 is applied to the semiconductor substrate 41, the potential V2 may be transferred from the diffusion layer 42 to the channel region of the memory cell instead.

  The reset (erase) operation is performed by applying the potential V1 'to the control gate electrode 45, applying the potential V3 to one of the diffusion layers 42, and applying the potential V4 (<V3) to the other of the diffusion layers 42.

  The potential V1 'is set to a value exceeding the threshold value of the memory cell in the set state. At this time, the memory cell is turned on, electrons flow from the other side of the diffusion layer 42 to one side, and hot electrons are generated. Since the hot electrons are injected into the recording layer 44 through the gate insulating layer 43, the temperature of the recording layer 44 rises. As a result, the recording layer 44 changes from a conductor (low resistance) to an insulator (high resistance), so that the gate insulating layer 43 is substantially thickened, and the threshold value of the memory cell (MIS transistor) is , Get higher.

  As described above, the threshold value of the memory cell can be changed based on a principle similar to that of the flash memory. Therefore, the information recording / reproducing apparatus according to the example of the present invention can be put into practical use by using the technology of the flash memory.

(4) NAND Flash Memory FIG. 17 shows a circuit diagram of the NAND cell unit. FIG. 18 shows the structure of a NAND cell unit according to an example of the present invention.

  An N-type well region 41b and a P-type well region 41c are formed in the P-type semiconductor substrate 41a. A NAND cell unit according to an example of the present invention is formed in the P-type well region 41c. The NAND cell unit is composed of a NAND string composed of a plurality of memory cells MC connected in series, and a total of two select gate transistors ST connected to the both ends one by one.

  The memory cell MC and the select gate transistor ST have the same structure. Specifically, these include an N-type diffusion layer 42, a gate insulating layer 43 on a channel region between the N-type diffusion layers 42, a recording layer (RRAM) 44 on the gate insulating layer 43, and a recording layer 44. And the upper control gate electrode 45.

  The state (insulator / conductor) of the recording layer 44 of the memory cell MC can be changed by the basic operation described above. On the other hand, the recording layer 44 of the select gate transistor ST is fixed in a set state, that is, a conductor (low resistance). One of the select gate transistors ST is connected to the source line SL, and the other one is connected to the bit line BL.

  It is assumed that all memory cells in the NAND cell unit are in a reset state (resistance is large) before the set (write) operation. The set (write) operation is sequentially performed one by one from the memory cell MC on the source line SL side to the memory cell on the bit line BL side. V1 (plus potential) is applied to the selected word line (control gate electrode) WL as a write potential, and Vpass is applied to the unselected word line WL as a transfer potential (a potential at which the memory cell MC is turned on).

  The select gate transistor ST on the source line SL side is turned off, the select gate transistor ST on the bit line BL side is turned on, and program data is transferred from the bit line BL to the channel region of the selected memory cell MC.

  For example, when the program data is “1”, a write inhibit potential (for example, the same potential as V1) is transferred to the channel region of the selected memory cell MC, and the recording layer 44 of the selected memory cell MC is transferred. The resistance value should not change from a high state to a low state. When the program data is “0”, V2 (<V1) is transferred to the channel region of the selected memory cell MC, and the resistance value of the recording layer 44 of the selected memory cell MC is changed from a high state to a low state. To change.

  In the reset (erase) operation, for example, V1 'is applied to all the word lines (control gate electrodes) WL, and all the memory cells MC in the NAND cell unit are turned on. Further, the two select gate transistors ST are turned on, V3 is applied to the bit line BL, and V4 (<V3) is applied to the source line SL. At this time, since hot electrons are injected into the recording layers 44 of all the memory cells MC in the NAND cell unit, a reset operation is collectively executed for all the memory cells MC in the NAND cell unit.

  In the read operation, a read potential (plus potential) is applied to the selected word line (control gate electrode) WL, and the memory cell MC receives data “0”, “1” on the unselected word line (control gate electrode) WL. A potential to be turned on without fail is given. Further, the two select gate transistors ST are turned on to supply a read current to the NAND string.

  When a read potential is applied to the selected memory cell MC, the selected memory cell MC is turned on or off according to the value of the data stored therein. For example, data can be read by detecting a change in the read current. it can. In the structure of FIG. 18, the select gate transistor ST has the same structure as the memory cell MC. For example, as shown in FIG. 19, the select gate transistor ST is not formed with a recording layer. A normal MIS transistor can also be used.

  FIG. 20 shows a modification of the NAND flash memory. This modification is characterized in that the gate insulating layers of the plurality of memory cells MC constituting the NAND string are replaced with a P-type semiconductor layer 47.

  When the high integration progresses and the memory cell MC is miniaturized, the P-type semiconductor layer 47 is filled with a depletion layer without applying a voltage. At the time of setting (writing), a positive write potential (for example, 3.5 V) is applied to the control gate electrode 45 of the selected memory cell MC, and a positive transfer potential (to the control gate electrode 45 of the non-selected memory cell MC). For example, give 1V).

  At this time, the surface of the P-type well region 41c of the plurality of memory cells MC in the NAND string is inverted from P-type to N-type, and a channel is formed. Therefore, as described above, the set operation can be performed by turning on the select gate transistor ST on the bit line BL side and transferring the program data “0” from the bit line BL to the channel region of the selected memory cell MC. it can.

  For example, reset (erase) is performed by applying a negative erase potential (for example, −3.5 V) to all the control gate electrodes 45 and applying a ground potential (0 V) to the P-type well region 41 c and the P-type semiconductor layer 47. This can be performed collectively for all the memory cells MC constituting the NAND string. At the time of reading, a positive read potential (for example, 0.5 V) is applied to the control gate electrode 45 of the selected memory cell MC, and the memory cell MC receives data “0” to the control gate electrode 45 of the non-selected memory cell MC. A transfer potential (for example, 1 V) that is always turned on regardless of “1” is applied.

  However, the threshold voltage Vth ”1” of the memory cell MC in the “1” state is in the range of 0V <Vth ”1” <0.5V, and the threshold voltage Vth ”0 of the memory cell MC in the“ 0 ”state "" Is assumed to be in the range of 0.5V <Vth "0" <1V.

  Further, the two select gate transistors ST are turned on to supply a read current to the NAND string. In such a state, since the amount of current flowing through the NAND string changes according to the value of the data stored in the selected memory cell MC, data can be read by detecting this change.

  In this modification, the hole doping amount of the P-type semiconductor layer 47 is larger than that of the P-type well region 41c, and the Fermi level of the P-type semiconductor layer 47 is 0.5 than that of the P-type well region 41c. It is desirable that the depth is about V. This is because when a positive potential is applied to the control gate electrode 45, inversion from the P-type to N-type starts from the surface portion of the P-type well region 41c between the N-type diffusion layers 42, and a channel is formed. It is for doing so.

  Thus, for example, at the time of writing, the channel of the non-selected memory cell MC is formed only at the interface between the P-type well region 41c and the P-type semiconductor layer 47, and at the time of reading, a plurality of memories in the NAND string is formed. The channel of the cell MC is formed only at the interface between the P-type well region 41 c and the P-type semiconductor layer 47. That is, even if the recording layer 44 of the memory cell MC is a conductor (set state), the diffusion layer 42 and the control gate electrode 45 are not short-circuited.

(5) NOR Flash Memory FIG. 21 shows a circuit diagram of a NOR cell unit. FIG. 22 shows the structure of a NOR cell unit according to an example of the present invention.

  An N-type well region 41b and a P-type well region 41c are formed in the P-type semiconductor substrate 41a. A NOR cell according to an example of the present invention is formed in the P-type well region 41c. The NOR cell is composed of one memory cell (MIS transistor) MC connected between the bit line BL and the source line SL. The memory cell MC includes an N-type diffusion layer 42, a gate insulating layer 43 on a channel region between the N-type diffusion layers 42, a recording layer (RRAM) 44 on the gate insulating layer 43, and a control on the recording layer 44. And a gate electrode 45.

  The state (insulator / conductor) of the recording layer 44 of the memory cell MC can be changed by the basic operation described above.

(6) Two-tra type flash memory FIG. 23 shows a circuit diagram of a two-tra cell unit. FIG. 24 shows the structure of a two-tracell unit according to an example of the present invention.

  The 2-tra cell unit has been recently developed as a new cell structure that combines the characteristics of a NAND cell unit and the characteristics of a NOR cell. An N-type well region 41b and a P-type well region 41c are formed in the P-type semiconductor substrate 41a. In the P-type well region 41c, the two tracell unit according to the example of the present invention is formed. The two tracell unit is composed of one memory cell MC and one select gate transistor ST connected in series.

  The memory cell MC and the select gate transistor ST have the same structure. Specifically, these include an N-type diffusion layer 42, a gate insulating layer 43 on a channel region between the N-type diffusion layers 42, a recording layer (RRAM) 44 on the gate insulating layer 43, and a recording layer 44. And the upper control gate electrode 45.

  The state (insulator / conductor) of the recording layer 44 of the memory cell MC can be changed by the basic operation described above. On the other hand, the recording layer 44 of the select gate transistor ST is fixed in a set state, that is, a conductor (low resistance). Select gate transistor ST is connected to source line SL, and memory cell MC is connected to bit line BL.

  The state (insulator / conductor) of the recording layer 44 of the memory cell MC can be changed by the basic operation described above. In the structure of FIG. 24, the select gate transistor ST has the same structure as that of the memory cell MC. For example, as shown in FIG. 25, the select gate transistor ST is usually formed without forming a recording layer. It is also possible to use a MIS transistor.

(7) Others In this embodiment, the probe memory and the semiconductor memory have been described. However, the material and principle proposed in the example of the present invention can be applied to a recording medium such as a current hard disk. .

  The present invention has been described in detail based on the above specific examples. However, the present invention is not limited to the above specific examples, and various modifications and changes can be made without departing from the scope of the present invention.

It is a figure which shows the structure of the recording part in the information reproduction apparatus in 1st Embodiment. It is a figure which shows the structure of the recording part in the information reproduction apparatus in 2nd Embodiment. It is a figure which shows the structure of the recording part in the information reproduction apparatus in 3rd Embodiment. It is a schematic block diagram regarding the probe memory which concerns on the example of this invention. Similarly, it is a schematic block diagram regarding a probe memory according to an example of the present invention. FIG. 6 is a diagram illustrating a state during recording of the probe memory illustrated in FIGS. 4 and 5. FIG. 6 is a diagram illustrating a state during recording of the probe memory illustrated in FIGS. 4 and 5. FIG. 6 is a diagram showing a state when the probe memory shown in FIGS. 4 and 5 is reproduced. FIG. 6 is a diagram illustrating a state during recording of the probe memory illustrated in FIGS. 4 and 5. FIG. 6 is a diagram showing a state when the probe memory shown in FIGS. 4 and 5 is reproduced. It is a schematic block diagram regarding the crosspoint type | mold semiconductor memory which concerns on the example of this invention. It is a figure which shows the structure of the memory cell array part of the semiconductor memory shown in FIG. It is a figure which shows the example of the memory cell structure of the semiconductor memory shown in FIG. It is a figure which shows the three-dimensional structure memory cell array of the semiconductor memory shown in FIG. Similarly, it is a figure which shows the three-dimensional structure memory cell array of the semiconductor memory shown in FIG. It is a figure which shows the memory cell of the flash memory of this invention. 1 is a circuit diagram of a cell unit of a NAND flash memory according to the present invention. It is a figure which shows the structure of the NAND cell unit which concerns on the example of this invention. Similarly, it is a figure which shows the structure of the NAND cell unit which concerns on the example of this invention. It is a figure which shows the structure regarding the modification of the NAND cell unit which concerns on the example of this invention. FIG. 3 is a circuit diagram of a cell unit of a NOR flash memory according to the present invention. It is a figure which shows the structure of the NOR cell unit which concerns on the example of this invention. It is a circuit diagram of the cell unit of the two-tra type flash memory of the present invention. It is a figure which shows the structure of the 2 tracell unit which concerns on the example of this invention. Similarly, it is a figure which shows the structure of 2 tracell units based on the example of this invention.

Explanation of symbols

  11, 13: Electrode layer, 12, 22: Recording layer, 13: Protective layer, 14: XY scanner, 15: Driver, 20, 23, 30: Substrate, 21: Electrode layer, 24: Probe, 25, 26: Multi Plex driver, 27: recording bit, 31: word line driver & decoder, 32: bit line driver & decoder & readout circuit, 33: memory cell, 34: diode, 35: heater layer, WLi-1, WLi, WLi + 1: word Line, BLj-1, BLj, BLj + 1: Bit line.

Claims (20)

A recording layer; and a recording unit that records information by applying a voltage to the recording layer to generate a resistance change due to a phase change in the recording layer,
The information recording / reproducing apparatus, wherein the recording layer includes at least a first compound having a LiMoN ₂ structure. The first compound has the chemical formula 1: XaYbN ₂ (0.5 ≦ a ≦ 1.1, 0.7 ≦ b ≦ 1.0; X: at least one metal element, Y: at least one transition metal element The information recording / reproducing apparatus according to claim 1, wherein the information recording / reproducing apparatus is represented by a chemical formula:   X is Cu, Ag, Au, Hg, Tl, Li, Na, K, Rb, Cs, Be, Mg, Ca, Sr, Ba, Ra, Ti, V, Cr, Mn, Fe, Co, Ni, The information recording / reproducing apparatus according to claim 2, comprising at least one element selected from the group consisting of Zn, Ge, Pd, Cd, Yb, Nb, Ta, Y, lanthanoid, and actinoid.   The information recording according to claim 3, wherein the X includes at least one element selected from the group consisting of Cu, Ag, Au, Hg, Tl, Li, Na, K, Rb, and Cs. Playback device.   X is at least selected from the group consisting of Be, Mg, Ca, Sr, Ba, Ra, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Ge, Pd, Ag, Cd, and Yb. The information recording / reproducing apparatus according to claim 3, wherein the information recording / reproducing apparatus includes one kind of element.   4. The information recording / reproducing apparatus according to claim 3, wherein the X includes at least one element selected from the group of Y (yttrium), Nb, Ta, lanthanoid, and actinoid.   The information recording / reproducing apparatus according to claim 3, wherein the X includes at least one element selected from the group consisting of Fe, Co, Ni, Cu, and Ag.   The Y according to claim 2, wherein the Y includes at least one element selected from the group consisting of Cr, Mn, Mo, W, Ru, Rh, Re, Os, Nb, Ta, and Ir. Information recording / reproducing apparatus.   9. The information recording / reproducing apparatus according to claim 8, wherein Y includes at least one element selected from a group of Mo, W, Ru, and Re.   9. The information recording / reproducing apparatus according to claim 8, wherein Y includes at least one element selected from the group consisting of Cr, Mn, Mo, W, Ru, Re, and Os.   9. The information recording / reproducing apparatus according to claim 8, wherein Y includes at least one element selected from the group consisting of Cr, Mn, Mo, Ru, Rh, Re, Os, and Ir.   9. The information recording / reproducing apparatus according to claim 8, wherein the Yth element includes at least one element of Nb and Ta.   13. The information recording / reproducing apparatus according to claim 2, further comprising a second compound having a void site capable of accommodating the X in contact with the first compound. The second compound is
Chemical formula 2: □ xMZ ₂ (□: void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh At least one element, Z: at least one element selected from O, S, Se, N, Cl, Br, I, 0.3 ≦ x ≦ 1),
Chemical formula 3: □ xMZ ₃ (□ is a void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh At least one element selected from the group consisting of Z: O, S, Se, N, Cl, Br, I, 1 ≦ x ≦ 2),
Chemical formula 4: □ xMZ ₄ (□ is a void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh At least one element selected from the group consisting of Z: O, S, Se, N, Cl, Br, I, 1 ≦ x ≦ 2),
Chemical formula 5: □ xMPOz (□ is a void site where X is accommodated, M: selected from Ti, V, Cr, Mn, Fe, Co, Ni, Nb, Ta, Mo, W, Re, Ru, Rh 14. Information recording / reproducing according to claim 13, characterized in that it is one of at least one element, P: phosphorus element, O: oxygen element, 0.3 ≦ x ≦ 3, 4 ≦ z ≦ 6) apparatus. The second compound includes a hollandite structure, a ramsdellite structure, an anatase structure, a brookite structure, a pyroloose structure, a ReO ₃ structure, a MoO _1.5 PO ₄ structure, a TiO _0.5 PO ₄ structure and a FePO ₄ structure, a βMnO ₂ structure, a γMnO ₂ structure, 15. The information recording / reproducing apparatus according to claim 14, wherein the information recording / reproducing apparatus has one of λMnO ₂ structures.   16. The information recording / reproducing apparatus according to claim 14, wherein the Fermi level of the electrons of the first compound is lower than the Fermi level of the electrons of the second compound.   The information recording / reproducing apparatus according to claim 1, wherein the recording unit includes a probe for locally applying the voltage to a recording unit of the recording layer.   The information recording / reproducing apparatus according to claim 1, wherein the recording unit includes a word line and a bit line sandwiching the recording layer.   17. The recording apparatus according to claim 1, wherein the recording unit includes a MIS transistor, and the recording layer is disposed between a gate electrode and a gate insulating layer of the MIS transistor. Information recording / reproducing apparatus.   The recording means includes two second conductive type diffusion layers in the first conductive type semiconductor substrate and a first conductive type semiconductor layer on the first conductive type semiconductor substrate between the two second conductive type diffusion layers. And a gate electrode for controlling conduction / non-conduction between the two second conductivity type diffusion layers, and the recording layer is disposed between the gate electrode and the first conductivity type semiconductor layer. The information recording / reproducing apparatus according to claim 1, wherein the information recording / reproducing apparatus is characterized by.

Images