JP2008016584A - Semiconductor element and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor element which can suppress reduction in element characteristics caused by an increase in the dislocation of an active region while suppressing cracking in a semiconductor layer. <P>SOLUTION: In a semiconductor laser element, an n-type GaN substrate 21 includes a planar region A in which a semiconductor layers (22 to 30) can vertically grow; and a planar region B located to sandwich the planar region A, in which an interfacial region with the planar region A extends substantially in a [1-100] direction and the semiconductor layers (22 to 30) can grow horizontally. The semiconductor layers (22 to 30) include a ridge 31 formed on a region of the n-type GaN substrate 21 at the side biased from the center of the planar region A in a [0001] direction. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having an active region and a manufacturing method thereof.

  Conventionally, a semiconductor device having an active region is known. Such a semiconductor element includes, for example, an n-type cladding layer (n-type nitride-based semiconductor layer) made of n-type AlGaN, a light emitting layer, and a p-type layer on a nitride-based semiconductor substrate made of n-type GaN having a flat surface. A nitride semiconductor layer such as a nitride semiconductor layer is formed to form a nitride semiconductor light emitting device such as a nitride semiconductor laser device. However, since the lattice constant of AlGaN is smaller than the lattice constant of GaN, in the conventional nitride semiconductor light emitting device, an n-type cladding layer made of n-type AlGaN is grown on a nitride semiconductor substrate having a flat surface. In this case, the n-type cladding layer made of n-type AlGaN is distorted and cracks are likely to occur. For this reason, since it becomes easy to generate | occur | produce a crack also in nitride type semiconductor layers, such as a light emitting layer laminated | stacked on an n-type clad layer, and a p-type nitride type semiconductor layer, a leak electric current originates in the generated crack. As the number increases, the waveguide of light tends to be hindered. As a result, there is a disadvantage that the characteristics of the nitride-based semiconductor light-emitting device may be deteriorated.

  Thus, conventionally, a nitride-based semiconductor element that can suppress the occurrence of cracks in the nitride-based semiconductor layer has been proposed (see, for example, Patent Document 1). In Patent Document 1, a groove extending in the [1-100] direction is formed on the surface of a nitride semiconductor substrate made of n-type GaN having a (0001) plane, and (0001) of the nitride semiconductor substrate is formed. There is disclosed a nitride semiconductor device in which a nitride semiconductor layer made of AlGaN or the like including an active region is formed on the surface of a surface. In this nitride semiconductor device, the nitride formed on the surface of the nitride semiconductor substrate is formed by forming a groove extending in the [1-100] direction on the surface of the (0001) plane of the nitride semiconductor substrate. Since the strain of the nitride-based semiconductor layer can be absorbed by the groove extending in the [1-100] direction of the nitride-based semiconductor substrate, cracks are formed in the nitride-based semiconductor layer formed on the surface of the nitride-based semiconductor substrate. It is possible to suppress the occurrence.

JP 2005-322786 A

  However, in the structure of Patent Document 1, dislocations are likely to occur in the nitride semiconductor layer grown in the groove portion of the nitride semiconductor substrate, and the dislocations generated in the groove portion are generated on the surface of the nitride semiconductor substrate. Since it easily propagates in a certain (0001) plane, there is a disadvantage that the dislocation density of the ridge portion (active region) as the light emitting region provided in the nitride-based semiconductor layer is increased. As a result, there is a problem that element characteristics are deteriorated.

  The present invention has been made to solve the above problems, and one object of the present invention is due to an increase in dislocations in the active region while suppressing the occurrence of cracks in the semiconductor layer. It is an object to provide a semiconductor element capable of suppressing deterioration of element characteristics and a manufacturing method thereof.

Means for Solving the Problems and Effects of the Invention

  To achieve the above object, a semiconductor device according to a first aspect of the present invention includes a nitride semiconductor substrate having a wurtzite structure, an α-SiC substrate having a hexagonal structure, and an α-SiC substrate having a rhombohedral structure. And a semiconductor substrate substantially including a surface having a (H, K, -H-K, 0) plane when at least one of H and K is an integer that is not 0, A semiconductor layer formed on the surface of the semiconductor substrate and made of a nitride-based semiconductor having a wurtzite structure, the semiconductor substrate including a first region in which the semiconductor layer can grow in a vertical direction; A second region which is arranged so as to sandwich the region, and a boundary region with the first region extends substantially in the [K, -H, HK, 0] direction, and the semiconductor layer can grow laterally And further including a semiconductor layer Includes an active region formed on a region on the [0001] direction side from the central portion of the first region of the semiconductor substrate.

  In the semiconductor element according to the first aspect, as described above, the semiconductor layer can be grown in the vertical direction on the semiconductor substrate including the surface having the (H, K, -HK, 0) plane. The boundary region between the region and the first region extends substantially in the [K, -H, HK, 0] direction, and the semiconductor layer grows laterally. When the surface of the semiconductor substrate is a (H, K, -H-K, 0) plane by providing the possible second region, the [0001] direction of the semiconductor layer is always [K, -H, H Since it is arranged in a direction orthogonal to the second region extending in the −K, 0] direction, a large strain in the c-axis direction ([0001] direction) of the semiconductor layer formed on the surface of the semiconductor substrate is It can be absorbed by the second region extending in the -H, HK, 0] direction. When the (H, K, -H-K, 0) plane of the semiconductor surface is a (11-20) plane or a (1-100) plane, [K, -H, H in the extending direction of the second region is used. The −K, 0] direction is a [1-100] direction or a [−1-120] direction, respectively. Thereby, it can suppress that a crack generate | occur | produces in the semiconductor layer formed on the surface of a semiconductor substrate. In addition, a first region in which a semiconductor layer can grow in a vertical direction and a first region are sandwiched between a semiconductor substrate including a surface having a substantially (H, K, -H-K, 0) plane. By providing a second region that is disposed and a boundary region with the first region substantially extends in the [K, -H, HK, 0] direction, and the semiconductor layer can grow laterally. When the surface of the semiconductor substrate is an (H, K, -H-K, 0) plane, the (0001) plane on which the dislocations of the semiconductor layer formed on the surface of the semiconductor substrate easily propagate is always It is perpendicular to the (H, K, -HK, 0) plane of the surface and parallel to the [K, -H, HK, 0] direction in the direction in which the boundary region between the first region and the second region extends. Therefore, the dislocation generated in the portion formed on the second region of the semiconductor layer is perpendicular to the surface of the semiconductor substrate. Direction and the direction in which the boundary region between the first region and the second region extends, and in the [0001] direction and the [000-1] direction, which are directions from the second region toward the first region. Is difficult to propagate. When the (H, K, -H-K, 0) plane of the semiconductor surface is a (11-20) plane or a (1-100) plane, the boundary region between the first region and the second region extends in the extending direction. The [K, -H, HK, 0] directions are the [1-100] direction and the [-1-120] direction, respectively. This suppresses dislocations generated in the portion on the second region of the semiconductor layer from propagating in the [0001] direction or [000-1] direction to the active region of the first region of the semiconductor layer. Therefore, it is possible to suppress an increase in the dislocation density in the active region of the first region of the semiconductor layer. As a result, it is possible to suppress deterioration in device characteristics due to an increase in dislocations in the active region. In addition, by providing an active region in a portion of the semiconductor layer on the [0001] direction side of the central portion of the first region of the semiconductor substrate, when the semiconductor layer grows in the lateral direction on the second region, [000-1] The dislocation density of the semiconductor layer on the second region on the direction side is larger than the dislocation density of the semiconductor layer on the second region on the [0001] direction side. ] Even when the dislocation of the semiconductor layer on the second region on the direction side is slightly propagated to the semiconductor layer on the first region, the active region is on the [0001] direction side of the central portion of the first region of the semiconductor substrate. Therefore, the dislocation density of the active region of the semiconductor layer can be further suppressed from increasing. As a result, it is possible to further suppress deterioration in element characteristics due to an increase in dislocations in the active region of the semiconductor layer.

  In the above configuration, preferably, a portion of the semiconductor layer formed on the second region of the semiconductor substrate is formed in a step shape substantially extending in the [K, -H, HK, 0] direction.

  In this case, the second region on the [0001] direction side and the second region on the [000-1] direction side of the semiconductor substrate are preferably substantially [K, -H, HK, 0, respectively]. A first recess and a second recess extending in the direction. Here, the first concave portion may include a first side surface, and the second concave portion may include a second side surface. In the above configuration, the first recess may include a first side surface having a (0001) plane, and the second recess may include a second side surface having a (000-1) plane.

  In the above configuration, the active region of the semiconductor layer preferably includes a light emitting region extending substantially in the [K, -H, HK, 0] direction.

  A method for manufacturing a semiconductor device according to a second aspect of the present invention includes any one of a nitride semiconductor substrate having a wurtzite structure, an α-SiC substrate having a hexagonal structure, and an α-SiC substrate having a rhombohedral structure. And a step of preparing a semiconductor substrate substantially including a surface having a (H, K, -HK, 0) plane when at least one of H and K is an integer other than 0, and a semiconductor A semiconductor layer is formed on the first region of the substrate by vertical growth, and is disposed so as to sandwich the first region. A boundary region with the first region is substantially [K, -H, HK]. , 0] direction, forming a semiconductor layer having a wurtzite structure on the first region and the second region of the semiconductor substrate by forming the semiconductor layer by lateral growth on the second region. , The first region of the semiconductor substrate Forming an active region in a portion of the semiconductor layer on a region on the [0001] direction side of the central portion of the semiconductor layer.

  In the method for manufacturing a semiconductor device according to the second aspect, as described above, by vertical growth on the first region of the semiconductor substrate including the surface having the (H, K, -HK, 0) plane, A semiconductor layer is formed and arranged so as to sandwich the first region, and a boundary region with the first region is laterally extended on the second region substantially extending in the [K, -H, HK, 0] direction. When the surface of the semiconductor substrate is (H, K, -H-K, 0) plane by forming the semiconductor layer by direction growth, the [0001] direction of the semiconductor layer is always [K, -H, Since it is arranged perpendicular to the second region extending in the HK, 0] direction, a large strain in the c-axis direction ([0001] direction) of the semiconductor layer formed on the surface of the semiconductor substrate is caused by [K, − It can be absorbed by the second region extending in the H, HK, 0] direction. When the (H, K, -H-K, 0) plane of the semiconductor surface is a (11-20) plane or a (1-100) plane, [K, -H, H in the extending direction of the second region is used. The −K, 0] direction is a [1-100] direction or a [−1-120] direction, respectively. Thereby, it can suppress that a crack generate | occur | produces in the semiconductor layer formed on the surface of a semiconductor substrate. In addition, a semiconductor layer is formed by vertical growth on the first region of the semiconductor substrate including a surface having a substantially (H, K, -H-K, 0) plane, and the first region is sandwiched therebetween. The semiconductor layer is formed by lateral growth on the second region, which is disposed in the first region and extends substantially in the [K, -H, HK, 0] direction. When the surface of the substrate is an (H, K, -H-K, 0) plane, the (0001) plane on which the dislocation of the semiconductor layer formed on the surface of the semiconductor substrate is likely to propagate is always the surface of the semiconductor substrate. Arranged in parallel to the [K, -H, HK, 0] direction perpendicular to the (H, K, -HK, 0) plane and extending in the boundary region between the first region and the second region Therefore, the dislocation generated in the portion formed on the second region of the semiconductor layer is the direction perpendicular to the surface of the semiconductor substrate. And the direction in which the boundary region between the first region and the second region extends, and in the [0001] direction and the [000-1] direction, which are directions from the second region toward the first region, It becomes difficult to propagate. When the (H, K, -H-K, 0) plane of the semiconductor surface is a (11-20) plane or a (1-100) plane, the boundary region between the first region and the second region extends in the extending direction. The [K, -H, HK, 0] directions are the [1-100] direction and the [-1-120] direction, respectively. This suppresses dislocations generated in the portion on the second region of the semiconductor layer from propagating in the [0001] direction or [000-1] direction to the active region of the first region of the semiconductor layer. Therefore, it is possible to suppress an increase in the dislocation density in the active region of the first region of the semiconductor layer. As a result, it is possible to suppress deterioration in device characteristics due to an increase in dislocations in the active region. In addition, by forming an active region in a portion of the semiconductor layer on the region on the [0001] direction side from the central portion of the first region of the semiconductor substrate, when the semiconductor layer grows laterally on the second region, The dislocation density of the semiconductor layer on the second region on the [000-1] direction side is larger than the dislocation density of the semiconductor layer on the second region on the [0001] direction side. 1] Even when the dislocation of the semiconductor layer on the second region on the direction side is slightly propagated to the semiconductor layer on the first region, the active region is in the [0001] direction relative to the central portion of the first region of the semiconductor substrate. Since it is provided in the portion of the semiconductor layer on the side region, it is possible to further suppress an increase in the dislocation density in the active region of the semiconductor layer. As a result, it is possible to further suppress deterioration in element characteristics due to an increase in dislocations in the active region of the semiconductor layer.

  FIG. 1 is a cross-sectional view for explaining the concept of the present invention. First, the concept of the present invention will be described with reference to FIG. 1 before describing specific embodiments of the present invention. Here, a case where the present invention is applied to a semiconductor laser element which is an example of a semiconductor element will be described. The present invention is not limited to a semiconductor laser element, and can be applied to an electronic device such as a transistor as will be described later.

  When the present invention is applied to a semiconductor laser device, as shown in FIG. 1, the semiconductor laser device includes a semiconductor substrate 1, a semiconductor layer 3, an active layer 6, a semiconductor layer 9, one electrode 12, and the other. An electrode 15 is provided. A ridge portion (active region, light emitting region) 11 is formed on the [0001] side of the semiconductor layer 9.

  The semiconductor substrate 1 is made of any one of a nitride semiconductor substrate having a wurtzite structure, an α-SiC substrate having a hexagonal structure, and an α-SiC substrate having a rhombohedral structure. A nitride-based semiconductor substrate having a wurtzite structure is composed of GaN, AlN, InN, BN, TlN, or a mixed crystal thereof. As the α-SiC substrate having a hexagonal structure or rhombohedral structure, a 4H—SiC substrate, a 6H—SiC substrate, or the like can be used. The semiconductor substrate 1 may have n-type conductivity, or may have p-type conductivity. When the semiconductor substrate 1 does not have conductivity, the other electrode may be formed on the semiconductor layer 3 by exposing a part of the semiconductor layer 3.

  Here, the semiconductor substrate 1 is a substrate having (H, K, -HK, 0) planes such as {11-20} plane and {1-100} plane. H and K are integers at least one of which is not 0. In the present invention, the semiconductor substrate 1 only needs to have a substantially (H, K, -HK, 0) plane, and is turned off (tilted) by several degrees (H, K,- It may have an HK, 0) plane. Further, the semiconductor substrate 1 has a first region and a second region extending in the [K, -H, HK, 0] direction.

  The semiconductor layer 3, the active layer 6, and the semiconductor layer 9 may be made of a nitride semiconductor such as GaN, AlN, InN, BN, TlN, or a mixed crystal thereof. In addition, when the semiconductor substrate 1 has conductivity, the semiconductor layer 3 may have the same conductivity as the semiconductor substrate 1. Further, the semiconductor layer 9 has conductivity different from that of the semiconductor layer 3.

  The active layer 6 has a single layer, a single quantum well structure, or a multiple quantum well (MQW) structure. In addition, when forming the active layer 6 in a quantum well structure, GaInN can be used especially as a material of a well layer.

  The semiconductor layer 3 is made of a clad layer having a band gap larger than that of the active layer 6. A light guide layer having a band gap between the semiconductor layer 3 and the active layer 6 may be provided between the semiconductor layer 3 and the active layer 6. Further, a buffer layer may be provided between the semiconductor substrate 1 and the semiconductor layer 3. The semiconductor layer 9 is made of a clad layer having a band gap larger than that of the active layer 6. A light guide layer having a band gap between the semiconductor layer 9 and the active layer 6 may be provided between the semiconductor layer 9 and the active layer 6. Further, a contact layer may be provided on the semiconductor layer 9 on the side opposite to the active layer 6. In this case, the contact layer preferably has a smaller band gap than the semiconductor layer 9.

  Further, when the semiconductor layers 3 and 9 are formed of a clad layer, AlGaN can be used as the material for the semiconductor layers 3 and 9 made of the clad layer. In this case, for example, when a GaN substrate is used as the semiconductor substrate 1, the semiconductor layer 3 formed on the semiconductor substrate 1 has a lattice constant smaller than that of the semiconductor substrate 1. Cracks may occur. At this time, by forming a groove in the semiconductor substrate 1 or forming a mask on the semiconductor substrate 1, the effect of suppressing the occurrence of cracks in the semiconductor layer 3 formed on the semiconductor substrate 1 is increased. In this case, the dislocation density of the active region (ridge portion 11) can be reduced by forming the ridge portion 11 on the [0001] side of the semiconductor layer 9 as in the present invention.

  Specifically, the [0001] direction is always in the in-plane direction of the main surface of the semiconductor substrate 1 when the main surface of the semiconductor substrate 1 is the (H, K, -H-K, 0) plane, The (0001) plane and the main surface of the semiconductor substrate 1 are perpendicular to each other. The [K, -H, HK, 0] direction, which is the direction in which the first region and the second region extend, is the (H, K, -HK, 0) plane of the main surface of the semiconductor substrate 1. In some cases, it is always in the in-plane direction of the main surface of the semiconductor substrate 1. Furthermore, the [K, -H, HK, 0] direction and the [0001] direction are orthogonal to each other, and the [K, -H, HK, 0] direction is always in the (0001) plane. In the direction. When the semiconductor substrate 1 having the (11-20) plane is used, the extending direction of the first region and the second region may be selected in the [1-100] direction, and the semiconductor having the (1-100) plane. When the substrate 1 is used, the extending direction of the first region and the second region may be selected in the [-1-120] direction.

  Further, when a nitride-based semiconductor layer is formed on the semiconductor substrate 1 having a (H, K, -H-K, 0) plane, dislocations in the semiconductor layer easily propagate in the (0001) plane. At this time, if the extending direction of the first region and the second region is selected as described above, the dislocations generated in the second region are difficult to propagate into the first region, so that the dislocation density in the first region is increased. Can be suppressed.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 2 is a cross-sectional view showing the structure of the GaN-based semiconductor laser device according to the first embodiment of the present invention. FIG. 3 is a plan view showing the structure of the n-type GaN substrate of the GaN-based semiconductor laser device shown in FIG. FIG. 4 is a cross-sectional view showing the structure of the active layer of the GaN-based semiconductor laser device shown in FIG. First, the structure of the GaN-based semiconductor laser device according to the first embodiment will be described with reference to FIGS. The oscillation wavelength of the GaN semiconductor laser device according to the first embodiment is about 410 nm.

In the GaN-based semiconductor laser device according to the first embodiment, as shown in FIG. 2, an n-type wurtzite structure having a thickness of about 100 μm and doped with Si having a carrier concentration of about 5 × 10 ¹⁸ cm ^−3. A type GaN substrate 21 is used. The n-type GaN substrate 21 includes a surface having a substantially (11-20) plane that is off (tilted) by about 0.3 ° in the [000-1] direction. The n-type GaN substrate 21 is an example of the “semiconductor substrate” in the present invention.

  Here, in the first embodiment, as shown in FIG. 3, the n-type GaN substrate 21 includes a planar region A in which a semiconductor layer formed on the n-type GaN substrate 21 can grow in the vertical direction, and substantially In particular, the planar region B is disposed so as to sandwich the planar region A along the boundary region extending in the [1-100] direction, and the semiconductor layer formed on the n-type GaN substrate 21 can grow in the lateral direction; have. The plane area A is an example of the “first area” in the present invention, and the plane area B is an example of the “second area” in the present invention. The flat area B is composed of a concave portion 21a arranged on the [0001] direction side with respect to the flat area A and the other concave portion 21b arranged on the [000-1] direction side. Further, as shown in FIG. 2, the one concave portion 21a and the other concave portion 21b are both formed in a step shape having a depth of about 0.5 μm and a width of about 20 μm. Moreover, while the one recessed part 21a contains the one side surface 21c which has a (0001) Ga surface substantially, the other recessed part 21b contains the other side surface 21d which has a (000-1) N surface substantially. . Further, a flat portion 21e having a width of about 360 μm in the [0001] direction ([000-1] direction) is formed on the surface of the planar region A of the n-type GaN substrate 21. The one concave portion 21a is an example of the “first concave portion” in the present invention, and the other concave portion 21b is an example of the “second concave portion” in the present invention. The one side surface 21c is an example of the “first side surface” of the present invention, and the other side surface 21d is an example of the “second side surface” of the present invention.

On the n-type GaN substrate 21, an n-type layer 22 having a wurtzite structure made of n-type GaN doped with Si having a thickness of about 100 nm and a doping amount of about 5 × 10 ¹⁸ cm ^−3. Is formed. A portion of the n-type layer 22 formed on the planar region B (see FIG. 3) is formed in a step shape extending in the [1-100] direction. The n-type layer 22 is an example of the “semiconductor layer” in the present invention.

on the n-type layer 22 has a thickness of about 400 nm, n-type Si doped with a carrier concentration of about 5 × ¹⁰ 18 ^{cm -3} doping amount and about 5 × ¹⁰ 18 ^{cm -3} Al ₀ An n-type cladding layer 23 having a wurtzite structure made of _0.07 Ga _0.93 N is formed. A portion of the n-type cladding layer 23 formed on the planar region B (see FIG. 3) is formed in a step shape extending in the [1-100] direction. The n-type cladding layer 23 is an example of the “semiconductor layer” in the present invention.

The predetermined region on the plane area A of the n-type cladding layer 23, having a thickness of about 5 nm, Si having a carrier concentration of about 5 × ¹⁰ 18 ^{cm -3} doping amount and about 5 × ¹⁰ 18 ^{cm -3} An n-type carrier block layer 24 having a wurtzite structure made of n-type Al _0.16 Ga _0.84 N doped with is formed. On the n-type carrier blocking layer 24 has a thickness of about 100 nm, n-type Si having a carrier concentration of about 5 × ¹⁰ 18 ^cm doping amount of ^-3 and about 5 × ¹⁰ 18 ^{cm -3} is doped An n-type light guide layer 25 having a wurtzite structure made of GaN is formed. The n-type carrier block layer 24 and the n-type light guide layer 25 are examples of the “semiconductor layer” in the present invention.

On the n-type light guide layer 25, an active layer 26 having a wurtzite structure is formed. The active layer 26 is an example of the “semiconductor layer” in the present invention. As shown in FIG. 4, the active layer 26 includes four barrier layers 26g made of undoped In _0.02 Ga _0.98 N having a thickness of about 20 nm, and undoped In _0.15 having a thickness of about 3 nm. It has an MQW structure in which three well layers 26h made of Ga _0.85 N are alternately stacked.

On the active layer 26, as shown in FIG. 2, Mg has a thickness of about 100 nm, a doping amount of about 4 × 10 ¹⁹ cm ⁻³ , and a carrier concentration of about 5 × 10 ¹⁷ cm ^−3. A p-type light guide layer 27 having a wurtzite structure made of p-type GaN doped with is formed. On the p-type light guide layer 27, the p-type has a thickness of about 20 nm and is doped with Mg having a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and a carrier concentration of about 5 × 10 ¹⁷ cm ^−3. A p-type cap layer 28 having a wurtzite structure made of Al _0.16 Ga _0.84 N is formed. The p-type light guide layer 27 and the p-type cap layer 28 are examples of the “semiconductor layer” in the present invention.

On the p-type cap layer 28, there are a convex part and a flat part ²¹ e other than the convex part, and a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and a carrier concentration of about 5 × 10 ¹⁷ cm ^−3. A p-type cladding layer 29 of a wurtzite structure made of p-type Al _0.07 Ga _0.93 N doped with Mg is formed. The p-type cladding layer 29 is an example of the “semiconductor layer” in the present invention. The thicknesses of the flat portions 21e on the [0001] direction side and the [000-1] direction side of the p-type cladding layer 29 are about 10 nm, respectively. Further, the height from the flat portion 21e of the p-type cladding layer 29 to the upper surface of the convex portion is about 320 nm. Further, the convex portion of the p-type cladding layer 29 is formed in a stripe shape (elongated shape) in plan view, and the lower portion of the convex portion is formed to have a width of about 1.75 μm. . On the convex portion of the p-type cladding layer 29, Mg having a thickness of about 80 nm, a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and a carrier concentration of about 5 × 10 ¹⁷ cm ⁻³ was doped. A p-type contact layer 30 having a wurtzite structure made of p-type In _0.02 Ga _0.98 N is formed. The p-type contact layer 30 is an example of the “semiconductor layer” in the present invention. The p-type contact layer 30 and the convex portion of the p-type cladding layer 29 constitute a ridge portion 31. The ridge 31 is an example of the “active region” and “light emitting region” in the present invention.

  Here, the portion on the planar region B on the [0001] direction side of the n-type layer 22 and the n-type cladding layer 23 is a portion 22c that is laterally grown in the [0001] direction from the (0001) Ga surface (one side surface 21c). And 23c, and portions 22a and 23a grown in the vertical direction from the bottom surface of the recess 21a. Further, the portions on the plane region B on the [000-1] direction side of the n-type layer 22 and the n-type clad layer 23 are lateral to the [000-1] direction from the (000-1) N surface (the other side surface 21d). It consists of the parts 22d and 23d grown in the direction and the parts 22b and 23b grown in the vertical direction from the bottom surface of the other recess 21b. Here, the dislocation density of the portions 22c and 23c is smaller than the dislocation density of the portions 22d and 23d. This is because the dislocation density of the layer laterally grown in the [0001] direction from the (0001) plane is smaller than the dislocation density of the layer laterally grown in the [000-1] direction from the (000-1) plane. It is. Further, the portions 22e, 23e, 24e, 25e, 26e, 27e, 28e on the [0001] direction side close to the portions 22c and 23c of the p-type contact layer 30 from the n-type layer 22 on the planar region A (flat portion 21e), The dislocation densities of 29e and 30e (22e to 30e) are the dislocations of the parts 22f, 23f, 24f, 25f, 26f, 27f, 28f and 29f (22f to 29f) on the [000-1] direction side close to the parts 22d and 23d. Less than density. This is because the dislocations of the portions 22d and 23d may propagate slightly in the [000 ± 1] direction in the portions 22f to 29f.

  In the first embodiment, the ridge portion 31 is separated from the one side surface 21c of the n-type GaN substrate 21 by a distance D1 (about 50 μm) from the one side surface 21c and from the other side surface 21d of the n-type GaN substrate 21 to the center portion side. It is formed at a position separated by D2 (about 310 μm). That is, in the first embodiment, the ridge portion 31 is formed on a region on the [0001] direction side from the central portion of the planar region A (flat portion 21 e) of the n-type GaN substrate 21. The ridge 31 is formed in a stripe shape (elongated shape) extending in the [1-100] direction (see FIG. 3). Further, on the p-type contact layer 30 constituting the ridge portion 31, from the lower layer to the upper layer, there is a Pt layer having a thickness of about 5 nm, a Pd layer having a thickness of about 100 nm, and a thickness of about 150 nm. A p-side ohmic electrode 32 made of an Au layer is formed.

A current confinement layer 33 made of a SiO ₂ film (insulating film) having a thickness of about 250 nm is formed on a region other than the upper surface of the p-side ohmic electrode 32. A predetermined region on the current confinement layer 33 includes a Ti layer having a thickness of about 100 nm and a Pd layer having a thickness of about 100 nm from the lower layer to the upper layer so as to be in contact with the upper surface of the p-type ohmic electrode 32. A p-side pad electrode 34 made of an Au layer having a thickness of about 3 μm is formed.

  An n-side electrode 35 is formed on the back surface of the n-type GaN substrate 21. The n-side electrode 35 is composed of an Al layer having a thickness of about 10 nm, a Pt layer having a thickness of about 20 nm, and an Au layer having a thickness of about 300 nm in this order from the back side of the n-type GaN substrate 21.

  Further, the end portions of the ridge portion 31 in the [1-100] direction and the [-1100] direction (see FIG. 3) are not shown, which are formed by cleavage planes of the (1-100) plane and the (-1100) plane, respectively. A resonator surface is formed. A dielectric multilayer film (not shown) having a reflectivity of about 5% is formed on the resonator surface on the laser beam emission surface side, and the resonator surface on the side opposite to the laser beam emission surface is formed. A dielectric multilayer film (not shown) having a reflectivity of about 95% is formed on the top.

  The lattice constant of the a-axis of AlN is about 98% of the lattice constant of the a-axis of GaN, and the lattice constant of the c-axis of AlN is about 96% of the lattice constant of the GaN c-axis. For this reason, since the strain generated by the difference in lattice constant between AlGaN and GaN is larger in the c-axis direction ([0001] direction) than in the [1-100] direction, cracks are likely to occur in the c-axis direction. In the first embodiment, as described above, the n-type GaN substrate 21 is disposed so as to sandwich the planar region A and the planar region A, and the boundary region between the planar region A is substantially in the [1-100] direction. By providing the planar region B (one concave portion 21a and the other concave portion 21b) extending in the plane, the [0001] direction of the semiconductor layer is the same as the planar region B (one concave portion 21a and the other concave portion 21b) extending in the [1-100] direction. Since they are arranged in the orthogonal direction, a large strain in the c-axis direction ([0001] direction) of the semiconductor layer formed on the surface of the n-type GaN substrate 21 is caused by a planar region B extending in the [1-100] direction. It can be absorbed by the one recess 21a and the other recess 21b). Thereby, it is possible to suppress the occurrence of cracks in the semiconductor layer formed on the surface of the n-type GaN substrate 21.

  Moreover, in 1st Embodiment, it arrange | positions so that the plane area | region A and the plane area A may be pinched | interposed into the n-type GaN board | substrate 21 containing the surface which has a (11-20) plane substantially, The boundary with the plane area | region A (0001) Ga of the semiconductor layer formed on the surface of the n-type GaN substrate 21 by providing the planar region B (one recess 21a and the other recess 21b) extending substantially in the [1-100] direction. The plane is perpendicular to the (11-20) plane of the surface of the n-type GaN substrate 21 and parallel to the direction ([1-100] direction) in which the boundary region between the planar region A and the planar region B extends. Therefore, the dislocations generated in the portion formed on the planar region B of the semiconductor layer are the direction perpendicular to the surface of the n-type GaN substrate 21 ([11-20] direction) and the boundary between the planar region A and the planar region B. The direction in which the region extends ([1-1 0] together easily propagate along the a direction), hardly propagated to the [0001] direction and the [000] direction which is the direction toward the plane area A from the plane area B. This suppresses dislocations generated in the portion on the planar region B of the semiconductor layer from propagating in the [0001] direction or [000-1] direction to the ridge portion 31 of the planar region A of the semiconductor layer. Therefore, it is possible to suppress an increase in the dislocation density of the ridge 31 in the planar region A of the semiconductor layer. As a result, it is possible to suppress deterioration in element characteristics due to an increase in dislocations in the ridge portion 31.

  Further, in the first embodiment, the semiconductor layer is formed on the planar region B by providing the ridge portion 31 in the semiconductor layer on the [0001] direction side of the central region of the planar region A of the n-type GaN substrate 21. When the layer grows laterally, the dislocation density of the semiconductor layer on the planar region B on the [000-1] direction side becomes larger than the dislocation density of the semiconductor layer on the planar region B on the [0001] direction side. For this reason, even when the dislocations of the semiconductor layer on the planar region B on the [000-1] direction side are slightly propagated to the semiconductor layer on the planar region A, the ridge portion 31 is formed on the n-type GaN substrate 21. Since it is provided in the portion of the semiconductor layer on the region on the [0001] direction side of the central portion of the planar region A, it is possible to further suppress an increase in the dislocation density of the ridge portion 31 of the semiconductor layer. As a result, it is possible to further suppress deterioration in element characteristics due to an increase in dislocations in the ridge portion 31 of the semiconductor layer.

  5 to 8 are cross-sectional views for explaining a manufacturing process of the GaN-based semiconductor laser device according to the first embodiment shown in FIG. A manufacturing process for the GaN-based semiconductor laser device according to the first embodiment is now described with reference to FIGS.

First, as shown in FIGS. 3 and 5, an n-type GaN substrate 21 having a wurtzite structure that is off (tilted) by about 0.3 ° in the [000-1] direction is applied to the [1-100] direction (FIG. 3). Grooves 21f having a depth of about 0.5 μm and a width of about 40 μm are formed with a period of about 400 μm. Specifically, an SiO ₂ film (not shown) having a thickness of about 250 nm is formed on the n-type GaN substrate 21. Then, a predetermined region of the SiO ₂ film is removed, and the groove 21f is formed by etching the n-type GaN substrate 21 using the SiO ₂ film as a mask by using a dry etching technique using a Cl-based gas.

  Thereafter, as shown in FIG. 5, the n-type layer 22, the n-type cladding layer 23, and the n-type layer are formed on the n-type GaN substrate 21 at a temperature of about 1100 ° C. by using a metal organic vapor phase epitaxy (MOVPE) method. The carrier block layer 24 is grown.

Thereafter, the n-type light guide layer 25, the active layer 26, the p-type light guide layer 27, and the p-type cap layer 28 are grown on the n-type carrier block layer 24 at a temperature of about 800 ° C. by using the MOVPE method. Let Specifically, on the n-type carrier blocking layer 24, having a thickness of about 100 nm, Si is doped with a carrier concentration of about 5 × ¹⁰ 18 ^{cm -3} doping amount and about 5 × ¹⁰ 18 ^{cm -3} An n-type light guide layer 25 having a wurtzite structure made of the formed n-type GaN is grown. Next, an active layer 26 having a wurtzite structure is grown on the n-type light guide layer 25. At this time, as shown in FIG. 4, four barrier layers 26g made of undoped In _0.02 Ga _0.98 N having a thickness of about 20 nm are formed on the n-type light guide layer 25 (see FIG. 5). Then, three well layers 26h made of undoped In _0.15 Ga _0.85 N having a thickness of about 3 nm are alternately grown. Thereby, the active layer 26 having the MQW structure is formed. Next, as shown in FIG. 5, Mg having a thickness of about 100 nm and a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and a carrier concentration of about 5 × 10 ¹⁷ cm ⁻³ on the active layer 26. A p-type light guide layer 27 having a wurtzite structure made of p-type GaN doped with is grown. Thereafter, Mg having a thickness of about 20 nm and a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and a carrier concentration of about 5 × 10 ¹⁷ cm ⁻³ was doped on the p-type light guide layer 27. A p-type cap layer 28 having a wurtzite structure made of p-type Al _0.16 Ga _0.84 N is grown.

Subsequently, using the MOVPE method, the p-type cap layer 28 has a thickness of about 330 nm and a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and about 5 × 10 ¹⁷ cm at a temperature of about 1100 ° C. A p-type cladding layer 29 having a wurtzite structure made of p-type Al _0.07 Ga _0.93 N doped with Mg having a carrier concentration of ⁻³ is grown. Thereafter, using the MOVPE method, the p-type cladding layer 29 has a thickness of about 10 nm and a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and about 5 × 10 ¹⁷ cm at a temperature of about 800 ° C. A p-type contact layer 30 having a wurtzite structure made of p-type In _0.02 Ga _0.98 N doped with Mg having a carrier concentration of ⁻³ is grown.

  Here, the portions 22e to 30e and 22f to 30f of the p-type contact layer 30 from the n-type layer 22 on the planar region A are formed by vertical growth. Also, the n-type layer 22 on the planar region B (flat portions 21a and 21b) to the portions 22a, 23a, 24a, 25a, 26a, 27a, 28a, 29a, 30a (22a-30a) of the p-type contact layer 30, and , 22b, 23b, 24b, 25b, 26b, 27b, 28b, 29b, 30b (22b-30b) are formed by vertical growth. The portions 22c, 23c, 24c, 25c, 26c, 27c, 28c, 29c and 30c (22c to 30c) of the p-type contact layer 30 from the n-type layer 22 on the planar region B are (0001) Ga face (one side face 21c). ) To the [0001] direction. The portions 22d, 23d, 24d, 25d, 26d, 27d, 28d, 29d and 30d (22d to 30d) of the p-type contact layer 30 from the n-type layer 22 on the planar region B are (000-1) N planes (the other It is formed by laterally growing in the [000-1] direction from the side surface 21d). At this time, the dislocation density of the portions 22c to 30c is smaller than the dislocation density of the portions 22d to 30d. Further, in a nitride-based semiconductor having a wurtzite structure, dislocations tend to propagate in the (0001) plane from the [000 ± 1] direction during crystal growth. Therefore, since the extending direction of the groove 21f and the normal direction of the growth surface are in the (0001) plane, the dislocations in the portions 22d to 30d are easily propagated to the upper portion. However, since the dislocations in the portions 22d to 30d slightly propagate in the [000 ± 1] direction in the portions 22e to 30e and 22f to 30f, the dislocation density in each layer of the portions 22e to 30e and 22f to 30f is It changes so that it may become small gradually as it moves from the side close | similar to the parts 22d-30d to the side close | similar to the parts 22c-30c. That is, the dislocation density of the portions 22f to 30f close to the portions 22d to 30d is larger than that of the portions 22e to 30e.

  Thereafter, annealing is performed under a temperature condition of about 850 ° C. in a nitrogen gas atmosphere.

Next, the p-side ohmic electrode 32 (see FIG. 6) is formed on the p-type contact layer 30 by using an electron beam evaporation method. When the p-side ohmic electrode 32 is formed, a Pt layer having a thickness of about 5 nm, a Pd layer having a thickness of about 100 nm, and an Au layer having a thickness of about 150 nm are formed from the lower layer to the upper layer. Laminate sequentially. Thereafter, a SiO ₂ film 36 (see FIG. 6) having a thickness of about 250 nm is formed on the p-side ohmic electrode 32 by plasma CVD. Then, as shown in FIG. 6, by patterning the p-side ohmic electrode 32 and the SiO ₂ film 36, the p-side ohmic electrode 32 and the SiO ₂ film 36, extending in the [1-100] direction (see FIG. 3) It is formed in a stripe shape (elongated shape).

Next, as shown in FIG. 7, using a dry etching technique using Cl ₂ gas, the SiO ₂ film 36 is used as a mask, and the depth (p Etching is performed from the upper surface of the mold cladding layer 29 to a depth of about 320 nm. During this etching step, the substrate temperature is maintained at about 200 ° C. As a result, an elongated ridge portion 31 having a width of about 1.75 μm is formed in the lower portion, which is constituted by the p-type contact layer 30 and the projections of the p-type cladding layer 29. At this time, the ridge portion 31 separates a distance D1 (about 50 μm) from the one side surface 21c of the n-type GaN substrate 21 to the center side, and a distance D2 (about about 2 μm from the other side surface 21d of the n-type GaN substrate 21 to the center side. 310 μm).

Next, using photolithography and etching techniques, a resist 37 is formed on the predetermined region of the flat portion 21e of the p-type cladding layer 29 so as to cover the SiO ₂ film 36, the p-side ohmic electrode 32, and the ridge portion 31. To do. Thereafter, etching is performed from the upper surface of the flat portion 21e of the p-type cladding layer 29 to the n-type carrier block layer 24 using the resist 37 as a mask. Thereby, predetermined regions of the p-type cladding layer 29, the p-type cap layer 28, the p-type light guide layer 27, the active layer 26, the n-type light guide layer 25, and the n-type carrier block layer 24 are removed. Thereafter, the SiO ₂ film 36 is removed.

Next, as shown in FIG. 8, a current confinement layer 33 made of a SiO ₂ film having a thickness of about 250 nm is formed by plasma CVD so as to cover the entire surface including the side surface of the ridge portion 31. Thereafter, the current confinement layer 33 located on the upper surface of the p-side ohmic electrode 32 is etched.

  Next, a p-side pad electrode 34 (see FIG. 2) is formed in a predetermined region on the current confinement layer 33 so as to be in contact with the upper surface of the p-side ohmic electrode 32 by using a vacuum deposition method. When the p-side pad electrode 34 is formed, a Ti layer having a thickness of about 100 nm, a Pd layer having a thickness of about 100 nm, and an Au layer having a thickness of about 3 μm are formed from the lower layer to the upper layer. Laminate sequentially. Thereafter, the back side of the n-type GaN substrate 21 is polished until the thickness of the n-type GaN substrate 21 reaches about 100 μm. Then, the n-side electrode 35 is formed on the back surface of the n-type GaN substrate 21 using a vacuum deposition method. When forming the n-side electrode 35, in order from the back surface side of the n-type GaN substrate 21, an Al layer having a thickness of about 10 nm, a Pt layer having a thickness of about 20 nm, and an Au having a thickness of about 300 nm. The layers are sequentially stacked.

  Next, a dielectric multilayer film (not shown) having a reflectivity of about 5% is formed on the resonator surface on the laser beam emitting surface side of the GaN-based semiconductor laser element, and the resonator on the reflecting surface side is formed. A dielectric multilayer film (not shown) having a reflectivity of about 95% is formed on the surface.

  Thereafter, the GaN-based semiconductor laser device according to the first embodiment shown in FIG. 2 is formed by separating at the center of the groove 21f having a width of about 40 μm.

  Next, an experiment conducted for confirming the effect of the first embodiment will be described. In this confirmation experiment, the dislocation density of the semiconductor laser device according to Example 1 actually manufactured using the manufacturing process of the first embodiment was measured with a plane transmission electron microscope (TEM) image. A sample for observing a planar TEM image was produced using a focused ion beam. Further, as comparative examples, semiconductor laser elements according to comparative examples 1 and 2 were manufactured. In Comparative Example 1, unlike the first embodiment, the other concave portion (planar region B) and the ridge portion of the n-type GaN substrate are both formed to extend in the [0001] direction. In this case, one side surface of the one concave portion has a substantially (1-100) plane, and the other side surface of the other concave portion has a substantially (-1100) plane. The semiconductor laser device according to Comparative Example 2 is the same as the semiconductor laser device of the first embodiment except that the ridge portion is formed at a position substantially directly above the center portion of the flat portion of the n-type GaN substrate 21. It produced similarly.

It has been found that the semiconductor laser element according to Example 1 has improved crystallinity of the ridge portion 31 as compared with the semiconductor laser elements according to Comparative Examples 1 and 2. Specifically, in the semiconductor laser device according to Example 1, dislocations were hardly observed in the portions 22c and 23c. Further, through defects of the order of 10 ⁹ cm ⁻² and stacking faults of the order of 10 ⁵ cm ⁻¹ were observed in the portions 22d and 23d. Further, in the ridge portion 31, almost no dislocation was observed, and the dislocation density was about 1 × 10 ⁶ cm ⁻² or less. On the other hand, in the semiconductor laser device according to Comparative Example 1, the dislocation density in the ridge portion is about 5 × 10 ⁷ cm ⁻² , and in the semiconductor laser device according to Comparative Example 2, the dislocation density in the ridge portion is about 1 × 10 7. ⁷ cm ⁻² . This is considered to be due to the following reasons. That is, the dislocation density in the ridge portion of the semiconductor laser device according to Comparative Example 1 increased because in Comparative Example 1, the other concave portion 21b (planar region B) of the n-type GaN substrate and the ridge portion in the [0001] direction. Since it is formed so as to extend, it is considered that the dislocations of the respective layers on the planar region B are easily propagated to the respective layer portions formed on the planar region A in the (0001) plane. . Further, the dislocation density of the ridge portion of the semiconductor laser device according to Comparative Example 2 increased because the portion on the [000-1] direction side of the semiconductor layer formed on the n-type cladding layer 23 was on the [0001] direction side. Since the dislocation density is larger than that of the first portion, in Comparative Example 2 in which the ridge portion is formed at a position substantially immediately above the center portion of the flat portion of the n-type GaN substrate, the ridge portion is formed on the [0001] side. Compared to Example 1, it is considered that this is because the ridge portion is closer to the side where the dislocation density of the semiconductor layer is larger.

(Second Embodiment)
FIG. 9 is a sectional view showing the structure of a GaN-based semiconductor laser device according to the second embodiment of the present invention. FIG. 10 is a cross-sectional view taken along line 100-100 in FIG. FIG. 11 is a plan view showing the structure of the n-type GaN substrate of the GaN-based semiconductor laser device shown in FIG. With reference to FIGS. 9 to 11, in the second embodiment, a case will be described in which an n-type GaN substrate including a surface having a substantially (1-100) plane is used, unlike the first embodiment. The oscillation wavelength of the GaN semiconductor laser device according to the second embodiment is about 520 nm.

  In the GaN-based semiconductor laser device according to the second embodiment, as shown in FIG. 9, the n-type GaN substrate 41 having a wurtzite structure is substantially 0.5 ° off (tilted) in the [000-1] direction. In particular, it includes a surface having a (1-100) plane. The n-type GaN substrate 41 is an example of the “semiconductor substrate” in the present invention.

  Here, in the second embodiment, as shown in FIG. 11, the n-type GaN substrate 41 includes a planar region C in which a semiconductor layer formed on the n-type GaN substrate 41 can grow in the vertical direction, and substantially In particular, the planar region D is arranged so as to sandwich the planar region C along the boundary region extending in the [11-20] direction, and the semiconductor layer formed on the n-type GaN substrate 41 can grow in the lateral direction. have. The plane area C is an example of the “first area” in the present invention, and the plane area D is an example of the “second area” in the present invention. The planar region D is composed of one concave portion 41a disposed on the [0001] direction side and the other concave portion 41b disposed on the [000-1] direction side. Further, as shown in FIG. 9, the one concave portion 41a and the other concave portion 41b are both formed in a step shape having a depth of about 0.5 μm and a width of about 20 μm. The one concave portion 41a includes one side surface 41c having a substantially (0001) Ga surface, and the other concave portion 41b includes the other side surface 41d having a substantially (000-1) N surface. . Further, on the surface of the planar region C of the n-type GaN substrate 41, a flat portion 41e having a width of about 360 μm substantially in the [0001] direction ([000-1] direction) is formed. The one concave portion 41a is an example of the “first concave portion” in the present invention, and the other concave portion 41b is an example of the “second concave portion” in the present invention. The one side surface 41c is an example of the “first side surface” in the present invention, and the other side surface 41d is an example of the “second side surface” in the present invention.

  On the n-type GaN substrate 41, an n-type layer having the same structure as the n-type layer 22, the n-type cladding layer 23, the n-type carrier block layer 24, and the n-type light guide layer 25 of the first embodiment. 42, an n-type cladding layer 43, an n-type carrier block layer 44, and an n-type light guide layer 45 are formed. The portions of the n-type layer 42 and the n-type cladding layer 43 on the plane region D (see FIG. 11) are formed in a step shape extending in the [11-20] direction. The n-type layer 42, the n-type cladding layer 43, the n-type carrier block layer 44, and the n-type light guide layer 45 are examples of the “semiconductor layer” in the present invention.

An active layer 46 having a wurtzite structure is formed on the n-type light guide layer 45. The active layer 46 is an example of the “semiconductor layer” in the present invention. The active layer 46 includes four barrier layers (not shown) made of undoped In _0.17 Ga _0.83 N having a thickness of about 20 nm, and undoped In _0.3 Ga _0. It has an MQW structure in which three well layers (not shown) made of ₇ N are alternately stacked.

  On the active layer 46, the same structure as that of the p-type light guide layer 27, the p-type cap layer 28, the p-type cladding layer 29, the p-type contact layer 30 and the p-side ohmic electrode 32 of the first embodiment is used. A p-type light guide layer 47, a p-type cap layer 48, a p-type cladding layer 49, a p-type contact layer 50, and a p-side ohmic electrode 52 are formed. The p-type light guide layer 47, the p-type cap layer 48, the p-type cladding layer 49, and the p-type contact layer 50 are examples of the “semiconductor layer” in the present invention. The p-type contact layer 50 and the convex portion of the p-type cladding layer 49 constitute a ridge portion 51. The ridge portion 51 is an example of the “active region” and “light emitting region” in the present invention.

  Here, from the n-type layer 42 on the planar region C (flat portion 41e) to the portions 42e, 43e, 44e, 45e, 46e, 47e, 48e, 49e, 50e (42e-50e) of the p-type contact layer 50, and 42f, 43f, 44f, 45f, 46f, 47f, 48f, and 49f (42f to 49f) are formed by vertical growth. Further, the portion on the plane region D on the [0001] direction side of the n-type layer 42 and the n-type cladding layer 43 is a portion 42c that is laterally grown in the [0001] direction from the (0001) Ga surface (one side surface 41c). 43c and portions 42a and 43a which are grown in the vertical direction from the bottom surface of the concave portion 41a. Further, the portion on the plane region D on the [000-1] direction side of the n-type layer 42 and the n-type cladding layer 43 is laterally extended in the [000-1] direction from the (000-1) N plane (the other side surface 41d). It consists of the parts 42d and 43d grown in the direction and the parts 42b and 43b grown in the vertical direction from the bottom surface of the other recess 41b. Here, the dislocation density of the parts 42c and 43c is smaller than the dislocation density of the parts 42d and 43d. This is because the dislocation density of the layer laterally grown in the [0001] direction from the (0001) plane is smaller than the dislocation density of the layer laterally grown in the [000-1] direction from the (000-1) plane. It is. Further, the dislocation density of the [0001] direction side portions 42e to 50e close to the portions 42c and 43c of the p type contact layer 50 from the n type layer 42 on the planar region C is the [000-1] direction side portion 42f to It is smaller than the dislocation density of 49f. This is because the dislocations of the portions 42d and 43d may slightly propagate in the [000 ± 1] direction in the portions 42f to 50f.

  In the second embodiment, the ridge portion 51 is separated from the one side surface 41c of the n-type GaN substrate 41 by a distance D3 (about 30 μm) from the one side surface 41c to the center portion side. It is formed at a position spaced apart by D4 (about 330 μm). That is, also in the second embodiment, as in the first embodiment, the ridge portion 51 is formed on a region on the [0001] direction side from the central portion of the planar region C (flat portion 41e) of the n-type GaN substrate 41. Has been. Unlike the first embodiment, the ridge portion 51 is formed in a stripe shape (elongated shape) extending in the [11-20] direction (see FIG. 10).

  A current confinement layer 53 having the same structure as the current confinement layer 33 of the first embodiment is formed on a region other than the upper surface of the p-side ohmic electrode 52. A p-side pad electrode 54 having the same structure as the p-side pad electrode 34 of the first embodiment is formed in a predetermined region on the current confinement layer 53 so as to be in contact with the p-side ohmic electrode 52. Yes.

  Further, an n-side electrode 55 having the same structure as the n-side electrode 35 of the first embodiment is formed on the back surface of the n-type GaN substrate 41.

In the second embodiment, as shown in FIG. 10, the length of the semiconductor layer in the [11-20] direction ([−1-120] direction) is the [11-20] direction of the n-type semiconductor substrate 41. It is formed so as to be smaller than the length of ([-1-120] direction). Resonator surfaces composed of the (11-20) plane and the (-1-120) plane are formed at the ends of the [11-20] direction and the [-1-120] direction of the semiconductor layer, respectively. Yes. A dielectric multilayer film 56a having a reflectivity of about 5% made of Al ₂ O _{3 of} about 70 nm and AlN of about 10 nm from the active layer 46 side is formed on the resonator surface on the laser beam emission surface side. On the cavity surface opposite to the laser light emission surface, AlN of about 10 nm from the active layer 46 side, and Al ₂ O ₃ and TiO ₂ each having a thickness of λ / 4 are formed on the cavity surface. A dielectric multilayer film 56b having a reflectivity of about 95% and formed of a multilayer film of five periods is formed.

  The remaining structure of the second embodiment is the same as that of the first embodiment.

  The effect of the second embodiment is the same as that of the first embodiment.

  A manufacturing process for the GaN-based semiconductor laser device according to the second embodiment is now described with reference to FIGS.

  First, as shown in FIGS. 9 and 11, the manufacturing process of the first embodiment is applied to an n-type GaN substrate 41 having a wurtzite structure that is off (tilted) by about 0.5 ° in the [000-1] direction. Using a similar manufacturing process, grooves having a depth of about 0.5 μm extending in the [11-20] direction and a width of about 40 μm are formed with a period of about 400 μm.

  Thereafter, as shown in FIG. 9, the n-type layer 42, the n-type cladding layer 43, and the n-type carrier block layer are formed on the n-type GaN substrate 41 using the same manufacturing process as that of the first embodiment. 44 and an n-type light guide layer 45 are formed.

Next, an active layer 46 having a wurtzite structure is grown on the n-type light guide layer 45. At this time, on the n-type light guide layer 45 (see FIG. 13), four barrier layers (not shown) made of undoped In _0.17 Ga _0.83 N having a thickness of about 20 nm, and about 3 nm Three well layers (not shown) made of undoped In _0.3 Ga _0.7 N having a thickness are alternately grown. Thereby, the active layer 46 having the MQW structure is formed.

  Thereafter, the active layer 46, the p-type light guide layer 47, the p-type cap layer 48, the p-type cladding layer 49, and the p-type are formed on the active layer 46 by using the same manufacturing process as that of the first embodiment. A contact layer 50, a p-side ohmic electrode 52, a current confinement layer 53, and a p-side pad electrode 54 are formed. At this time, the elongate ridge portion 51 having a width of about 1.75 μm in the lower part separates the distance D3 (about 30 μm) from the one side surface 41c of the n-type GaN substrate 41 toward the central portion, and the n-type GaN substrate 41. It is formed at a position spaced a distance D4 (about 330 μm) from the other side surface 41d to the center side.

  Then, the n-side electrode 55 is formed on the back surface of the n-type GaN substrate 41 using a manufacturing process similar to the manufacturing process of the first embodiment.

Next, as shown in FIG. 10, by using the reactive ion beam etching technique, the end portions in the [11-20] direction and the [-1-120] direction are respectively etched, thereby (11-20) plane. And a resonator plane composed of (-1-120) planes. After that, the resonator surface is irradiated with N ₂ electron cyclotron resonance plasma to clean the resonator surface. Then, a dielectric multilayer film 56a having a reflectivity of about 5% is formed on the resonator surface on the laser beam emission surface side of the GaN-based semiconductor laser element, and on the resonator surface on the reflection surface side, about A dielectric multilayer film 56b having a reflectivity of 95% is formed.

  Thereafter, the GaN-based semiconductor laser device according to the second embodiment shown in FIG. 9 is formed by separating at the center of the groove having a width of about 40 μm.

  The other manufacturing processes of the second embodiment are the same as the manufacturing processes of the first embodiment.

  Next, an experiment conducted for confirming the effect of the second embodiment will be described. In this confirmation experiment, the dislocation density of the semiconductor laser device according to Example 2 actually manufactured using the manufacturing process of the second embodiment was measured by a planar TEM image.

The semiconductor laser device according to Example 2 was found to improve the crystallinity of the ridge portion 51, like the semiconductor laser device according to Example 1 of the first embodiment. Specifically, in the semiconductor laser device according to Example 2, almost no dislocations were observed in the portions 42c and 43c. In addition, in the portions 42d and 43d, penetration defects having an order of 10 ⁹ cm ⁻² and stacking faults having an order of 10 ⁵ cm ⁻¹ were observed. In the ridge portion 51, almost no dislocation was observed.

(Third embodiment)
FIG. 12 is a sectional view showing the structure of a GaN-based semiconductor laser device according to the third embodiment of the present invention. FIG. 13 is a plan view showing the structure of the n-type SiC substrate of the GaN-based semiconductor laser device shown in FIG. With reference to FIGS. 12 and 13, in the third embodiment, a case where an n-type 4H—SiC substrate (n-type SiC substrate 61) is used will be described, unlike the first embodiment. The oscillation wavelength of the GaN-based semiconductor laser device according to the third embodiment is about 340 nm.

  In the GaN semiconductor laser device according to the third embodiment, as shown in FIG. 12, the n-type SiC substrate 61 is substantially (11) off (inclined) by about 0.5 ° in the [000-1] direction. -20) including a surface having a face. The n-type SiC substrate 61 is an example of the “semiconductor substrate” in the present invention.

  Here, in the third embodiment, as shown in FIG. 13, the n-type SiC substrate 61 includes a planar region E in which a semiconductor layer formed on the n-type SiC substrate 61 can grow in the vertical direction, and substantially In particular, the planar region F is arranged so as to sandwich the planar region E along the boundary region extending in the [1-100] direction, and the semiconductor layer formed on the n-type SiC substrate 61 can grow laterally. have. The plane area E is an example of the “first area” in the present invention, and the plane area F is an example of the “second area” in the present invention. The planar region F is composed of one concave portion 61a disposed on the [0001] direction side and the other concave portion 61b disposed on the [000-1] direction side. Further, as shown in FIG. 12, the one concave portion 61a and the other concave portion 61b are both formed in a step shape having a depth of about 0.5 μm and a width of about 20 μm. Moreover, while the one recessed part 61a contains the one side surface 61c which has a (0001) Si surface substantially, the other recessed part 61b contains the other side surface 61d which has a (000-1) C surface substantially. . Further, a flat portion 61e having a width of about 360 μm in the [0001] direction ([000-1] direction) is formed on the surface of the planar region E of the n-type SiC substrate 61. The one concave portion 61a is an example of the “first concave portion” in the present invention, and the other concave portion 61b is an example of the “second concave portion” in the present invention. The one side surface 61c is an example of the “first side surface” in the present invention, and the other side surface 61d is an example of the “second side surface” in the present invention.

In the third embodiment, on the n-type SiC substrate 61 has a thickness of about 400 nm, having a carrier concentration of about 5 × ¹⁰ 18 ^{cm -3} doping amount and about 5 × ¹⁰ 18 ^{cm -3} An n-type cladding layer 63 having a wurtzite structure made of n-type Al _0.12 Ga _0.88 N doped with Si is formed. A portion of the n-type cladding layer 63 on the planar region F (see FIG. 13) is formed in a step shape extending in the [1-100] direction. The n-type cladding layer 63 is an example of the “semiconductor layer” in the present invention. The n-type cladding layer 63 has the [0001] direction and the [11-20] direction of the n-type cladding layer 63 parallel to the [0001] direction and the [11-20] direction of the n-type SiC substrate 61, respectively. It is formed to become. The semiconductor layer (active layer 66 and p-type cladding layer 69, which will be described later) formed on the n-type cladding layer 63 is also similar to the [0001] direction and [11-20] direction of the semiconductor layer. The n-type SiC substrate 61 is formed so that the [0001] direction and the [11-20] direction are parallel to each other.

In the third embodiment, an active layer 66 having a wurtzite structure is formed on the n-type cladding layer 63. The active layer 66 is an example of the “semiconductor layer” in the present invention. The active layer 66 includes four barrier layers (not shown) made of undoped In _0.05 Ga _0.95 N having a thickness of about 20 nm and three layers of wells made of undoped GaN having a thickness of about 3 nm. It has an MQW structure in which layers (not shown) are alternately stacked.

In addition, the active layer 66 has a convex portion and a flat portion 61e other than the convex portion, and has a doping amount of about 4 × 10 ¹⁹ cm ⁻³ and a carrier concentration of about 5 × 10 ¹⁷ cm ^−3. A p-type cladding layer 69 having a wurtzite structure made of p-type Al _0.12 Ga _0.88 N doped with Mg is formed. The p-type cladding layer 69 is an example of the “semiconductor layer” in the present invention. The thicknesses of the flat portions 61e on the [0001] direction side and the [000-1] direction side of the p-type cladding layer 69 are about 80 nm, respectively. Further, the height from the flat portion 61e of the p-type cladding layer 69 to the upper surface of the convex portion is about 320 nm. The convex portion of the p-type cladding layer 69 is formed in a stripe shape (elongated shape) in plan view, and the lower portion of the convex portion is formed to have a width of about 1.75 μm. .

  Here, the portions 63e, 66e, 69e, 63f, 66f and 69f of the n-type cladding layer 63 to the p-type cladding layer 69 on the planar region E (flat portion 61e) are formed by vertical growth. Further, the portion of the n-type cladding layer 63 on the plane region F on the [0001] direction side is a portion 63c laterally grown in the [0001] direction from the (0001) Si surface (one side surface 61c), and one recess 61a. It consists of a portion 63a that grows in the vertical direction from the bottom surface. Further, the portion of the n-type cladding layer 63 on the plane region F on the [000-1] direction side is a portion 63d that is laterally grown in the [000-1] direction from the (000-1) C plane (the other side surface 61d). And a portion 63b that grows in the vertical direction from the bottom surface of the other recess 61b. Here, the dislocation density of the portion 63c is smaller than the dislocation density of the portion 63d. This is because the dislocation density of the layer laterally grown in the [0001] direction from the (0001) plane is smaller than the dislocation density of the layer laterally grown in the [000-1] direction from the (000-1) plane. It is. Further, the dislocation density of the [0001] direction side parts 63e, 66e and 69e close to the part 63c of the p type cladding layer 69 from the n type cladding layer 63 is equal to the dislocation density of the [000-1] direction side parts 63f, 66f and 69f. Smaller than dislocation density. This is because the dislocations of the portion 63d may propagate slightly in the [000 ± 1] direction in the portions 63f, 66f, and 69f.

  Further, in the third embodiment, the ridge portion 71 is constituted by the convex portion of the p-type cladding layer 69. The ridge portion 71 is an example of the “active region” and “light emitting region” in the present invention.

  In the third embodiment, the ridge portion 71 separates a distance D5 (about 70 μm) from the one side surface 61c of the n-type SiC substrate 61 toward the center portion side, and is spaced from the other side surface 61d of the n-type SiC substrate 61 toward the center portion side. It is formed at a position spaced apart from D6 (about 290 μm). That is, in the third embodiment, the ridge portion 71 is formed on a region on the [0001] direction side from the central portion of the planar region E (flat portion 61e) of the n-type SiC substrate 61. The ridge portion 71 is formed in a stripe shape (elongated shape) extending in the [1-100] direction.

  In the third embodiment, the p-type cladding layer 69 also has a function as a p-type contact layer. A p-side ohmic electrode 72 having the same structure as the p-side ohmic electrode 32 of the first embodiment is formed on the convex portion of the p-type cladding layer 69.

  A current confinement layer 73 having the same structure as the current confinement layer 33 of the first embodiment is formed on a region other than the upper surface of the p-side ohmic electrode 72. A p-side pad electrode 74 having the same structure as the p-side pad electrode 34 of the first embodiment is formed in a predetermined region on the current confinement layer 73 so as to be in contact with the p-side ohmic electrode 72. Yes.

  An n-side electrode 75 having the same structure as the n-side electrode 35 of the first embodiment is formed on the back surface of the n-type SiC substrate 61.

  The remaining structure of the third embodiment is similar to that of the aforementioned first embodiment.

  The effects of the third embodiment are the same as those of the first embodiment.

  A manufacturing process for the GaN-based semiconductor laser device according to the third embodiment is now described with reference to FIGS.

  First, as shown in FIG. 12, using a manufacturing process similar to the manufacturing process of the first embodiment, an n-type wurtzite structure that is turned off (tilted) by about 0.5 ° in the [000-1] direction. On the SiC substrate 61, grooves having a depth of about 0.5 μm extending in the [1-100] direction (see FIG. 13) and a width of about 40 μm are formed with a period of about 400 μm.

  Thereafter, the n-type cladding layer 63, the active layer 66, and the p-type cladding layer 69 are formed on the n-type SiC substrate 61 using a manufacturing process similar to the manufacturing process of the first embodiment.

  Thereafter, annealing is performed under a temperature condition of about 900 ° C. in a nitrogen gas atmosphere.

  Next, the p-side ohmic electrode 72, the current confinement layer 73, and the p-side pad electrode 74 are formed on the p-type cladding layer 69 using a manufacturing process similar to the manufacturing process of the first embodiment. At this time, in the third embodiment, the ridge portion 71 formed of the convex portion of the p-type cladding layer 69 separates the distance D5 (about 70 μm) from the one side surface 61c of the n-type SiC substrate 61 to the center side, and is n-type. The SiC substrate 61 is formed at a position spaced a distance D6 (about 290 μm) from the other side surface 61d to the center side.

  Thereafter, the n-side electrode 75 is formed on the back surface of the n-type SiC substrate 61 using a manufacturing process similar to the manufacturing process of the first embodiment.

  Next, the GaN-based semiconductor laser device according to the third embodiment shown in FIG. 12 is formed by separating at the center of the groove having a width of about 40 μm.

  The other manufacturing processes of the third embodiment are the same as the manufacturing processes of the first embodiment.

  Next, an experiment conducted for confirming the effect of the third embodiment will be described. In this confirmation experiment, the dislocation density of the semiconductor laser device according to Example 3 actually manufactured using the manufacturing process of the third embodiment was measured by a planar TEM image.

The semiconductor laser device according to Example 3 was found to improve the crystallinity of the ridge portion 71 as in the semiconductor laser device according to Example 1 of the first embodiment. Specifically, in the semiconductor laser device according to Example 3, almost no dislocation was observed in the portion 63c. Further, in the portion 63d, a penetration defect having an order of 10 ⁹ cm ⁻² and a stacking fault having an order of 10 ⁵ cm ⁻¹ were observed. In the ridge portion 71, almost no dislocation was observed.

(Fourth embodiment)
FIG. 14 is a sectional view showing the structure of a GaN-based semiconductor laser device according to the fourth embodiment of the present invention. FIG. 15 is a plan view showing the structure of the n-type GaN substrate of the GaN-based semiconductor laser device shown in FIG. Referring to FIGS. 14 and 15, in the fourth embodiment, in the structure of the first embodiment, instead of providing one recess and the other recess in the n-type GaN substrate, a mask portion is provided on the n-type GaN substrate. The case where it is provided will be described. The oscillation wavelength of the GaN-based semiconductor laser device according to the fourth embodiment is about 410 nm.

  In the GaN-based semiconductor laser device according to the fourth embodiment, as shown in FIG. 14, the n-type GaN substrate 81 having a wurtzite structure is substantially off (tilted) by about 0.3 ° in the [0001] direction. It includes a surface having a (11-20) plane. The n-type GaN substrate 81 is an example of the “semiconductor substrate” in the present invention.

Here, in the fourth embodiment, as shown in FIG. 15, the n-type GaN substrate 81 includes a planar region G in which a semiconductor layer formed on the n-type GaN substrate 81 can grow in the vertical direction, and substantially In particular, the planar region H is disposed so as to sandwich the planar region G along the boundary region extending in the [1-100] direction, and the semiconductor layer formed on the n-type GaN substrate 81 can grow laterally. have. The plane area G is an example of the “first area” in the present invention, and the plane area H is an example of the “second area” in the present invention. On this plane area H (see FIG. 15), as shown in FIG. 14, one mask portion 96a disposed on the [0001] direction side and the other mask portion 96b disposed on the [000-1] direction side. And are formed. The one mask portion 96a and the other mask portion 96b are each made of a SiO ₂ film having a thickness of about 0.5 μm and a width of about 5 μm. The other mask portion 96b is disposed at a distance of about 190 μm from the one mask portion 96a. In the plane region G, the surface 81a of the n-type GaN substrate 81 is exposed.

On the n-type GaN substrate 81, an n-type layer 82 having a wurtzite structure made of n-type GaN doped with Si having a thickness of about 3 μm and a doping amount of about 5 × 10 ¹⁸ cm ^−3. Is formed. The n-type layer 82 is an example of the “semiconductor layer” in the present invention.

  Here, the portions 82c and 82d formed on the planar region G of the n-type layer 82 (the surface 81a of the n-type GaN substrate 81) are formed by vertical growth. A portion 82a on the planar area H (one mask portion 96a) on the [0001] direction side of the n-type layer 82 is formed by laterally growing in the [0001] direction. The portion 82b on the planar region H (the other mask portion 96b) on the [000-1] direction side is formed by lateral growth in the [000-1] direction. Here, the dislocation density of the portion 82a is smaller than the dislocation density of the portion 82b. This is because the dislocation density of the layer laterally grown in the [0001] direction is smaller than the dislocation density of the layer laterally grown in the [000-1] direction.

  Further, on the n-type layer 82, the n-type cladding layer 23, the n-type carrier block layer 24, the n-type light guide layer 25, the active layer 26, the p-type light guide layer 27, and the p-type cap of the first embodiment. Layer 28, p-type cladding layer 29, p-type contact layer 30, p-side ohmic electrode 32, current confinement layer 33, p-side pad electrode 34, n-type cladding layer 83 having the same composition and laminated structure, n-type carrier block Layer 84, n-type light guide layer 85, active layer 86, p-type light guide layer 87, p-type cap layer 88, p-type cladding layer 89, p-type contact layer 90, p-side ohmic electrode 92, current confinement layer 93 and A p-side pad electrode 94 is formed. A ridge portion 91 is constituted by the p-type contact layer 90 and the projections of the p-type cladding layer 89. The n-type cladding layer 83, the n-type carrier block layer 84, the n-type light guide layer 85, the active layer 86, the p-type light guide layer 87, the p-type cap layer 88, the p-type cladding layer 89, and the p-type contact layer 90. Is an example of the “semiconductor layer” in the present invention, and the ridge portion 91 is an example of the “active region” and the “light emitting region” in the present invention.

  Here, during crystal growth of a nitride-based semiconductor having a wurtzite structure, dislocations tend to propagate in the (0001) plane from the [000 ± 1] direction. Accordingly, since the extending direction of the mask portion 96 and the normal direction of the growth surface are in the (0001) plane, the dislocation of the portion 82b is easily propagated to the upper portion thereof, so that the n-type on the upper portion of the portion 82a. The dislocation density of the portion 83a of the cladding layer 83 is smaller than the dislocation density of the portion 83b of the n-type cladding layer 83 above the portion 82b. Further, the dislocation density of the portions 83c, 84c, 85c, 86c, 87c, 88c, 89c and 90c (83c to 90c) on the [0001] direction side of the p-type contact layer 90 from the n-type cladding layer 83 close to the portions 82a and 83a. Is smaller than the dislocation density of the portions 83d, 84d, 85d, 86d, 87d, 88d and 89d (83d to 89d) on the [000-1] direction side. This is because the dislocations of the portions 82b and 83 may slightly propagate in the [000 ± 1] direction in the portions 83d to 89d.

  An n-side electrode 95 having the same composition and structure as the n-side electrode 35 of the first embodiment is formed on the back surface of the n-type GaN substrate 81.

  The remaining structure of the fourth embodiment is similar to that of the aforementioned first embodiment.

  The effect of the fourth embodiment is the same as that of the first embodiment.

  16 to 18 are cross-sectional views for explaining a manufacturing process of the GaN-based semiconductor laser device according to the fourth embodiment shown in FIG. A manufacturing process for the GaN-based semiconductor laser device according to the fourth embodiment is now described with reference to FIGS.

  First, as shown in FIG. 18, a thickness of about 0.5 μm extending in the [1-100] direction is formed on the n-type GaN substrate 81 having a wurtzite structure which is off (tilted) by about 0.3 ° in the [0001] direction. And a mask portion 96 having a width of about 10 μm is formed with a period of about 200 μm.

  Thereafter, an n-type layer 82 is grown on the n-type GaN substrate 81 at a temperature of about 1100 ° C. using the MOVPE method. At this time, in the fourth embodiment, first, a portion 82c of the n-type layer 82 is formed on the surface 81a (portion on the planar region G (see FIG. 15)) where the mask portion 96 is not formed on the n-type GaN substrate 81. And 82d grow vertically. Thereafter, as shown in FIGS. 16 and 17, the portion 82 a of the n-type layer 82 grows laterally in the [0001] direction on the mask portion 96, and the portion 82 b of the n-type layer 82 on the mask portion 96. Grow laterally in the [000-1] direction. Here, the portion 82a of the n-type layer 82 has a lower dislocation density than the portion 82b.

  Thereafter, as shown in FIG. 18, the n-type cladding layer 83, the n-type carrier block layer 84, and the n-type light guide are formed on the n-type layer 82 using the same manufacturing process as that of the first embodiment. The layer 85, the active layer 86, the p-type light guide layer 87, the p-type cap layer 88, the p-type cladding layer 89, the p-type contact layer 90, the p-side ohmic electrode 92, the current confinement layer 93, and the p-side pad electrode 94 are formed. To do.

  Here, the dislocation of the part 82b is likely to propagate to the upper parts 83b, 84b, 85b, 86b, 87b, 88b, 89b and 90b (83b to 90b). However, since a small amount of dislocation may propagate in the [000 ± 1] direction from the portions 82b to 90b to the portions 83d, 84d, 85d, 86d, 87d, 88d, 89d, and 90d (83d to 90d), the portion 83d ˜90d has a higher dislocation density than the portions 83c to 90c.

  Thereafter, the n-side electrode 95 is formed on the back surface of the n-type GaN substrate 81 using a manufacturing process similar to the manufacturing process of the first embodiment.

  Next, the GaN-based semiconductor laser device according to the fourth embodiment is formed by separating at the central portion of the mask portion 96 having a width of about 10 μm.

  The other manufacturing processes of the fourth embodiment are the same as the manufacturing processes of the first embodiment.

  Next, an experiment conducted for confirming the effect of the fourth embodiment will be described. In this confirmation experiment, the dislocation density of the semiconductor laser device according to Example 4 actually manufactured using the manufacturing process of the fourth embodiment was measured by a planar TEM image.

The semiconductor laser device according to Example 4 was found to improve the crystallinity of the ridge portion 91 as in the semiconductor laser device according to Example 1 of the first embodiment. Specifically, in the semiconductor laser device according to Example 4, almost no dislocation was observed in the portion 83a. Further, in the portion 83b, a penetration defect having an order of 10 ⁹ cm ⁻² and a stacking fault having an order of 10 ⁵ cm ⁻¹ were observed. In the ridge portion 91, almost no dislocation was observed.

  The embodiments and examples disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments and examples but by the scope of claims for patent, and includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

For example, in the first to fourth embodiments, an example in which the present invention is applied to a semiconductor laser element has been described. However, the present invention is not limited to this, and a light emitting element such as a super luminescent diode, a heterobipolar transistor, or the like. It can also be applied to other electronic devices. When the present invention is applied to a heterobipolar transistor, a GaN (11-20) plane substrate 101, an n-type GaN layer 102, an n-type GaN collector layer 103, a p-type, as in the modification of the present invention shown in FIG. A GaN base layer 104, an n-type Al _0.25 Ga _0.75 N emitter layer 105, an n-type GaN emitter contact layer 106, a Ti electrode 107, a Ni electrode 108, and a Ti electrode 109 may be provided. Further, the thicknesses of the n-type GaN layer 102, the n-type GaN collector layer 103, the p-type GaN base layer 104, the n-type Al _0.25 Ga _0.75 N emitter layer 105, and the n-type GaN emitter contact layer 106 are, for example, You may form in thickness of about 1 micrometer, about 200 nm, about 150 nm, about 200 nm, and about 20 nm, respectively. In this case, the ridge portion (active region) 111 may be formed by the n-type Al _0.25 Ga _0.75 N emitter layer 105 and the n-type GaN emitter contact layer 106.

In the first to fourth embodiments, the current confinement layer made of a dielectric (SiO ₂ film) is formed. However, the present invention is not limited to this, and a current confinement layer made of a semiconductor may be formed.

  In the first to fourth embodiments, the example in which the surface of the semiconductor substrate is formed so as to have a substantially (11-20) plane or (1-100) plane is shown. However, the surface of the semiconductor layer may be formed to have (H, K, -HK, 0) planes other than the (11-20) plane and the (1-100) plane, You may form so that it may have a plane orientation off (inclination) about several degrees from the H, K, -HK, 0) plane. In this case, the second region (recess or mask) may be formed so as to extend in the [K, -H, HK, 0] direction.

  In the first to fourth embodiments, the GaN substrate or the 4H—SiC substrate is used as the semiconductor substrate. However, the present invention is not limited to this, and other nitride-based semiconductor substrates having a wurtzite structure, An α-SiC substrate having a crystal structure or an α-SiC substrate having a rhombohedral structure may be used. For example, an AlN substrate or an α-SiC substrate such as 6H—SiC may be used. In this case, it is preferable to use a conductive substrate, and it is particularly preferable to use an n-type substrate.

  In the first to fourth embodiments, the example in which the n-side electrode is formed on the back surface of the semiconductor substrate has been described. However, the present invention is not limited to this, and after the p-side electrode is formed, the p-side electrode side is Cu. It may be bonded to a support substrate made of -W or the like, and then the semiconductor substrate may be removed to form an n-side electrode on the exposed back surface of the n-type layer.

  In the fourth embodiment, an example in which a mask is formed on a GaN substrate has been described. However, the present invention is not limited to this, and the present invention can also be applied when a mask is formed on a substrate other than a GaN substrate. It is.

It is sectional drawing for demonstrating the concept of this invention. 1 is a cross-sectional view showing a structure of a GaN-based semiconductor laser device according to a first embodiment of the present invention. FIG. 3 is a plan view showing the structure of an n-type GaN substrate of the GaN-based semiconductor laser device shown in FIG. 2. It is sectional drawing which showed the structure of the active layer of the GaN-type semiconductor laser element shown in FIG. It is sectional drawing for demonstrating the manufacturing process of the GaN-type semiconductor laser element by 1st Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of the GaN-type semiconductor laser element by 1st Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of the GaN-type semiconductor laser element by 1st Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of the GaN-type semiconductor laser element by 1st Embodiment shown in FIG. It is sectional drawing which showed the structure of the GaN-type semiconductor laser element by 2nd Embodiment of this invention. FIG. 10 is a cross-sectional view taken along line 100-100 in FIG. 9. FIG. 10 is a plan view showing a structure of an n-type GaN substrate of the GaN-based semiconductor laser device shown in FIG. 9. It is sectional drawing which showed the structure of the GaN-type semiconductor laser element by 3rd Embodiment of this invention. It is the top view which showed the structure of the n-type SiC substrate of the GaN-based semiconductor laser element shown in FIG. It is sectional drawing which showed the structure of the GaN-type semiconductor laser element by 4th Embodiment of this invention. FIG. 15 is a plan view showing a structure of an n-type GaN substrate of the GaN-based semiconductor laser device shown in FIG. 14. FIG. 15 is a cross-sectional view for explaining a manufacturing process for the GaN-based semiconductor laser device according to the fourth embodiment shown in FIG. 14. FIG. 15 is a cross-sectional view for explaining a manufacturing process for the GaN-based semiconductor laser device according to the fourth embodiment shown in FIG. 14. FIG. 15 is a cross-sectional view for explaining a manufacturing process for the GaN-based semiconductor laser device according to the fourth embodiment shown in FIG. 14. It is sectional drawing which showed the structure of the hetero bipolar transistor by the modification of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 3 Semiconductor layer 6 Active layer (semiconductor layer)
9 Semiconductor layer 11 Ridge part (active region, light emitting region)
21, 41, 81 n-type GaN substrate (semiconductor substrate)
21a, 41a, 61a One recess (first recess)
21b, 41b, 61b The other recess (second recess)
21c, 41c, 61c One side surface (first side surface)
21d, 41d, 61d The other side surface (second side surface)
22, 42, 82 n-type layer (semiconductor layer)
23, 43, 63, 83 n-type cladding layer (semiconductor layer)
24, 44, 84 n-type carrier block layer (semiconductor layer)
25, 45, 85 n-type light guide layer (semiconductor layer)
26, 46, 66, 86 Active layer (semiconductor layer)
27, 47, 87 p-type light guide layer (semiconductor layer)
28, 48, 88 p-type cap layer (semiconductor layer)
29, 49, 69, 89 p-type cladding layer (semiconductor layer)
30, 50, 90 p-type contact layer (semiconductor layer)
31, 51, 71, 91 Ridge portion (active region, light emitting region)
61 n-type SiC substrate 101 GaN (11-20) plane substrate (semiconductor substrate)
102 n-type GaN layer (semiconductor layer)
103 n-type collector layer (semiconductor layer)
104 p-type GaN base layer (semiconductor layer)
105 n-type Al _0.25 Ga _0.75 N emitter layer (semiconductor layer, active region)
106 n-type GaN emitter contact layer (semiconductor layer, active region)
A, C, E, G plane area (first area)
B, D, F, H Plane area (second area)

Claims (5)

An integer comprising a nitride-based semiconductor substrate having a wurtzite structure, an α-SiC substrate having a hexagonal structure, or an α-SiC substrate having a rhombohedral structure, and at least one of H and K is not 0 A semiconductor substrate substantially including a surface having a (H, K, -H-K, 0) plane;
A semiconductor layer formed on the surface of the semiconductor substrate and made of a nitride-based semiconductor having a wurtzite structure;
The semiconductor substrate is
A first region in which the semiconductor layer can grow in a vertical direction;
The first region is disposed so as to sandwich the first region, a boundary region with the first region extends substantially in a [K, -H, HK, 0] direction, and the semiconductor layer grows in a lateral direction. A possible second region,
The semiconductor layer includes a semiconductor region including an active region formed on a region on a [0001] direction side from a central portion of the first region of the semiconductor substrate.   2. The portion of the semiconductor layer formed on the second region of the semiconductor substrate is formed in a stepped shape substantially extending in the [K, −H, HK, 0] direction. The semiconductor element as described in.   The second region on the [0001] direction side and the second region on the [000-1] direction side of the semiconductor substrate are substantially each of the [K, -H, HK, 0]. The semiconductor element according to claim 2, comprising a first recess and a second recess extending in the direction.   4. The semiconductor device according to claim 1, wherein the active region of the semiconductor layer includes a light emitting region extending substantially in the [K, −H, HK, 0] direction. An integer comprising a nitride-based semiconductor substrate having a wurtzite structure, an α-SiC substrate having a hexagonal structure, or an α-SiC substrate having a rhombohedral structure, and at least one of H and K is not 0 A step of preparing a semiconductor substrate substantially including a surface having a (H, K, -H-K, 0) plane;
A semiconductor layer is formed on the first region of the semiconductor substrate by vertical growth and is disposed so as to sandwich the first region. A boundary region with the first region is substantially [K, −H , HK, 0] direction, a wurtzite structure is formed on the first region and the second region of the semiconductor substrate by forming the semiconductor layer by lateral growth on the second region. Forming the semiconductor layer comprising:
And a step of forming an active region in a portion of the semiconductor layer on a region on the [0001] direction side of the central portion of the first region of the semiconductor substrate.

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