JP2007081018A - Electric fuse module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a rewritable electric fuse by using a minimum circuit. <P>SOLUTION: An electric fuse module includes two electric fuses 10, 11 each end of which is connected to an external power voltage terminal, two switching elements for program control which are connected in parallel between common connection nodes and ground terminals of the two electric fuses 10, 11, two switching elements for reading, a detecting circuit 14 which detects a voltage at a contact point between the first electric fuse and the switching element, and an exclusive-OR which receives a voltage level at the contact point of the first electric fuse and the second electric fuse. In programming a plurality of electric fuses sequentially one by one from a first stage, the detecting circuit detects the state of the electric fuse at a previous stage so that whether or not to program the electric fuse at a succeeding stage is determined only when the electric fuse at the previous stage has been programmed. This can obtain a program by feeding signal pulses for the number of electric fuses required by the program from a single external control terminal for programming. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an electric fuse module that electrically cuts an electric fuse element by energization and performs programming (such as fusing and silicidation).

  Conventionally, electric fuse devices (electric fuse modules) are widely used in semiconductor integrated circuits (LSIs) such as high-frequency trimming program devices. In an electrical fuse device, an electrical fuse element formed of polysilicon or the like is connected in series to a bipolar transistor, and programmed by flowing a large current of about 1 ampere and performing programming (melting, silicidation, etc.).

  In recent years, in the field of semiconductor integrated circuits, a process has been developed in which a metal material is silicided and formed on polysilicon as a gate material to reduce the resistance of the gate material. In view of this, an electric fuse element technology has appeared that utilizes a mechanism in which a current is passed through a gate material to cut the silicide layer on the upper surface to increase the resistance. In the 130 nm and 90 nm process generations, the instantaneous current required to program the electrical fuse element by energization is 10 to 30 milliamperes per electrical fuse element.

  FIG. 10 is a circuit diagram showing a configuration example of an electric fuse device conventionally used in a semiconductor integrated circuit. In FIG. 10, 100 is an electric fuse, 101 is a PMOS transistor (switching element) connected in series with the electric fuse 100, and 102 is a NAND circuit whose output is connected to the gate of the PMOS transistor 101.

A program signal is input to the NAND circuit 102 with respect to the selected electric fuse 100, and the PMOS transistor 101 is turned on by the conduction of the NAND circuit 102, and a current flows. The electric fuse 100 is formed of a fine pattern of silicide, polysilicon, or metal, and is thermally programmed when a predetermined current flows, causing disconnection or increased resistance. Accordingly, it is possible to recognize 0/1 of the signal state by reading the initial electric fuse element resistance that is not programmed and the resistance value of the programmed electric fuse that has been increased in resistance. In this way, an electric fuse device can be realized (see, for example, Patent Document 1).
Japanese National Patent Publication No. 11-512879 (pages 12-13, FIG. 3)

  In this electric fuse device, as an application of a one-time PROM (OTP), an electric signal is given from the outside and data can be written only once, and data cannot be rewritten. The problem to be solved by the present invention is to enable rewriting of data by an electric fuse.

  The electrical fuse module according to the present invention is a fuse state in which at least one electrical fuse is programmed in response to a program control signal and the remaining electrical fuses are not programmed in response to a program control signal. Program control means for setting the fuse state to program the remaining electric fuses simultaneously or sequentially in response to a program control signal, and logic means for logically outputting a combination of fuse data from the program control means. Is.

  In the present invention, since the plurality of electrical fuses can be programmed one by one in order from the first stage by the program control means that responds to the program control signal, the initial output from the logic output of the combination of fuse data by the logic means. For example, data can be rewritten from “0” to “1” only once, such as “0”, “1” after the first electric fuse program, “0” after the subsequent electric fuse program, etc. Can be made. Therefore, the circuit scale and the number of control terminals can be reduced as compared with the case where rewriting is realized by arranging the electrical fuse modules as many as necessary.

  Further, in the present invention, when the program control elements are sequentially turned on, the detection circuit detects the state in which the previous electrical fuse is programmed, and only when the previous electrical fuse is programmed, The program of the electric fuse can be executed, and the program can be realized only by inputting the program control signals for the number of electric fuses that need to be programmed from one program control signal terminal.

  The electrical fuse program includes fusing as well as high resistance due to material alteration.

  In actual operation of the semiconductor integrated circuit, the read control element is turned on, and a logical output having a voltage level appearing at a connection node between the electric fuse and the read control element as an input, for example, an exclusive OR is performed to obtain an initial state “ Data rewriting from “0” to “1” can be realized only once, such as “0”, “1” after the first electric fuse program, and “0” after the subsequent electric fuse program. .

  Preferably, the electric fuse is formed of silicide, polysilicon, or metal, and one end is connected to an external power supply voltage.

  Preferably, a fuse data read circuit is provided for inputting fuse data from the program control means to the logic means in response to the read control signal.

  Preferably, the logic means is an exclusive OR circuit.

  Preferably, the program control means includes a plurality of program control elements connected between the other end of each electric fuse and each of the ground terminals, at least one first electric fuse and a first program control element corresponding thereto. A first control circuit connected to the first electrical fuse among the plurality of program control elements. The element programs the first electrical fuse in response to the input of the first program control signal, and other program control elements other than the first program control element respond to the input of the detection signal in response to the corresponding electrical control elements. The fuse is programmed, and the detection circuit detects the connection point voltage in response to the input of the first program control signal, and the first electrical Yuzu senses to be programmed, and, upon input of a subsequent program control signal, and outputs a detection signal to program the following stages of the electrical fuse.

  Preferably, the electrical fuses are first to fourth electrical fuses, and first, second, third, and fourth programs in which program control elements are individually connected to the first to fourth electrical fuses, respectively. A first control circuit, wherein the detection circuit detects first to fourth connection point voltages between the first to third electrical fuses and the corresponding first to third program control elements, respectively; , Second and third detection circuits, wherein the logic means inputs a first exclusive OR circuit for inputting the first and fourth connection point voltages, and inputs the second and third connection point voltages. A second exclusive OR circuit; and a third exclusive OR circuit that inputs the outputs of the first and second exclusive OR circuits.

  In this configuration, the initial state is “0”, “1” after the first electric fuse program, “0” after the second electric fuse program, “1” after the third electric fuse program, “0” after the fourth fuse program. Thus, the data can be rewritten four times.

  Preferably, the detection circuit has a circuit configuration for performing a logical product operation of a signal having a connection point voltage between the electric fuse and the program control element as an input level and a program control signal.

  Preferably, the output signal of the detection circuit includes an off control circuit that turns off the switching element for program control in the previous stage during the program operation in the next stage.

  In this configuration, since the program control element of the preceding electric fuse that has executed the program once upon receiving the output of the detection circuit is turned off, the program operation can be executed without causing the electric fuse to be cut twice.

  According to the present invention, rewriting can be realized while reducing the circuit scale.

  Embodiments of an electrical fuse module according to the present invention will be specifically described below with reference to the drawings.

(Embodiment 1)
An electric fuse module according to Embodiment 1 of the present invention will be described.

  FIG. 1 is a circuit diagram showing a configuration of an electric fuse module according to Embodiment 1 of the present invention. In FIG. 1, reference numerals 10 and 11 denote first and second electric fuses each having one end connected to an external power supply terminal. The electric fuses 10 and 11 are made of silicide, polysilicon, or metal.

  Reference numerals 12 and 13 respectively denote first and second program controls comprising NMOS transistors, each having a drain connected to the other end of each of the first and second electric fuses 10 and 11, and each source connected to a ground terminal. It is an element. D1 is a first node (connection point) between the first electric fuse 10 and the first program control element 12, and D2 is a second node between the second electric fuse 11 and the second program control element 13. It is.

  Reference numeral 14 denotes a detection circuit. The detection circuit 14 detects the voltage of the first node D1 in response to the input of the program control signal (Prog), and when detecting that the first electric fuse 10 is programmed from this detection, When the program control signal (Prog) is input thereafter, the second program control element 13 is turned on so that the second electric fuse 11 is programmed.

  Reference numeral 15 denotes a fuse data reading circuit. The fuse data reading circuit 15 is a circuit for reading fuse data. The fuse data is data related to the program of the first and second electric fuses 10 and 11. The fuse data read circuit 15 includes a first read control element 15a made of an NMOS transistor having a drain connected to the first node D1 and a source grounded, and a drain connected to the second node D2 and a source grounded. And a second read control element 15b made of an NMOS transistor. When reading fuse data, the fuse data reading circuit 15 is turned on by a read signal (Read) to the gates of the read control elements 15a and 15b to read fuse data.

  The detection circuit 14 and the fuse data reading circuit 15 constitute program control means.

  In response to a program control signal (Prog), the program control means programs the first electric fuse 10 that is at least one electric fuse, and does not program the second electric fuse 11 that is the remaining electric fuse. In this state, the second electric fuse 11 is controlled to be programmed to a fuse state in response to the next program control signal (Prog). The program control means is the same or different in each embodiment from the first embodiment onwards, but the basics are the same.

  Reference numeral 16 denotes an exclusive OR circuit (Ex-OR). This exclusive OR circuit 16 constitutes a logic means for logically outputting (OUT) a combination of fuse data from the program control means. The logic means is the same or different in each embodiment from the first embodiment onwards, but the basics are the same.

  The first and second read control elements 15a and 15b constituting the fuse data read circuit 15 are smaller in size as transistors than the first and second program control elements 12 and 13, respectively. This is because the source / drain current required to turn on the read control elements 15a and 15b when reading the fuse data is as large as the source / drain current required for the first and second program control elements 12 and 13 to program the electrical fuses 10 and 11. This is because a large current is not required.

  Since the program control element and the read control element in each of the first and subsequent embodiments are the same, the description thereof in each embodiment will be omitted.

  The operation of the electrical fuse module of the embodiment having the above configuration will be described.

  First, an operation for programming the first electric fuse 10 will be described.

  A program control signal (Prog) is input to the gate of the first program control element 12 and the detection circuit 14. The first program control element 12 is turned on by the input of the program control signal (Prog). When the first program control element 12 is turned on, the first electric fuse 10 starts a program operation.

  On the other hand, in response to the input of the program control signal (Prog), the detection circuit 14 detects that the state of the first electric fuse 10 is the state before programming (before cutting) from the voltage change of the first node D1. Since the second program control element 13 is controlled to be off by controlling the gate voltage of the second program control element 13, the second electric fuse 11 does not start the program operation.

Before the first program control element 12 is turned on and the program of the first electrical fuse 10 is executed, the resistance value of the first electrical fuse 10 is low and the node D1 is at a high potential (state 1). After the first electric fuse 10 is programmed, the resistance of the first electric fuse 10 is increased, so that the potential of the node D1 is lowered. (State 2)
As described above, when reading the programmed state of the first electric fuse 10, a read signal (Read) is input to the fuse data read circuit and the first and second read control elements 15a and 15b are simultaneously turned on. The voltage level of the node D1, which is the resistance ratio between the resistance of the first electric fuse 10 and the resistance of the first read control element 15a, the resistance of the second electric fuse 11, and the second read control element 15b Reading is performed from the logical output (OUT) of the exclusive OR circuit 16 having the voltage level of the node D2, which is a resistance ratio to the resistance, as an input level.

  Since the potentials of the nodes D1 and D2 are both high (H) in the initial state, the logical output (OUT) of the exclusive OR circuit 16 is “0”, but the first electric fuse 10 is programmed. In (state 1), since the potential of the node D1 is low (L) and the potential of the node D2 is high (H), the logical output (OUT) of the exclusive OR circuit 16 is “1”. .

  As described above, data is written ("0" to "1") in the electrical fuse module. Next, rewriting of written data (from “1” to “0”) will be described.

  In this rewriting, the next program control signal (Prog) is input to the first program control element 12 and the detection circuit 14. At this time, the detection circuit 14 detects from the potential of the node D1 that the first electrical fuse 10 has already been programmed, and inputs the detection signal to the second program control element 13, thereby the second The program control element 13 is turned on. Thereby, the second electric fuse 11 is programmed.

  As a result, when the read signal (Read) is input to the fuse data read circuit 15 and the first and second read control elements 15a and 15b are turned on, the first electric fuse 10 and the second electric fuse 11 are connected. Since the programmed potentials of the nodes D1 and D2 are both low (L), the logical output (OUT) of the exclusive OR circuit 16 becomes “0”.

  As described above, in the electrical fuse module according to the first embodiment, additional data rewriting is realized in the initial state “0” → data writing “1” → data rewriting “0”, so-called “0” “1”. In the semiconductor memory device having an OTP electric fuse that outputs 1-bit data, a rewritable electric fuse can be realized with the minimum number of control terminals.

(Embodiment 2)
An electric fuse module according to Embodiment 2 of the present invention will be described.

  FIG. 2 is a circuit diagram showing a configuration of the electrical fuse module according to Embodiment 2 of the present invention. In FIG. 2, 20, 21, 22, and 23 are first, second, third, and fourth electric fuses having one end connected to a power supply terminal, and 24, 25, 26, and 27 have first and second drains, respectively. First, second, third, and fourth program controls connected to the other ends of the second, third, and fourth electric fuses 20, 21, 22, and 23, and connected to the ground terminals of the respective sources. Elements 28, 29, and 30 are first, second, and third electric fuses 20, 21, 22, and 23, respectively, and first, second, and third program control elements 20, 21, and 22, respectively. , First, second and third detection circuits for detecting the voltages of the second and third nodes D1, D2 and D3, respectively.

  A fuse data reading circuit 31 includes first, second, third, and fourth read control elements 31a, 31b, 31c, and 31d.

  Reference numeral 32 denotes an exclusive OR circuit. The exclusive OR circuit 32 includes first, second, and third exclusive OR circuits 32a, 32b, and 32c. Two inputs of the first exclusive OR circuit 31a are the potentials of the second and third nodes D2 and D3, and two inputs of the second exclusive OR circuit 31b are the first and fourth nodes D1 and D1, respectively. The second input of the third exclusive OR circuit 31c is the logic output (OUT) of the first and second exclusive OR circuits 31a and 31b. Since the logic of this exclusive OR circuit 32 is well known, its detailed description is omitted.

  The operation of the electric fuse module of the second embodiment having the above configuration will be described.

  When all the first, second, third, and fourth electric fuses 20, 21, 22, and 23 are not programmed first, “0” is output (the state before programming).

  First, an operation for programming the first electric fuse 20 will be described.

  In response to the program control signal (Prog), the first program control element 24 is turned on. When the first program control element 24 is turned on, the first electric fuse 20 is programmed.

  The program control signal (Prog) is also input to the first, second, and third detection circuits 28, 29, and 30, but the first, second, and third detection circuits 28, 29, and 30 are all electrically connected. Since it is detected that the fuses 20, 21, 22, and 23 are in the pre-program state, the second, third, and fourth program control elements 25, 26, and 27 are turned off, respectively. Thereby, the program operation of each of the second, third, and fourth electric fuses 21, 22, and 23 is not started.

Before the first program control element 24 is turned on and the program is executed, the resistance value of the first electric fuse 20 is low and the first node D1 is at a high potential (state 1). After the electric fuse 20 is programmed, the first electric fuse 20 is increased in resistance, so that the potential of the first node D1 is lowered. (State 2)
As described above, when the programmed state of the first electric fuse 20 is read, the first, second, third, and fourth read control elements 31a of the fuse data read circuit 31 are read by the read signal (Read). , 31b, 31c, 31d, the voltage level of the first node D1, which is the resistance ratio between the resistance of the first electric fuse 20 and the resistance of the first read control element 31a, and the second electric fuse 11 The voltage of the second node D2, which is the resistance ratio of the resistance of the second read control element 31b to the input level, the resistance of the third electrical fuse 22 and the resistance of the third read control element 31c The voltage level of the third node D3, which is the resistance ratio, and the voltage of the fourth node D4, which is the resistance ratio of the resistance of the fourth electrical fuse 23 and the resistance of the fourth read control element 31d, are input. It outputs a logic output of the exclusive OR circuit 32 (OUT) and.

  Since the potentials of the first, second, third, and fourth nodes D1, D2, D3, and D4 are high (H) in the initial state, the logical output (OUT) of the exclusive OR circuit 32 is “0”. However, when the first electric fuse 20 is in the programmed (state 1), the logical output (OUT) of the exclusive OR circuit 32 becomes “1”. Description of the logical output (OUT) of the exclusive OR circuit 32 is omitted. As a result, data has been written (from “0” to “1”).

  Next, rewriting of the written data (returning from “1” to “0”) will be described.

  This rewriting programs the second electrical fuse 21. Therefore, first, the first detection circuit 28 detects that the potential level of the first node D1 is in the state (1) after the first electric fuse 20 is programmed, and the next program control signal (Prog ), The second electrical fuse 21 is programmed by turning on the second program control element 25. At this time, the program control signal (Prog) is also input to the second and third detection circuits 29 and 30, but it is detected that the second and third electric fuses 21 and 22 are in the pre-program state. The third and fourth program control elements 26 and 27 are turned off. As a result, the program operation is not started in the third and fourth electric fuses 22 and 23.

  When reading the programmed state of the second electric fuse 21 as described above, all the read control elements 31a, 31b, 31c, 31d in the fuse data reading circuit 31 are turned on, and the first electric fuse 20 is turned on. The voltage ratio of the first node D1, which is the resistance ratio between the resistance and the resistance of the first read control element 31a, and the resistance ratio between the resistance of the second electrical fuse 11 and the resistance of the second read control element 31b The voltage level of a certain second node D2, the voltage level of the third node D3, which is the resistance ratio between the resistance of the third electrical fuse 22 and the resistance of the third read control element 31c, and the fourth electrical fuse The logical output (OUT) of the exclusive OR circuit 32 is output with the voltage of the fourth node D4, which is the resistance ratio of the resistor 23 and the resistance of the fourth read control element 31d, as the input level. .

  The logical output (OUT) of the exclusive OR circuit 32 becomes “0” when the second electric fuse 21 is in the programmed (state 1), and data is rewritten (returned from “1” to “0”). Is realized.

  As described above, when a program control signal (Prog) is input from the outside, the detection circuits 28, 29, 30 detect and compare the states of the electrical fuses 20, 21, 22, 23 in the previous stage. Then, the program is sequentially executed from the first electric fuse 20. Each time the electric fuses 20, 21, 22, 23 are programmed, the data is read out at any time because the logical output (OUT) of the exclusive OR circuit 32 of the outputs of all the electric fuses 20, 21, 22, 23 is read. It becomes possible.

  As described above, according to the second embodiment, a rewritable electric fuse can be realized with a minimum number of control terminals in a semiconductor memory device having an OTP electric fuse that outputs 1-bit data of “0” and “1”. it can.

(Embodiment 3)
An electric fuse module according to Embodiment 3 of the present invention will be described.

  FIG. 3 is a circuit diagram showing a configuration of the electric fuse module according to Embodiment 3 of the present invention, and FIG. 4 is a timing chart of the circuit diagram in FIG. C1 and C2 are gate inputs of the first and second program control elements 42 and 43, respectively. In FIG. 3, reference numerals 40 and 41 denote first and second electric fuses having one end connected to a power supply terminal, and reference numerals 42 and 43 denote drains connected to the other ends of the first and second electric fuses 40 and 41, respectively. , First and second program control elements, each source of which is connected to a ground terminal.

  A detection circuit 44 detects the voltage of the first node D1 between the first electric fuse 40 and the first program control element 42. The detection circuit 44 includes an inverter 44a and an AND circuit 44b.

  A fuse data reading circuit 45 includes first and second reading control elements 45a and 45b.

  46 is an exclusive OR circuit.

  The operation of the electrical fuse module according to the third embodiment having the above configuration will be described.

  First, an operation for programming the first electric fuse 40 will be described. In response to the program control signal (Prog), the first program control element 42 is turned on. When the first program control element 42 is turned on, the first electric fuse 40 is programmed. At this time, the program control signal (Prog) is also input to the detection circuit 44, but the second program control element 43 is turned off because it is detected that the first electric fuse 40 is in a state before being cut. As a result, the program operation is not started in the second electric fuse 41.

Before the first program control element 42 is turned on and the program is executed, the resistance value of the first electric fuse 40 is low and the node D1 is at a high potential (state 1). Is programmed, the potential of the node D1 is lowered by increasing the resistance of the first electric fuse 40. (State 2)
As described above, when reading the programmed state of the first electric fuse 40, a read signal (Read) is input and the first and second read control elements 45a and 45b in the fuse data read circuit 45 are input. And the voltage level of the first node D1, which is the resistance ratio between the resistance of the first electrical fuse 40 and the resistance of the first read control element 45a, the resistance of the second electrical fuse 41, and the second The voltage of the second node D2, which is a resistance ratio to the resistance of the read control element 45b, is read as the input level from the logic output (OUT) of the exclusive OR circuit 46.

  Since the potentials of the nodes D1 and D2 are both high (H) in the initial state, the logical output (OUT) of the exclusive OR circuit 46 is “0”, but the first electric fuse 40 is programmed. In the later (state 1), the logical output (OUT) of the exclusive OR circuit 46 becomes “1”.

  As a result, data has been written (from “0” to “1”).

  Next, rewriting of the written data (returning from “1” to “0”) will be described.

  This rewriting programs the second electrical fuse 41.

  First, the detection circuit 44 detects that the potential level of the node D1 is in the state (state 1) after the first electric fuse 40 is programmed. The detection circuit 44 is realized by using an inverter 44a and an AND circuit 44a. The level of the node D1 is a state after programming of the first electric fuse 40, that is, the low value “L”. One of the two inputs of the circuit 44b is received at a high value (H). Next, when a program control signal is input, a high value (H) signal is output from the AND circuit 44b in the detection circuit 44, thereby turning on the second program control element 43. Thereafter, the second electric fuse 41 is programmed.

  As described above, when reading the programmed state of the second electric fuse 41, the first and second read control elements 45a and 45b of the fuse data reading circuit 45 are turned on, and the first electric fuse 40 is turned on. The voltage ratio of the first node D1, which is the resistance ratio between the resistance and the resistance of the first read control element 45a, and the resistance ratio between the resistance of the second electrical fuse 41 and the resistance of the second read control element 45b A voltage at a certain second node D2 is read as a logical output (OUT) of the exclusive OR circuit 45 as an input level. In this case, since both the potentials of the first and second nodes D1 and D2 are in the state after programming, the output becomes “0” by exclusive OR.

  From the above, in the third embodiment, the additional data rewriting is performed as a program signal such that the initial state is “0” → “1” after the first electric fuse 40 program → “0” after the second electric fuse 41 program. Realized by only control.

  That is, according to the third embodiment, a rewritable electric fuse can be realized with the minimum number of control terminals in a semiconductor memory device having an OTP electric fuse that outputs 1-bit data of “0” and “1”. .

(Embodiment 4)
An electric fuse module according to Embodiment 4 of the present invention will be described.

  FIG. 5 is a circuit diagram showing a configuration of the electric fuse module according to Embodiment 4 of the present invention, and FIG. 6 is a timing chart of the circuit diagram in FIG. C1 to C4 are gate inputs of the first to fourth program control elements 54 to 57, respectively. In FIG. 5, 50, 51, 52, and 53 are first, second, third, and fourth electric fuses, one end of which is connected to the power supply terminal, and 54, 55, 56, and 57 each have a first drain. First, second, third, and fourth program control elements connected to the other ends of the second, third, and fourth electric fuses 50, 51, 52, and 53, and the respective sources connected to the ground terminal It is.

  Reference numerals 58, 59, and 60 denote first, second, and third detection circuits that detect the voltage at the first node D1 of the first electric fuse 50 and the first program control element 54, respectively. The first, second, and third detection circuits 58, 59, and 60 include inverters 58a, 59a, and 60a, and AND circuits 58b, 59b, and 60b, respectively.

  Reference numeral 61 denotes a fuse data read circuit. The fuse data read circuit 61 includes first, second, third, and fourth read control elements 61a, 61b, 61c, and 61d.

 62 is an exclusive OR circuit. The exclusive OR circuit 62 includes first, second, and third exclusive OR circuits 62a, 62b, and 62c.

  The operation of the electrical fuse module according to the fourth embodiment having the above configuration will be described.

  First, an operation for programming the first electric fuse 50 will be described. In response to the program control signal (Prog), the first program control element 54 is turned on. At this time, the program control signal (Prog) is simultaneously input to the first, second, and third detection circuits 58, 59, and 60, but the second, third, and fourth electric fuses 51, 52, Since 53 is before programming, the potential of each of the second, third, and fourth nodes D2, D3, and D4 has a high value “H”, so that the AND circuit of the first, second, and third detection circuits 58, 59, and 60 A low value “L” is output from 58a, 59a, and 60a, and the second, third, and fourth electric fuses 51, 52, and 53 are not programmed. Here, when the first program control element 54 is turned on, the first electric fuse 50 is programmed.

Before the first program control element 54 is turned on and the program is executed, the resistance value of the first electric fuse 50 is low and the first node D1 is at a high potential (state 1). After the electric fuse 50 is programmed, the first electric fuse 50 is increased in resistance, so that the potential of the first node D1 is lowered. (State 2)
As described above, when reading the programmed state of the first electric fuse 50, the first read control element 61a is turned on, and the resistance of the first electric fuse 50 and the resistance of the first read control element 61a are turned on. The voltage level of the first node D1, which is the resistance ratio of the second node, and the voltage level of the second node D2, which is the resistance ratio of the resistance of the second electric fuse 51 and the resistance of the second read control element 61b, The voltage level of the third node D3, which is the resistance ratio between the resistance of the third electrical fuse 52 and the resistance of the third readout control element 61c, the resistance of the fourth electrical fuse 53, and the fourth readout control element 61d. The exclusive OR circuit 62 reads out the voltage of the fourth node D4, which is the resistance ratio to the resistance, of the fourth node D4 as an input level. The logical operation inside the exclusive OR circuit 62 is the same as in the second embodiment.

  Since the potentials of the first, second, third, and fourth nodes D1, D2, D3, and D4 were all high in the initial state, the logical output (OUT) of the exclusive OR circuit 62 was “0”. However, when the first electric fuse 50 is in the programmed (state 1), the logical output (OUT) of the exclusive OR circuit 62 becomes “1”.

  Next, when the second electric fuse 51 is programmed, that is, when the previously written “1” is rewritten and returned to “0”, the potential level of the first node D1 is first programmed by the first electric fuse 50. The later (state 1) is detected by the first detection circuit 58. The first detection circuit 58 receives “H” as one of the two inputs of the AND circuit 58b in response to the potential level of the first node D1 being in the programmed state, that is, the low value “L”. It will be.

  Next, when a program control signal is input, an “H” signal is output from the AND circuit 58 b of the first detection circuit 58, thereby turning on the second program control element 55. However, since the potential levels of the third and fourth nodes D3 and D4 are the third and fourth electric fuses 52 and 53 before programming, the second and third detection circuits 59 and 60 are used as program control signals. Even if (Prog) is input, the third and fourth program control elements 56 and 57 are not turned on. Therefore, thereafter, a current flows from the power supply terminal to the ground terminal via the resistance of the second electrical fuse 51, and the second electrical fuse 51 is programmed.

  As described above, when reading the programmed state of the second electric fuse 51, the second read control element 61b is turned on, and the resistance of the first electric fuse 50 and the resistance of the first read control element 61a are turned on. The voltage level of the first node D1, which is the resistance ratio of the first node D1, which is the resistance ratio of the resistance of the second electrical fuse 51 and the resistance of the second read control element 61b, is the input level. Is read by the exclusive OR circuit 62.

  Then, the potentials of the first and second nodes D1 and D2 are in the state after programming, and the potentials of the third and fourth nodes D3 and D4 are input to the exclusive OR circuit 62 in the state before programming, The logical output (OUT) of the exclusive OR circuit 62 becomes “0”. Therefore, the initial state “0” → the first electric fuse 50, “1” after programming → the second electric fuse 51, “0” after programming As described above, rewriting additional data is realized by controlling only the program signal.

  Further, when the third and fourth electric fuses 52 and 53 are programmed, if a control signal is inputted from the external control terminal for programming each time, a desired electric fuse is programmed and the logical output of the exclusive OR circuit 62 is obtained. From (OUT), data rewriting is realized at any time.

  As described above, according to the fourth embodiment, in a semiconductor memory device having an OTP electric fuse that outputs 1-bit data of so-called “0” and “1”, an electric fuse that can be rewritten with the minimum number of control terminals is provided. realizable.

(Embodiment 5)
An electric fuse module according to Embodiment 5 of the present invention will be described.

  FIG. 7 is a circuit diagram showing a configuration of an electrical fuse module according to Embodiment 5 of the present invention. In FIG. 7, reference numerals 70 and 71 denote first and second electric fuses having one end connected to the power supply terminal, and reference numerals 72 and 73 denote drains connected to the other ends of the first and second electric fuses 70 and 71, respectively. , First and second program control elements, each source of which is connected to a ground terminal.

  Reference numeral 74 denotes a detection circuit, which includes an inverter 74a and an AND circuit 74b.

  Reference numeral 75 denotes a fuse data reading circuit. The fuse data read circuit 75 includes first and second read control elements 75a and 75b.

  Reference numeral 76 denotes an exclusive OR circuit.

  Reference numeral 77 denotes an off control circuit. The off control circuit 77 turns off the first program control element 72 of the first electric fuse 70 that has executed the program once upon receiving the output of the detection circuit 74 when the second electric fuse 71 is programmed. Circuit. The off control circuit 77 includes a flip-flop 77a and an inverter 77b.

  The operation of the electrical fuse module according to the fifth embodiment having the above configuration will be described.

  First, an operation for programming the first electric fuse 70 will be described. In response to the program control signal (Prog), the first program control element 72 is turned on. At this time, the program control signal (Prog) is also input to the detection circuit 74. However, since the first electric fuse 70 is not yet programmed, the potential of the first node D1 is “H”. The output from the circuit 74b is a low value “L” and the second electrical fuse 71 is not yet programmed. Here, when only the first program control element 72 is turned on, a current flows from the external power supply terminal to the ground terminal via the resistance of the first electric fuse 70, and the first electric fuse 70 is programmed. .

Before the first program control element 72 is turned on and the program is executed, the resistance value of the first electric fuse 70 is low and the first node D1 is at a high potential (state 1). After the electric fuse 70 is programmed, the first electric fuse 70 is increased in resistance, so that the potential of the node D1 is lowered. (State 2)
As described above, when reading the programmed state of the first electric fuse 70, the first read control element 75a is turned on, and the resistance of the first electric fuse 70 and the resistance of the first read control element 75a are turned on. The voltage level of the first node D1, which is the resistance ratio of the second node, and the voltage of the second node D2, which is the resistance ratio of the resistance of the second electrical fuse 71 and the resistance of the second read control element 75b, are input levels. Is read by the exclusive OR circuit 76.

  Then, since the potentials of the first and second nodes D1 and D2 were both “H” in the initial state, the output was “0”. However, the first electric fuse 70 was programmed ( In the state 1), the logical output (OUT) of the exclusive OR circuit 76 becomes “1”.

  Next, when the second electrical fuse 71 is programmed, that is, when the previously programmed “1” is rewritten and returned to “0”, the potential level of the first node D1 is first programmed by the first electrical fuse 70. The detection circuit 74 detects the later (state 1). The detection circuit 74 receives one of the two inputs of the AND circuit 74b at a high value “H” in response to the level of the first node D1 being a state after programming, that is, a low value “L”. Become. At the same time, the signal from the detection circuit 74 is input to the off control circuit 77, and the output of the off control circuit 77 is continuously latched at the low value “L”.

  Thus, when the control signal from the program external control terminal is input next, the second program control element 73 is turned on by outputting a high value “H” signal from the AND circuit 74b of the detection circuit 74. The first program control element 72 that controls the program of the first electric fuse 70 once programmed is not turned on, and the electric fuse is not cut twice.

  As a result, a current flows only from the power supply terminal to the ground terminal via the resistance of the second electric fuse 71, and the second electric fuse 71 is programmed.

  As described above, when reading the programmed state of the second electric fuse 71, the first and second read control elements 75a and 75b of the fuse data reading circuit 75 are turned on, and the first electric fuse 70 is turned on. The voltage level of the first node D1, which is the resistance ratio between the resistance and the resistance of the first read control element 75a, and the resistance ratio between the resistance of the second electrical fuse 71 and the resistance of the second read control element 75b. The exclusive OR circuit 76 reads the voltage of a certain second node D2 as an input level.

  Then, since both the potentials of the first and second nodes D1 and D2 are in the state after programming, the logical output (OUT) of the exclusive OR circuit 76 becomes “0”.

  Therefore, the initial state “0” → the post-programming of the first electric fuse 70 “1” → the post-programming of the second electric fuse 71 is “0”, so that the additional writing and rewriting of the data of the electric fuse module is performed only with the program signal. Realized by control.

  As described above, according to the fifth embodiment, in a semiconductor memory device having an OTP electric fuse that outputs 1-bit data of so-called “0” and “1”, the electric fuse can be rewritten with the minimum number of control terminals. Can be realized.

(Embodiment 6)
An electric fuse module according to Embodiment 6 of the present invention will be described.

  FIG. 8 is a circuit diagram showing a configuration of an electrical fuse module according to Embodiment 6 of the present invention. In FIG. 8, 80, 81, 82, and 83 are first, second, third, and fourth electric fuses having one end connected to a power supply terminal, and 84, 85, 86, and 87 have drains that are connected to the first and second drains, respectively. First, second, third, and fourth program control elements connected to the other ends of the second, third, and fourth electric fuses 80, 81, 82, and 83, and the respective sources connected to the ground terminal. is there.

  Reference numerals 88, 89 and 90 denote first, second and third detection circuits.

  These detection circuits 88, 89 and 90 are connection points between the first, second and third electric fuses 80, 81 and 82 and the first, second and third program control elements 84, 85 and 85. The voltages of the first, second, and third nodes D1, D2, and D3 are detected. Each of the detection circuits 88, 89, 90 includes inverters 88a, 89a, 90a and AND circuits 88b, 89b, 90b, respectively.

  91 is a fuse data reading circuit. The fuse data read circuit 91 includes first, second, third, and fourth read control elements 91a, 91b, 91c, and 91d.

Reference numeral 92 denotes an exclusive OR circuit. This exclusive OR circuit 92 is the same as that of the second embodiment. ,
Reference numerals 93, 94, 95, and 96 denote first, second, third, and fourth off control circuits. These off control circuits 93, 94, 95, 96 are used when the second, third, and fourth electric fuses 81, 82, 83 are programmed, and the first, second, and third detection circuits 88, 89, This is a circuit for turning off the program control element of the electric fuse in the previous stage which has received the output of 90 and executed the program once.

  The operation of the electrical fuse module of the sixth embodiment having the above configuration will be described.

  First, an operation for programming the first electric fuse 80 will be described. In response to the program control signal (Prog), the first program control element 84 is turned on. At this time, the program control signal (Prog) is also input to the first, second, and third detection circuits 88, 89, 90, but the first, second, third, and fourth electric fuses 80, 81 are provided. , 82 and 83 are not yet programmed, and the potentials of the first, second, third and fourth nodes D1, D2, D3 and D4 have the high value “H”, and AND of the detection circuits 88, 89 and 90 respectively. The output from the circuit is a low value “L” and the second, third, and fourth electrical fuses 81, 82, 83 are not yet programmed. Here, when only the first read control element 84 is turned on, a current flows from the external power supply terminal to the ground terminal via the resistance of the first electric fuse 80, and the first electric fuse 80 is programmed.

Before the first program control element 84 is turned on and the program is executed, the resistance value of the first electric fuse 80 is low and the node D1 is at a high potential (state 1). Is programmed, the potential of the first node D1 is lowered by increasing the resistance of the first electric fuse 80. (State 2)
As described above, when the programmed state of the first electric fuse 80 is read, the read control elements 91a and 91b in the fuse data reading circuit 91 are turned on, and the resistance of the first electric fuse 80 and the first electric fuse 80 are turned on. The second node, which is the resistance ratio between the voltage level of the first node D1, which is a resistance ratio to the resistance of the read control element 91a, and the resistance of the second electrical fuse 81, and the resistance of the second read control element 91b. The voltage level of the second node D3, which is the resistance ratio of the resistance of the third electrical fuse 82 and the resistance of the third read control element 91c, the resistance of the fourth electrical fuse 83, The exclusive OR circuit 92 reads out the voltage of the fourth node D4, which is the resistance ratio with respect to the resistance of the four read control elements 91d, as an input level.

  Then, in the initial state, all of the potentials of the first, second, third, and fourth nodes D1, D2, D3, and D4 were high values “H”, so the output was “0”. When the first electric fuse 80 is in (state 1) after programming, the logical output (OUT) of the exclusive OR circuit 92 becomes “1”.

  Next, when the second electrical fuse 81 is programmed, that is, when the previously programmed “1” is rewritten and returned to “0”, the potential level of the first node D1 is first programmed by the first electrical fuse 80. The later (state 1) is detected by the first detection circuit 88. In response to the first node D1 being in the state after programming, that is, the low value “L”, one of the two inputs of the AND circuit 88b has a high value “H”. Will receive. At the same time, the signal from the detection circuit 88 is input to the flip-flop circuit of the first off control circuit 93, and the output of the flip-flop circuit is continuously latched at the low value “L”.

  As a result, when a control signal from the program external control terminal is input next, a high value “H” signal is output from the AND circuit 88b in the first detection circuit 88, whereby the second program control element 85 is turned on. Although turned on, the first program control element 84 once programmed is not turned on, and the electric fuse is not cut twice. At this time, the program control signal (Prog) is also input to the second and third detection circuits 89 and 90, but the second, third, and fourth electric fuses 81, 82, and 83 are still programmed. Since the potential of the second, third, and fourth nodes D2, D3, and D4 is the high value “H”, the output from the AND circuit of each detection circuit is the low value “L”, and the third, The fourth electrical fuses 82, 83 are not yet programmed. Therefore, a current flows only from the power supply terminal to the ground terminal via the resistance of the second electric fuse 81, and the second electric fuse 81 is programmed.

  As described above, when the second electrical fuse 81 is read out after the first electrical fuse 80 is programmed, the read control elements 91a and 91b of the fuse data readout circuit are turned on, and the first electrical fuse 81 is programmed. The voltage level of the first node D1, which is the resistance ratio between the resistance of the electric fuse 80 and the resistance of the first read control element 91a, the resistance of the second electric fuse 81, and the resistance of the second read control element 91b The voltage level of the second node D2, which is the resistance ratio of the third node, the voltage level of the third node D3, which is the resistance ratio of the resistance of the third electrical fuse 82 and the resistance of the third read control element 91c, The exclusive OR circuit 92 reads the voltage of the fourth node D4, which is the resistance ratio of the resistance of the fourth electric fuse 83 and the resistance of the fourth read control element 91d, as an input level.

  Then, since both the potentials of the first and second nodes D1 and D2 are in the state after programming, the logical output (OUT) of the exclusive OR circuit 92 becomes “0”.

  Therefore, the initial state “0” → the post-programming of the first electric fuse 80 “1” → the post-programming of the second electric fuse 81 is “0”, so that the additional writing and rewriting of the data of the electric fuse module is performed only with the program signal. Realized by control. Further, when programming the third and fourth electric fuses, if a pulse is applied from the external control terminal for programming each time, the desired electric fuse is programmed without additional writing of the previously programmed electric fuse. From the output of the exclusive OR circuit, data rewriting is realized at any time.

  As described above, according to the sixth embodiment, in a semiconductor memory device having an OTP electric fuse that outputs 1-bit data of so-called “0” and “1”, the electric fuse can be rewritten with the minimum number of control terminals. Can be realized.

  The electrical fuse module of the present invention can reduce the number of mounted areas and occupy the electrical fuse because a plurality of data can be rewritten with one module even when a large number of electrical fuse elements are required, such as for RAM redundancy relief. It is useful as an electrical fuse module for redundancy repair of RAM such as DRAM and SRAM.

FIG. 1 is a circuit diagram showing a configuration of an electric fuse module according to Embodiment 1 of the present invention. FIG. 2 is a circuit diagram showing a configuration of the electrical fuse module according to Embodiment 2 of the present invention. FIG. 3 is a circuit diagram showing the configuration of the electrical fuse module according to Embodiment 3 of the present invention. FIG. 4 is a timing chart in the third embodiment of the present invention. FIG. 5 is a circuit diagram showing a configuration of the electrical fuse module according to Embodiment 4 of the present invention. FIG. 6 is a timing chart in the fourth embodiment of the present invention. FIG. 7 is a circuit diagram showing a configuration of an electrical fuse module according to Embodiment 5 of the present invention. FIG. 8 is a circuit diagram showing a configuration of an electrical fuse module according to Embodiment 6 of the present invention. FIG. 9 is a timing chart in the sixth embodiment of the present invention. FIG. 10 is a circuit diagram showing a configuration of a conventional electric fuse device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10,11 Electric fuse 12,13 Program control element 15 Fuse data read-out circuit 14 Detection circuit 16 Exclusive OR circuit

Claims (8)

Multiple electrical fuses in the pre-program state;
A fuse state in which at least one electrical fuse is programmed in response to a program control signal and the remaining electrical fuses are not programmed, and the remaining electrical fuses are programmed simultaneously or sequentially in response to a subsequent program control signal; Program control means for
Logic means for logically outputting a combination of fuse data from the program control means;
An electrical fuse module comprising:   2. The electric fuse module according to claim 1, wherein the electric fuse is formed of silicide, polysilicon, or metal, and one end thereof is connected to an external power supply voltage.   2. The electric fuse module according to claim 1, further comprising a fuse data read circuit that inputs fuse data from the program control means to the logic means in response to the read control signal.   4. The electric fuse module according to claim 1, wherein the logic means is an exclusive OR circuit. Program control means
A plurality of program control elements connected between the other end of each electrical fuse and each ground terminal;
A detection circuit for detecting a connection point voltage between at least one first electric fuse and a corresponding first program control element;
Including
Other program control elements other than the first program control element are:
The first program control element connected to the first electric fuse among the plurality of program control elements programs the first electric fuse in response to the input of the first program control signal,
A program control element other than the first program control element programs the corresponding electrical fuse in response to the input of the detection signal,
The detection circuit detects the connection point voltage in response to the input of the first program control signal, detects that the first electric fuse is programmed, and when the program control signal is input thereafter, Outputs a detection signal to program the electrical fuses after the stage,
The electric fuse module according to claim 1, wherein the electric fuse module is provided. The electrical fuses are first to fourth electrical fuses;
The program control elements are first, second, third, and fourth program control elements individually connected to the first to fourth electric fuses,
First, second, and second detection circuits detect first to fourth connection point voltages between the first to third electrical fuses and the corresponding first to third program control elements, respectively. 3 detection circuit,
The logic means includes a first exclusive OR circuit for inputting the first and fourth connection point voltages, a second exclusive OR circuit for inputting the second and third connection point voltages, and a first 6. The electric fuse module according to claim 1, further comprising: a third exclusive OR circuit that inputs an output of the second exclusive OR circuit.   The electric circuit according to claim 5 or 6, wherein the detection circuit has a circuit configuration for performing a logical product operation of a signal having a connection point voltage between the electric fuse and the program control element as an input level and a program control signal. Fuse module.   8. The electric fuse according to claim 5, further comprising an off control circuit in which an output signal of the detection circuit turns off a switching element for program control in the previous stage at the time of program operation in the next stage. module.

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