JP2006310124A - Manufacturing method for micro-electron source device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a micro-electron source device having proper electron emission characteristics, without making bright spots generated on a display, using a simple method. <P>SOLUTION: This manufacturing method for a micro-electron source device comprises a cathode electrode forming process for forming a cathode electrode 11 on a support substrate 10, a composite layer forming process for forming a composite layer 12L, wherein a carbon material 12a is embedded in a conductive matrix 12b on the cathode electrode 11, and a micro-electron source layer forming process for exposing a part of the carbon material 12a to the surface of the composite layer 12L, by removing the matrix 12b of an upper part of the composite layer 12L for forming a micro-electron source layer 12. The micro-electron source layer forming process comprises a process for removing the matrix 12b of the upper part of the composite layer 12L, by making a resin layer La having conductivity and adhesiveness contact the composite layer 12L, then, peeling off the resin layer La. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method of manufacturing a micro electron source device used in a flat display device such as an FED.

  Display measures such as television receivers and information terminal equipment respond to the demands for thinner, lighter, larger screens, and higher-definition displays, from CRTs that are limited in weight and thickness to flat display devices (flat panels). Development to shift to display devices) has been actively conducted. A liquid crystal panel is widely used as a flat panel display device for information terminal equipment. However, since it is difficult to increase brightness and size, home television receivers are still in the development stage.

  On the other hand, a field emission display (hereinafter abbreviated as FED) is being developed for betting on a large-sized flat panel display device because of its merit that high-resolution and high-luminance color display can be performed with low power consumption. The FED is a device that displays a desired pattern, characters, and symbols by exciting a phosphor to emit light when a chip-type cathode that emits electrons collides with electrons emitted from the cathode.

  The known FED has a structure in which an emitter array panel composed of a cathode connected to a plurality of row wirings and a gate connected to a plurality of column wirings and an anode panel coated with a phosphor are stacked with an insulating spacer interposed therebetween. (For example, see Patent Documents 1 and 2.)

  The emitter array panel is a row wiring / column wiring that forms a matrix according to a desired number of pixels by a CVD method, an etching method, a vacuum deposition method, a sputtering method, or a photolithographic method on a dielectric plate such as glass or a Si plate. A plurality of cathode chips per pixel and a gate electrode having holes corresponding to cathode chips insulated from the cathode chips by a dielectric are formed and formed.

  The anode panel is made by depositing a transparent electrode such as ITO on a dielectric plate such as glass, and shielding red (R), green (G), and blue (B) phosphors corresponding to each pixel. It is created by applying stripes through a lattice.

  In a conventional field emission display, electron emission emitters are arranged two-dimensionally, lead electrodes and cathode voltage wiring are arranged in a matrix, and phosphors are emitted by electrons emitted from the cathode tip by a strong electric field. A method of shining is used.

  In addition, attempts have been made to emit electrons from a flat surface without forming an emitter structure as in the past, and in particular, carbon materials such as carbon nanotubes are expected to be used as emitter materials as field emission microelectron sources in recent years. ing. A carbon nanotube is a hollow cylinder obtained by rolling a graphene sheet in which carbon atoms are regularly arranged. The outer diameter of the carbon nanotube is on the order of nm, and the length is 0.5 to 10 μm. . Therefore, a high emission current density is expected because the electric field tends to concentrate on the tip portion. In addition, since carbon nanotubes have a feature of high chemical and physical stability, it is expected that carbon nanotubes are hardly affected by adsorption of residual gas and ion bombardment in an operating vacuum.

  An example in which such a carbon nanotube is used as a field emission cold cathode is disclosed (for example, see Patent Document 3).

  In addition, a material layer containing single-walled nanotubes can be uniformly formed on a large-area surface or a non-planar surface, and a coating that can be reduced in cost, a film formed using the same, and a film thereof. A technique aimed at providing a manufacturing method is disclosed (for example, see Patent Document 4). That is, as the coating solution, a solution containing 1 to 50 vol.% Of an organic polymer material such as polymethyl methacrylate (PMMA) with respect to a solvent such as monochlorobenzene, and single-walled carbon nanotubes with respect to the solvent is used. 0.1 to 10 wt% is contained. By applying this paint on the substrate using a spray method, a uniform film without aggregation can be obtained.

  In field-emission cold shades using carbon materials such as carbon nanotubes as the micro-electron source, if the ends of the carbon nanotubes are exposed, the reactivity, responsiveness, or the like, such as chemical, electrical, and material properties, or Since the variety of variability and high resolution can be improved, it is preferable that the surface is exposed and opened.

  However, in the conventional method, it is possible to uniformly coat a substrate having a large area surface or a substrate having a non-flat surface with a material layer containing carbon nanotubes or the like. It was impossible with this method alone.

  In addition, in the actual device structure, since the insulating layer and the gate electrode (grid electrode) are formed so as to surround the emitter, the material layer containing the above-mentioned carbon nanotubes or the like is a gate hole having a high aspect ratio. Located at the bottom. For this reason, it has been a very important issue to apply a treatment to the surface of the material layer to expose the ends of the carbon nanotubes on the surface.

  As a method for exposing the ends of such carbon nanotubes on the surface, there has been proposed a method in which an adhesive resin layer is attached to the surface and then the resin layer is peeled off (for example, see Non-Patent Document 1). ).

U.S. Pat. No. 4,908,539 Japanese Patent Application Laid-Open No. 61-221784 JP-A-9-221309 JP 2001-11344 A Applied Physics Letters, Vol. 83, 17, 2003

  However, when the micro-electron source device manufactured by this method is used for the flat display device, a problem that a bright spot appears on the display occurs. If there is even one bright spot because human recognition sensitivity is higher than black spot, it becomes a fatal defect as a display. Further, it has been difficult to control the bright spot to a desired state as a display by a voltage applied to the gate or the anode.

  The present invention has been made in view of the above problems in the prior art, and provides a method for manufacturing a micro-electron source device having good electron emission characteristics without generating bright spots on a display by a simple method. Objective.

The bright spot on the display was caused by the fine electron source layer composition adhering to the gate electrode of the fine electron source device. That is, since these adhering micro-electron source layer compositions contain carbon nanotubes, when a high voltage is applied to the anode electrode, electron emission occurs from the composition, resulting in a bright spot with extremely high luminance. As observed. In addition, the adhesion of the micro electron source layer composition causes the resin layer to be charged by generating a high voltage when the resin layer is peeled off in order to expose the ends of the carbon nanotubes on the surface, thereby the micro electron source layer. The micro electron source layer composition containing the carbon nanotubes peeled off from the resin adhered to the resin layer, and then the micro electron source layer composition dropped from the resin layer onto the gate electrode disposed around the micro electron source layer. It was a result.
Since the inventors have difficulty in removing the fine electron source layer composition adhering to the gate electrode, the present inventors have studied the present invention by conducting intensive studies from the viewpoint of preventing the composition from adhering to the resin layer. It came to be accomplished.

  That is, the present invention provided to solve the above problems includes a cathode electrode forming step of forming a cathode electrode on a support substrate, and a composite layer in which a carbon material is embedded in a conductive matrix on the cathode electrode. Forming a composite layer, and forming a micro electron source layer by removing the matrix in the upper layer portion of the composite layer to expose a part of the carbon material on the surface of the composite layer to form a micro electron source layer In the method of manufacturing a micro electron source device having a step, the micro electron source layer forming step includes bringing a resin layer having conductivity and adhesiveness into close contact with the composite layer, and then peeling the resin layer. A method of manufacturing a micro-electron source device, comprising: removing a matrix in an upper layer portion of the composite layer.

  Here, the resin layer comprises (1) a conductive resin in the base resin layer, (2) a surfactant in the base resin layer, and (3) a base resin layer. The conductive layer is preferably provided on the surface opposite to the surface in contact with the composite layer.

  The carbon material preferably contains at least one of carbon nanotubes, single crystal graphite, polycrystalline graphite, and fullerene.

According to the present invention, the generation of bright spots can be suppressed by a simple technique without damaging the micro-electron source layer on the cathode electrode and without deteriorating the electron emission characteristics.
That is, according to the present invention, the function of preventing charging of the resin layer can effectively suppress charging that occurs when the resin layer is peeled off from the composite layer. Thereby, since the fragment | piece of a micro electron source layer composition does not adhere to a resin layer, adhesion of the micro electron source layer composition on the gate electrode which causes the bright spot on a display can be prevented. Moreover, since the matrix of the upper layer part of a composite layer can be removed with peeling of a resin layer, some carbon materials, such as a carbon nanotube edge part, can be expressed effectively.
In addition, the present invention can achieve the above object by performing in accordance with a conventional process for producing a micro electron source device. Further, such processing is a condition that can be realized by using a commercially available apparatus, and can be easily achieved. In addition, the present invention can be easily applied to a substrate having a large area surface or a substrate having a non-flat surface, and the above object can be achieved.

Below, the manufacturing method of the micro electron source device concerning the present invention is explained.
The micro electron source device of the present invention is manufactured by the following procedure.
(S1) A conductive film 11L for forming a cathode electrode is formed on the substrate 10 (FIG. 1A). The conductive film 11L is made of, for example, Cr having a thickness of 0.2 μm formed by a sputtering method. Further, a resistance layer is formed on the conductive film 11L as necessary. The resistance layer is a thin film that serves to stabilize the discharge current to the micro-electron source layer 12 described later made of, for example, amorphous Si, SiCN, etc. having a film thickness of 0.2 μm formed by sputtering.

(S2) Next, a dispersion liquid containing at least one carbon material among carbon nanotubes, single crystal graphite, polycrystalline graphite, and fullerene as an electron emitter material on the cathode electrode, that is, in a desired region of the conductive film 11L. Apply. Here, as an example, a case where a carbon nanotube dispersion liquid is applied will be described. Application may be any method such as spraying or spin coating.
The carbon nanotube dispersion liquid is a mixture of a plurality of carbon nanotubes, a binder containing an organometallic compound containing at least one of In, Sn, Zn, and Al, and a volatile solvent (for example, butyl acetate). It was prepared. An example of a composition in the case of preparing by dispersing organotin and organoindium compounds (ITO solution) and carbon nanotubes, which are thermally decomposable organometals, in a volatile solvent such as butyl acetate is shown below.

(Carbon nanotube dispersion)
-Binder (ITO solution): 10 to 50% by weight of solid content
Carbon nanotube: 0.01-20% by weight
Solvent (butyl acetate): 30 to 80% by weight
Dispersant (for example, sodium dodecyl sulfate): 0.1 to 5% by weight

  As described above, a dispersant may be added in order to improve the dispersibility of the carbon nanotubes, or ultrasonic treatment may be performed. In addition, it is assumed that either aqueous or non-aqueous diluents may be added to the diluent, but the dispersant changes accordingly. Also, the carbon nanotubes may have a tube structure with an average diameter of 1 nm and an average length of 1 μm, for example, and those produced by an arc discharge method may be used.

(S3) After the carbon nanotube dispersion liquid is applied, a composite layer 12L in which the carbon nanotubes are dispersed and embedded in a conductive matrix made of a binder is formed by firing (FIG. 1B). ). For example, the firing may be performed in the following two stages.
(First firing)
・ Atmosphere: Air ・ Temperature: 350 ℃
・ Time: 30 minutes (second firing)
・ Atmosphere: Nitrogen ・ Temperature: 500 ℃
・ Time: 30 minutes

(S4) Next, the composite layer 12L is processed into a stripe shape. Specifically, after a resist material layer is formed on the entire surface by spin coating, a mask layer in which the surface other than the region to be left in the composite layer 12L is exposed is formed based on the lithography technique. Next, the exposed composite layer 12L region is etched using HCl, for example, at an etching temperature of 10 to 60 ° C. and an etching time of 10 seconds to 30 minutes (FIG. 1C).

  If carbon nanotubes exist outside the desired region after the above treatment, the carbon nanotubes are etched using oxygen plasma or an oxidizing solution. Examples of etching conditions at this time are shown below.

(Oxygen plasma etching)
・ Equipment: RIE
-Introducing gas: oxygen-containing gas-Plasma excitation power: 500W
Bias power: 0 to 150 W (DC or RF is acceptable, but RF is preferred)
・ Time: 10 seconds or more

(Oxidation solution etching)
-Solution: KMnO ₄
-Temperature: 20-80 ° C
・ Time: 10 seconds to 20 minutes

(S5) Next, the conductive film 11L is etched by a known photolithography technique and reactive ion etching (RIE) to form a striped cathode electrode 11 (FIG. 1D). At this point, a plurality of cathode lines are formed on the substrate 10.

(S6) An interlayer insulating film 13L is formed on the substrate 10 so as to cover the laminated portion of the cathode electrode 11 and the composite layer 12L, and a gate electrode made of, for example, 0.2 μm thick Cr is formed on the interlayer insulating film 13L. A forming conductive film 14L is formed (FIG. 2E). For example, an interlayer insulating film 13L made of, for example, SiO ₂ and having a thickness of about 1 μm is formed on the entire surface of the substrate 10 by CVD using TEOS (tetraethoxysilane) as a source gas, and then formed on the interlayer insulating film 13L. The conductive film 14L made of Cr may be formed by a sputtering method.

(S7) A resist mask layer is formed on the conductive film 14L, and a predetermined portion of the conductive film 14L is etched by reactive ion etching (RIE) using the resist mask layer, whereby the interlayer insulating film 13L is formed. A stripe-shaped gate electrode 14 is formed, and a first opening 15A penetrating through the gate electrode 14 is formed (FIG. 2F). At this time, the gate electrode 14 is processed into a stripe shape substantially orthogonal to the cathode electrode 11 on the interlayer insulating film 13L. That is, a plurality of gate lines orthogonal to the cathode line are formed. Further, the etched portion of the conductive film 14L exposes the interlayer insulating film 13L.

(S8) Next, the second opening 15B is exposed through the first opening 15A of the gate electrode 14 so that the composite layer 12L is exposed by dry etching such as reactive ion etching (RIE). Form. Thereby, the opening part (gate hole) 15 which consists of 1st, 2nd opening part 15A, 15B is obtained (FIG.2 (g)).

  The micro-electron source device must be an assembly in which electron emission can be selected for each pixel. Therefore, one pixel is formed in a portion where the cathode electrode 11 and the gate electrode 14 which is an electron extraction electrode are perpendicularly overlapped with each other. The opening 15 is for constituting the pixel, and is formed in a circular shape with a diameter of 20 μm, for example, and a plurality (for example, several tens) is formed per pixel.

(S9) Next, the matrix of the upper part of the composite layer 12L exposed at the bottom of the opening 15 is weakened, and the resin layer La is brought into close contact with the surface (FIG. 3 (h)). As a technique for weakening the upper layer portion of the composite layer 12L, an etching method (light etching) such as wet etching or dry etching can be preferably used. For example, light etching may be performed under the conditions of an etchant: 10% HCl aqueous solution and an etching time of 5 to 60 seconds. This etching facilitates selective removal of the matrix material in the upper layer portion of the composite layer 12L, and a large number of carbon nanotubes can be exposed (expressed) on the surface in the next step.

  The resin layer La is a resin layer having conductivity and adhesiveness. The adhesiveness is for attaching the weakened matrix of the composite layer 12L to the resin layer La and removing it without dropping it together with the peeling of the resin layer La, and the conductivity is when peeling off. This is to prevent the resin layer La from being charged by static electricity generated in the substrate.

  The base resin constituting the resin layer La as a layer may be a polymer material having appropriate elasticity and rigidity at the time of peeling, for example, an acrylic or methacrylic acid resin.

The resin layer La is preferably formed by dispersing conductive particles in the base resin layer.
The conductive particles are conductive fine particles that can be dispersed in the base resin layer, and examples thereof include indium oxide, tin oxide, zinc oxide, and titanium oxide. Moreover, as a particle size of electroconductive particle, there exists an effect of this invention in 0.1-20 micrometers, and the highest effect was acquired in the range of 0.5-2 micrometers. Moreover, as content of the electroconductive particle in the coating material for forming resin layer La, the effect of this invention was effective at 0.5-20 wt%, and the highest effect was acquired at 5-10 wt%.

The resin layer La preferably contains a surfactant in the base resin layer.
This surfactant is added in advance to the coating material for forming the resin layer La and imparts conductivity to the base resin layer skeleton. For example, stearyltrimethylammonium chloride, sodium dodecylsulfate, dodecylbenzenesulfonic acid Examples thereof include organic sulfur salts such as sodium, and alkylammonium salts such as hexadecyltrimethylammonium bromide and cetyltrimethylammonium chloride. Further, the surfactant concentration in the coating material for forming the resin layer La was 0.01 to 10 wt%, and the effect of the present invention was obtained, and the highest effect was obtained from 0.1 to 2 wt%.

Moreover, it is preferable that the resin layer La has a conductive layer on the surface opposite to the surface in contact with the composite layer 12L of the base resin layer.
This conductive layer is a conductive metal foil, and examples thereof include Cu foil and Al foil. In addition, the conductive layer may be attached so as to cover the entire surface of the base resin layer. However, as the base resin layer La, a part of the surface of the base resin layer is exposed to the extent that conductivity can be imparted. You may make it attach.

  As a method of bringing the resin layer La into close contact with the surface of the composite layer 12L, a method of applying the paint containing the resin layer composition onto the composite layer 12L and then curing the paint (application method), or a film-shaped resin layer in advance There is a method (film pressing method) in which La is formed and the film is covered on the gate electrode 14 and pressed so as to be in close contact with the surface of the composite layer 12L.

Specifically, when the resin layer La contains conductive particles dispersed in the base resin layer and the base resin layer contains a surfactant, the coating method, the film adhesion You may make it closely_contact | adhere to the composite layer 12L surface by any method.
When the resin layer La has a conductive layer on the surface opposite to the surface in contact with the composite layer 12L of the base resin layer, the resin layer La may be brought into close contact with the surface of the composite layer 12L by the film contact method.

  Further, after the resin layer La is brought into close contact with the surface of the composite layer 12L, a treatment for curing the resin layer La may be performed in order to adjust the adhesive strength of the resin layer La to an appropriate value. Examples of the curing process include a process of irradiating the resin layer La with an electron beam or ultraviolet light, a process of heating, and the like, and may be selected according to the base resin material constituting the resin layer La. In addition, in the said coating method, it is good also as the hardening process which served as the hardening of a coating material.

  In addition, when cured by irradiating with ultraviolet rays or electron beams, the ultraviolet rays or electron beams can be transmitted through the base resin layer and contained in the resin layer La so as to obtain a sufficient antistatic effect. It is necessary to adjust the particle size and amount of the conductive particles to be formed, the thickness of the conductive layer formed on the back surface of the resin layer, and the coating form. Thereby, an antistatic effect can be effectively expressed and a highly uniform emission characteristic can be achieved.

(Sa) Thereafter, the matrix is removed from the surface of the etched composite layer 12L by peeling off the resin layer La, and the carbon nanotubes are uniformly and substantially vertically erected, and the carbon nanotubes are aligned. . At this time, since the resin layer La is not charged, fragments of the composite layer 12L composition (micro-electron source layer composition) do not fall on and adhere to the gate electrode 14.
As a result, the carbon nanotubes 12a are embedded in the conductive matrix 12b, and the one end of the carbon nanotubes 12a becomes the minute electron source layer 12 protruding from the matrix 12b (FIG. 3 (i)).

  In this way, an insulating substrate (for example, a glass substrate) 10 which becomes the base of the cathode panel 1 in the flat display device, the cathode electrode 11, the insulating layer 13 formed in order on the substrate 10 in a laminated state, A micro electron source device including a gate electrode 14, an opening (gate hole) 15 formed in the gate electrode 14 and the insulating layer 13, and a micro electron source layer 12 formed at the bottom of the opening 15 is provided. Complete.

Thereafter, the flat display device is assembled. Specifically, the anode panel 2 and the cathode panel 1 are disposed so that the phosphor layer 22 and the micro electron source device face each other, and the anode panel 2 and the cathode panel 1 (more specifically, the substrate 21 and the substrate 21). 10) are joined to each other at the peripheral edge via the frame 3. At the time of joining, frit glass is applied to the joining part of the frame 3 and the anode panel 2 and the joining part of the frame 3 and the cathode panel 1, and the anode panel 2, the cathode panel 1 and the frame 3 are bonded together. Then, after the frit glass is dried by preliminary baking, main baking is performed at about 450 ° C. for 10 to 30 minutes. Thereafter, the space surrounded by the anode panel 2, the cathode panel 1, the frame 3 and the frit glass is exhausted through the through hole and the tip tube, and when the pressure in the space reaches about 10 ⁻⁴ Pa, the tip tube is removed. Seal by heat melting. In this way, the space surrounded by the anode panel 2, the cathode panel 1, and the frame 3 can be evacuated. Thereafter, wiring with necessary external circuits is performed, and the flat display device shown in FIG. 4 is completed.

FIG. 4 is a sectional view showing an example of the panel structure of the flat display device according to the present invention.
As shown in FIG. 4, the cathode panel (cathode substrate) 1 and the anode panel (anode substrate) 2 are arranged to face each other with a predetermined gap therebetween, and the panels 1 and 2 are integrated by a frame 3. As a result, a single panel structure (display panel) for image display is constructed.

  A plurality of micro electron source devices of the present invention are formed on the cathode panel 1. A plurality of these micro electron source devices are formed in a two-dimensional matrix in the effective area of the cathode panel 1 (area that actually functions as a display portion).

  As shown in FIG. 5, the cathode electrode 11 is formed in stripes so as to form a plurality of cathode lines. The gate electrode 14 is formed in a stripe shape so as to form a plurality of gate lines intersecting (orthogonal) with each cathode line.

  On the other hand, the anode panel 2 includes a transparent substrate 21 serving as a base, a phosphor layer 22 and a black matrix 23 formed on the transparent substrate 21, and a transparent substrate 21 covering the phosphor layer 22 and the black matrix 23. And an anode electrode 24 formed thereon. The phosphor layer 22 includes a phosphor layer 22R for red light emission, a phosphor layer 22G for green light emission, and a phosphor layer 22B for blue light emission. The black matrix 23 is formed between the phosphor layers 22R, 22G, and 22B for emitting each color. The anode electrode 24 is formed in a laminated state over the entire effective area of the anode panel 2 so as to face the electron-emitting devices of the cathode panel 1.

  The cathode panel 1 and the anode panel 2 are joined to each other at the outer peripheral portion (peripheral portion) via the frame 3. In addition, a vacuum exhaust through-hole 16 is provided in the ineffective area of the cathode panel 1 (area outside the effective area and not actually functioning as a display portion). A tip tube 17 that is sealed after evacuation is connected to the through hole 16. However, since FIG. 4 shows the assembly completion state of the display device, the tip tube 17 has already been sealed. 4 and 5, the display of the pressure-resistant substrates (spacers) interposed in the gap portions between the panels 1 and 2 is omitted.

  In the display device having the panel structure configured as described above, a relative negative voltage is applied to the cathode electrode 11 from the cathode electrode control circuit 18, and a relative positive voltage is applied to the gate electrode 14 from the gate electrode control circuit 19. A positive voltage higher than that of the gate electrode 11 is applied to the anode electrode 24 from the anode electrode control circuit 20. In such a display device, when an image is actually displayed, for example, a scanning signal is input from the cathode electrode control circuit 18 to the cathode electrode 11 and a video signal is input from the gate electrode control circuit 19 to the gate electrode 14. Alternatively, a video signal is input from the cathode electrode control circuit 18 to the cathode electrode 11, and a scanning signal is input from the gate electrode control circuit 19 to the gate electrode 14.

  As a result, a voltage is applied between the cathode electrode 11 and the gate electrode 14, thereby concentrating the electric field on the sharpened portion of the minute electron source layer 12 (the tip portion of the carbon nanotube 12 a), thereby causing electrons by the quantum tunnel effect. Is released from the micro-electron source layer 12 into the vacuum through the energy barrier. The electrons thus emitted are attracted to the anode electrode 24, move to the anode panel 2 side, and collide with the phosphor layer 22 (22R, 22G, 22B) on the transparent substrate 21. As a result, the phosphor layer 22 is excited by the collision of electrons and emits light, so that a desired image can be displayed on the display panel by controlling the light emission position in units of pixels. At this time, since there is no fragment of the fine electron source layer composition on the gate electrode 14, an abnormal bright spot is not generated.

  Examples of the present invention are shown below. In addition, a present Example is an illustration and the scope of the present invention is not limited to this.

Example 1
A micro-electron source device was manufactured by the following procedure.
(S11) A Cr layer having a thickness of 0.2 μm was formed on the substrate 10 as the conductive film 11L for forming the cathode electrode (FIG. 1A).

(S12) Next, a carbon nanotube dispersion liquid having the following composition was applied to a desired region of the conductive film 11L.
(Carbon nanotube dispersion)
In / Sn (= 0.5 / 0.5 composition) alkoxide compound: 1 part by weight Double wall carbon nanotube: 1 part by weight Sodium benzenesulfonate: 1 part by weight Butyl acetate: remainder

(S13) After the carbon nanotube dispersion was applied, the composite layer 12L was formed by firing in air at 300 ° C. for 1 hour (FIG. 1B).

(S14) Next, after a resist material layer is formed on the entire surface of the composite layer 12L by spin coating, a mask layer having an exposed surface other than the region to be left in the composite layer 12L is exposed based on the lithography technique. Form. Next, the exposed composite layer 12L region was etched using HCl at an etching temperature of 10 to 60 ° C. and an etching time of 10 seconds to 30 minutes, and the composite layer 12L was processed into a stripe shape (FIG. 1C). .

(S15) Next, the conductive film 11L was etched by a known photolithography technique and reactive ion etching (RIE) to form a striped cathode electrode 11 (FIG. 1D).

(S16) On the substrate 10, an interlayer insulating film made of SiO _{2 having} a thickness of about 1 μm is formed by CVD using TEOS (tetraethoxysilane) as a source gas so as to cover the laminated portion of the cathode electrode 11 and the composite layer 12L. Then, a conductive film 14L for forming a gate electrode made of Cr having a film thickness of 0.2 μm was formed on the interlayer insulating film 13L by sputtering (FIG. 2E).

(S17) A resist mask layer is formed on the conductive film 14L, and a predetermined portion of the conductive film 14L is etched by reactive ion etching (RIE) using the resist mask layer, whereby the interlayer insulating film 13L is formed. A stripe-shaped gate electrode 14 was formed, and a first opening 15A penetrating through the gate electrode 14 was formed (FIG. 2F).

(S18) Next, the interlayer insulating film 13L is dry-reacted by reactive ion etching (RIE) through the first opening 15A of the gate electrode 14, and the second opening 15B is formed so that the composite layer 12L is exposed. As a result, an opening (gate hole) 15 composed of the first and second openings 15A and 15B was obtained (FIG. 2G).

(S19) Next, after weakening the matrix of the upper part of the composite layer 12L exposed at the bottom of the opening 15, the resin layer La having conductive and adhesive properties in the form of a film prepared in advance by the following procedure The composite layer 12L was brought into intimate contact with the surface of the composite layer 12L by applying pressure on the gate electrode 14 (FIG. 3 (h)).

<Preparation of resin layer La>
The following resin layer composition was uniformly mixed by a pole mill, and then the resin composition was applied to a thickness of 100 μm using a dip coater on a film in which a release agent containing fluorine was previously applied to the surface. Subsequently, benzene was removed from the coating film by a drying treatment held at 100 ° C. for 24 hours, and the film was removed from the release agent-coated film to obtain a film-shaped resin layer La.

(Resin layer composition 1)
・ Resin: Polymethacrylate (resin concentration 5wt%)
Methyl methacrylate modified polyurethane resin (resin concentration 15wt%)
・ Solvent: Benzene ・ Conductive particles: Indium oxide particles (0.5 μm diameter) Particle concentration: 5 wt%

  Subsequently, the resin layer La in close contact with the composite layer 12L was irradiated with ultraviolet rays (wavelength 365 nm, 900 mJ) to cure the resin layer La.

(S1a) Thereafter, the carbon nanotubes are aligned so that each carbon nanotube stands up vertically (raises) uniformly on the surface of the etched composite layer 12L by peeling off the resin layer La. The micro electron source layer 12 was formed (FIG. 3 (i)).

The obtained micro electron source device sample and the anode electrode coated with the phosphor were opposed to each other in a vacuum, and a high electric field of about 5 v / μm was applied, and about 100 1 μm squares set on the phosphor at this time were applied. The luminance was measured for the pixel region. Next, the average deviation of the luminance of each pixel was calculated by arithmetic averaging, and the luminance uniformity on the phosphor was evaluated as the electron emission uniformity.
As a result, no abnormal bright spot was observed, and the electron emission uniformity was 3%. In addition, the electron emission uniformity when the alignment treatment was performed with a conventional resin layer having no conductivity was 8%.

(Example 2)
In Example 1, the following process was performed instead of Step S19, and a sample of the micro electron source device was manufactured under the same conditions as in Example 1 except that, and evaluated in the same manner as in Example 1.

(S29) After weakening the matrix of the upper layer portion of the composite layer 12L exposed at the bottom of the opening 15, the resin composition 1 previously mixed uniformly by a pole mill is applied to the surface of the composite layer 12L with a thickness of 200 μm. The resin layer La was formed by drying at 100 ° C. for 24 hours (FIG. 3H). Subsequently, the resin layer La in close contact with the composite layer 12L was irradiated with ultraviolet rays (wavelength 365 nm, 900 mJ) to cure the resin layer La.

  As a result of evaluating the electron emission characteristics of the micro electron source device sample of this example, no abnormal bright spots were observed, and high electron emission uniformity was obtained.

(Example 3)
In Example 1, the following process was performed instead of Step S19, and a sample of the micro electron source device was manufactured under the same conditions as in Example 1 except that, and evaluated in the same manner as in Example 1.

(S39) After weakening the matrix of the upper layer portion of the composite layer 12L exposed at the bottom of the opening 15, the resin layer composition shown below mixed uniformly in advance by a pole mill is formed on the surface of the composite layer 12L with a thickness of 200 μm. The resin layer La was formed by applying and drying at 100 ° C. for 24 hours (FIG. 3H).

(Resin layer composition 2)
・ Resin: Polymethacrylate (resin concentration 20wt%)
・ Solvent: Benzene ・ Surfactant: Stearyltrimethylammonium chloride (surfactant concentration 1 wt%)

  As a result of evaluating the electron emission characteristics of the micro electron source device sample of this example, no abnormal bright spots were observed, and high electron emission uniformity was obtained.

Example 4
In Example 1, the following process was performed instead of Step S19, and a sample of the micro electron source device was manufactured under the same conditions as in Example 1 except that, and evaluated in the same manner as in Example 1.

(S49) After weakening the matrix of the upper layer portion of the composite layer 12L exposed at the bottom of the opening 15, a conductive layer is formed in the form of a conductive resin layer La having a film shape prepared in advance by the following procedure. The surface opposite to the surface was put on the gate electrode 14 and pressed to be brought into close contact with the surface of the composite layer 12L (FIG. 3H). Next, the resin layer La in close contact with the composite layer 12L was irradiated with ultraviolet rays to cure the resin layer La.

<Preparation of resin layer La>
A film made of an ultraviolet functional resin (acrylic or methacrylic acid resin composition) is used as a base resin layer, and a metal Cu foil having a thickness of 50 μm and a width of 0.5 mm is formed on the entire surface of one surface of the base resin layer at intervals of 1 mm. What was stuck and made into the conductive layer was obtained as resin layer La.

  As a result of evaluating the electron emission characteristics of the micro electron source device sample of this example, no abnormal bright spots were observed, and high electron emission uniformity was obtained.

It is a manufacturing-process figure (1) of the micro electron source device of this invention. It is a manufacturing process figure (2) of the micro electron source device of this invention. It is a manufacturing-process figure (3) of the micro electron source apparatus of this invention. It is sectional drawing which shows the structure of the flat type display apparatus which uses the micro electron source device of this invention. It is the schematic which shows the structure of the flat type display apparatus which uses the micro electron source device of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Cathode panel, 2 ... Anode panel, 10 ... Board | substrate, 11 ... Cathode electrode, 11L, 14L ... Conductive film, 12 ... Micro-electron source layer, 12L ... Composite Layer, 12a ... carbon nanotube, 12b ... matrix, 13 ... insulating layer, 13L ... interlayer insulating film, 14 ... gate electrode, 15 ... opening (gate hole), 15A .. 1st opening, 15B ... 2nd opening, 16 ... Through-hole, 17 ... Chip tube, 18 ... Cathode electrode control circuit, 19 ... Gate electrode control circuit, DESCRIPTION OF SYMBOLS 20 ... Anode electrode control circuit, 21 ... Transparent substrate, 22, 22R, 22G, 22B ... Phosphor layer, 23 ... Black matrix, 24 ... Anode electrode, La ... Resin layer

Claims (5)

A cathode electrode forming step of forming a cathode electrode on the support substrate;
Forming a composite layer in which a carbon material is embedded in a conductive matrix on the cathode electrode; and
A micro-electron source device comprising: a micro-electron source layer forming step of removing a part of the carbon material on the surface of the composite layer to remove the matrix from the upper layer portion of the composite layer to form a micro-electron source layer In the manufacturing method of
The micro electron source layer forming step includes a process of removing a matrix in an upper layer portion of the composite layer by bringing the resin layer having conductivity and adhesion into close contact with the composite layer and then peeling the resin layer. A method for manufacturing a micro-electron source device, comprising:   The method for manufacturing a micro electron source device according to claim 1, wherein the resin layer contains conductive particles in a base resin layer.   2. The method of manufacturing a micro electron source device according to claim 1, wherein the resin layer contains a surfactant in the base resin layer.   The method for manufacturing a micro electron source device according to claim 1, wherein the resin layer has a conductive layer on a surface opposite to a surface in contact with the composite layer of the base resin layer.   2. The method of manufacturing a micro electron source device according to claim 1, wherein the carbon material contains at least one of carbon nanotubes, single crystal graphite, polycrystalline graphite, and fullerene.

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