JP2006238367A - Demodulation timing generation circuit and demodulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a demodulation timing generation circuit which can accurately and exactly generate timing for demodulating received data even under various reception situations, and a demodulator using the circuit. <P>SOLUTION: The demodulation timing generation circuit comprises: an autocorrelation operation part S1 for performing autocorrelation operation for an inputted time signal; a cross-correlation operation part S2 for performing cross-correlation operation for an inputted time signal; and a synchronizing position decision part S3 which detects a timing synchronizing position using an autocorrelation operation result and an cross-correlation operation result from the autocorrelation operation unit and the cross-correlation operation unit and outputs a fast Fourier transform timing pulse. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a demodulation timing generation circuit and a demodulation device applied to a receiver or the like of a wireless communication system, and in particular, is modulated by, for example, an orthogonal frequency division multiplexing (OFDM) modulation scheme, The present invention relates to a demodulation timing generation circuit and a demodulation device applied to a wireless communication system or the like that receives a wireless signal to which a burst signal including a preamble signal is added at the beginning.

  In the OFDM modulation scheme, 2 n subcarriers orthogonal to each other on the frequency axis are obtained by performing inverse Fourier transform on 2 n power signal symbols that have undergone primary modulation (QPSK, 16ASAM, etc.). Is a modulation scheme.

  In a wireless communication system employing such an OFDM modulation scheme, the transmission side performs serial / parallel conversion of transmission data and performs inverse high-speed discrete Fourier transform (IFFT) to collectively modulate a large number of orthogonal subcarriers. .

  On the transmission side, a synchronization training signal called a preamble signal is added to the burst signal at the head of the modulated signal having the frame structure subjected to IFFT processing in this way, and transmitted. On the receiving side, automatic gain control (AGC), frequency offset correction, FFT (Fast Fourier Transform) timing generation, reference signal generation, and the like are performed using the preamble signal.

  In addition, based on the generated FFT timing, the FFT calculation of the preamble itself and the data part is performed.

  It is important to optimize the FFT timing in a receiving apparatus of a wireless communication system employing the OFDM modulation method. This is because a shift in FFT timing leads to intersymbol interference (ISI), resulting in degradation of reception performance.

  This FFT timing is set using a burst signal (training signal) called a preamble added to the head of the transmission data described above.

  As a conventional example, there is, for example, a method of performing a cross-correlation operation on a preamble of 16 samples of a preamble according to the IEEE 802.11a standard and obtaining a symbol timing synchronization position on the basis of the disappearance of the correlation pulse (for example, non-patent Reference 1).

  Similarly, frame detection is performed from the cross-correlation calculation for the 16-sample 10-times repeater of the preamble according to the IEEE 802.11a standard, the tail end of the preamble is detected from the loss of autocorrelation, and the end of the preamble is checked for confirmation. There is a technique that obtains a symbol timing synchronization position from the disappearance time by averaging the cross-correlation calculation results (for example, see Non-Patent Document 2).

  Furthermore, with respect to the IEEE802.11a standard, the BRAN standard, and the Wireless 1394 standard, autocorrelation is performed on the 16-sample repetitive part that is the first half of the preamble, and a rough symbol synchronization position is found and the 64-sample repetitive part that is the second half is detected. In some cases, a synchronization window is generated, and a 64-sample cross-correlation calculation is performed within the window to obtain a symbol synchronization position (see, for example, Patent Document 1).

  Problems to be solved by the present invention will be described based on the IEEE802.11a system format shown in FIG. In FIG. 16, the upper number is the number of samples in terms of 20 MHz.

  In the IEEE802.11a system, as shown in FIG. 16, the first half of the preamble (represented by B in FIG. 16) of 16 samples for frame detection, AGC adjustment, timing synchronization, and frequency synchronization, and the timing synchronization and frequency The latter half of the preamble (indicated by C in FIG. 16) for precise synchronization adjustment and transmission path estimation, and the data part.

  In the autocorrelation calculation, the correlation is obtained only from the received signal by using the repetition pattern of the signal itself. Expression (1) shows an example of autocorrelation expression.

Here, r (k) is a complex received signal sampled at time T _k = kT (T: sampling period, k = 0, 1, 2,...), And for this, 16 samples worth A value obtained by autocorrelation is expressed as A (k).

  FIG. 17 shows an expected value when there is no noise when 16-sample autocorrelation calculation is performed on the 802.11a format. In FIG. 17, as an autocorrelation calculation unit, a delay circuit S101 that delays an input signal by 16 stages, a complex delay circuit S102 that performs complex multiplication with an input complex time signal delayed by 16 stages, and a moving average of 16 stages are calculated. And a moving average value, that is, A (k) is calculated.

  When the autocorrelation calculation value A (k) is monitored, after 16 samples start to accumulate (from t1 in FIG. 17), the correlation starts to be established, and the correlation is obtained with all the outputs from the moving average calculation unit S103 (in FIG. 17). The correlation becomes maximum at t2) and shows a constant correlation until the end of the first half of the preamble (t3 in FIG. 17). In general, autocorrelation is resistant to reflection and fading and has the advantage of being able to be realized on a small scale in terms of circuit configuration, but on the characteristic that it also shows correlation with data and noise with periodicity other than preamble. There are drawbacks. As is clear from the characteristic of A (k) in FIG. 17, for example, the approximate preamble position (= FFT timing) can be specified by detecting a change in the slope of A (k). It is not suitable for high-precision timing synchronization at the level. In particular, in the case of low C / N, the timing error becomes large.

  On the other hand, the cross-correlation calculation is to obtain a correlation between a received signal and an expected value by holding a data string of a known signal in advance on the receiving side. Expression (2) shows an example of cross-correlation expression.

Here, r (k) is a complex time signal sampled at time t _k = kT (T: sampling period, k = 0, 1, 2,...). R (i) is time data of a known preamble B, and a value obtained by cross-correlating 16 samples is expressed as B (k).

  FIG. 18 shows an expected value when there is no noise in the case where the cross-correlation calculation with the preamble B is performed on the 802.11a format. In FIG. 18, the cross-correlation calculation unit includes cross-correlation calculation circuits S201 to S216 and a selector S217. The cross-correlation operation circuits S201 to S216 perform cross-correlation between 16-sample input signals and known 16-sample data. The selector S217 selects and outputs one of the inputs from the previous stage, and outputs B (n) from S201 to S216 in units of n, where n = 0, 1, 2,. The amplitude of the output of the selector S217 is output as a cross-correlation calculation value. Here, although the cross-correlation calculation unit describes parallel processing, serial processing may be performed at a processing speed 16 times the input signal speed using only S201.

  In this case, the cross-correlation hardly detects any correlation with noise or irrelevant data. On the other hand, a sharp correlation occurs only at the positions t1 to t10 in FIG. / Noise), there is an advantage that highly accurate name timing synchronization can be realized. However, when the reception waveform changes due to a large shift in reception frequency, reflection or fading, each peak at the positions t1 to t10 in FIG.

JP 2003-69546 A 1999 IEICE Communication Society B-5-61 2003 IEICE Communication Society B-5-168

  As described above, since autocorrelation and cross-correlation are affected by reflection on the transmission line, S / N, and the like, it is difficult to detect an accurate timing when used alone for generating the FFT timing. There was a problem of being.

  The present invention has been made in view of the above points, and a demodulation timing generation circuit capable of generating a timing for demodulating received data with high accuracy and accuracy even under various reception conditions, and a demodulation using the same An object is to provide an apparatus.

  To achieve the above object, a demodulation timing generation circuit according to the present invention includes an autocorrelation calculation unit that performs an autocorrelation operation on an input time signal, and a cross correlation operation that performs a crosscorrelation operation on the input time signal. A correlation calculation unit, and a synchronization position determination unit that detects a timing synchronization position using the autocorrelation calculation result and the cross-correlation calculation result from the autocorrelation calculation unit and the cross-correlation calculation unit, and outputs a fast Fourier transform timing pulse It is equipped with.

  According to the present invention, when the synchronization timing position is determined, the correlation data is used in combination with the autocorrelation calculation and the cross-correlation calculation, thereby demodulating the received data even under various reception conditions. Therefore, it is possible to generate the timing for accurately and accurately.

Embodiments of the present invention will be described below with reference to the drawings.
Embodiment 1 FIG.
FIG. 1 is a block diagram showing a basic configuration of a demodulation timing generation circuit and a demodulation device according to the present invention. When a wireless communication multicarrier transmission system is adopted and a synchronization timing position is determined, Correlation information obtained from a circuit using both autocorrelation calculation and cross-correlation calculation is used for a specific portion.

  As shown in FIG. 1, the demodulation timing generation circuit according to the present invention includes an autocorrelation calculation unit S1, a cross-correlation calculation unit S2, and a synchronization position determination unit S3. A timing generation circuit and an FFT (Fast Fourier Transform) unit S4 are provided.

  Here, the autocorrelation calculation unit S1 always performs autocorrelation calculation on the received signal, and includes a delay circuit S106, a complex multiplication circuit S102, and a moving average circuit S107 as shown in FIG.

  The autocorrelation calculating unit S1 in the present invention shown in FIG. 2 has a strong autocorrelation between data before and after 16 × N (N = 1 to 9) samples with respect to the preamble “B” when the received signal is IEEE802.11a. It has a characteristic, it performs complex multiplication on this, and 16-stage x M (M = 0 to 9) moving average (in the case of M = 9 in the figure), the amplitude and POWER are taken self Let it be a correlation function.

  Expression (3) shows the expression of autocorrelation in the case of FIG.

  Further, the cross-correlation calculation unit S2 always performs cross-correlation calculation at the time signal stage. As shown in FIG. 3, a basic unit having a format as shown in FIG. 18 (16 samples in the case of IEEE 802.11a) is used. It comprises cross-correlation operation circuits S201 to S216 and a selector S217 that perform cross-correlation calculation as a known pattern, and a moving average circuit S219 that averages the results.

  The cross-correlation calculation unit S2 in the present invention shown in FIG. 3 performs a moving average of 16-stage delay × L (L = 0 to 9) on the cross-correlation calculation result when the format is IEEE802.11a ( In the figure, when L = 9), the amplitude and POWER are taken as the cross-correlation function.

  Expression (4) shows the expression of cross-correlation in the case of FIG.

  Furthermore, the synchronization position determination unit S3 performs timing synchronization position detection using the autocorrelation calculation result and the cross-correlation calculation result, and provides an FFT timing pulse to the FFT unit S4. The FFT unit S4 performs an FFT operation on the input time signal with the FFT timing pulse from the synchronization position determination unit S3, and converts the time signal into a frequency signal.

  An example of the synchronization position determination unit S3 is shown in FIG. As shown in FIG. 4, the synchronization position determination unit S3 includes a correlation function calculation unit S5 and a maximum value detection unit S6.

  The correlation function calculation unit S5 performs calculation using both the autocorrelation function and the cross correlation function, for example, multiplication of the autocorrelation function value and the cross correlation function value.

  The maximum value detector S6 detects the maximum FFT timing synchronization position based on a comparison between the correlation function value from the correlation function calculator S5 and a predetermined value, and outputs an FFT timing pulse. When the correlation value exceeds the value held inside, an FFT timing pulse is output, and the value held inside is overwritten with the input value. At the end or start of a frame, the internal hold value is given from the outside or reset to the correlation initial value set inside, so that the FFT timing position can be detected for each frame according to the environment. It becomes possible.

The operation of the synchronization position determination unit S3 will be described with reference to FIG. In FIG. 5, the initial value a ₀ is first set in the internally held data. When a frame is input, the correlation calculation value of FIG. 5 is input from the correlation function calculation unit S5. Maximum value detecting section S6, at time t1, since the correlation calculation value input is greater than the initial value a _0, and outputs the FFT timing pulses internal holding data and updates from a ₀ to a _1. Further, at time t2, the correlation operation value to be inputted to become larger than the internal holding value a _1, and outputs the FFT timing pulses internal holding data and updates from a ₁ to a _2. By initializing the internal hold value at the end of frame (time t3) or at the start, preparation for FFT timing synchronization of the next frame is performed. Note that the end of the frame may be detected, for example, as the timing when the carrier sense falls.

  Therefore, according to the first embodiment, when adopting the multi-carrier transmission system for wireless communication and determining the synchronization timing position, by using the correlation information together with the autocorrelation calculation and the cross-correlation calculation, Compared with a timing synchronization circuit that has been conventionally performed only by autocorrelation, it is possible to generate FFT timing pulses at high speed and with high accuracy. In addition, it is possible to generate FFT timing pulses with higher accuracy in a fading environment or an environment with poor frequency synchronization than in a timing synchronization circuit that has been performed only by cross-correlation calculation.

Embodiment 2. FIG.
FIG. 6 is a block diagram showing a synchronization position determination unit S3 according to Embodiment 2 of the present invention. The synchronization position determination unit S3 according to the second embodiment shown in FIG. 6 includes a correlation function calculation unit S5 that creates a correlation function from the autocorrelation function and the cross-correlation function, as in the first embodiment shown in FIG. In addition, a fitting circuit unit S7 is provided instead of the maximum value detecting unit S6 of the first embodiment shown in FIG.

  The fitting circuit unit S7 generates the FFT timing pulse in a form that most closely matches the expected value of the shape of the correlation information using not only the current information of the correlation information but also the future and past information. As an application example of the second embodiment, for example, when an approximate shape of an expected correlation function has a left-right symmetrical convex function shape in the vicinity of an expected timing synchronization position, and when its TOP is obtained, For example, a least square FITTING circuit such as a quadratic function is used.

Equation (5) is a quadratic function indicating the correlation function in the vicinity of TOP using appropriate variables a ₀ and a ₁ , C (k) and ε (k) are errors, and k ₀ is the synchronization to be obtained. Position.

  The synchronization position you want to find is

K ₀ is determined so as to satisfy the following equation.

  In addition, as shown in FIG. 7, it is known in advance that the external shape of the correlation function is trapezoidal, and the shape on the pulse can be obtained in 16 cycles. When finding the final maximum value, the correlation function is expressed as C If (k), for example, D (k) is newly provided as shown in Equation (7).

  By setting b0 = b1 = b2 = 1, b3 = −0.5, b4 = −1 and setting the position where D (k) is maximum as the FFT timing synchronization position, simple maximum value detection It is possible to obtain an appropriate FFT timing synchronization position even if the shape cannot be obtained by the part.

  Therefore, according to the second embodiment, it is possible to generate the FFT timing pulse with high accuracy even when a part of the input signal is low in reliability due to AGC processing or the like.

Embodiment 3 FIG.
The example which concerns on this Embodiment 3 is shown. FIG. 8 shows the relationship between the delay time of incoming waves and the level in a general multipath environment. FIG. 8 shows six multipaths (P0 to P5). In this case, one pulse-like correlation value obtained by the cross-correlation operation unit S2 as shown in FIG. 3 causes the number of incoming multipaths to split.

  As shown in FIG. 8, when the delayed wave P1 is larger than the incoming preceding wave P0, the simple maximum value detection unit S6 performs timing synchronization together with the delayed wave P1. In OFDM, a guard interval is copied and provided before FFT so as not to be subjected to interference in a multipath environment. This is to absorb deterioration due to a delayed wave. In the above case, the preceding wave P0 is intersymbol interference. It becomes ISI.

Therefore, the third embodiment solves this problem.
FIG. 9 is a block diagram showing a synchronization position determination unit S3 according to Embodiment 3 of the present invention. The synchronization position determination unit S3 according to the third embodiment shown in FIG. 9 further includes a delay profile inspection unit S8 as compared with the configuration of the first embodiment shown in FIG.

  In FIG. 9, the delay profile inspection unit S8 receives the maximum value detection pulse (in this case, a temporary FFT timing synchronization position pulse) obtained from the first and second embodiments and obtains a delay profile as shown in FIG. A preceding wave P0 arriving before the delayed wave P1 indicating the maximum value is detected and output as a synchronization position.

  In order to give the relationship between the maximum value and the preceding wave (for example, it is recognized that the leading wave is 1/2 or more of the maximum value and up to 4 samples before), the delay profile constant is given from the outside, the internal The initial value of can be used.

  Therefore, according to the third embodiment, it is possible to generate an FFT timing pulse with high accuracy without causing characteristic degradation even in an environment where a delayed wave stronger than the preceding wave arrives in a multipath environment. Is possible.

Embodiment 4 FIG.
10 is a block diagram showing a demodulation timing generation circuit and a demodulation device according to Embodiment 4 of the present invention. In the fourth embodiment shown in FIG. 10, the timing synchronization unit S13 corresponds to the demodulation timing generation circuit of the first to third embodiments, and performs automatic gain control for amplitude with respect to the time signal input to the timing synchronization unit S13. Control means is further provided.

  Here, as the automatic gain control means, an amplifier (AMP) S9, an A / D conversion unit S10 for outputting a digital time signal obtained by analog-digital conversion of an analog time signal from the amplifier S9 to the FFT unit S4, an A / D conversion unit The amplitude adjustment unit S11 that adjusts the amplitude of the digital time signal from S10 and outputs the amplitude-corrected digital time signal to the timing synchronization unit S13, the digital time signal from the A / D conversion unit S10, and the timing synchronization unit S13 Until the AGC stop signal is output, an AGC (Automatic Gain Control) unit S12 that outputs AMP control information to the amplifier S9 is provided.

  Generally, when receiving frames from a plurality of users as in a wireless LAN, AGC processing is performed so that an appropriate reception level is obtained at the beginning of the frame. Since the AGC process is amplitude control, it is inconvenient when information is put on the amplitude of QAM or the like. Therefore, the AGC process is performed in the preamble part, and the AGC control is stopped after the data part. In the configuration shown in FIG. 10, the frame is detected by the timing synchronization unit S13 and an AGC stop signal is output.

  The AMPS 9 amplifies and decreases the received signal. The A / D conversion unit S10 converts an analog signal into a digital signal. The amplitude adjusting unit S11 adjusts the amplitude of the input signal. For example, a configuration in which only the phase of the input signal is output, an amplitude average value for a certain period is obtained, and a value divided by the value is output.

  The AGC unit S12 performs, for example, a moving average on the input signal after A / D, determines the magnitude of the expected value, and notifies the information to the AMPS 9 before A / D conversion, thereby obtaining a desired value. To create a level of.

  The timing synchronization unit S13 has the contents described in the first to third embodiments, and also functions to stop the AGC operation by detecting a frame from preamble information or the like.

  During the AGC process, the amplitude is not reliable, and the AMP is adjusted to the noise level in the initial stage, that is, the input signal is increased, so the amplitude is very high in the first half of the frame. Shows a large value. Therefore, if the input signal is used as it is, there is a possibility that an incorrect correlation value may be obtained when the correlation value is inappropriately increased due to the large amplitude or when the input signal is saturated at A / D. . Therefore, a circuit for adjusting the amplitude without using the input signal as it is is provided in the previous stage of the timing synchronization unit S13.

  Therefore, according to the fourth embodiment, it is possible to generate the FFT timing pulse with high accuracy even when the reliability of a part of the signal is low by AGC control or the like.

Embodiment 5. FIG.
FIG. 11 explains the fifth embodiment of the present invention and is a diagram showing the FFT timing detection probability at the time of low S / N. In each of the above-described embodiments, since autocorrelation and cross-correlation are used, there is a possibility that the pattern before and after the expected value is erroneously detected reflecting the pattern of the cross-correlation value. When a 1-bit cross-correlation operation circuit is configured by computer simulation, FFT timing is obtained 16 samples before the original expected value position as shown in FIG. 11 in the case of S / N = 0 dB in the AWGN environment. If the probability is FFT timing detection probability 0, the expected value is FFT timing detection probability 1, and 16 samples after the expected value is FFT timing detection probability 2, detection probability 1 is 99%, detection probability 0 and detection probability 2 are The result of addition was 1%.

  FIG. 12 is a block diagram showing a configuration of a demodulation timing generation circuit and a demodulation device according to Embodiment 5 of the present invention that generates an FFT timing pulse with high accuracy even at low S / N in view of the above points. . In FIG. 12, S13 is a timing synchronization unit similar to that of the fourth embodiment shown in FIG. 10, corresponds to the demodulation timing generation circuit of the first to third embodiments, and is output from this timing synchronization unit S13. The system further includes a precision timing synchronization unit S14 that generates a fast Fourier transform timing pulse by performing one or both of autocorrelation calculation and cross-correlation calculation on the time signal using the conversion timing pulse as a temporary timing pulse. The FFT timing pulse from the unit S14 is supplied to the FFT unit S4.

  As shown in FIG. 12, when the S / N is very low as described above, there is a possibility of erroneous detection. Therefore, the calculation result obtained by the timing synchronization unit S13 is precisely used as an FFT temporary timing pulse. In the timing synchronization unit S14, further confirmation work is performed using another characteristic portion of the frame. For example, in the case of the IEEE802.11a system format, a subsequent C pattern position and a predicted position are provisionally determined, and a C pattern and a cross-correlation matching determination are performed only at three positions including 16 sample positions before and after that position. Conceivable.

  Therefore, according to the fifth embodiment, it is possible to generate an FFT timing pulse with high accuracy at low S / N. In addition, by using the pattern, it is possible to reduce the number of arithmetic circuits and to configure a small-scale and highly accurate timing synchronization circuit.

Embodiment 6 FIG.
Next, the sixth embodiment shows a case where the demodulation device including the demodulation timing generation circuit according to the first to fifth embodiments described above is operated in a plurality of systems having different frame formats. For example, consider a case where a fictitious system A having a system A format as shown in FIG. 13 similar to IEEE802.11a is demodulated together.

  FIG. 14 is a diagram showing a configuration of a main part of a demodulation timing generation circuit according to Embodiment 6 of the present invention. The difference between the sixth embodiment shown in FIG. 14 and the first to fifth embodiments is that, for example, as shown in FIG. 4, FIG. 6, and FIG. A correlation function calculation unit S15, S16, and a system determination unit S17 for determining a system suitable for the frame format based on the correlation function calculation result and outputting the determination result and the calculation result of the correlation function. The timing synchronization position corresponding to the determined system is detected and demodulation processing is performed.

  FIG. 15 shows a state in which there are two different systems A and B, and the frames of system B are received as a result of obtaining correlation information. The system A correlation function calculation unit S15 obtains the correlation function A on the assumption that the frame of the system A is received. This is the one described in the first to fifth embodiments. Further, the system B correlation function calculation unit S16 obtains the correlation function B on the assumption that the system B frame is received. Similarly, it is a thing of 1st-Embodiment 5.

  The system determination circuit S17 determines which system's frame is received while monitoring both pieces of correlation information. As an example of the sixth embodiment, a case of an IEEE 802.11a system (FIG. 1) and a fictitious system A (FIG. 13) is shown.

  The autocorrelation function calculation unit S18 delays 16 samples of the IEEE802.11a system. This case is an example in which a common correlation function calculation unit can be used. Let's examine the specific effect on the assumption that the reference oscillator on the transmission side has a deviation of 20 ppm (faster) on the receiving side (hereinafter, the following values are used as parameters).

・ Carrier frequency = 5.2 GHz (= f _c )
・ Sampling frequency = 20 MHz (= f _S )
When there is a deviation of 20 ppm (= ρ etc.) in the carrier frequency, the phase rotation amount Δω ₈₀₂ per 16 samples is

It becomes. The phase rotation amount Δω _A obtained in the case of the fictitious system A (FIG. 16) is

It becomes. As for the amount of phase rotation, if the x-axis component obtained by autocorrelation is X and the y-axis component is Y,

Therefore, the condition that the phase rotation amount is 0 ° or more and ± 90 ° or less is X ≧ 0, and the condition that the phase rotation amount is ± 90 ° or more and ± 180 ° or less is X <0. That is, in this case, the system can be determined only by the sign of the X-axis component of the correlation value.

  In this case, the system determination circuit S19 is a simple X-axis code determination of the correlation signal. (If the X-axis component is positive, it is the IEEE 802.11a system, and if it is negative, it is the system A.)

  Therefore, according to the sixth embodiment, it is possible to configure a demodulation device that can receive a plurality of systems without making a receiver corresponding to each of the plurality of systems.

1 is a block diagram showing a basic configuration of a demodulation timing generation circuit and a demodulation device according to the present invention. It is a figure explaining the structure and calculation content of the autocorrelation calculating part S1 which concern on Embodiment 1 of this invention. It is a figure explaining the structure and calculation content of the cross correlation calculation part S2 which concern on Embodiment 1 of this invention. It is a block diagram which shows the structure of the synchronous position determination part S3 which concerns on Embodiment 1 of this invention. It is a figure explaining operation | movement of the synchronous position determination part S3 which concerns on Embodiment 1 of this invention. It is a block diagram which shows the structure of the synchronous position determination part S3 which concerns on Embodiment 2 of this invention. It is a figure explaining operation | movement of the synchronous position determination part S3 which concerns on Embodiment 2 of this invention. FIG. 10 is a diagram for explaining the third embodiment of the present invention and is a diagram illustrating a relationship (delay profile) between a delay time and a level of an incoming wave in a general multipath environment. It is a block diagram which shows the structure of the synchronous position determination part S3 which concerns on Embodiment 3 of this invention. It is a block diagram which shows the demodulation timing generation circuit and demodulator which concern on Embodiment 4 of this invention. Embodiment 5 of the present invention will be described, and is a diagram illustrating an FFT timing detection probability at low S / N. It is a block diagram which shows the structure of the demodulation timing generation circuit and demodulator which concern on Embodiment 5 of this invention. It demonstrates the demodulation process in Embodiment 6 of this invention, and is explanatory drawing of the system A format similar to IEEE802.11a. It is a figure which shows the structure of the principal part of the demodulation timing generation circuit based on Embodiment 6 of this invention. FIG. 10 is a diagram for explaining a demodulation timing generation circuit according to a sixth embodiment of the present invention, and shows a state in which two different systems A and B exist and the correlation information is obtained and the system B frame is received. It is. It is explanatory drawing of the frame format containing the preamble of an IEEE802.11a system. It is a figure which shows the 16 sample autocorrelation calculation result to IEEE802.11a. It is a figure which shows the 16 sample cross correlation calculation result to IEEE802.11a.

Explanation of symbols

  S1 autocorrelation calculation unit, S2 cross-correlation calculation unit, S3 synchronization position determination unit, S4 FFT unit, S5 correlation function calculation unit, S6 maximum value detection unit, S7 fitting circuit unit, S8 delay profile inspection unit, S11 amplitude adjustment unit, S13 Timing synchronization unit, S14 Precision timing synchronization unit, S15, S16 Correlation function calculation unit, S17 System determination unit.

Claims (8)

An autocorrelation calculation unit that performs autocorrelation calculation on an input time signal;
A cross-correlation calculation unit that performs a cross-correlation calculation on an input time signal;
A demodulation unit comprising: a synchronization position determination unit that detects a timing synchronization position using the autocorrelation calculation result and the crosscorrelation calculation result from the autocorrelation calculation unit and the crosscorrelation calculation unit, and outputs a fast Fourier transform timing pulse; Timing generation circuit. The demodulation timing generation circuit according to claim 1,
The synchronization position determination unit includes a correlation function calculation unit that obtains a correlation function by multiplying the autocorrelation calculation result from the autocorrelation calculation unit and the cross-correlation calculation unit by the cross-correlation calculation result, and the correlation function calculation unit. And a maximum value detector for detecting a fast Fourier transform timing synchronization position that is maximized based on a comparison between a correlation function value and a predetermined value, and outputting a fast Fourier transform timing pulse. Generation circuit. The demodulation timing generation circuit according to claim 1,
The synchronization position determination unit includes a correlation function calculation unit that obtains a correlation function by multiplying the autocorrelation calculation result from the autocorrelation calculation unit and the cross-correlation calculation unit by the cross-correlation calculation result, and the correlation function calculation unit. And a fitting circuit unit that detects a fast Fourier transform timing synchronization position using a least square fitting circuit unit based on a quadratic function and outputs a fast Fourier transform timing pulse. Timing generation circuit. The demodulation timing generation circuit according to claim 2,
The synchronization position determination unit obtains a delay profile based on the output from the maximum value detection unit and detects a fast Fourier transform timing synchronization position by detecting a preceding wave that arrives before the delay wave indicating the maximum value. And a delay profile check circuit that outputs the result as a fast Fourier transform timing pulse. In the demodulation timing generation circuit according to any one of claims 1 to 4,
A demodulation timing generation circuit, further comprising automatic gain control means for performing amplitude correction control on an input time signal.   The fast Fourier transform timing pulse output from the demodulation timing generation circuit according to any one of claims 1 to 4 is used as a temporary timing pulse, and one or both of autocorrelation calculation and cross-correlation calculation are further performed on a time signal. A demodulation timing generation circuit, further comprising a timing synchronization unit that generates a fast Fourier transform timing pulse by performing The demodulation timing generation circuit according to any one of claims 2 to 4,
A plurality of the correlation function calculation units are provided corresponding to different frame formats,
A system determination unit that determines a system that conforms to the frame format based on the correlation function calculation results from a plurality of correlation function calculation units, and further outputs a determination result and a correlation function calculation result,
A demodulation timing generation circuit, characterized by detecting a timing synchronization position corresponding to the determined system.   A fast Fourier transform operation is performed on a time signal input based on the fast Fourier transform timing pulse from the synchronization position determination unit according to any one of claims 1 to 7, and the signal is converted into a frequency signal and output. A demodulator further comprising a fast Fourier transform unit.

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