JP2006227442A - Video signal processor and video display device equipped therewith - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To display a high-grade image without the occurrence of degradation in image quality due to scaling in a horizontal direction even with any combination of a video source to be input and the resolution of a display device. <P>SOLUTION: A video signal processing circuit successively samples the signal at every one horizontal period of the input video signal and converts the signal to a digital video signal in an A/D converter 11. By using a PLL circuit 18, the sampling frequency meeting the horizontal resolution of the video display device (LCD 16) is applied to the A/D converter 11. The sampling frequency optimum for the digital conversion of the inputted video signal, i.e., the sampling frequency corresponding to the horizontal resolution of the LCD 16 is applied to the A/D converter 11, and therefore, the compressing and enlarging of the information included in the original video signal like heretofore are not required and the degradation in the resolution during the course of the processing does not occur. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a video signal processing device and a video display device including the device, and more specifically, when a high-resolution signal source is displayed on a low-resolution display device, a high resolution of the display screen is realized. The present invention relates to a display signal processing apparatus capable of performing the above.

  In order to display a video source, a video display device using a dot matrix type display panel such as a liquid crystal panel or a plasma panel is known. For such a video display device, a display panel according to the display standard of a personal computer is usually used. Examples of such a display panel include a 4: 3 type VGA (640 dots × 480 dots) display panel having an aspect ratio of 4: 3 pixels, and a 4: 3 type XGA (1024 dots × 768 dots) display panel. In addition, panels with various numbers of pixels are provided. For example, a W-VGA display panel has a number of pixels of 854 dots × 480 dots.

  As a 16: 9 type display panel (high definition panel) suitable for high-definition video signals, a 16: 9 type W-XGA display panel with horizontal resolution x vertical resolution of 1,366 x 768 is also available on the market. ing. In addition, among the high-definition panels, a full-spec high-definition panel with horizontal resolution x vertical resolution of 1,920 x 1,080 is also distributed so that the high-definition signal format (1080i) of digital broadcasting can be expressed as it is. I'm starting.

  On the other hand, in the format of the video source, NTSC video signal 525i, 525p and the like are defined as standard systems, and HDTV video signal 1125i and the like are also defined. 525i (480i) is an interlace signal having 525 scanning lines and 480 effective scanning lines, and 525p (480p) is a progressive signal having 525 scanning lines and 480 effective scanning lines. 1125i (1080i) is an interlace signal having 1125 scanning lines and 1080 effective scanning lines, and is a kind of high-definition video signal together with 1125p (1080p) and 750p (720p).

  In a video signal processing apparatus that performs signal processing on a video source as described above and displays it on a display device, usually, a signal for each horizontal period of the input video signal is sequentially sampled at a predetermined sampling frequency and converted into a digital video signal. A / D converter that performs a well-known scaling process on the digital data output from the A / D converter and outputs a video signal that matches the horizontal / vertical resolution of the display device. The video signal is input to the display device and displayed.

The sampling frequency of the video signal in the A / D converter is determined in advance by the standard according to the input source.
For example, the number of samples in the horizontal direction is 2220 in the case of interlace and progressive with a frame frequency of 30 Hz. The number of samples in the horizontal direction is usually expressed as 1920 × 1080 which is the number of effective samples (number of effective pixels). At this time, the sampling frequency at which the effective sample number 1920 is obtained is 74.25 MHz. In addition, sampling frequencies are determined according to various video sources.

For example, when a high-definition video signal having an effective scanning line of 1080i is displayed on the W-VGA of 854 × 480 dots or the VGA display panel of 640 × 480 dots, the horizontal effective sample is sampled by the A / D converter. Since the number of horizontal dots on the display screen is significantly smaller than the number, horizontal scaling is performed after sampling to compress and convert horizontal sampling data in accordance with the resolution of the display screen.
Alternatively, when the number of horizontal dots on the display screen is larger than the number of horizontal effective samples sampled from the input video signal, scaling that expands in the horizontal direction after sampling is performed.

In the conventional video signal processing apparatus, the sampling frequency in the A / D converter is basically determined according to the video source to be input. For example, if the video signal is 1080i or 720p, the sampling frequency is In the case of a video signal of 74.25 MHz and 480p, the sampling frequency is 27 MHz.
In the A / D converter, regardless of the display panel standard, the sampling frequency input video signal is sampled and output, and the video signal conversion unit performs a scaling process in accordance with the display panel standard. The video signal can be displayed on the display panel.

  However, when displaying an analog video signal on the dot matrix type display panel as described above, for example, in the case of a combination in which the horizontal sampling number in the A / D converter and the horizontal resolution in the display panel are different, A In the video conversion processing after / D conversion, there is a problem that scaling by horizontal enlargement or compression (including thinning out) is always performed, and the quality of the displayed video is deteriorated. That is, scaling the data sampled by the A / D converter inevitably deteriorates the image quality at least as compared with the original image, regardless of whether the data is compressed or expanded.

For example, in Patent Document 1, in order to convert a video signal of an arbitrary transmission method to be applied to a display device of an arbitrary screen method, the video signal is converted using a sampling frequency determined according to the transmission method of the video signal. The number of pixels between the horizontal lines and the number of pixels between the vertical lines of the video signal using the horizontal expansion rate and vertical expansion rate determined individually according to the screen format of the display device and the video signal transmission method after digital conversion There is disclosed a video signal processing apparatus which converts the above.
JP 2004-355013 A

  As described above, in the past, it was common sense to perform sampling at a specified sampling frequency for each video source. Therefore, when the horizontal sampling number and the horizontal resolution of the dot matrix display device are different, A It was necessary to perform horizontal scaling after sampling in the / D converter, which caused image degradation. The problem of such image degradation is that, for example, when a high-definition 1080i signal having an effective pixel count of 1920 × 1080 is displayed on a W-VGA or VGA display panel, it is sampled by an A / D converter. Since the number of horizontal dots on the display screen is significantly smaller than the number of horizontal effective samples, there is a problem that the image quality deterioration is particularly large.

  In the technique of Patent Document 1 described above, a horizontal enlargement circuit is provided after the A / D converter, and the digital video signal sampled by the A / D converter is subjected to enlargement processing in the horizontal direction. Such a problem was not solved.

  The present invention has been made in view of the above circumstances, and no matter what the combination of the input video source and the resolution of the display device, the image quality deterioration due to horizontal scaling does not occur. It is an object of the present invention to provide a video signal processing device capable of displaying a high-quality image and a video display device including the video signal processing device.

  In order to solve the above problems, the first technical means includes an A / D converter that sequentially samples a signal for each horizontal period of an input video signal and converts the signal into a digital video signal, and an A / D converter. In the video signal processing apparatus having sampling frequency setting means for setting the sampling frequency for sampling in the A / D converter, the sampling frequency setting means is a dot matrix type display device for displaying a digital video signal. According to the horizontal resolution, the sampling frequency is set so that the number of samples does not require the horizontal scaling of the digital data.

  According to a second technical means, in the first technical means, the video signal processing apparatus includes a PLL circuit as a sampling frequency setting means and a control means for setting a frequency division ratio of the PLL circuit. Determines the sampling frequency to be set in the A / D converter from the horizontal resolution of the display device, and determines the division ratio based on the determined sampling frequency and the clock frequency of the horizontal period of the input video signal. The determined frequency dividing ratio is set in the PLL circuit, and the PLL circuit inputs the clock frequency of the horizontal period of the video signal as a reference frequency, and divides the clock frequency by the set frequency dividing ratio to obtain A / The sampling frequency to be set in the D converter is output, and the A / D converter samples the video signal according to the sampling frequency output from the PLL circuit. It is obtained by and performing.

  The third technical means has storage means for storing information on a frequency division ratio determined by the video signal processing device based on the type of the video signal and the resolution of the display device in the second technical means, The control device acquires information relating to the type of video signal and the resolution of the display device, reads a frequency division ratio corresponding to the acquired information from the storage unit, and sets the read frequency division ratio in the PLL circuit. It is characterized by.

  According to a fourth technical means, in the second or third technical means, the video signal processing apparatus has a video signal determining means for determining the type of the input video signal, and the control means is determined by the video signal determining means. The frequency division ratio is automatically determined by using the type information of the video signal.

  According to a fifth technical means, in the fourth technical means, the video signal determining means determines the type of the video signal by using the format control information included in the component video signal input from the D terminal. It is a thing.

  According to a sixth technical means, in the fourth technical means, the video signal processing circuit includes a synchronization separation circuit that separates a horizontal synchronization signal and a vertical synchronization signal of the video signal, and the video signal determination means is a synchronization separation circuit. The type of video information is determined from the separated horizontal synchronizing signal and vertical synchronizing signal.

  In a seventh technical means, in the fourth technical means, the video signal determining means determines the type of the video information based on the identification information of the video signal written in the vertical blanking period in the input video signal. It is a feature.

  According to an eighth technical means, in any one of the fourth to seventh technical means, the control means obtains display mode information by an auto-wide function for switching a display screen size of the video signal, and is judged by the video signal judgment means. The frequency division ratio is determined for each mode based on the type information of the video signal thus obtained and the acquired display mode information.

  A ninth technical means is a video display device having a video signal processing circuit according to any one of the first to eighth technical means, wherein the video display device is digital video data sampled by an A / D converter. The image quality adjusting unit for adjusting the image quality of the image and the display device for displaying the digital video data adjusted by the image quality adjusting unit.

  According to the present invention, it is possible to display a high-quality image without causing image quality degradation due to horizontal scaling regardless of the combination of the input video source and the resolution of the display device. A video signal processing apparatus can be provided.

When a video signal processing apparatus according to the present invention displays an input video signal on a dot matrix type display panel, the sampling frequency of the video signal is optimized and displayed on the display panel without performing horizontal scaling. Thus, it is possible to display a high-quality image.
This video signal processing apparatus can be incorporated into, for example, a television receiver, various recorders, various tuner devices, a personal computer (PC), and the like. As the display panel, a dot matrix type display device such as a liquid crystal panel or a plasma panel can be applied.
The video signal is a video signal output device such as a tuner unit that receives digital broadcasting or analog broadcasting, or an input terminal (D terminal, pin jack, etc.) for inputting a video signal from the outside in a device incorporating this video signal processing device. It is input from.

The video signal processing apparatus according to the present invention includes an A / D converter that performs A / D conversion while sampling an input video signal, and a video signal that performs conversion processing of digital data output from the A / D converter. A conversion unit is provided.
The video signal conversion unit normally performs I / P conversion processing and horizontal / vertical scaling. In the present invention, the horizontal sampling frequency is optimized by the A / D converter as described above. There is no need to perform scaling, and image quality degradation in the horizontal direction does not occur. Here, processing such as vertical scaling, overscan, and I / P conversion is performed as necessary from the relationship between the resolution of the display screen and the format of the video signal. The video signal converter is provided with a vertical scaler, a frame memory for holding the video signal, a line memory, and the like.

  The video signal converted by the video signal conversion unit is subjected to image quality adjustment by image quality enhancement correction processing, γ correction processing, and the like, is output to a panel I / F such as a display panel controller, and is displayed on a target display panel.

  The main feature of the video signal processing apparatus according to the present invention is that a PLL circuit is used to provide a sampling frequency corresponding to the horizontal resolution of the video display apparatus to the A / D converter. Here, an A / D converter that samples a video signal and converts it to a digital signal is given a sampling frequency optimum for digital conversion of the input video signal, that is, a sampling frequency corresponding to the horizontal resolution in the display device. Therefore, the information contained in the original video signal is not compressed or expanded as in the conventional case, and the resolution is not lowered in the process.

  Furthermore, in another embodiment of the present invention, a frequency division ratio corresponding to the resolution of the display panel is set in the PLL circuit by determining the type (video format) of the video signal based on the input video signal. Thus, the input video signal can be sampled at an optimum sampling frequency.

  FIG. 1 is a block diagram showing a configuration example of a liquid crystal display device to which a video signal processing apparatus according to the present invention is applied. The liquid crystal display device performs an A / D converter 11 that converts an input analog video signal into a digital signal, a video signal conversion memory 13 used for video signal conversion processing, and video signal conversion processing such as scaling and IP conversion. A video signal conversion unit 12 to be performed, an image quality adjustment unit 14 that performs image quality adjustment by image quality enhancement correction processing, γ correction processing, and the like; an LCD I / F 15 that includes a liquid crystal controller that controls an LCD (liquid crystal panel); LCD 16 controlled by the above. The OSD mixing process may be performed before and after the image quality adjustment unit 14.

  The liquid crystal display device is configured to be capable of inputting a plurality of video sources. Here, the component video signal a and the video signal b from the D terminal can be input. The video signal b is, for example, a video signal output from a digital tuner unit or a DVD player, and corresponds to a signal input from a composite video terminal, a separate video terminal (S terminal), a component video terminal, or a D terminal. As will be described later, it is assumed that the video signal a includes the video signal format control information, and the input signal b does not include the format control information. These input signals are appropriately switched by an input switching unit (not shown).

The liquid crystal display device further includes a PLL circuit 18 that provides a sampling frequency corresponding to the resolution of the LCD 16 to the A / D converter 11 and a microcomputer 19 that sets a frequency division ratio of the PLL circuit 18.
Here, the A / D converter 11 is given a sampling frequency optimum for digital conversion of the input video signal, that is, a sampling frequency corresponding to the horizontal resolution in the display device. It is not necessary to perform direction scaling, and a high-quality image can be displayed on the liquid crystal panel without degrading the image quality of the original video signal.
In the liquid crystal display device of FIG. 1, the video signal processing device of the present invention is implemented by an A / D converter 11, a PLL circuit 18, and a microcomputer 19. Here, the sampling frequency setting means of the present invention corresponds to the PLL circuit 18 of FIG. 1, and the control means of the present invention corresponds to the microcomputer 19 of FIG.

FIG. 2 is a block diagram for explaining a configuration example of the PLL circuit 18 applied to the liquid crystal display device of FIG.
In the PLL circuit 18, PD 181 is a phase detector, LF 182 is a loop filter, VCO 183 is a voltage controlled oscillator, and 1 / N 184 is an N frequency divider. The PD 181 outputs the phase difference between the reference frequency signal and the output signal of the N divider (1 / N) 184 in the form of voltage (or current). The N divider 184 is normally formed by a counter, receives the output frequency from the VCO 183, and divides the frequency by a predetermined division ratio. The loop filter 182 determines the loop time constant of the PLL circuit 18.

  With the configuration as described above, the PLL circuit 18 can output a frequency N × fref that is N (integer) times by inputting a reference frequency (fref), and functions as a frequency multiplier.

  If the type of video signal to be input, that is, the video format (for example, 480i, 480p, 1080i, 720p, etc.) is known, the microcomputer 19 displays the video format of the input video signal and the display panel (here, the LCD 16). The frequency division ratio of the PLL circuit 18 can be determined from the resolution information. For example, when a display panel that performs video display is specified, the microcomputer 19 determines that the number of horizontal effective samples of digital video data output by sampling in the A / D converter 11 matches the number of horizontal pixels of the display panel. Thus, the frequency division ratio of the PLL circuit 18 is set in advance.

  In the PLL circuit 18, the clock frequency in the horizontal period of the video signal is input as the reference frequency, and the sampling frequency is generated by dividing the reference frequency according to the set frequency dividing ratio, and is output to the A / D converter 11. . The A / D converter 11 can output a horizontal effective sample that matches the number of horizontal pixels of the display panel from the input video signal by sampling the video signal according to the sampling frequency. This output video signal can be displayed on the display panel without performing horizontal scaling.

  For example, consider a case in which the above 1080i signal is displayed on a W-VGA panel of 854 × 480 dots. The microcomputer 19 sets the frequency division ratio of the PLL circuit 18 in advance so that the number of horizontal samples (number of pixels) is 854 by sampling in the A / D converter 11. The PLL circuit 18 generates a sampling frequency according to the set frequency dividing ratio and outputs it to the A / D converter 11. The A / D converter 11 outputs 854 horizontal effective samples from the 1080i signal by sampling the video signal according to the sampling frequency. A video signal having 854 horizontal effective samples can be displayed on the W-VGA panel without performing horizontal scaling.

  In the above case, the total number of scanning lines of the 1080i signal is 1125 and the frame rate is 30. Therefore, the clock frequency in the horizontal period is 33.75 kHz. At this time, the conventional sampling frequency is set to 74.25 MHz as described above, and by performing sampling at this sampling frequency, it is possible to obtain digital video data having a horizontal effective sample number of 1920 dots.

  In order to perform horizontal sampling for the number of W-VGA pixels in the horizontal direction of 854 dots with respect to the above 1080i signal, a sampling frequency of 35 MHz is required for the clock frequency of 33.75 kHz. That is, data of 854 horizontal effective pixels can be obtained by sampling a 1080i video signal at a sampling frequency of 35 MHz. Normally, since the horizontal effective area of the video signal used for display changes according to the overscan rate at the time of sampling in the horizontal direction, the required sampling frequency also changes accordingly. For example, when the 1080i signal is displayed on the W-VGA panel, if the horizontal overscan rate is 95%, the necessary sampling frequency is 34.8 MHz.

When the required sampling frequency is 33.75 Hz, the frequency division ratio set in the PLL circuit 18 is (35 / 33.75) × 1000 = 1037. That is, the PLL circuit 18 can input a clock frequency 33.75 kHz of the 1080i signal as a reference frequency and set the frequency division ratio to 1037, thereby outputting a frequency 1037 times 33.75, that is, 35 MHz. .
The A / D converter 11 can output digital data with 854 horizontal effective pixels from the input 1080i video signal by setting 35 MHz output from the PLL circuit 18 as a sampling frequency. .

  As described above, if the resolution of the display panel for displaying video and the video format of the input video signal are known, the sampling frequency (necessary to obtain the number of horizontal effective samples that matches the number of horizontal pixels of the display panel) The frequency division ratio set in the PLL circuit 18 in advance is calculated from the sampling frequency) and the video format of the input video signal, and the frequency division ratio is set in the PLL circuit 18.

  In addition, for example, when a video signal of 1280 × 720 / 60p is displayed on a W-VGA display panel, the sampling frequency is 53.0 MHz, and the PLL circuit division ratio at that time is 1178. When a 720 × 480 / 60p video signal is displayed on the same W-VGA display panel, the sampling frequency is 34.7 MHz, and the division ratio of the PLL circuit at this time is 1102.

  Also, a storage unit such as a memory for storing a division ratio list and table determined based on the resolution of the display panel and the format of the video signal is prepared so that it can cope with the case where there are a plurality of video signal sources to be input. In addition, the microcomputer 19 may set the optimum frequency dividing ratio in the PLL circuit 18 according to the user setting.

  In another embodiment of the video signal processing apparatus according to the present invention, the microcomputer 19 shown in FIG. 1 performs video determination (format determination) from the input video signal, and the amount to be set in the PLL circuit 18 from the determination result. The frequency division ratio is calculated or extracted from the storage means storing the frequency division ratio, and the frequency division ratio is automatically set in the PLL circuit 18.

  FIG. 3 is a block diagram showing another configuration example of the liquid crystal display device to which the video signal processing apparatus according to the present invention is applied. In addition to the configuration shown in FIG. 1, the liquid crystal display device includes a synchronization separation circuit 17 that separates vertical and horizontal synchronization signals from the video signal b.

  In the present embodiment, the microcomputer 19 determines the type of video signal to be input, that is, the video format, calculates the division ratio to be set in the PLL circuit 18 from the determination result, or stores the division ratio. A frequency division ratio to be set is extracted from the means, and the frequency division ratio is automatically set in the PLL circuit 18. The video signal determination means of the present invention for determining the type of the video signal input here corresponds to the microcomputer 19 in this embodiment.

  In the case of the component video signal a input from the D terminal, the video format of the video signal is determined from the format control information such as the number of scanning lines input from the control line of the D terminal, the frame rate and i / p information, and the aspect ratio. Can do. FIG. 4 is a diagram showing the format control of the D terminal. Usually, by inputting a specific DC voltage from a predetermined control line (lines 1, 2, 3) of the D terminal, a BS digital tuner, a DVD player, The image on the display panel can be controlled from an external device such as a recorder.

  Using the format control information inputted from the control line of the D terminal, the microcomputer 19 of the liquid crystal display device determines the type of the input video signal. Here, the microcomputer 19 acquires the format information F input from the control line of the D terminal, and the type of video signal (video format) is determined from the number of scanning lines, frame rate and i / p information, and aspect ratio included in the format information. Is determined by calculating the division ratio to be set in the PLL circuit 18 from the video signal and the resolution information of the display panel (LCD 16 in this case) to be displayed, and the obtained division ratio is obtained from the PLL circuit 18. Set to. Here, as described above, the frequency division ratio of the PLL circuit corresponding to the type of video signal is held in a storage means such as a memory in advance, and the frequency division ratio according to the type of video signal determined by the microcomputer 18 is determined. It may be taken out from the storage means and set in the PLL circuit 18.

  For example, in the example of FIG. 4, when the current input from the control line is 5V, the number of scanning lines is 1080, the signal is a progressive signal with a frame rate of 60, and a video signal having an aspect ratio of 16: 9 is input. I understand that. From this information, the clock frequency of the video signal in the horizontal period can be determined, and the frequency division ratio to be set in the PLL circuit 18 can be obtained from the clock frequency and the sampling frequency to be set in the LCD 16.

  In this way, in the component video signal a input from the D terminal, the type of the video signal can be determined in accordance with the format control information of the video signal input from the control line of the D terminal. The frequency division ratio of the PLL circuit 18 according to the resolution can be obtained. The A / D converter 11 outputs the effective sampling data corresponding to the number of horizontal effective pixels of the display panel by sampling the video signal at the sampling frequency output from the PLL circuit 18 in which the division ratio is set. Can do.

  In addition, when the video signal is a video signal b input from a tuner unit or a pin jack, there is no format control information from a control line such as the D terminal, and only video signals such as Y, Cb, Cr, etc. The video signal is input to the sync separation circuit 17 to separate the horizontal sync signal and the vertical sync signal. The microcomputer 18 determines the video format by determining the horizontal frequency and the vertical frequency of the video signal (video signal b) from the horizontal synchronization signal and the vertical synchronization signal separated by the synchronization separation circuit 17.

  The microcomputer 19 calculates the division ratio to be set in the PLL circuit 18 from the video format of the video signal and the resolution information of the display panel (LCD 16) to be displayed, as in the processing example of the video signal from the D terminal. Thus, the obtained frequency division ratio is set in the PLL circuit 18.

  Through the above processing, the input video signal is horizontally sampled according to the resolution of the display device, so that a high-quality display image that does not require horizontal scaling can be obtained, but the display screen size of the video signal is further switched. When a function (for example, called an auto wide function) is supported, it may be necessary to change the sampling frequency in accordance with the display screen size.

  For example, when a 4: 3 video signal is displayed on a 16: 9 display panel and the display mode is changed using the auto-wide function at this time, horizontal pixels used for image display on the display panel depending on the mode. Since the numbers are different, it is necessary to change the sampling frequency as appropriate according to the mode. Conventionally, when this auto mode function is applied, video conversion processing by scaling is performed according to the mode. However, according to the present invention, A / D conversion can be performed in each mode without the need for horizontal scaling.

FIG. 5 is a diagram showing an example of screen display switching by the auto-wide function, and FIGS. 5A to 5D illustrate the normal mode, wide mode, cinema mode, and full mode set to the auto-wide function, respectively. It is a figure for doing.
In the normal mode of FIG. 5A, when a video signal having an aspect ratio of 4: 3 of effective pixels is displayed on a 16: 9 type display panel, the video 22 having the aspect ratio of the 4: 3 video signal 21 as it is. The image 22 is displayed at a magnification, and black bands 22 a and 22 b are added to the left and right of the video 22 for display.

  In the wide mode of FIG. 5B, the 4: 3 video signal 23 is scaled and displayed so as to be a 16: 9 video 24. In the cinema mode of FIG. 5C, the aspect of the letterbox type or cinema type 4: 3 video signal 25 having black bands 25a and 25b at the upper and lower ends, with the black bands 25a and 25b removed, is left in the aspect ratio. The image is scaled at a ratio (16: 9) and displayed as an image 26. In the full mode of FIG. 5D, the video signal 27 compressed from the 16: 9 video signal to 4: 3 is returned to the 16: 9 video 28 and displayed. Video display in each of these modes can be selected by a user using a remote controller or the like.

  When the present invention is applied to each mode as described above, the input video signal has an aspect ratio of 4: 3, the display panel is 16: 9, and the auto-wide function as described above is mounted. If so, it may be necessary to change the sampling frequency in accordance with the selected auto-wide function mode.

  In this case, the microcomputer 19 determines the required sampling frequency according to the information on the video format of the video signal and the resolution of the display panel and the set mode of the auto-wide function, and the PLL according to the determined video format of the video signal. What is necessary is just to determine the frequency division ratio set to the circuit 18, and to set the frequency division ratio to a PLL circuit. At this time, the microcomputer 19 obtains information on the aspect ratio of the video signal (including information on the presence / absence of the squeeze signal and the letterbox signal), and the amount to be set in the PLL circuit 18 by the contents and the setting mode information. The circumference ratio can be determined.

In the case of the video signal a input from the D terminal, the information regarding the aspect ratio can be known from the format control information input from the control line. The video signal input from the D terminal may also include aspect ratio information in the VBI. When ID-1 is used as the ID signal transmission method using the VBI, the component signal of 525i and 525p is applicable. To do. In such a case, priority is given to the control line information of D terminal, and ID-1 is made into the 2nd priority.
Further, in the case of the video signal b that is not the D terminal, it can be determined using the aspect ratio information included in the VBI (vertical blanking period) of the video signal. The aforementioned “ID-1” is provided as a method of transmitting an ID signal using the VBI. ID-1 defines an identification signal and a transmission method for transmitting video signals having different aspect ratios, information signals related thereto, and other various additional information, and here, in the vertical blanking period of the luminance signal. Information relating to the aspect ratio of the video signal is encoded and transmitted. In signal transmission by ID-1, an identification signal code is assigned in VBI, and information (including squeeze and letterbox information) regarding the aspect of the video signal is written therein.

  As described above, the microcomputer 19 reads out information related to the aspect ratio included in the component video signal a input from the control line of the D terminal or information related to the aspect ratio included in VBI of the luminance signal of the video signal b. Based on this, the frequency division ratio set in the PLL circuit 18 can be determined.

  For example, when a 4: 3 video signal is displayed in the normal mode, the division ratio is set to 831 in the PLL circuit 18, and when a 16: 9 video signal is displayed in the full mode, the PLL circuit 18 The frequency division ratio is 1103. When a 4: 3 letterbox video signal is displayed in a cinema, the frequency division ratio of the PLL circuit 18 is 1103.

  As described above, according to the embodiment of the present invention, regardless of the combination of the input video source and the resolution of the display device, the image quality is not deteriorated due to the scaling in the horizontal direction, and high quality is achieved. An image can be displayed.

It is a block diagram which shows the structural example of the liquid crystal display device to which the video signal processing apparatus concerning this invention was applied. FIG. 2 is a block diagram for explaining a configuration example of a PLL circuit applied to the liquid crystal display device of FIG. 1. It is a block diagram which shows the other structural example of the liquid crystal display device to which the video signal processing apparatus concerning this invention was applied. It is a figure which shows the format control of D terminal. It is a figure which shows the example of a screen display switching by an auto wide function.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... A / D converter, 12 ... Video signal conversion part, 13 ... Memory for video signal conversion, 14 ... Image quality adjustment part, 15 ... LCD I / F, 16 ... LCD, 17 ... Synchronous separation circuit, 18 ... PLL circuit , 19 ... microcomputer, 21 ... video signal, 22 ... video, 22a, 22b ... black belt, 23 ... video signal, 24 ... video, 25 ... video signal, 25a, 25b ... black belt, 26 ... video, 27 ... video signal , 28 ... Video, 181 ... PD (phase detector), 182 ... LF (loop filter), 183 ... VCO (voltage controlled oscillator), 184 ... N frequency divider.

Claims (9)

  An A / D converter that sequentially samples a signal for each horizontal period of an input video signal and converts it into a digital video signal, and a sampling frequency for performing the sampling in the A / D converter is the A / D In the video signal processing apparatus having sampling frequency setting means for setting in the converter, the sampling frequency setting means has a horizontal direction of the digital data according to a horizontal resolution of a dot matrix type display device to display the digital video signal. The video signal processing apparatus is characterized in that the sampling frequency is set so that the number of samples does not require scaling.   2. The video signal processing apparatus according to claim 1, wherein the video signal processing apparatus includes a PLL circuit as the sampling frequency setting means and a control means for setting a frequency division ratio of the PLL circuit. The means determines the sampling frequency to be set in the A / D converter from the horizontal resolution of the display device, and based on the determined sampling frequency and the clock frequency of the horizontal period of the input video signal The division ratio is determined, and the determined division ratio is set in the PLL circuit. The PLL circuit inputs a clock frequency of the horizontal period of the video signal as a reference frequency, and the clock frequency is set as the set frequency. The sampling frequency to be set to the A / D converter is output by dividing the frequency by the division ratio, and the A / D converter is supplied from the PLL circuit. Video signal processing device and performs sampling of the video signal by the force sampling frequency.   3. The video signal processing apparatus according to claim 2, wherein the video signal processing apparatus has storage means for storing information on the frequency division ratio determined based on the type of the video signal and the resolution of the display device. The control device acquires information relating to the type of the video signal and the resolution of the display device, reads the division ratio corresponding to the acquired information from the storage unit, and calculates the read division ratio. A video signal processing apparatus set in the PLL circuit.   4. The video signal processing apparatus according to claim 2, wherein the video signal processing apparatus includes a video signal determination unit that determines a type of an input video signal, and the control unit is determined by the video signal determination unit. A video signal processing apparatus, wherein the division ratio is automatically determined using the type information of the video signal.   5. The video signal processing apparatus according to claim 4, wherein the video signal determination means determines the type of the video signal using format control information included in the component video signal input from the D terminal. Video signal processing device.   5. The video signal processing apparatus according to claim 4, wherein the video signal processing apparatus includes a synchronization separation circuit that separates a horizontal synchronization signal and a vertical synchronization signal of the video signal, and the video signal determination unit includes the synchronization separation circuit. A video signal processing apparatus that determines the type of the video information from the horizontal synchronization signal and the vertical synchronization signal separated in step (b).   5. The video signal processing apparatus according to claim 4, wherein the video signal determining means determines the type of the video information based on identification information of the video signal written during a vertical blanking period of the input video signal. A characteristic video signal processing apparatus.   8. The video signal processing apparatus according to claim 4, wherein the control unit acquires display mode information by an auto-wide function for switching a display screen size of the video signal, and is determined by the video signal determination unit. A video signal processing apparatus, wherein a frequency division ratio is determined for each mode based on the type information of the received video signal and the acquired display mode information.   9. A video display device comprising the video signal processing device according to claim 1, wherein the video display device performs image quality adjustment of digital video data sampled by the A / D converter. An image display device comprising: an adjustment unit; and the display device that displays the digital image data adjusted in image quality by the image quality adjustment unit.

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