JP2006024728A - Manufacturing method of strained silicon wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a strained silicon wafer capable of reducing penetrating transition and defective density in the uppermost layer much more or a strained Si layer, in the strained silicon wafer manufactured by epitaxial growth. <P>SOLUTION: An Si<SB>1-x</SB>Ge<SB>x</SB>composition inclined layer (x≤0.5) 2 of a thickness of 1 to 3 μm is grown through epitaxial growth on a single crystal silicon substrate 1 while increasing a Ge density with the inclination of not more than 25%/μm, then, a strain mitigated Si<SB>1-x</SB>Ge<SB>x</SB>layer (x≤0.5) 3 of the thickness of 500 to 1000 nm is grown through epitaxial growth on the Si<SB>1-x</SB>Ge<SB>x</SB>composition inclined layer. Further, an Si<SB>1-x</SB>Ge<SB>x</SB>reverse composition inclined layer (x≥0.05) 4 is grown through epitaxial growth while reducing the Ge density with an inclination of 5 to 25%/μm and finally, and a strained Si layer 5 of the thickness of 5 to 30 nm is grown through epitaxial growth to obtain the strained silicon wafer. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a strained silicon wafer capable of reducing threading dislocations and stacking fault density.

In recent years, a strained silicon wafer has been proposed in which a SiGe layer is epitaxially grown on a single crystal silicon substrate and a strained Si layer is epitaxially grown on the SiGe layer.
In the strained Si layer, tensile strain is caused by the SiGe layer having a larger lattice constant than Si, and this strain changes the band structure of Si, and the degeneration is solved and the carrier mobility is increased.
Therefore, by using this strained Si layer as the channel region, the carrier movement speed can be increased by 1.5 times or more compared with the case of using normal bulk silicon.
For this reason, a strained silicon wafer has attracted attention as a suitable wafer for high-speed MOSFETs, MODFETs, HEMTs, and the like.

  In order to obtain a high-quality strained Si layer in the strained silicon wafer as described above, a high-quality SiGe layer, that is, a threading dislocation density is low, a strain is reduced, and a smooth surface is provided on the silicon substrate. It is necessary to epitaxially grow a SiGe layer having

  However, due to the difference in lattice constant between Si and SiGe, misfit dislocations occur during the epitaxial growth of the SiGe layer on the silicon substrate. And the threading dislocation resulting from this misfit dislocation reached the surface at high density, and the same high density dislocation occurred up to the strained Si layer formed on the SiGe layer. .

  Since dislocations in the strained Si layer cause a large increase in junction leakage current at the time of forming a device element, various proposals for reducing the threading dislocation density have been conventionally made.

  For example, Patent Document 1 discloses that after a SiGe layered layer in which a Ge component increases with a concentration gradient of about 25% / μm or less is epitaxially grown on a single crystal silicon substrate, a strain is formed on the SiGe layered layer. A method for manufacturing a semiconductor device in which a Si layer is epitaxially grown is disclosed.

Similarly, Patent Document 2 also forms a plurality of composition gradient layers in which each layer represented by A _x B _x-1 has a constant composition on a single crystal substrate of the first element A, and is below the uppermost layer. A multi-layer material is disclosed in which misfit dislocations are generated at the edge of each layer to form a mismatched low defect top layer.

Japanese Patent No. 2792785 Japanese Patent No. 25582506

However, depending on the conventional SiGe composition graded layer (hierarchical layer) as described in Patent Documents 1 and 2, it is difficult to sufficiently relax the lattice strain. Required a thickness of the strain relaxation SiGe layer of about 1 μm or more. Therefore, the aforementioned irregularities are generated crosshatch pattern caused by misfit dislocations, surface roughness R _ms of the strained Si layer grown thereon also becomes 2-4 [mu] m, even disadvantage that the surface is not smoothly formed I was invited.

  Further, the thickness of the uppermost strained Si layer depends on the Ge concentration (lattice constant) of the SiGe layer below the uppermost layer. For example, when the Ge concentration of the SiGe layer is 20%, the thickness of the strained Si layer is Is pseudo-growth below 10 nm, and no misfit dislocation occurs at the strained Si layer / SiGe layer interface.

  However, in the semiconductor device manufacturing, considering the thickness of the device active layer and the strained Si layer consumed in the manufacturing process, the thickness of the strained Si layer needs to be about 15 nm, and the critical film thickness depends on the Ge concentration. In some cases,

  Therefore, when manufacturing a strained silicon wafer, a strained Si layer having a thickness sufficient for device formation can be formed, and threading dislocations can be generated and stretched when epitaxially growing the composition gradient layer as described above. There was a need for a method that could prevent this.

  The present invention has been made to solve the above technical problem, and in a strained silicon wafer manufactured by epitaxial growth, further aims to further reduce threading dislocations and defect density in the strained Si layer which is the uppermost layer. It is an object of the present invention to provide a method for producing a strained silicon wafer that can be used.

The strained silicon wafer manufacturing method according to the present invention includes a Si _1-x Ge _x composition gradient layer having a thickness of 1 μm or more and 3 μm or less on a single crystal silicon substrate while increasing the Ge concentration with a gradient of less than 25% / μm. A step of epitaxially growing (x ≦ 0.5), and a strain relaxation Si _1-x Ge _x layer (x ≦ 0.5) having a thickness of 500 nm or more and 1000 nm or less on the Si _1-x Ge _x composition gradient layer. A step of epitaxial growth and a Si _1-x Ge _x inverse composition graded layer (x on the strain-relaxed Si _1-x Ge _x layer while decreasing the Ge concentration with a slope of 5% / μm to 25% / μm. ≧ 0.05) and a step of epitaxially growing a strained Si layer having a thickness of 5 nm to 30 nm on the Si _1-x Ge _x inverse composition gradient layer.
As described above, the Si _1-x Ge _x reverse is performed by decreasing the Ge concentration while maintaining the pseudo growth on the strain-relaxed Si _1-x Ge _x layer before forming the strained Si layer. By forming the composition gradient layer, the strained Si layer can be formed with a thickness larger than the critical thickness of strained Si having a lattice constant corresponding to the Ge concentration of the strain relaxation SiGe layer.

A method of manufacturing a strained silicon wafer of the second aspect of the present invention, on a single crystal silicon substrate, while the Ge concentration is increased at an inclination of less than 25% / [mu] m, a thickness of less than 1μm least 3 [mu] m Si ₁ a step of epitaxially growing a _-x Ge _x composition gradient layer (x ≦ 0.5), and reducing the Ge concentration on the Si _1-x Ge _x composition gradient layer with a gradient of 5% / μm to 25% / μm And a step of epitaxially growing a Si _1-x Ge _x inverse composition gradient layer (x ≧ 0.05), and a strained Si layer having a thickness of 5 nm to 30 nm on the Si _1-x Ge _x inverse composition gradient layer And a step of epitaxially growing the substrate.
As described above, in the epitaxial growth of the Si _1-x Ge _x inverse composition gradient layer, the strain relaxation Si _1-x Ge _x is sufficient as long as the strain generated by the Si _1-x Ge _x composition gradient layer can be sufficiently relaxed. Even if the formation of the layer is omitted, a strained silicon wafer similar to the above can be obtained.

Further, in the third aspect of the method for producing a strained silicon wafer according to the present invention, Si ₁ having a thickness of 1 μm or more and 3 μm or less is formed on a single crystal silicon substrate while increasing the Ge concentration with a slope of less than 25% / μm. a step of epitaxially growing a _-x Ge _x composition gradient layer (x ≦ 0.5), and reducing the Ge concentration on the Si _1-x Ge _x composition gradient layer with a gradient of 5% / μm to 25% / μm And a step of epitaxially growing a Si _1-x Ge _x inverse composition gradient layer (x ≧ 0.05) and a strain relaxation Si having a thickness of 500 nm to 1000 nm on the Si _1-x Ge _x inverse composition gradient layer. A step of epitaxially growing a _1-x Ge _x layer (x ≦ 0.5) and a step of epitaxially growing a strained Si layer having a thickness of 5 nm to 30 nm on the strain-relaxed Si _1-x Ge _x layer. Specially It is a sign.
Thus, the strain relaxed Si _1-x Ge _x layer, while maintaining the pseudo growth, also by forming a strained relaxed SiGe layer after the formation of a Si _1-x Ge _x inverse composition gradient layer A strained silicon wafer similar to the above can be obtained.

The composition gradient layer and / or the strain relaxation layer is made of Si _{1-y Cy} (y> 0.1) or Si _1-z N _z (z> 0.1) instead of Si _1-x Ge _x. There may be.
Thus, in the present invention, the composition of the hetero layer is not limited to SiGe, and a strained silicon wafer can be obtained similarly by using SiC or SiN.

As described above, according to the present invention, a strained silicon wafer is provided in which the defect density such as threading dislocations and stacking faults is further reduced as compared with the prior art.
Therefore, since a high-quality strained Si layer having a low threading dislocation density is formed in the strained silicon wafer obtained by the manufacturing method according to the present invention, carrier mobility can be improved by using the strained Si layer as a device active layer. The speed is increased, and it can be suitably used for the next generation LSIs and individual semiconductor devices.

Hereinafter, the present invention will be described in more detail.
FIG. 1 shows an example of the structure of a strained silicon wafer obtained by the manufacturing method according to the present invention.
The strained silicon wafer shown in FIG. 1 has a Si _1-x Ge _x composition graded layer (x ≦ 0) having a thickness of 1 μm or more and 3 μm or less with a Ge concentration increasing at a slope of less than 25% / μm on a single crystal silicon substrate 1. .5) 2 are stacked. A strain relaxation Si _1-x Ge _x layer (x ≦ 0.5) 3 having a thickness of 500 nm or more and 1000 nm or less is laminated thereon, and a Ge concentration is 5% / μm or more and 25% / μm or less. A Si _1-x Ge _x inverse composition gradient layer (x ≧ 0.05) 4 that decreases with inclination is stacked, and finally, a strained Si layer 5 having a thickness of 5 nm to 30 nm is sequentially stacked.

As described above, prior to laminating the strained Si layer 5, on the strain-relaxed Si _1-x Ge _x layer 3, while maintaining the pseudo growth, gradually decreasing the Ge concentration Si _1-x Ge By forming the _x inverse composition gradient layer 4, the thickness of the strained Si layer 5 is determined not by the critical thickness but by the conditions of the Si _1-x Ge _x inverse composition gradient layer 4.
That is, the strained Si layer 5 can be formed with a thickness larger than the critical thickness of strained Si having a lattice constant corresponding to the Ge concentration of the strain relaxation SiGe layer 3.
Therefore, a strained Si wafer having a low misfit dislocation and threading dislocation density can be obtained.

Hereinafter, the manufacturing method of the strained silicon wafer according to the present invention shown in FIG. 1 will be described in detail.
The single crystal silicon substrate 1 used in the present invention is, for example, a P-type boron doped substrate cut out from a single crystal ingot pulled up by the Czochralski (CZ) method, having an orientation (100) and a resistivity of 0.1 Ωcm. As described above, a silicon prime substrate having a specification such as an initial oxygen concentration of 15 × 10 ¹⁷ atoms / cm ³ or less is preferably used. Of course, a substrate other than the CZ substrate such as an FZ substrate can also be used.

Then, a Si _1-x Ge _x composition gradient layer (x ≦ 0.5) 2 having a thickness of 1 μm to 3 μm is epitaxially grown on the single crystal silicon substrate 1.
The Si _1-x Ge _x composition gradient layer 2 is formed so that the Ge concentration increases with a gradient of less than 25% / μm.
When the Ge concentration gradient exceeds 25% / μm, since the concentration gradient is too steep, dislocations and defects may occur during epitaxial growth.
From the same viewpoint, the Ge concentration ratio x of the Si _1-x Ge _x composition gradient layer 2 is preferably 0.5 or less.
When the thickness of the Si _1-x Ge _x graded composition layer 2 is less than 1μm, the distortion becomes insufficient, whereas, since it exceeds 3 [mu] m, desired amount of distortion does not vary much, Si ₁ The thickness of the _-x Ge _x composition gradient layer 2 is preferably 1 μm or more and 3 μm or less.

Next, a strain relaxation Si _1-x Ge _x layer 3 having a constant Ge composition ratio is epitaxially grown on the Si _1-x Ge _x composition gradient layer 2.
The strain relaxation Si _1-x Ge _x layer 3 is preferably formed with a thickness of 500 nm or more and 1000 nm or less from the viewpoint of sufficiently relaxing the strain generated by the Si _1-x Ge _x composition gradient layer 2.
In the present invention, on the surface of the strain-relaxed Si _1-x Ge _x layer 3, the precondition is that the relaxation rate exceeds 95% and the threading dislocation density is 10 ³ / cm ² or less. .

In the present invention, then in the epitaxial growth of Si _1-x Ge _x inverse composition gradient layer 4 to be laminated, if it is possible to sufficiently relax the strain caused by the Si _1-x Ge _x graded composition layer 2, the The formation of the strain relaxation Si _1-x Ge _x layer 3 can be omitted.
In this case, it is necessary that the relaxation rate exceeds 95% and the threading dislocation density is 10 ³ / cm ² or less on the surface of the Si _1-x Ge _x inverse composition gradient layer 4.

Further, on the strain relaxation Si _1-x Ge _x layer 3, an Si _1-x Ge _x inverse composition gradient layer 4 whose Ge concentration decreases with a gradient of 5% / μm or more and 25% / μm or less is epitaxially grown.
By setting the Ge concentration gradient at this time within the above range, the threading dislocation density can be lowered to 10 ³ / cm ² or less as shown in the following examples.
The Ge concentration ratio x of the Si _1-x Ge _x inverse composition gradient layer 4 is preferably 0.05 or more.

When the formation of the strain relaxation Si _1-x Ge _x layer 3 is omitted as described above, for example, the relaxation rate exceeds 95% on the surface of the Si _1-x Ge _x inverse composition gradient layer 4. When the threading dislocation density is not 10 ³ / cm ² or less, a strain relaxation Si _1-x Ge _x layer may be formed on the Si _1-x Ge _x inverse composition gradient layer 4.

The epitaxial growth of the Si _1-x Ge _x composition gradient layer 2, the strain relaxation Si _1-x Ge _x layer 3, the Si _1-x Ge _x inverse composition gradient layer 4, etc. can be performed by, for example, a CVD method by lamp heating, It can be carried out by vapor phase epitaxial growth method such as CVD method (UHV-CVD), molecular beam epitaxial growth method (MBE) or the like.
Growth conditions, and the composition ratio of Si and Ge in the SiGe layer grown film thickness, used growth method, unlike the apparatus or the like, but is appropriately set, for example, by a CVD method using lamp heating, strain relief Si _0.7 Ge _0.3 When epitaxially growing a layer, it is carried out under conditions of carrier gas: H ₂ , source gas: SiH ₄ , GeH ₄ , chamber pressure: 10-100 Torr, temperature: 650-680 ° C., and growth rate of 10-50 nm / min.

The surface of the Si _1-x Ge _x inverse composition gradient layer 4 is preferably smoothed by, for example, high-temperature hydrogen heat treatment at 850 to 1200 ° C. and a pressure of about 10 to 760 Torr in an H ₂ gas stream.
As a result, the strained Si layer 5 formed thereon has a smooth surface and the generation of dislocations is also suppressed.

On the Si _1-x Ge _x inverse composition gradient layer 4 formed as described above, a single crystal Si layer is epitaxially grown by, for example, a CVD method or the like.
This single crystal Si layer is formed as a strained Si layer 5 having a lattice constant different from that of the single crystal silicon substrate 1.
Since the strained Si layer 5 serves as a device active region, it is preferably formed in a thickness of 5 nm to 30 nm as a sufficient thickness exceeding the critical film thickness for the strain relaxation Si _1-x Ge _x layer 3.

Formation of the strained Si layer 5 by the CVD method is performed, for example, under conditions of carrier gas: H ₂ , source gas: SiH ₂ Cl ₂ or SiH ₄ , chamber pressure: 10 to 760 Torr, temperature: 650 to 1000 ° C. .

  The strained silicon wafer formed with the strained Si layer having a low threading dislocation density as described above can be used as a suitable substrate for forming a high-speed device because the carrier movement in the strained Si layer is accelerated. it can.

In the above embodiment, the case where the SiGe layer is formed as the composition gradient layer and / or the strain relaxation layer has been described. However, the present invention is not particularly limited to this, and instead of the SiGe layer, SiC or It may be a layer obtained by epitaxially growing SiN.
The SiC layer and the SiN layer are formed with the same thickness as that of the SiGe layer.
In addition, the C concentration ratio y in the case of the Si _{1-y Cy} layer is 0.1 or more from the viewpoint of appropriate strain of the strained Si layer related to performance such as carrier mobility of the finally formed device. It is preferable that
Similarly, the N concentration ratio z in the case of the Si _1-z N _z layer is also preferably 0.1 or more.

For the formation of the SiC layer and the SiN layer, as in the case of the SiGe layer, for example, a CVD method by lamp heating, a vapor phase epitaxial growth method such as a CVD method in ultra high vacuum (UHV-CVD), or a molecular beam epitaxial growth method. (MBE) or the like.
The growth conditions vary depending on the concentration ratio of Si and C of the SiC layer to be grown, the concentration ratio of Si and N of the SiN layer, the film thickness, the growth method used, the apparatus, and the like, and are set appropriately.

EXAMPLES Hereinafter, although this invention is demonstrated more concretely based on an Example, this invention is not restrict | limited by the following Example.
[Examples and Comparative Examples]
Single crystal silicon substrate, CZ method-P type (boron) silicon substrate with orientation (100), resistivity 0.1-1.0 Ω · cm, initial oxygen concentration 15 × 10 ¹⁷ atoms / cm ³ or less Was used.
A Si _1-x Ge _x composition gradient layer (x ≦ 0.3) was epitaxially grown on the substrate surface at a thickness of 2000 nm, and a strain-relaxed Si _0.7 Ge _0.3 layer having a thickness of 1000 nm was epitaxially grown thereon.
Further, an Si _1-x Ge _x inverse composition gradient layer (x ≧ 0.05) was epitaxially grown thereon with a thickness of 1000 nm.
At this time, the Si _1-x Ge _x inverse composition gradient layer was formed by changing the composition gradient in which the Ge concentration decreases in the range of 1 to 30% / μm (8 points).
A strained Si layer having a thickness of 20 nm was epitaxially grown on these surfaces.
FIG. 2 is a graph showing the threading dislocation density of each strained silicon wafer in which the Si _1-x Ge _x inverse composition gradient layer is formed by each Ge concentration gradient.

As can be seen from the graph of FIG. 2, the threading dislocation density tends to be as low as 10 ³ / cm ² or less by setting the Ge concentration gradient of the Si _1-x Ge _x inverse composition gradient layer to 25% / μm or less. is there.
However, when the Ge concentration gradient is less than 5% / μm, the threading dislocation density tends to increase.
Accordingly, the Ge concentration gradient of the Si _1-x Ge _x inverse composition gradient layer is preferably 5% / μm or more and 25% / μm or less.

It is a schematic sectional drawing which shows an example of the distortion | strained silicon wafer obtained by the manufacturing method which concerns on this invention. Is a graph showing the threading dislocation density of the strained silicon wafer with a Ge concentration gradient of Si _1-x Ge _x reverse gradient composition layer in Example.

Explanation of symbols

Single crystal silicon substrate 2 Si _1-x Ge _x graded composition layer 3 strain-relaxed Si _1-x Ge _x layer 4 Si _1-x Ge _x inverse composition gradient layer 5 the strained Si layer

Claims (4)

A step of epitaxially growing a Si _1-x Ge _x composition gradient layer (x ≦ 0.5) having a thickness of 1 μm to 3 μm on a single crystal silicon substrate while increasing a Ge concentration with a gradient of less than 25% / μm; ,
Epitaxially growing a strain relaxation Si _1-x Ge _x layer (x ≦ 0.5) having a thickness of 500 nm or more and 1000 nm or less on the Si _1-x Ge _x composition gradient layer;
A Si _1-x Ge _x inverse composition gradient layer (x ≧ 0.05) is formed on the strain-relaxed Si _1-x Ge _x layer while decreasing the Ge concentration by a gradient of 5% / μm to 25% / μm. Epitaxially growing, and
And a step of epitaxially growing a strained Si layer having a thickness of 5 nm to 30 nm on the Si _1-x Ge _x inverse composition gradient layer. A step of epitaxially growing a Si _1-x Ge _x composition gradient layer (x ≦ 0.5) having a thickness of 1 μm to 3 μm on a single crystal silicon substrate while increasing a Ge concentration with a gradient of less than 25% / μm; ,
On the Si _1-x Ge _x composition gradient layer, a Si _1-x Ge _x inverse composition gradient layer (x ≧ 0.05) while decreasing the Ge concentration with a gradient of 5% / μm or more and 25% / μm or less. Epitaxially growing, and
And a step of epitaxially growing a strained Si layer having a thickness of not less than 5 nm and not more than 30 nm on the Si _1-x Ge _x inverse composition gradient layer. A step of epitaxially growing a Si _1-x Ge _x composition gradient layer (x ≦ 0.5) having a thickness of 1 μm to 3 μm on a single crystal silicon substrate while increasing a Ge concentration with a gradient of less than 25% / μm; ,
On the Si _1-x Ge _x composition gradient layer, a Si _1-x Ge _x inverse composition gradient layer (x ≧ 0.05) while decreasing the Ge concentration with a gradient of 5% / μm or more and 25% / μm or less. Epitaxially growing, and
Epitaxially growing a strain relaxation Si _1-x Ge _x layer (x ≦ 0.5) having a thickness of 500 nm or more and 1000 nm or less on the Si _1-x Ge _x inverse composition gradient layer;
And a step of epitaxially growing a strained Si layer having a thickness of 5 nm or more and 30 nm or less on the strain relaxation Si _1-x Ge _x layer. In the composition gradient layer and / or strain relaxation layer, instead of Si _1-x Ge _x , Si _{1-y Cy} (y> 0.1) or Si _1-z N _z (z> 0.1) is used. 3. The method for producing a strained silicon wafer according to claim 1, wherein the strained silicon wafer is produced.

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