JP2006024668A - Process for fabricating semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To deposit barrier metal with high purity by suppressing residue of impurities. <P>SOLUTION: The process for fabricating a semiconductor device comprises a step for supplying Ta[N(CH<SB>3</SB>)<SB>2</SB>]<SB>5</SB>onto a substrate (S102); a step for supplying H<SB>2</SB>which removes C different from Ta in the Ta[N(CH<SB>3</SB>)<SB>2</SB>]<SB>5</SB>(S106); and a step for supplying NH<SB>3</SB>which forms a TaN film on the basis of an adsorption molecule of the Ta[N(CH<SB>3</SB>)<SB>2</SB>]<SB>5</SB>from which C is removed (S108) wherein the TaN film is deposited on the substrate by repeating the Ta[N(CH<SB>3</SB>)<SB>2</SB>]<SB>5</SB>step, the H<SB>2</SB>supply step, and the NH<SB>3</SB>supply step. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a ULSI (Ultra large scale) having Cu wiring.
integrated circuit) relates to a device manufacturing method.

  Cu wiring having low resistance and high electromigration (EM) resistance is expected as a highly reliable material for highly integrated and miniaturized LSI wiring.

  In particular, recently, in order to achieve high-speed performance of LSIs, there has been a movement to replace the wiring technology from conventional aluminum (Al) alloy to low resistance Cu or Cu alloy (hereinafter collectively referred to as Cu). . Since Cu is difficult to finely process by the dry etching method frequently used in the formation of Al alloy wiring, Cu film is deposited on the insulating film subjected to the groove processing, and other than the portion embedded in the groove A so-called damascene method, in which the Cu film is removed by chemical mechanical polishing (CMP) to form a buried wiring, is mainly employed. In general, a Cu film is formed by forming a thin seed layer by sputtering or the like and then forming a laminated film having a thickness of about several hundreds of nanometers by electrolytic plating.

Further, recently, it has been studied to use a low dielectric constant (low-k) film having a low relative dielectric constant as an interlayer insulating film. That is, by using a low-k film having a relative dielectric constant k of 3.5 or less from a silicon oxide film (SiO ₂ ) film having a relative dielectric constant k of about 4.2, parasitic capacitance between wirings is reduced. It has been tried. A method of manufacturing a semiconductor device having a multilayer wiring structure in which such a low-k film and a Cu wiring are combined is as follows.

FIG. 16 is a process cross-sectional view illustrating a method of manufacturing a semiconductor device having a multilayer wiring structure in which a conventional low-k film and a Cu wiring are combined.
In FIG. 16, a method for forming a device portion or the like is omitted.
In FIG. 16A, a first insulating film 221 is formed on a substrate 200 made of a silicon substrate by a method such as CVD (chemical vapor deposition).
In FIG. 16B, a groove structure (opening H) for forming a Cu metal wiring or a Cu contact plug is formed in the first insulating film 221 by a photolithography process and an etching process.
In FIG. 16C, a barrier metal film 240, a Cu seed film, and a Cu film 260 are formed in this order on the first insulating film 221, and annealed at a temperature of 150 ° C. to 400 ° C. for about 30 minutes.
In FIG. 16D, the Cu film 260 and the barrier metal film 240 are removed by CMP and planarized to form a Cu wiring in the opening H that is a groove.
In FIG. 16E, the second insulating film 281 is formed after the surface of the Cu film 260 is subjected to reducing plasma treatment.
Furthermore, when forming multilayer Cu wiring, it is common to repeat these processes and to laminate. Here, most of the first insulating film 221 and the second insulating film 281 are low-k films.

In next-generation devices, the use of a low dielectric constant film as an interlayer insulating film, in particular, a low dielectric constant film having pores is being studied in order to lower the dielectric constant. In other words, the development of low-k film materials having a relative dielectric constant k of 2.5 or less has been promoted, and many of these are porous materials having pores in the material. As Cu wiring is further miniaturized in the future, it is essential to reduce the thickness of the barrier metal, which has a higher resistance than Cu. In order to form an ultra-thin barrier metal film, atomic layer vapor deposition (ALD: Atomic Layer) is being studied.
There is a Deposition method (for example, see Non-Patent Documents 1 and 2). This method is a method of performing film formation at the atomic layer level by alternately supplying source gases.

FIG. 17 is a gas supply flow diagram showing an example of barrier metal film formation by the ALD method.
First, a tantalum (Ta) raw material is supplied. For example, description will be made using tantalum chloride (TaCl ₅ ). At this time, a certain amount or more is not adsorbed due to the self-limiting effect. Next, purging is performed with argon (Ar). Subsequently, by performing the supply of ammonia (NH _3), to form a tantalum nitride as a barrier metal (TaN). Finally, purge is performed with Ar. This series of operations is defined as one cycle, and film formation is performed by repeating a cycle corresponding to the required film thickness.
FIG. 18 is a conceptual diagram for explaining how a TaN film is formed in the ALD method.
In FIG. 18A, TaR20 (Ta compound) is adsorbed on the substrate 10 by supplying TaR20 (Ta compound). Further, TaR 20 that is not adsorbed floats around the base 10.
In FIG. 18B, the floating TaR 20 is replaced by supplying Ar.
In FIG. 18C, by supplying NH ₃ , TaR 20 adsorbed on the substrate 10 is reduced to form a TaN film 22.

Further, when the titanium silicon nitride and (TiSiN) and the barrier metal film, in order to remove the carbon (C) present in the TiSiN film to TiSiN film, hydrogen _(H 2) / nitrogen _(N 2) A description that plasma processing is performed is disclosed (see, for example, Patent Document 1). In addition, there is a description that foreign substances generated on the surface of the barrier metal film are removed by plasma treatment (see, for example, Patent Document 2).
JP2003-332426A (Embodiment 3) JP 2003-55769 A “Atomic layer deposition of metal and nitride thin films: Current research efforts and applications for semiconductordevice processing”, J. Vac. Sci. Technol. B21 (6), 2003, p2231-2261 “Atomiclayer deposition for nanoscale Cu metallization”, AdvancedMetallization Conference 2003 Conference Proceedings AMC XIX 2004 MaterialsResearch Society p713-722

When an ALD film of TaN, which is a barrier metal, is formed by a conventional method, since organic metal is used as a source gas, C derived from source molecules remains in the film. In fact, as in the non-patent document 2, as Ta raw material, penta dimethyl tantalum (PDMAT: Pentakis DiMethylamino Tantalum; Ta [N (CH 3) 2] 5) When using about 5% C may remain End up. If C remains in TaN, there arises a problem that the resistance value of the barrier metal is increased. Since the barrier metal also exists at the bottom of the via in the Cu wiring, the via resistance is increased. Furthermore, the residual C reduces the adhesion with the Cu film, thereby reducing the reliability of the Cu wiring.
It is conceivable to use, for example, a halogen (Cl) compound that is not an organic metal as the metal source gas of the barrier metal, but in this case, halogen remains as a residual impurity. In particular, when halogen remains at the interface between Cu and the barrier metal, the adhesiveness is remarkably lowered and the reliability of the Cu wiring is lowered. Similarly, it is conceivable to use a fluorine (F) compound as the metal source gas for the barrier metal, but in this case, F remains as a residual impurity.

  An object of the present invention is to overcome the above-described problems, suppress impurity residues, and form a barrier metal with high purity.

A method for manufacturing a semiconductor device of the present invention includes:
A metal compound supply step of supplying a metal compound on the substrate;
A removal step of removing a predetermined component different from the metal in the metal compound;
A metal-containing film generating step for generating a metal-containing film containing the metal based on the metal compound from which the predetermined component has been removed;
With
The metal-containing film is deposited on the substrate by repeating the metal compound supplying step, the removing step, and the metal-containing film generating step.

  By removing a predetermined component different from the metal in the metal compound, residual impurities can be suppressed. Furthermore, by repeating the metal compound supply step, the removal step, and the metal-containing film generation step, the metal-containing film on which the residual impurities are suppressed is deposited by depositing the metal-containing film on the substrate. be able to.

  In particular, in the removing step, the substrate is controlled to a temperature higher than the temperature of the substrate in the metal compound supplying step.

  By controlling the substrate to a temperature higher than the temperature of the substrate in the metal compound supply step, the effect of removing the predetermined component can be improved.

  The high temperature is particularly effective when the temperature is 50 ° C. or more higher than the temperature of the substrate in the metal compound supply step.

Furthermore, in the removing step, a first reactive chemical species that reacts with the predetermined component is supplied onto the substrate,
In the metal-containing film generation step, a second reactive chemical species that reacts with the metal compound is supplied.

  By supplying the first reactive chemical species onto the substrate, the first reactive chemical species can be reacted with the predetermined component. By reacting with the predetermined component, the predetermined component can be removed. Then, after the predetermined component is removed, the second reactive chemical species is supplied to allow the metal compound to be reacted with little or no impurities. As a result, the metal-containing film with little or no impurities can be generated and deposited.

In particular, it is effective to use hydrogen (H ₂ ) as the first reactive chemical species.

In addition, it is effective to use either ammonia (NH ₃ ) or a hydrazine-containing material as the second reactive chemical species.

  Alternatively, after the metal compound supplying step, the reaction component is removed by reacting with the predetermined component, and further, the reaction chemical species that reacts with the metal compound from which the predetermined component has been removed is supplied onto the substrate. It is also effective to perform the removal step and the metal-containing film generation step.

  By supplying the reactive chemical species onto the substrate, it can be removed by reacting with the predetermined component, and further reacting with the metal compound to form the metal-containing film. Therefore, the removal step and the metal-containing film generation step can be performed in one step.

  In particular, the reactive chemical species is supplied onto the substrate controlled to a temperature higher than the temperature of the substrate in the metal compound supplying step.

  The reactive chemical species that can generate the metal-containing film by reacting with the metal compound without the temperature higher than the temperature of the substrate is set to a temperature higher than the temperature of the substrate. The effect of removing these components can be improved.

It is particularly effective to use ammonia (NH ₃ ) and a hydrazine-containing material as the reactive chemical species.

  It is particularly effective to use any one of a tantalum (Ta) compound, a titanium (Ti) compound, and a tungsten (W) compound as the metal compound.

  A high-purity barrier metal film can be formed by performing the above steps on any of a tantalum (Ta) compound, a titanium (Ti) compound, and a tungsten (W) compound.

  According to the present invention, the metal-containing film in which residual impurities are suppressed can be deposited, so that a high-purity metal-containing film can be deposited. By using a high-purity metal-containing film as the barrier metal, the resistance value of the barrier metal can be kept low. Furthermore, it is possible to suppress an increase in via resistance due to the barrier metal also present at the via bottom in the Cu wiring. Furthermore, it is possible to suppress a decrease in adhesion with the Cu film due to C remaining as impurities, and to improve the reliability of the Cu wiring.

Embodiment 1 FIG.
In Embodiment 1, a case where a tantalum nitride (TaN) film is formed using pentadimethyltantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) as a metal raw material will be described.
FIG. 1 is a flowchart for forming a barrier metal in the first embodiment.
In Figure 1, the barrier metal film forming step, and Ta as an example of a metal compound supplying step _{[N (CH 3) 2]} 5 for supplying Ta _{[N (CH 3) 2]} 5 supplying step (S102), argon (Ar) supply step (S104), hydrogen (H ₂ ) supply step (S106) as an example of a removal step, NH ₃ supply step (S108) as an example of a metal-containing film generation step, and an Ar supply step ( A series of steps S110) is repeated as one cycle. Then, after forming a TaN film having a desired thickness, copper (Cu) as a conductive material is deposited by a physical vapor deposition (PVD) method and a plating method to form a Cu wiring.

FIG. 2 is a process cross-sectional view illustrating a process of the semiconductor device manufacturing method according to the first embodiment.
In FIG. 2, first, from the SiC film forming process to the opening forming process will be described as an example of the main process of the method for manufacturing the semiconductor device before the barrier metal formation in FIG. 1. Subsequent steps will be described later.

  In FIG. 2A, as a SiC film forming step, a base silicon carbide (SiC) film having a thickness of 50 nm using SiC is deposited on the substrate 200 by a CVD method to form a SiC film 212. Here, the film is formed by the CVD method, but other methods may be used. The SiC film 212 has a function as a diffusion prevention film. The SiC film 212 also has a function as an etching stopper. Since it is difficult to generate the SiC film, a silicon carbonate (SiOC) film may be used instead of the SiC film. Alternatively, a silicon carbonitride (SiCN) film or a silicon nitride (SiN) film can be used. As the substrate 200, for example, a substrate such as a silicon wafer having a diameter of 300 mm is used. A device portion such as a metal wiring or a contact plug may be formed on the base body 200. Alternatively, other layers may be formed.

In FIG. 2B, as a low-k film forming step, a low-k using a porous insulating material on the SiC film 212 formed by the SiC insulating film forming step formed on the substrate 200 is used. The k film 220 is formed with a thickness of 250 nm. By forming the low-k film 220, an interlayer insulating film having a relative dielectric constant k lower than 3.5 can be obtained. As a material of the low-k film 220, for example, porous methyl silsesquioxane (MSQ) can be used. As the formation method, for example, a SOD (spin on selective coating number and name, name of agent) method of forming a thin film by spin-coating a solution and heat-treating can be used. Here, the spinner was formed at a rotation speed of 900 min ⁻¹ (900 rpm). This wafer was baked on a hot plate at a temperature of 250 ° C. in a nitrogen atmosphere, and finally cured on a hot plate at a temperature of 450 ° C. in a nitrogen atmosphere for 10 minutes. A porous insulating film having a predetermined physical property value can be obtained by appropriately adjusting the MSQ material, formation conditions, and the like. For example, the density is 0.7 g / cm ³ and the relative dielectric constant k is 1.8. The composition ratio of Si, O, and C in the low-k film is low-k having a physical property value in which Si is in the range of 25 to 35%, O is in the range of 45 to 57%, and C is in the range of 13 to 24%. A membrane 220 is obtained.
Then, as a He plasma treatment step, the surface of the low-k film 220 is modified by helium (He) plasma irradiation in a CVD apparatus. By modifying the surface by He plasma irradiation, the adhesion between the low-k film 220 and a CVD-SiO ₂ film 222 as a cap film to be described later formed on the low-k film 220 can be improved. . The gas flow rate was 1.7 Pa · m ³ / s (1000 sccm), the gas pressure was 1000 Pa, the high frequency power was 500 W, the low frequency power was 400 W, and the temperature was 400 ° C. When the cap CVD film is formed on the low-k film, it is effective to improve the adhesion with the cap CVD film by subjecting the surface of the low-k film to plasma treatment. As types of plasma gas, ammonia (NH ₃ ), nitrous oxide (N ₂ O), hydrogen (H ₂ ), He, oxygen (O ₂ ), silane (SiH ₄ ), argon (Ar), nitrogen (N ₂ ) Among these, He plasma is particularly effective because it causes little damage to the low-k film. The plasma gas may be a mixture of these gases. For example, it is effective to use He gas mixed with other gases.

In the above description, the interlayer insulating film in the lower layer wiring does not have to be a low-k film having a relative dielectric constant of 3.5 or less like a SiO ₂ film, but is particularly effective when a low-k film is included. It is.

In FIG. 2 (c), as the SiO ₂ film forming step, said after the He plasma treatment, as a cap film, the SiO ₂ by a thickness of 50nm is deposited on the low-k film 220 by the CVD method, SiO ₂ A film 222 is formed. By forming the SiO ₂ film 222, the low-k film 220 that cannot be directly lithographically protected can be protected, and a pattern can be formed in the low-k film 220. Such cap CVD films include SiO ₂ films, SiC films, SiOC films, SiCN films, etc., but from the viewpoint of reducing damage, the SiO ₂ film is excellent, and from the viewpoint of reducing the dielectric constant, the SiOC film has improved breakdown voltage. From the viewpoint, the SiC film and the SiCN film are excellent. Furthermore, it is possible to use SiO ₂ film and the SiC film laminated film of, or SiO ₂ film and the SiCO film laminated film of, or a laminated film of SiO ₂ film and SiCN film. Further, a part or all of the cap CVD film may be removed by CMP in a planarization step described later. The dielectric constant can be further reduced by removing the cap film. The thickness of the cap film is preferably 10 nm to 150 nm, and 10 nm to 50 nm is effective in reducing the effective relative dielectric constant.

In FIG. 2D, as the opening forming process, the opening 150 which is a wiring trench structure for producing a damascene wiring by a lithography process and a dry etching process is formed into an SiO ₂ film 222, a low-k film 220, and a base SiC film. 212. An exposed SiO ₂ film 222 and a low-k film positioned below the exposed SiO ₂ film 222 with respect to the substrate 200 on which the resist film is formed on the SiO ₂ film 222 through a lithography process such as a resist coating process and an exposure process (not shown). 220 may be removed by anisotropic etching using the underlying SiC film 212 as an etching stopper, and then the opening SiC 150 may be formed by etching the underlying SiC film 212. By using the anisotropic etching method, the opening 150 can be formed substantially perpendicular to the surface of the substrate 200. For example, as an example, the opening 150 may be formed by a reactive ion etching method.

FIG. 3 is a process cross-sectional view illustrating a process of the semiconductor device manufacturing method according to the first embodiment.
In FIG. 3, as a manufacturing method of the semiconductor device, a description will be given of main steps from the barrier metal forming step in FIG. 1 to the planarization step for completing the lower layer wiring formation through the subsequent steps.

In FIG. 3A, as a barrier metal film forming process, a barrier metal film 240 using a barrier metal material is formed on the surface of the opening 150 and the SiO ₂ film 222 formed by the opening forming process. Here, a tantalum nitride (TaN) film is formed as the barrier metal film by using an ALD method. Pentadimethyltantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) is used as a metal raw material for barrier metal film formation, and is an example of a reactive chemical species that reacts with the metal raw material to generate a TaN film. as a reducing gas for the metal material, using ammonia (NH _3), as the purge gas, using argon (Ar). By using Ar, it can be made cheap and easy to handle. Further, hydrogen (H ₂ ) is used as a reducing gas for the metal raw material, which is an example of a reactive chemical species that reacts with the metal raw material to remove impurities, particularly carbon (C).

FIG. 4 is a diagram showing a supply flow of each gas in the TaN film formation step.
As a Ta [N (CH ₃ ) ₂ ] ₅ supply step, Ta [N (CH ₃ ) ₂ ] ₅ is supplied for 1 s. Thereafter, Ar is supplied for 1 s and purged as an Ar supply step. In the H ₂ supply step, H ₂ is supplied for _{2 s} to react with impurities. On top of that, as NH ₃ supplying step, the NH ₃ 1s supplies. In the Ar supply process, Ar is supplied for 1 s and purged. This process is defined as one cycle, and 100 cycles are supplied.

FIG. 5 is a diagram showing a schematic configuration of the ALD apparatus.
In FIG. 5, inside the chamber 600, the base body 10 that has been processed up to the previous process on the base body 200, that is, the substrate, is placed on a substrate holder (wafer stage) 610 controlled to a predetermined temperature. Install. Then, gas is supplied into the chamber 600 from above. Further, the vacuum pump 630 is evacuated so that the inside of the chamber 600 becomes a predetermined pressure. Solid Ta [N ((CH ₃ ) ₂ ] ₅ contained in the container 650 is heated to 50 to 80 ° C. Ar gas is added as carrier gas into the heated Ta [N (CH ₃ ) ₂ ] ₅ . By supplying the gas, Ta [N (CH ₃ ) ₂ ] ₅ that has reached the saturated vapor pressure and gasified together with Ar can be supplied to the chamber 600. Using the chamber 600, the film formation temperature is 250 ° C. , Ta [N (CH ₃ ) ₂ ] ₅ supply process, Ar supply process as a purge after supplying Ta [N (CH ₃ ) ₂ ] ₅ , NH ₃ supply process, and purge after NH ₃ supply process The Ar supply step is performed.

Here, the gas amounts of Ta [N (CH ₃ ) ₂ ] ₅ , Ar, and NH ₃ were 1.68 Pa · m ³ / s (1000 sccm), and the pressure inside the chamber 600 was 339 Pa (3 Torr). Here, the amount of gas, Ta for _{[N (CH 3) 2]} 5, 0.5Pa · m 3 /s(300sccm)~1.68Pa · m 3 / s (1000sccm) is desirable. For ^{_{NH 3, 1.68Pa · m 3 /s(1000sccm)~3.36Pa}} · m 3 / s (2000sccm) is desirable. For Ar is a purge ^{gas, 1.68Pa · m 3 /s(1000sccm)~3.36Pa · m} 3 / s (2000sccm) is desirable. The film forming pressure is desirably 665 Pa (5 Torr) or less. The film forming temperature is preferably 250 to 300 ° C.

Further, hydrazine (H ₂ NNH ₂ ) or a hydrazine compound such as 1-1 dimethyl hydrazine or 1-2 dimethyl hydrazine may be used as a reducing gas for the metal raw material. By using hydrazine or a hydrazine compound, the reducing action can be made stronger than NH ₃ .

Further, H ₂ , nitrogen (N ₂ ), or He may be used as the purge gas. By using H ₂ as the purge gas, the following reactivity can be enhanced. Furthermore, since H ₂ can increase the purity, it is suitable for cleaning.

FIG. 6 is a conceptual diagram for explaining an outline of an apparatus including a plurality of chambers.
In FIG. 6, the apparatus 500 has a plurality of chambers 510, 520, and 530. The configuration of each chamber may be the same as the configuration shown in FIG. A wafer is set in the cassette chamber 550, and in the transfer chamber 540, a transfer robot transfers or unloads the wafer to each chamber. After the Ar supply process as a purge after supplying Ta [N (CH ₃ ) ₂ ] ₅ , the wafer is transferred to another chamber. Then, a Ta [N (CH ₃ ) ₂ ] ₅ supply step, an Ar supply step as a purge after the Ta [N (CH ₃ ) ₂ ] ₅ supply, an NH ₃ supply step, and a purge after the NH ₃ supply step in a separate chamber from the Ar supply step as by controlling the substrate temperature to 400 ° C., as H ₂ supplying step, supplying the H _2. Processes with different substrate temperatures can be made separate chambers, and the process can be stabilized by performing them in the same apparatus capable of vacuum transfer. Further, since the processing is performed without exposing the wafer to the outside air, adhesion of particles can be prevented. For example, the Ta [N (CH ₃ ) ₂ ] ₅ supply process, the Ar supply process, the NH ₃ supply process, and the Ar supply process are performed in the chamber 510, and the H ₂ supply process is performed in the chamber 520. The purge gas may be supplied to the same chamber as the H ₂ supply process.

Here, in this embodiment, the H ₂ supply step is performed after the Ta [N (CH ₃ ) ₂ ] ₅ supply step and the Ar supply step, but the Ta [N (CH ₃ ) ₂ ] ₅ supply is performed. The same effect can be obtained even if the H ₂ supply step is performed immediately after the step.

Here, the _{H 2} supply process, the amount of ^{gas, 1.68Pa · m 3 /s(1000sccm)~3.36Pa · m} 3 / s (2000sccm) is desirable. The film forming pressure is desirably 665 Pa (5 Torr) or less. The substrate temperature is preferably 350 to 400 ° C. Substrate temperature in H ₂ supplying step, it is desirable that a temperature 50 ° C. or higher than the deposition temperature.

As described above, Ta [N (CH ₃ ) ₂ ] ₅ is supplied onto the substrate as an example of the metal compound supply step, and H ₂ is supplied onto the heated substrate as a removal step, so that the Ta A predetermined component different from Ta metal in [N (CH ₃ ) ₂ ] ₅ , particularly carbon is removed here. Then, as a metal-containing film generation step, impurities are reduced by reducing Ta-containing molecules on the low-k film based on the Ta [N (CH ₃ ) ₂ ] ₅ from which the predetermined component has been removed with NH ₃ . A TaN film in which the residue is suppressed is generated. By repeating the Ta [N (CH ₃ ) ₂ ] ₅ supply process, the H ₂ supply process, and the NH ₃ supply process, a TaN film having a desired film thickness is deposited on the substrate in which the residual impurities are suppressed. be able to.

FIG. 7 is a diagram illustrating another schematic configuration example of the ALD apparatus.
In the apparatus in FIG. 5, gas is supplied from the upper part of the chamber 600 regardless of the size of the substrate 10 and regardless of the gas traveling direction, but as shown in FIG. It is more preferable that the gas is uniformly supplied from the shower head 620 to the entire surface of the base 10. Other configurations are the same as those in FIG.

  In FIG. 3B, an opening in which a barrier metal film 240 is formed by using a Cu thin film serving as a cathode electrode in a subsequent electrolytic plating process as a seed film 250 by a PVD method such as sputtering as a seed film forming process. The inner wall 150 and the surface of the substrate 200 are deposited (formed). Here, the seed film 250 is deposited to a thickness of 100 nm.

  In FIG. 3C, as a plating process, a Cu film 260 is deposited on the surface of the opening 150 and the base body 200 by electrochemical growth such as electrolytic plating using the seed film 250 as a cathode electrode. Here, a Cu film 260 having a thickness of 500 nm is deposited, and after the deposition, annealing is performed at a temperature of 250 ° C. for 30 minutes.

In FIG. 3D, as a planarization step, the Cu film 260, the seed film 250, and the barrier metal film 240, which become a wiring layer as a conductive portion deposited on the surface of the SiO ₂ film 222 by the CMP method, are removed by polishing. As a result, planarization is performed, and a buried structure to be a lower layer wiring as shown in FIG. 4D is formed.

In the case of multilayer wiring, the following steps are further performed.
FIG. 8 is a process cross-sectional view illustrating a part of the process of the method for manufacturing the semiconductor device to be multilayered according to the first embodiment.
Further, in FIG. 8, as the insulating film forming process, the SiC film forming process, the p-lowk film forming process, the He plasma processing process, the SiC film forming process, the low-k film forming process, the He plasma processing process, and the SiO ₂ film forming process. The process is shown. Subsequent steps will be described later.

In FIG. 8A, as a SiC film forming process which is a part of the insulating film forming process in the next layer, a SiC film 275 having a thickness of 50 nm is formed at a temperature of 400 ° C. in the same CVD apparatus subjected to reducing plasma. Form. The SiC film 275 functions as a diffusion preventing film, and by forming this SiC film 275, diffusion of Cu can be prevented. In addition to the SiC film 275 formed by the CVD method, a SiCN film, a SiCO film, a SiN film, or a SiO ₂ film can be used.

  In FIG. 8B, as a low-k film forming step, a low dielectric constant film having a lower relative dielectric constant than that of the SiC film 275 is formed on the SiC film 275 as in the step described with reference to FIG. Then, a low-k film 280 using a porous insulating material is formed. Similarly, as a He plasma treatment step, the surface of the low-k film 280 is modified by He plasma irradiation.

In FIG. 8C, after performing the He plasma treatment as a SiC film forming step, a SiC film 282 is formed on the low-k film 280 as a cap film by a CVD method. The SiC film 282 can be used as an etching stopper for forming grooves and holes for Cu filling by a dual damascene method to be described later by etching. Then, as a low-k film formation step, a low-k film 285 is formed on the SiC film 282. Similarly, as a He plasma treatment step, the surface of the low-k film 285 is modified by He plasma irradiation in a CVD apparatus. Then, as the SiO ₂ film forming step, as in the step described with reference to FIG. 2C, after performing the He plasma treatment, a SiO ₂ film 290 is formed on the low-k film 285 as a cap film by a CVD method. To do.

FIG. 9 is a process cross-sectional view illustrating a part of the process of manufacturing the semiconductor device to be multi-layered, following FIG.
In FIG. 9, as an opening forming process for forming an opening, a barrier metal film forming process, a via for forming a via and an upper layer wiring, and a conductive material depositing process for depositing a conductive material as an upper layer wiring forming process. And a seed film forming step. Subsequent steps will be described later.

In FIG. 9A, as the opening forming process, openings 152 and 154 which are wiring groove structures for producing dual damascene wiring in the lithography process and the dry etching process, as in the process described in FIG. Are formed on the SiO ₂ film 290, the low-k film 285, the SiC film 282, the low-k film 280, and the SiC film 275. As a hole forming step, an opening 152 serving as a via hole penetrating to the lower layer Cu film 260 deposited in the opening 150 is formed, and as an groove forming step, an opening 154 serving as a groove for an upper layer wiring is formed. Thereafter, the via bottom residue is removed with a dry etching cleaning liquid (for example, room temperature cleaning with EKC5920 for 5 minutes).

In FIG. 9B, as the barrier metal film forming step, the barrier metal material is formed on the surfaces of the openings 152 and 154 and the SiO ₂ film 290 formed by the opening forming step as in the step described with reference to FIG. A barrier metal film 242 using is formed to 5 nm by the ALD method. Others may be the same as described with reference to FIG.

  In FIG. 9C, as the seed film forming step, the cathode electrode in the subsequent electroplating step is performed by physical vapor deposition (PVD) method such as sputtering, as in the step described in FIG. A Cu thin film to be formed is deposited (formed) on the inner walls of the openings 152 and 154 in which the barrier metal film 242 is formed, the digging portion 156, and the surface of the substrate 200, using the seed film 252 as a seed film. Here, a seed Cu film was deposited to a thickness of 100 nm.

FIG. 10 is a process cross-sectional view illustrating a part of the process for manufacturing the semiconductor device to be multi-layered, following FIG. 9.
FIG. 10 further shows a plating process and a planarization process.

  In FIG. 10A, as the plating process, as in the process described in FIG. 3C, the seed film 252 is used as the cathode electrode, and the Cu film 264 is formed in the openings 152 and 154 and the substrate by electrochemical growth such as electrolytic plating. 200 is deposited on the surface. As a result, a via 262 connected to the lower layer wiring and the upper layer wiring is formed in a part of the Cu film 264. Here, after a Cu film having a thickness of 300 nm is deposited, annealing is performed at a temperature of 250 ° C. for 30 minutes.

In FIG. 10B, as a planarization process, as in the process described in FIG. 3D, a Cu film 264 serving as a wiring layer as a conductive portion deposited on the surface of the SiO ₂ film 290 by the CMP method, a seed By polishing and removing the film 252 and the barrier metal film 242, the film 252 and the barrier metal film 242 are planarized to form a buried structure as shown in FIG. The Cu film and the barrier metal film outside the groove are removed to form a second layer dual damascene Cu wiring.

FIG. 11 is a diagram showing the results of C concentration measurement.
In FIG. 11, an ALD film of TaN is formed on the SiO ₂ film using a low pressure CVD apparatus (here, an ALD apparatus), and Ta [N (CH ₃ ) ₂ ] ₅ (PDMAT) and NH ₃ are used as raw materials. As a result of supplying 100 cycles at a film formation temperature of 250 ° C., with PDMAT (1 s) → Ar (1 s) → H ₂ (2 s) → NH ₃ (1 s) → Ar (1 s) as one cycle Is shown. At the time of supplying H _2, processing was carried out by vacuum transfer into an apparatus heated to 400 ° C. After film formation, C concentration measurement was performed using XPS. The same evaluation was performed when H ₂ supply was not performed for comparison.
As shown in FIG. 11, in the conventional method, the C impurity that remains 5% is supplied, and in the first embodiment, the C impurity that remains on the surface after PDAM is supplied is heated to supply H _2. Thus, the residual C concentration could be reduced to 0.5% or less.

Embodiment 2. FIG.
In the second embodiment, as in the first embodiment, Ta [N (CH ₃ ) ₂ ] ₅ is used as a metal material to form a TaN film, and the barrier metal is formed without supplying H _2. Will be described. The second embodiment is the same as the first embodiment except for the barrier metal formation step, and thus the description thereof is omitted.
FIG. 12 is a flowchart for barrier metal formation in the second embodiment.
12, the barrier metal film forming step, and Ta as an example of a metal compound supplying step _{[N (CH 3) 2]} 5 for supplying Ta _{[N (CH 3) 2]} 5 supplying step (S102), argon A series of steps of (Ar) supply step (S104), NH ₃ supply step (S1206) as an example of the removal step and the metal-containing film generation step, and Ar supply step (S110) are repeated as one cycle. Then, after forming a TaN film having a desired thickness, copper (Cu) as a conductive material is deposited by a physical vapor deposition (PVD) method and a plating method to form a Cu wiring.

Reducing gas of the metal raw material, which is an example of a reactive chemical species that uses Ta [N (CH ₃ ) ₂ ] ₅ as a metal raw material for forming a barrier metal film and reacts with the metal raw material to generate a TaN film. As, NH ₃ is used, and Ar is used as a purge gas. As described above, the use of Ar can be made inexpensive and easy to handle. The NH ₃ also serves as a reducing gas for the metal raw material, which is an example of a reactive chemical species that reacts with the metal raw material to remove impurities, particularly carbon (C).

FIG. 13 is a diagram showing a supply flow of each gas in the TaN film forming step.
As a Ta [N (CH ₃ ) ₂ ] ₅ supply step, Ta [N (CH ₃ ) ₂ ] ₅ is supplied for 1 s. Thereafter, Ar is supplied for 1 s and purged as an Ar supply step. Then, the NH ₃ supply process, the NH ₃ 5s supplied into a chamber and a substrate temperature was heated to 370 ° C.. In the Ar supply process, Ar is supplied for 1 s and purged. This process is defined as one cycle, and 100 cycles are supplied.

The ALD apparatus is the same as that shown in FIG. In the second embodiment, an apparatus having a plurality of chambers as shown in FIG. 6 is used.
After performing a Ta [N (CH ₃ ) ₂ ] ₅ supply step and an Ar supply step as a purge after supplying Ta [N (CH ₃ ) ₂ ] ₅ at a substrate temperature of 250 ° C. in a certain chamber, The wafer is transferred to another chamber. Then, at _{Ta [N (CH 3) 2} ] 5 feed step _{and, Ta [N (CH 3)} 2] Another chamber with Ar supply step after ₅ supply, to control the substrate temperature to 370 ° C., As the NH ₃ supply step, NH ₃ is supplied. Processes with different substrate temperatures are kept in separate chambers and performed in the same equipment that can be transported in vacuum, and the process can be stabilized, and processing is performed without exposing the wafer to the outside air, thus preventing particle adhesion. The points that can be done are as described above. For example, the Ta [N (CH ₃ ) ₂ ] ₅ supply process, the Ar supply process, and the Ar supply process after the NH ₃ supply process are performed in the chamber 510, and the NH ₃ supply process is performed in the chamber 520. The purge gas may be supplied to the same chamber as the NH ₃ supply process. Further, it may be performed Ar supply step after NH ₃ supplying process in NH ₃ supply process and the same chamber.

Here, in this embodiment, the NH ₃ supply step is performed on the heated substrate after the Ta [N (CH ₃ ) ₂ ] ₅ supply step and the Ar supply step, but Ta [N (CH ₃ ) ₂ ] ₅ The same effect can be obtained by performing the NH ₃ supply step on the heated substrate immediately after the supply step.

Here, the gas amounts of Ta [N (CH ₃ ) ₂ ] ₅ , Ar, and NH ₃ were 1.68 Pa · m ³ / s (1000 sccm), and the pressure inside the chamber 600 was 339 Pa (3 Torr). Here, the amount of gas, Ta for _{[N (CH 3) 2]} 5, 0.5Pa · m 3 /s(300sccm)~1.68Pa · m 3 / s (1000sccm) is desirable. For ^{_{NH 3, 1.68Pa · m 3 /s(1000sccm)~3.36Pa}} · m 3 / s (2000sccm) is desirable. For Ar is a purge ^{gas, 1.68Pa · m 3 /s(1000sccm)~3.36Pa · m} 3 / s (2000sccm) is desirable. The film forming pressure is desirably 665 Pa (5 Torr) or less. In the Ta [N (CH ₃ ) ₂ ] ₅ supply and Ar supply, it is desirable to control the substrate temperature to 250 to 300 ° C. NH ₃ as supplied, it is desirable to control the substrate temperature to 350 to 400 ° C.. By raising the substrate temperature at the time of supplying NH ₃ , it can be removed by reacting with impurity components and further reacting with adsorbed molecules of Ta [N (CH ₃ ) ₂ ] ₅ to form a TaN film. Therefore, the removal step and the metal-containing film generation step can be performed in one step. The substrate temperature in the NH ₃ supply step is preferably 50 ° C. or more higher than the substrate temperature at the time of Ta [N (CH ₃ ) ₂ ] ₅ supply. By increasing the temperature, the reaction time can be shortened and the effect of C removal can be improved.

As described above, H ₂ , N _2, or He may be used as the purge gas.

FIG. 11 also shows the residual C concentration of TaN formed by the method in the second embodiment. Also performs ALD deposition of TaN on the SiO ₂ film in the first embodiment, as a raw _material, using a _{Ta [N (CH 3) 2} ] 5 (PDMAT) and NH _3, at a deposition temperature of 250 ° C., PDMAT (1 s) → Ar (1 s) → NH ₃ (5 s) → Ar (1 s) was set as one cycle, and 100 cycles were supplied. At the time of supplying NH _3, the treatment was carried out by vacuum transfer into an apparatus heated to 370 ° C. After film formation, C concentration measurement was performed using XPS.
As shown in FIG. 11, NH ₃ is supplied by heating C impurities remaining in 5% in the conventional method, and heating C impurities remaining on the surface after PDMAT supply in the second embodiment. Thus, the residual C concentration could be further reduced as compared with the first embodiment.

Embodiment 3 FIG.
In the third embodiment, as in the first embodiment, Ta [N (CH ₃ ) ₂ ] ₅ is used as a metal raw material to form a TaN film, and as in the second embodiment, H ₂ is not supplied. The case where barrier metal formation is performed will be described. The third embodiment is the same as the first embodiment except for the barrier metal formation step, and thus the description thereof is omitted.
FIG. 14 is a flowchart for barrier metal formation in the second embodiment.
14, the barrier metal film forming step, and Ta as an example of a metal compound supplying step _{[N (CH 3) 2]} 5 for supplying Ta _{[N (CH 3) 2]} 5 supplying step (S102), argon One cycle includes a series of steps of (Ar) supply step (S104), hydrazine (H ₂ NNH ₂ ) supply step (S1406) as an example of the removal step and the metal-containing film generation step, and Ar supply step (S110). Repeat as. Then, after forming a TaN film having a desired thickness, copper (Cu) as a conductive material is deposited by a physical vapor deposition (PVD) method and a plating method to form a Cu wiring.

Reducing gas of the metal raw material, which is an example of a reactive chemical species that uses Ta [N (CH ₃ ) ₂ ] ₅ as a metal raw material for forming a barrier metal film and reacts with the metal raw material to generate a TaN film. As, H ₂ NNH ₂ is used, and Ar is used as a purge gas. As described above, the use of Ar can be made inexpensive and easy to handle. The H ₂ NNH ₂ also serves as a reducing gas for the metal raw material, which is an example of a reactive chemical species that reacts with the metal raw material to remove impurities, particularly carbon (C).

In addition to H ₂ NNH ₂ , hydrazine compounds such as 1-1 dimethyl hydrazine and 1-2 dimethyl hydrazine may be used as the reducing gas and impurity removal gas for the metal raw material. Even if a hydrazine compound is used, the same effect as hydrazine can be obtained. By using hydrazine or a hydrazine compound, the reducing action can be made stronger than NH ₃ .

FIG. 15 is a diagram showing a supply flow of each gas in the TaN film forming step.
As a Ta [N (CH ₃ ) ₂ ] ₅ supply step, Ta [N (CH ₃ ) ₂ ] ₅ is supplied for 1 s. Thereafter, Ar is supplied for 1 s and purged as an Ar supply step. Then, as an NH ₃ supply step, H ₂ NNH ₂ is supplied for 3 s into a chamber heated to a substrate temperature of 350 ° C. In the Ar supply process, Ar is supplied for 1 s and purged. This process is defined as one cycle, and 100 cycles are supplied.

The ALD apparatus is the same as that shown in FIG. In the third embodiment, an apparatus having a plurality of chambers as shown in FIG. 6 is also used.
After performing a Ta [N (CH ₃ ) ₂ ] ₅ supply step and an Ar supply step as a purge after supplying Ta [N (CH ₃ ) ₂ ] ₅ at a substrate temperature of 250 ° C. in a certain chamber, The wafer is transferred to another chamber. Then, at _{Ta [N (CH 3) 2} ] 5 feed step _{and, Ta [N (CH 3)} 2] Another chamber with Ar supply step after ₅ supply, to control the substrate temperature to 350 ° C., as H ₂ NNH ₂ supplying _step, supplying the H 2 NNH _2. Processes with different substrate temperatures are kept in separate chambers and performed in the same equipment that can be transported in vacuum, and the process can be stabilized, and processing is performed without exposing the wafer to the outside air, thus preventing particle adhesion. The points that can be done are as described above. For example, it carried out in the _{Ta [N (CH 3) 2} ] 5 feed step and Ar supply step and _H 2 NNH ₂ chamber 510 and Ar supply step after the supplying _step, performed in the chamber 520 of the H 2 NNH ₂ supply process. The purge gas may be supplied to the same chamber as the H ₂ NNH ₂ supply step. _Further, it may be performed Ar supply process after H 2 NNH ₂ supply process with _H 2 NNH ₂ supply process and the same chamber.

Here, in this embodiment, the H ₂ NNH ₂ supply step is performed on the heated substrate after the Ta [N (CH ₃ ) ₂ ] ₅ supply step and the Ar supply step, but Ta [N Even if the H ₂ NNH ₂ supplying step is performed on the heated substrate immediately after the (CH ₃ ) ₂ ] ₅ supplying step, the same effect can be obtained.

Here, the gas amounts of Ta [N (CH ₃ ) ₂ ] ₅ , Ar, and H ₂ NNH ₂ are 1.68 Pa · m ³ / s (1000 sccm), and the pressure inside the chamber 600 is 339 Pa (3 Torr). did. Here, the amount of gas, Ta for _{[N (CH 3) 2]} 5, 0.5Pa · m 3 /s(300sccm)~1.68Pa · m 3 / s (1000sccm) is desirable. For ^{_{NH 3, 1.68Pa · m 3 /s(1000sccm)~3.36Pa}} · m 3 / s (2000sccm) is desirable. For Ar is a purge ^{gas, 1.68Pa · m 3 /s(1000sccm)~3.36Pa · m} 3 / s (2000sccm) is desirable. The film forming pressure is desirably 665 Pa (5 Torr) or less. In the Ta [N (CH ₃ ) ₂ ] ₅ supply and Ar supply, it is desirable to control the substrate temperature to 250 to 300 ° C. When supplying H ₂ NNH ₂ , it is desirable to control the substrate temperature to 350 to 400 ° C. By raising the substrate temperature at the time of supplying H ₂ NNH ₂ , it can be removed by reacting with impurity components and further reacting with adsorbed molecules of Ta [N (CH ₃ ) ₂ ] ₅ to form a TaN film. . Therefore, the removal step and the metal-containing film generation step can be performed in one step. The substrate temperature in the H ₂ NNH ₂ supply step is desirably higher by 50 ° C. or more than the substrate temperature at the time of Ta [N (CH ₃ ) ₂ ] ₅ supply. By increasing the temperature, the reaction time can be shortened and the effect of C removal can be improved.

As described above, H ₂ , N _2, or He may be used as the purge gas.

FIG. 11 also shows the residual C concentration of TaN formed by the method in the third embodiment. As in Embodiment 1, an ALD film of TaN is formed on the SiO ₂ film, and Ta [N (CH ₃ ) ₂ ] ₅ (PDMAT) and H ₂ NNH ₂ are used as raw materials at a film forming temperature of 250 ° C. , PDMAT (1 s) → Ar (1 s) → H ₂ NNH ₂ (3 s) → Ar (1 s) was taken as one cycle, and 100 cycles were supplied. At the time of supplying NH _3, the treatment was carried out by vacuum transfer into an apparatus heated to 370 ° C. After film formation, C concentration measurement was performed using XPS.
As shown in FIG. 11, in the conventional method, C impurities that remain 5% are supplied, and in Embodiment 3, C impurities that remain on the surface after PDMAT supply is heated to supply H ₂ NNH ₂ . As a result, the residual C concentration could be further reduced as compared with the first and second embodiments.

In the above description, Ta [N ((CH ₃ ) ₂ ] ₅ is used as a metal raw material for the TaN film, but pentadiethyl tantalum (Ta [N (C ₂ H ₅ ) ₂ ] ₅ ) is also used. The same effect can be obtained, and tantalum chloride (TaCl ₅ ) may be used, and when TaCl ₅ is used, the concentration of halogen as an impurity can be reduced. As a barrier metal to be formed, a nitride film or carbon nitride film of refractory metal such as tantalum carbonitride (TaCN), tungsten nitride (WN), tungsten carbonitride (WCN), titanium nitride (TiN), etc. Tantalum (Ta), titanium (Ti), tungsten (W) alone, WSiN, etc., or zirconi For example, tetradiethyltitanium (Zr) may be used as a metal raw material of a Ti-based barrier metal film. Ti [N (C ₂ H ₅ ) ₂ ] ₄ ), tetradimethyltitanium (Ti [N (CH ₃ ) ₂ ] ₄ ), or titanium chloride (TiCl ₄ ) may be used. The residual concentration of (C) and halogen (Cl) can be reduced, and WF ₆ may be used as a metal raw material for a W-based barrier metal film, and in such a case, fluorine (F) is used as an impurity. The residual concentration of can be reduced.

  Here, as a material of the wiring layer in each of the above embodiments, a material mainly containing Cu used in the semiconductor industry, such as a Cu—Sn alloy, a Cu—Ti alloy, and a Cu—Al alloy, is used in addition to Cu. The same effect can be obtained.

  In the case of forming a multilayer wiring structure or the like, the substrate 200 in each drawing is formed by forming a lower wiring layer and an insulating film.

  The embodiments have been described above with reference to specific examples. However, the present invention is not limited to these specific examples.

  For example, the substrate 200 on which an interlayer insulating film is formed in each embodiment can have various semiconductor elements or structures not shown. Further, an interlayer insulating film may be further formed on a wiring structure having an interlayer insulating film and a wiring layer instead of the semiconductor substrate. The opening may be formed so that the semiconductor substrate is exposed, or may be formed on the wiring structure.

  Further, the film thickness of the interlayer insulating film and the size, shape, number, and the like of the opening can be appropriately selected from those required in the semiconductor integrated circuit and various semiconductor elements.

  In addition, any semiconductor device manufacturing method that includes the elements of the present invention and whose design can be changed as appropriate by those skilled in the art is included in the scope of the present invention.

  In addition, for the sake of simplicity of explanation, techniques usually used in the semiconductor industry, such as a photolithography process, cleaning before and after processing, are omitted, but it goes without saying that these techniques are included.

3 is a flowchart for barrier metal formation in Embodiment 1. FIG. FIG. 6 is a process cross-sectional view illustrating a process of the semiconductor device manufacturing method in the first embodiment. FIG. 6 is a process cross-sectional view illustrating a process of the semiconductor device manufacturing method in the first embodiment. It is a figure which shows the supply flow of each gas in a TaN film formation process. It is a figure which shows schematic structure of an ALD apparatus. It is a conceptual diagram for demonstrating the outline | summary of the apparatus provided with the several chamber. It is a figure which shows the other schematic structural example of an ALD apparatus. FIG. 6 is a process cross-sectional view illustrating a part of the process of manufacturing the semiconductor device to be multilayered according to the first embodiment. FIG. 9 is a process cross-sectional view illustrating a part of the process of manufacturing the semiconductor device having the multilayer wiring, continued from FIG. 8. FIG. 10 is a process cross-sectional view illustrating a part of the process of manufacturing the semiconductor device having the multilayer wiring, continued from FIG. 9. It is a figure which shows the result of having performed C density | concentration measurement. FIG. 9 is a flowchart for forming a barrier metal in the second embodiment. It is a figure which shows the supply flow of each gas in a TaN film formation process. FIG. 9 is a flowchart for forming a barrier metal in the second embodiment. It is a figure which shows the supply flow of each gas in a TaN film formation process. It is process sectional drawing which shows the manufacturing method of the semiconductor device which has the multilayer wiring structure which combined the conventional low-k film | membrane and Cu wiring. It is a gas supply flow figure which shows the example of film formation of the barrier metal by ALD method. It is a gas supply flow figure which shows the example of film formation of the barrier metal by ALD method.

Explanation of symbols

10, 200 Base 20 TaR film 22 TaN film 150, 152, 154 Opening 156 Excavation part 212, 275, 282 SiC film 220, 280, 285 Low-k film 221, 281 Insulating film 222, 290 SiO ₂ film 240, 242 Barrier metal film 250, 252 Seed film 260, 264 Cu film 262 Via 500 Device 510, 520, 530, 600 Chamber 540 Transfer chamber 550 Cassette chamber 610 Substrate holder 620 Shower head 630 Vacuum pump 650 Container

Claims (10)

A metal compound supply step of supplying a metal compound on the substrate;
A removal step of removing a predetermined component different from the metal in the metal compound;
A metal-containing film generating step for generating a metal-containing film containing the metal based on the metal compound from which the predetermined component has been removed;
With
A method of manufacturing a semiconductor device, wherein the metal-containing film is deposited on the substrate by repeating the metal compound supplying step, the removing step, and the metal-containing film generating step.   2. The method of manufacturing a semiconductor device according to claim 1, wherein in the removing step, the substrate is controlled to a temperature higher than the temperature of the substrate in the metal compound supplying step.   The method of manufacturing a semiconductor device according to claim 2, wherein the high temperature is a temperature that is 50 ° C. or more higher than the temperature of the base in the metal compound supply step. In the removing step, a first reactive chemical species that reacts with the predetermined component is supplied onto the substrate,
The method for manufacturing a semiconductor device according to claim 1, wherein in the metal-containing film generation step, a second reactive chemical species that reacts with the metal compound is supplied. The method for manufacturing a semiconductor device according to claim 4, wherein hydrogen (H ₂ ) is used as the first reactive chemical species. Wherein the second reactive species, ammonia (NH ₃₎ and a method of manufacturing a semiconductor device according to claim 4 or 5, wherein the use of any of the hydrazine-containing substance.   After the metal compound supplying step, the removing step reacts with and removes the predetermined component, and further supplies a reactive chemical species that reacts with the metal compound from which the predetermined component has been removed onto the substrate. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the step of generating the metal-containing film is performed.   8. The method of manufacturing a semiconductor device according to claim 7, wherein the reactive chemical species is supplied onto the substrate controlled at a temperature higher than the temperature of the substrate in the metal compound supplying step. Method for producing the as reactive species, ammonia (NH ₃₎ and hydrazine inclusions and semiconductor device according to claim 7 or 8, wherein the use of.   10. The method of manufacturing a semiconductor device according to claim 1, wherein any one of a tantalum (Ta) compound, a titanium (Ti) compound, and a tungsten (W) compound is used as the metal compound.

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