JP2005275722A - Electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device having a flush memory capable of efficiently writing data into the flush memory. <P>SOLUTION: The electronic device comprises: the flush memory consisting of a plurality of data units for accessing data on a sector unit basis and a data management unit storing entry information on the data stored on the data units; and a control means selecting one data unit for writing the data based on the empty size of each of the data units obtained by referring to the entry information stored on the data management unit in writing the data into any one of the data units and writing the data. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an electronic device including a flash memory.

Conventionally, access control including data writing in block units and batch erase of data in sector units is performed based on sector management information and block management information, and a sector to which data is to be written is selected based on the number of sector erasures A flash memory control method is known. In this method, data is written by selecting the sector having the smallest number of sector erases (see, for example, Patent Document 1).
JP 2000-330850 A

  However, in the control method shown in Patent Document 1, when writing, a sector with a small number of sector erasures is not necessarily a sector with a large free space. If this is executed and the capacity is insufficient, this sector must be garbage collected without looking at other areas. Therefore, there is a problem that the processing speed is reduced by executing this garbage collection. In particular, the control method disclosed in Patent Document 1 has a problem that the processing time of data writing becomes long because the possibility of executing garbage collection at the time of writing is high.

  The present invention has been made in view of such circumstances, and an object thereof is to provide an electronic apparatus including a flash memory that can efficiently write data to the flash memory.

  The invention according to claim 1 is a flash memory comprising a plurality of data units that access data for each sector unit, and a data management unit that stores entry information of data stored in the data units; When writing data to any of the data units, based on the free size of each data unit obtained by referring to the entry information stored in the data management unit, select the data unit to write the data, And a control means for writing data.

  The invention according to claim 2 reads a sector including an area indicated by the designated address into the cache memory when there is a data write request for the designated address of the cache memory and the flash memory, When the data including the area for writing the data for the new data write request is written to the cache memory and the sector including the area for writing the new data write request data is different from the sector read into the cache memory, the cache memory And cache control means for writing data stored in the flash memory to a sector different from the sector from which the flash memory was read.

  According to a third aspect of the present invention, the flash memory has a spare unit, and the control means refers to entry information stored in the data management unit, and the number of invalid sectors has a predetermined threshold. Only the valid sector of the data unit exceeding the value is copied to the spare unit, the inside of the data unit of the copy source is erased, and garbage collection as a new spare unit is executed.

  The invention according to claim 4 is characterized in that the garbage collection is activated during standby.

  The invention according to claim 5 has a spare unit in the flash memory, and the control means obtains a maximum erase count and a minimum erase count among the erase counts of the data management unit and the data unit, When the difference between the maximum erase count and the minimum erase count exceeds a predetermined threshold value, the data sector of the minimum erase count or the valid sector of the data management unit is copied to the spare unit, and the copy source data unit The wear leveling is performed by deleting the inside or the data management unit and making a new spare unit.

  The invention according to claim 6 is characterized in that the wear leveling is activated during standby.

  According to the present invention, a flash memory block erase unit is handled as a single unit, and a flash memory system having a data unit, a data management unit, and a spare unit is used. Since the unit is determined, garbage collection is not executed immediately before writing, so that the execution speed at the time of writing can be improved.

  Hereinafter, an electronic apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of the embodiment. Here, a mobile phone terminal will be described as an example of an electronic device. In FIG. 1, reference numeral 1 denotes a wireless unit that establishes a communication line with a base station and performs communication. Reference numeral 2 denotes a control unit that performs overall control of the operation of the mobile phone terminal. Reference numeral 3 denotes a RAM that temporarily stores user-specific information and data. Reference numeral 4 denotes a ROM in which a program for operating the mobile phone terminal is stored in advance. Reference numeral 5 denotes a microphone that collects the call voice and a speaker that generates the call voice. Reference numeral 6 denotes an operation unit including dial keys, function keys, and the like. Reference numeral 7 denotes a display unit composed of a liquid crystal display. Reference numeral 8 denotes a flash memory driver for accessing data to the flash memory 9.

  Here, the configuration of the storage area in the flash memory 9 shown in FIG. 1 will be described with reference to FIG. FIG. 2 is an explanatory diagram showing the configuration of the storage area of the flash memory 9 shown in FIG. The flash memory 9 is divided into units for each block erase unit. Here, it is assumed that each unit is composed of six data units, one data management unit, and one spare unit, and each unit has a capacity of 8 kbytes. The data unit is a unit for storing data as the name indicates, and each data unit has sectors separated by 64 bytes. This sector is a writing unit as data.

  The data management unit is a unit that manages data units and has entry information in units of 8 bytes. In addition, a unit header is provided for the first one sector of each unit. This unit header is provided with a unit identification mark and a block erase counter. The unit identification mark is used to identify whether the unit is a data management unit, a spare unit, or a data unit. This mark is rewritten each time a predetermined block is used depending on the use at that time. At the time of formatting, the data management unit is assigned to the first block, and the spare unit is assigned to the last block. The block erase counter records the number of times the block has been erased, and is set to 00h during formatting. Each unit header stores a value from 00h to FFh, and returns to 00h after FFh by control.

  The spare unit is a unit used when executing garbage collection or wear leveling. The entry information of the data management unit has a 64-byte sector start address, unit number (block number for data storage), sector number, valid / invalid determination unit, and invalid entry dirty / clean determination unit. The valid / invalid determination unit overwrites 00h when data is deleted. Although the data is invalid, at this point, the dirty / clean discriminator of the invalid entry is still dirty. That is, the invalid sector managed on the flash memory system 9 is shown. The dirty / clean discriminating unit overwrites 00h when garbage is collected. That is, the data is invalid and clean. For data management, it is completely deleted. The entry is updated by writing the new entry into the empty area and invalidating the old entry. When the data management unit including the entry information is garbage collected, the dirty entry is copied to the spare unit, but the clean entry unit is already garbage collected, so the clean entry is not copied.

  Next, garbage collection will be described. Garbage collection means that invalid sectors are created in the data unit by deleting / editing data, etc., except that only valid sectors are copied to the spare unit, and the source unit is block erased. The erased unit becomes the next spare unit. At the same time as copying, the entry information of the data management unit is also updated by writing new entry information and invalidating the old entry information. The target unit for garbage collection is the unit with the most invalid sectors. Also, the garbage collection start condition is when it is determined that no unit is empty at the time of writing (before writing), or when the number of invalid sectors exceeds a predetermined threshold at the time of completion of writing / waiting. The data management unit is also subject to garbage collection, and the activation condition is when it is determined that the clean part of the dirty / clean discriminating part of the invalid entry exceeds the threshold. The operation copies the valid / invalid sector on the entry to the spare unit and does not copy the clean part. Then, the block of the original entry that is no longer needed is erased and used as the next spare unit.

  Next, wear leveling will be described. Wear leveling means that in the flash memory 9 in which the number of erasures is limited, all the blocks are managed so as to be used on average, so that only a specific block is erased repeatedly and the lifetime ends first. In order to avoid this, the entire memory is effectively used. For activation of wear leveling, each block erase counter is checked, and if it is equal to or greater than the threshold for wear leveling activation, the block having the smallest counter value is selected. Then, all the data in this block is copied to the spare unit, and at the same time, new entry information is written, the old entry information is invalidated, and finally the copy source is erased as a block to be the next spare unit. Wear leveling is not executed until the difference between each block erase counter value (minimum and maximum) exceeds the threshold for starting wear leveling.

  Priorities are set for garbage collection or wear leveling that is activated at the end of writing / standby. The first is garbage collection of the data management unit, the second is garbage collection of the data unit, and the third is wear leveling. In one activation, one of them is executed according to the priority order.

  Next, the configuration of the flash memory driver 8 shown in FIG. 1 will be described with reference to FIG. FIG. 3 is a block diagram showing a configuration of the flash memory driver 8 shown in FIG. Reference numeral 81 denotes an application I / F unit that accepts a write / read request from the application side and distributes and sends the request. Reference numeral 82 denotes a cache control unit that has a cache memory 83 having the same size as the sector size and performs a control operation to be described later. Reference numeral 84 denotes a sequence control unit that executes and controls the access unit by sequentially performing an operation desired to be performed on the flash memory, that is, a request operation from the application side. Reference numeral 85 denotes a unit header access unit for writing / reading a unit identification mark and a block erase counter to / from the unit header. Reference numeral 86 denotes an entry access unit for writing / reading a unit number, sector number, valid / invalid discrimination unit, and the like. Reference numeral 87 denotes a sector data access unit for writing / reading data of a 64-byte sector. Reference numeral 88 denotes an entry search unit that searches the data management unit to acquire a unit having the maximum number of invalid sectors, or acquires the number of clean in the dirty / clean discrimination unit. Reference numeral 89 denotes a device I / F unit that directly executes writing / reading with respect to the flash memory.

  Next, the operation of the cache control unit 82 will be described with reference to FIG. When there is a data write request for size specification from the application side, the cache control unit 82 reads the sector including the specified address from the flash memory 9 to the cache memory 83. At this time, the cache control unit 82 obtains the unit number and sector number based on the designated address and reads the data. Then, this data is overwritten in the cache memory 83 by the designated size, and the cache holding flag is turned ON. If there is data exceeding the size of the cache memory 83, it is written to another sector later. Subsequently, the data in the cache memory 83 is written into the flash memory 9, and after writing, the cache holding flag is turned OFF.

  On the other hand, when there is a write request for 1-byte data from the application side without specifying the size, the cache control unit 82 reads the sector including the specified address from the flash memory 9 to the cache memory 83. Then, the data is overwritten in the cache memory 83, and the cache holding flag is turned ON. Furthermore, when a 1-byte data write request is received by address and data designation, one of the following two processes is performed. If the request target is the same sector, the data is overwritten in the cache memory 83, and if it is another sector address, the data stored in the current cache memory 83 is written to the flash memory 9, and the cache holding flag Set to OFF. Then, the sector including the designated address is read from the flash memory 9 to the cache memory 83, this data is overwritten in the cache memory 83, and the cache holding flag is turned ON.

  The application side needs to make a cache data flush request after making a final data write request. As a result, the last remaining data in the cache memory 83 can be written into the flash memory 9. When the cache control unit 82 receives the flush request, the cache control unit 82 writes to the flash memory 9 only when the cache holding flag is ON. If there is a read request, data is read directly from the flash memory 9 basically. However, if there is a read request when the data in the cache memory 83 has not yet been written to the flash memory 9, the data in the cache memory 83 is read.

  As described above, when data having a relatively small size and 1-byte data are rewritten at a high frequency, the burden of generating many invalid entries / sectors in the data management unit or the data unit becomes large. By providing the part 82, this problem can be solved.

  Next, the format processing operation will be described with reference to FIG. The formatting process is to initialize the flash memory 9 so that it can be read and written, that is, to add a unit header to each unit. The application I / F unit 81 receives a request from the application and passes it to the sequence control unit 84. In response to this, the sequence control unit 84 erases all the units via the device I / F unit 89 (step S1). Next, the sequence control unit 84 generates a unit header (step S2). After this formatting process, all FFh except for the unit header is obtained.

  Next, the operation of the writing process will be described with reference to FIG. The writing process is a process for writing data for one sector. In the case of writing for a plurality of sectors, this process is repeated. First, when a write request is received, the entry search unit 88 searches the entry information of the data management unit and determines a unit number having a free area for writing (step S3). At this time, the entry search unit 88 selects the unit with the most free space. Specifically, the entry information of the data management unit is searched from the beginning to the end, and FFFFh in which no entry address is written is the end. The dirty / clean discriminating unit extracts the ones that are not clean, that is, the ones that make sense as entries, thereby obtaining the total number of valid and invalid sectors per unit. The unit with the smallest number of valid / invalid sectors is the unit with the most free space. Subsequently, an empty sector number of the unit is acquired (step S4), and a physical address on the flash memory 9 is determined (step S5). Then, entry information is written to the data management unit via the entry access unit 86 (step S6), and one sector data is written via the sector data access unit 87 (step S7). If there is an old entry, the entry access unit 86 invalidates the old entry (steps S8 and S9). At the first write of an entry, it becomes new and there is no corresponding old entry.

  Next, the operation of the reading process will be described with reference to FIG. If the read-out sector data exists in the cache memory 83, the read process only needs to be read out. When there is no target sector data in the cache memory 83, the entry search unit 88 reads the entry data (step S10). Then, a unit number and a sector number in which designated address data from the application side is stored are acquired (step S11), and a physical address is determined (step S12). Data at this address is read out via the device I / F unit 89 (step S13).

  Next, with reference to FIG. 7, the detailed operation of the process of determining the unit to be written by the entry search unit 88 will be described. First, the entry search unit 88 calculates the free capacity of each unit (step S21). The free space is the sum of the number of valid sectors (valid / invalid discriminator is FFh) and the number of invalid sectors that require management (valid / invalid discriminator is 00h and dirty / clean discriminator is FFh). This is a value obtained by subtracting from the size (8 kbytes).

  Next, the entry search unit 88 determines whether there are a plurality of units having the maximum free capacity (step S22). If the result of this determination is that there is one unit with the maximum free space, this unit is determined as the unit to be written (step S23).

  On the other hand, when there are a plurality of units with the maximum free capacity (there are some with the maximum free capacity and the same capacity value), the entry search unit 88 determines the number of valid sectors between the units with the maximum free capacity. Are compared (step S24). Then, the entry search unit 88 determines whether there are a plurality of units having the maximum number of effective sectors (step S25). If the result of this determination is that there is one unit with the maximum number of valid sectors, this unit is determined as the unit to be written (step S26).

  Next, when there are a plurality of units with the maximum number of effective sectors (the number of effective sectors is the same with the maximum number of effective sectors), the entry search unit 88 performs block erasure between the units with the maximum number of effective sectors. The number of times is acquired (step S27). Then, one of the units satisfying the conditions of steps S22 and S25 and having the minimum erase count is selected and determined as a unit to be written (step S28).

  As described above, since the unit to be written is determined based on the free size of the unit without determining the number of erases of each unit at the time of writing as in the conventional control method, writing to this unit is always performed. It is possible to prevent garbage collection from being performed immediately before writing.

In addition, by providing the cache memory 83 for continuous write requests for each byte, the sector update is not repeated, and an increase in garbage collection can be prevented. By providing the cache memory 83, the speed can be increased and writing to the flash memory 9 with low efficiency can be avoided. That is, when the sector data existing in the cache memory 83 includes the data address of the write request from the application, it is only necessary to overwrite the cache memory 83 and not write to the flash memory 9 each time. If 64-byte sector data is written to the flash memory 9 each time 1-byte data is written, the number of invalid sectors increases. However, there is a great advantage that this can be avoided. Further, the most efficient garbage collection can be realized by setting the target unit of garbage collection not to be the unit with the lowest use frequency but to the unit with the largest number of invalid sectors. Furthermore, by executing garbage collection or wear leveling during standby, it is possible to reduce the amount of garbage in the flash memory 9 when the user is not conscious, and to avoid uneven block erase.
In addition, a simple system can be provided by not using FAT, and since it does not use FAT, it is possible to avoid a situation where recovery is difficult due to FAT destruction, etc., and since there is no file concept, the system configuration is simplified. It becomes possible to do.

  Further, the application side can perform writing / reading to / from the flash memory 9 simply by designating a continuous address from 0 without being aware of the sector arrangement on the flash memory 9. In this way, when a logical address is designated by the application side, the flash memory driver 8 can convert it to a target physical address and execute writing / reading. This can be applied to any electronic device that performs memory management having continuous addresses, and can be applied to, for example, a mobile phone using mobile communication or a personal digital assistant (PDA) having a mobile communication function.

  Further, the program for realizing the function of the processing unit in FIG. 1 is recorded on a computer-readable recording medium, and the program recorded on the recording medium is read into the computer system and executed to control the flash memory 9. Processing may be performed. Here, the “computer system” includes an OS and hardware such as peripheral devices. The “computer-readable recording medium” refers to a storage device such as a flexible medium, a magneto-optical disk, a portable medium such as a ROM and a CD-ROM, and a hard disk incorporated in a computer system. Further, the “computer-readable recording medium” refers to a volatile memory (RAM) in a computer system that becomes a server or a client when a program is transmitted via a network such as the Internet or a communication line such as a telephone line. In addition, those holding programs for a certain period of time are also included.

  The program may be transmitted from a computer system storing the program in a storage device or the like to another computer system via a transmission medium or by a transmission wave in the transmission medium. Here, the “transmission medium” for transmitting the program refers to a medium having a function of transmitting information, such as a network (communication network) such as the Internet or a communication line (communication line) such as a telephone line. The program may be for realizing a part of the functions described above. Furthermore, what can implement | achieve the function mentioned above in combination with the program already recorded on the computer system, and what is called a difference file (difference program) may be sufficient.

It is a block diagram which shows the structure of one Embodiment of this invention. FIG. 2 is an explanatory diagram showing a configuration of a storage area of the flash memory 9 shown in FIG. 1. FIG. 2 is a block diagram showing a configuration of a flash memory driver 8 shown in FIG. 3 is a flowchart showing the operation of the flash memory driver 8 shown in FIG. 3 is a flowchart showing the operation of the flash memory driver 8 shown in FIG. 3 is a flowchart showing the operation of the flash memory driver 8 shown in FIG. 3 is a flowchart showing the operation of the flash memory driver 8 shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Wireless part, 2 ... Control part, 3 ... RAM, 4 ... ROM, 5 ... Microphone / speaker, 6 ... Operation part, 7 ... Display part, 8 * ..Flash memory driver, 9 ... flash memory, 81 ... application I / F unit, 82 ... cache control unit, 83 ... cache memory, 84 ... sequence control unit, 85 ... Unit header access unit, 86 ... entry access unit, 87 ... sector data access unit, 88 ... entry search unit, 89 ... device I / F unit

Claims (6)

A flash memory comprising a plurality of data units that access data for each sector unit, and a data management unit that stores entry information of data stored in the data units;
When writing data to any of the data units, based on the free size of each data unit obtained by referring to the entry information stored in the data management unit, select the data unit to write the data, An electronic device comprising: control means for writing data. Cache memory,
When there is a data write request for the designated address of the flash memory, the sector including the area indicated by the designated address is read into the cache memory, and the data of the data write request is read into the cache memory. When the sector including the area where the data for the new data write request is written is different from the sector read into the cache memory, the data stored in the cache memory is read from the flash memory. The electronic device according to claim 1, further comprising: cache control means for writing to a sector different from the performed sector. The flash memory has a spare unit,
The control means refers to the entry information stored in the data management unit, and copies only valid sectors of data units in which the number of invalid sectors exceeds a predetermined threshold to the spare unit. The electronic device according to claim 1, wherein the garbage collection is performed by erasing the data unit in order to make a new spare unit.   The electronic device according to claim 3, wherein the garbage collection is activated during standby. The flash memory has a spare unit,
The control means obtains the maximum erase count and the minimum erase count among the erase counts of the data management unit and the data unit, and the difference between the maximum erase count and the minimum erase count exceeds a predetermined threshold value In addition, the data sector of the minimum erase count or the valid sector of the data management unit is copied to the spare unit, the data unit in the copy source or the data management unit is erased, and wear leveling as a new spare unit is executed. The electronic device according to claim 1, wherein: The electronic apparatus according to claim 5, wherein the wear leveling is activated during standby.

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