JP2004326648A - Ic card - Google Patents

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Publication number
JP2004326648A
JP2004326648A JP2003123327A JP2003123327A JP2004326648A JP 2004326648 A JP2004326648 A JP 2004326648A JP 2003123327 A JP2003123327 A JP 2003123327A JP 2003123327 A JP2003123327 A JP 2003123327A JP 2004326648 A JP2004326648 A JP 2004326648A
Authority
JP
Japan
Prior art keywords
card
current
power supply
arithmetic unit
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2003123327A
Other languages
Japanese (ja)
Inventor
Keiichi Nanbu
啓一 南部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2003123327A priority Critical patent/JP2004326648A/en
Publication of JP2004326648A publication Critical patent/JP2004326648A/en
Withdrawn legal-status Critical Current

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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

<P>PROBLEM TO BE SOLVED: To obtain security by making it difficult to perform data dependence analysis without lengthening actual processing time in an IC card. <P>SOLUTION: In this IC card, a power source current control circuit 20 constituted in which a current being inverse proportion to the consumption current of a calculation part 30 flows is connected in parallel to the front stage of the calculation part 30 in an IC card 1 supplied from the exterior power source VCC. The consumption current in the IC card 1 becomes almost fixed since the value is the sum of the consumption current of the calculation part 30 and the consumption current of the power source current control circuit 20, so that the variation of consumption current cannot be detected from the outside, thus the data dependence can be eliminated. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本発明は、機密保護を施したICカードに関する。
【0002】
【従来の技術】
従来、機密保護の強化を実現したICカードが知られている(特許文献1参照)。この種のICカードは、ダミー命令の挿入、クロックの変化により、データ処理手順のタイミングを変化させる手段を設けることにより、或いはキャパシタによる電流変化のシフトにより、データ依存性の解析を不可能にして、機密保護を図っている。データ依存性とは、ICカードにおける演算部を構成しているCMOS回路の消費電流が、演算部でのデータ処理の内容に応じて変化することであり、ICカードで暗号データ処理を行っている時の消費電流を観測して解析することにより、容易に暗号処理の内容や暗号鍵が推定できるとされている。
【0003】
【特許文献1】
特開2000−259799号公報
【0004】
【発明が解決しようとする課題】
しかしながら、従来のダミー命令の挿入やクロックの変化によりデータ処理手順のタイミングを変化させるICカード、或いは内部回路動作に無関係で不規則性を持つ偽電流を発生させる偽電流発生回路を備えているICカードでは、実質的な処理時間が長くなるという問題があった。
【0005】
本発明は、上記従来の問題を解決するためになされたもので、実質的な処理時間を長くすることなく、データ依存性の解析を難しくして、機密保護を図ることが可能なICカードを提供することを目的とする。
【0006】
【課題を解決するための手段】
上記目的を達成するために、本発明のICカードは、コネクタを介して外部電源に接続される演算部と、前記演算部の前段に前記演算部と並列に接続されて、前記演算部の消費電流に反比例する電流が流れるように構成された電源電流制御回路とを備えたことを特徴とする。この構成により、ICカード内の消費電流は、演算部の消費電流と電源電流制御回路の消費電流との和でほぼ一定になるため、実質的な処理時間を長くすることなく、データ依存性の解析を難しくして、機密保護を図ることができる。
【0007】
また、本発明のICカードは、前記電源電流制御回路が、前記演算部で消費される電流の多少を検出する演算増幅器と、前記演算増幅器の出力によりオン、オフ動作するトランジスタと、前記トランジスタを通じてダミー電流を流す抵抗とを含むことを特徴とする。この構成により、電源電流制御回路の構成を簡単にすることができる。
【0008】
【発明の実施の形態】
以下、本発明の実施の形態について、図面を用いて説明する。図1は本発明の実施の形態におけるICカード1の回路構成を示している。図1において、ICカード1は、外部電源40が接続される接触コネクタ10と、接触コネクタ10から外部電源40の電源電圧VCCが印加される電源ラインaおよび接地電位GNDが印加される接地ラインbに並列に接続された電源電流制御回路20と、電源電流制御回路20のVCC側出力端とGND側出力端に並列に接続された演算部30とを備えている。電源電流制御回路20は、電源ラインaに一端が接続された抵抗21、この抵抗21の他端にコレクタ電極が接続されたトランジスタ22、接地ラインbに一端が接続された抵抗23、この抵抗23の一端に一方の入力端が接続された演算増幅器(オペアンプ)24、オペアンプ24の出力端に一端が接続された抵抗25とを備え、抵抗25の他端はトランジスタ22のベース電極に接続されている。抵抗23の他端、オペアンプ24の他方の入力端およびトランジスタ22のエミッタ電極はそれぞれ演算部30のGND側入力端子に接続されている。CMOS回路により構成された演算部30は、演算部30の全体を制御するCPU31、プログラムを格納するROM32、データを一時的に蓄えるRAM33、データの書き換えが可能で、電源を遮断してもデータを保持できるEEPROM34、およびこのICカードを挿着したリーダライタまたはテスタとの間の通信を行うI/Oポート35等を備えている。
【0009】
以上のように構成されたICカード1についてその動作を説明する。ICカード1をリーダライタまたはテスタに接続して、外部電源40から接触コネクタ10を経由し、電源電流制御回路20を通して演算部30へ電源電圧VCCを供給する。外部電源40の接地電位GNDには、電源電流制御回路20のオペアンプ24が接続されているので、演算部30における消費電流はオペアンプ24によって検出される。電源電流制御回路20において、オペアンプ24が演算部30で消費される電流が少ないことを検出すると、その出力によりトランジスタ22がオンし、抵抗21を通してダミー電流が流れる。逆に、演算部30で消費される電流が多いことをオペアンプ24が検出すると、その出力によりトランジスタ22がオフするので、抵抗21を通してダミー電流は流れない。なお、抵抗21を流れるダミー電流はリニア的に変化するように、トランジスタ22、オペアンプ24、抵抗21、抵抗23、抵抗25の値を設定しておく。この結果、図2に示すように、演算部30で消費される電流Aと電源電流制御回路20で消費されるダミー電流Bの変化は相反する動きをし、ICカード1における全消費電流(接触コネクタ10での消費電流)Cは、ほぼ一定を保つことになる。
【0010】
このように、本実施の形態によれば、ICカード1の全消費電流が、常にほぼ一定に保たれるので、外部から消費電流の変化を検出できなくなり、消費電流の変化によるデータ解析が難しくなり、機密保護が可能となる。
【0011】
【発明の効果】
以上説明したように、本発明のICカードは、外部電源が供給されるICカード内の演算部の前段に、演算部の消費電流に反比例する電流が流れるように構成された電源電流制御回路を備えているので、ICカード内の消費電流は、演算部の消費電流と電源電流制御回路の消費電流との和でほぼ一定になり、実質的な処理時間を長くすることなく、データ依存性の解析を難しくして、機密保護を図ることができる。
【図面の簡単な説明】
【図1】本発明の実施の形態におけるICカードの構成を示すブロック図
【図2】本発明の実施の形態におけるICカードの動作説明のための特性図
【符号の説明】
1 ICカード
10 接触コネクタ
20 電源電流制御回路
21 抵抗
22 トランジスタ
23 抵抗
24 演算増幅器(オペアンプ)
25 抵抗
30 演算部
31 CPU
32 ROM
33 RAM
34 EEPROM
35 I/Oポート
40 外部電源
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a security-protected IC card.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, an IC card that realizes enhanced security is known (see Patent Document 1). This type of IC card makes it impossible to analyze data dependence by providing a means for changing the timing of the data processing procedure by inserting a dummy instruction and changing the clock, or by shifting the current change by a capacitor. , For security. The data dependency means that the current consumption of the CMOS circuit forming the operation unit in the IC card changes according to the contents of the data processing in the operation unit, and the IC card performs the encryption data processing. It is said that by observing and analyzing the current consumption at the time, the contents of the encryption processing and the encryption key can be easily estimated.
[0003]
[Patent Document 1]
JP 2000-259799 A
[Problems to be solved by the invention]
However, a conventional IC card that changes the timing of a data processing procedure by inserting a dummy instruction or changing a clock, or an IC that has a pseudo current generating circuit that generates a pseudo current having irregularities irrespective of internal circuit operation With the card, there is a problem that the processing time is substantially increased.
[0005]
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an IC card capable of making data dependency analysis difficult and securing security without prolonging a substantial processing time. The purpose is to provide.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, an IC card according to the present invention includes an operation unit connected to an external power supply via a connector, and an operation unit connected in parallel with the operation unit at a preceding stage of the operation unit. A power supply current control circuit configured to flow a current inversely proportional to the current. According to this configuration, the current consumption in the IC card becomes substantially constant as the sum of the current consumption of the arithmetic unit and the current consumption of the power supply current control circuit. Analysis can be made difficult and confidentiality can be achieved.
[0007]
Further, in the IC card according to the present invention, the power supply current control circuit may detect an amount of current consumed by the arithmetic unit, a transistor that is turned on and off by an output of the operational amplifier, And a resistor for flowing a dummy current. With this configuration, the configuration of the power supply current control circuit can be simplified.
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a circuit configuration of an IC card 1 according to an embodiment of the present invention. In FIG. 1, an IC card 1 includes a contact connector 10 to which an external power supply 40 is connected, a power supply line a to which the power supply voltage VCC of the external power supply 40 is applied from the contact connector 10, and a ground line b to which a ground potential GND is applied. The power supply current control circuit 20 is connected in parallel to the power supply current control circuit 20, and an operation unit 30 is connected in parallel to the VCC-side output terminal and the GND-side output terminal of the power supply current control circuit 20. The power supply current control circuit 20 includes a resistor 21 having one end connected to the power supply line a, a transistor 22 having a collector electrode connected to the other end of the resistor 21, a resistor 23 having one end connected to the ground line b, An operational amplifier (op-amp) 24 having one input terminal connected to one end thereof and a resistor 25 having one end connected to the output terminal of the operational amplifier 24. The other end of the resistor 25 is connected to the base electrode of the transistor 22. I have. The other end of the resistor 23, the other input terminal of the operational amplifier 24, and the emitter electrode of the transistor 22 are connected to the GND input terminal of the operation unit 30, respectively. The arithmetic unit 30 constituted by a CMOS circuit includes a CPU 31 for controlling the entire arithmetic unit 30, a ROM 32 for storing a program, a RAM 33 for temporarily storing data, and a rewritable data. It has an EEPROM 34 that can be held, an I / O port 35 for performing communication with a reader / writer or a tester into which the IC card is inserted, and the like.
[0009]
The operation of the IC card 1 configured as described above will be described. The IC card 1 is connected to a reader / writer or a tester, and a power supply voltage VCC is supplied from an external power supply 40 to the arithmetic unit 30 through the power supply current control circuit 20 via the contact connector 10. Since the operational amplifier 24 of the power supply current control circuit 20 is connected to the ground potential GND of the external power supply 40, the current consumption in the arithmetic unit 30 is detected by the operational amplifier 24. In the power supply current control circuit 20, when the operational amplifier 24 detects that the current consumed by the operation unit 30 is small, the output turns on the transistor 22 and a dummy current flows through the resistor 21. Conversely, when the operational amplifier 24 detects that the current consumed by the arithmetic unit 30 is large, the transistor 22 is turned off by the output, so that no dummy current flows through the resistor 21. The values of the transistor 22, the operational amplifier 24, the resistors 21, 23 and 25 are set so that the dummy current flowing through the resistor 21 changes linearly. As a result, as shown in FIG. 2, the change of the current A consumed by the arithmetic unit 30 and the change of the dummy current B consumed by the power supply current control circuit 20 are opposite to each other, and the total current consumption (contact The current consumption C of the connector 10 is kept substantially constant.
[0010]
As described above, according to the present embodiment, since the total current consumption of the IC card 1 is always kept substantially constant, a change in the current consumption cannot be detected from the outside, and data analysis due to the change in the current consumption is difficult. And security can be secured.
[0011]
【The invention's effect】
As described above, the IC card according to the present invention includes a power supply current control circuit configured to flow a current inversely proportional to the current consumption of the arithmetic unit at a stage preceding the arithmetic unit in the IC card to which external power is supplied. Since the power consumption is provided, the current consumption in the IC card becomes substantially constant by the sum of the current consumption of the arithmetic unit and the current consumption of the power supply current control circuit. Analysis can be made difficult and confidentiality can be achieved.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an IC card according to an embodiment of the present invention. FIG. 2 is a characteristic diagram for explaining an operation of the IC card according to an embodiment of the present invention.
DESCRIPTION OF SYMBOLS 1 IC card 10 Contact connector 20 Power supply current control circuit 21 Resistance 22 Transistor 23 Resistance 24 Operational amplifier (operational amplifier)
25 resistance 30 arithmetic unit 31 CPU
32 ROM
33 RAM
34 EEPROM
35 I / O port 40 External power supply

Claims (2)

コネクタを介して外部電源に接続される演算部と、前記演算部の前段に前記演算部と並列に接続されて、前記演算部の消費電流に反比例する電流が流れるように構成された電源電流制御回路とを備えたことを特徴とするICカード。An arithmetic unit connected to an external power supply via a connector; and a power supply current control connected in parallel with the arithmetic unit at a stage preceding the arithmetic unit, so that a current inversely proportional to a current consumption of the arithmetic unit flows. An IC card comprising a circuit. 前記電源電流制御回路が、前記演算部で消費される電流の多少を検出する演算増幅器と、前記演算増幅器の出力によりオン、オフ動作するトランジスタと、前記トランジスタを通じてダミー電流を流す抵抗とを含むことを特徴とする請求項1記載のICカード。The power supply current control circuit includes an operational amplifier that detects the amount of current consumed by the arithmetic unit, a transistor that is turned on and off by an output of the operational amplifier, and a resistor that flows a dummy current through the transistor. The IC card according to claim 1, wherein:
JP2003123327A 2003-04-28 2003-04-28 Ic card Withdrawn JP2004326648A (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
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Publications (1)

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Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013509031A (en) * 2009-10-14 2013-03-07 ケイオロジクス インク A logistic mapping circuit that implements a general-purpose logic array with a highly variable circuit topology and various logic gates with constant output.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013509031A (en) * 2009-10-14 2013-03-07 ケイオロジクス インク A logistic mapping circuit that implements a general-purpose logic array with a highly variable circuit topology and various logic gates with constant output.

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