JP2003243518A - Reference voltage circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reference voltage circuit from which a reference voltage operable even with a low power-supply voltage is acquired. <P>SOLUTION: This circuit comprises a first transistor for constant current operation, a second transistor that receives the constant current from the first transistor, a third transistor whose gate and source are so connected to that of the second transistor, respectively, that a current equivalent to that of the second transistor flows through the third transistor, a fourth transistor through which the current of the third transistor flows, a fifth transistor, which performs a level shift between a gate and a drain of the second transistor, with a voltage between a gate and a source of the fourth transistor as an output, and a sixth transistor that is so provided as to give a bias current to the fifth transistor. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reference voltage circuit for a semiconductor integrated circuit.

[0002]

2. Description of the Related Art As a conventional reference voltage circuit, a circuit as shown in FIG. 4 is known. That is, a constant current circuit using an n-channel depletion type MOS transistor 170 whose source and gate are grounded, and a transistor 1
P for current mirroring the current output from 70
Channel enhancement type MOS transistor 15
It is composed of a current mirror circuit composed of 0 and 151, and an n-channel enhancement type MOS transistor 160 whose gate and drain are connected to generate a reference voltage Vref from the output current of the current mirror circuit.

If the transistors 150 and 151 have the same size, the drain current ID (1
70) and the drain current ID (16
0) are equal, and the gate-source voltage VGS (160) of the transistor 160 becomes the reference voltage Vref.

In order for the reference voltage Vref to reach a predetermined voltage, all the transistors must operate in a saturated state. The minimum drain-source voltage at which the transistor 170 operates in a saturated state is VDSAT (170),
The drain-source voltage of the transistor 150 is set to VDS.
Assuming (150), the minimum power supply voltage Vdd (min) for the reference voltage Vref to become a predetermined voltage is Vdd (min) = VDSAT (170) + VDS (150) (1).

The minimum drain-source voltage VDSAT (170) at which the n-channel depletion type MOS transistor 170 operates in a saturated state is the transistor 170.
If the threshold value of Vt (170) is Vt (170), then VSAT (170) = | Vt (170) | (2).

Normally, Vt (170) =-0.4V, VD
Since S (150) = 1.0V, Vdd is calculated from the equation (1).
(Min) becomes Vdd (min) = | -0.4V | + 1.0V = 1.4V (3).

[0007]

The conventional reference voltage circuit shown in FIG. 4 has a problem that the circuit operation becomes unstable at a low power supply voltage and a predetermined reference voltage Vref cannot be generated.

That is, even if the power supply voltage is low, the predetermined reference voltage V
n channel depletion type M when trying to get ref
It is necessary to increase the threshold value of the OS transistor (close the absolute value to 0) or increase the threshold value of the P-channel enhancement type MOS transistor (close the absolute value to 0). The leakage current increases, and the influence of the leakage current becomes large at the time of high temperature or low temperature, making it inoperable.

In order to solve the above-mentioned conventional problems, it is an object of the present invention to change the circuit configuration to enable operation at a low power supply voltage.

[0010]

In order to solve the above problems, the following means were used for the reference voltage circuit according to the present invention.

A first conductivity type depletion type first transistor having a source and a gate connected to perform a constant current operation, and a second conductivity type enhancement type second transistor for receiving a constant current formed by the first transistor. A second transistor, a second conductivity type enhancement type third transistor whose gates and sources are connected to each other so that a current equal to that of the second transistor flows, and a current of the third transistor A first conductivity type enhancement type fourth transistor having a gate and a drain connected to each other, and a gate-source voltage of the fourth transistor is output. An enhancement type fifth transistor of the first conductivity type for level shifting between the gate and drain of the second transistor. And having a static, and a sixth transistor of the enhancement type of the first conductivity type disposed to provide a bias current to said fifth transistor.

The fifth transistor is characterized in that the absolute value of the threshold voltage is smaller than that of the fourth and sixth transistors of the enhancement type of the first conductivity type.

The sixth transistor is characterized in that it obtains a gate bias voltage from another circuit.

A starting circuit for applying a voltage for turning on the sixth transistor when the power is turned on is added.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a reference voltage circuit according to the first embodiment of the present invention. A constant current circuit with an n-channel depletion type MOS transistor 120 whose source and gate are grounded, an n-channel enhancement type MOS transistor 111 with saturation connection for outputting a reference voltage Vref, and an output from the transistor 120. A current mirror circuit composed of P-channel enhancement type MOS transistors 100 and 101 for current mirroring a current, an n-channel enhancement type MOS transistor 102 for level shifting between drain and source of the transistor 100, and a transistor 102. It is composed of an n-channel enhancement type MOS transistor 110 which supplies a bias current.

In order for the reference voltage Vref to reach a predetermined voltage, all the transistors must operate in a saturated state. In order for the transistor 100 to operate in a saturated state, the gate-source voltage Vg of the transistor 102 is
Since the difference between the gate-source voltage Vgs (100) of the transistor 100 and the minimum drain-source voltage VDSAT (100) operating in the saturated state needs to be larger than s (102), Vgs (102) < Vgs (100) −VDSAT (100) = Vt (100) = 0.6V (4) In order for the transistor 120 to operate in a saturated state, the transistor 120 is in a saturated state rather than the gate-source voltage of the transistor 102. It is necessary that the difference between the minimum drain-source voltage that operates in Vcc and the minimum drain-source voltage that operates in the saturated state of the transistor 110 is smaller. Therefore, Vgs (102)> VDSAT (120) -VDSAT (110) = 0.4V-0.1V = 0.3V (5) From the equations (4) and (5), Vgs (102) is 0. 3V <Vgs (102) <0.6V (6) transistor 102 to satisfy equation (6) Vth,
Set L and W. Therefore, generally, a transistor having a threshold voltage lower than that of other MOSFETs of the same conductivity type is used.

At this time, the minimum power supply voltage Vdd (m
in) is a combination of voltages that may rate-control the sum of the drain-source voltage of the transistor 101 and the gate-source voltage of the transistor 111 (Vdd (mi
n) 1), or the sum of the gate-source voltage of the transistor 100 and the drain-source voltage of the transistor 110 (Vdd (min) 2). Vdd (min) 1 = VDSAT (101) + Vt (111) + VDSAT (111) = 0.4V + 0.6V + 0.1V = 1.1V (7) Vdd (min) 2 = Vt (100) + VDSAT (100) + VDSAT (110) ) = 0.6V + 0.4V + 0.1V = 1.1V (8) Actual minimum power supply voltage Vdd (min) is Vdd (mi
n) 1 or Vdd (min) 2, whichever is the larger value, and therefore, from equation (7) or equation (8), Vdd (min) = Vdd (min) 1 = Vdd (mi
n) 2 = 1.1V, which means that the circuit operates at a lower power supply voltage than the conventional circuit. However, in the calculation of the above numerical values, Vt (100) = Vt (101) = 0.6V, VDSAT (100) = VDSAT (101) = 0.4 with the same setting as the conventional reference voltage circuit.
V, VDSAT (120) = | Vt (120) | = 0.4
V, Vt (110) = Vt (111) = 0.6V, VDSAT (110) = VDSAT (111) = 0.1
V was used.

With the above-described structure, the threshold value of the n-channel depletion type MOS transistor is increased or the P-channel enhancement type MOS transistor is increased.
The predetermined reference voltage Vref can be obtained even with a low power supply voltage without increasing the threshold value of the transistor.

In the first embodiment shown in FIG. 1, the reference voltage Vref may not be output when the power supply voltage is raised very slowly. In order to avoid such an adverse effect, a configuration for applying a voltage that causes the transistor 110 to conduct when the power supply voltage rises from outside the reference voltage circuit is shown in the second and third embodiments. This makes it possible to provide a reference power supply circuit that can reliably obtain a reference voltage that operates even at a low power supply voltage.

Next, a second embodiment will be described. FIG. 2 shows a circuit diagram of a second embodiment of the reference voltage circuit according to the present invention. In this embodiment, the transistor 110 generates a constant current by obtaining a gate bias voltage from another circuit. The bias circuit is configured to apply a voltage that causes the transistor 110 to conduct when the power supply voltage rises.

Next, a third embodiment will be described. FIG. 3 shows the reference voltage circuit 200 and the starting circuit 2 described in FIG.
It is composed of 01. The start-up circuit 201 is composed of a constant current circuit including an n-channel depletion type MOS transistor 121 whose source and gate are grounded, and P-channel enhancement type MOS transistors 103 and 104.
00 and 101 and the gate terminal are mutually connected.

Since the transistor 111 is off immediately after the power is turned on, the transistor 110 is also off and the drain current ID (101) of the transistor 101 is zero. Since the gate voltages of the transistor 101 and the transistor 100 are equal, the drain current I of the transistor 100 is
D (100) is also 0. Since the transistor 120 is a constant current circuit, the gate voltage of the transistor 102 becomes 0 and the transistor 102 is also turned off.

On the other hand, since the transistor 121 is a constant current circuit, the gate voltage of the transistor 104 becomes zero. Therefore, the transistor 104 is turned on and the transistor 110 is turned on.
, The transistor 110 becomes conductive, the transistors 100 and 101 start operating, and the reference voltage Vref is output.

When the transistors 101 and 103 have the same size, since the gate voltages of the transistors 101 and 103 are equal to each other, the drain current of the transistor 111 and the drain current of the transistor 103 are equal to each other.
The drain current of 3 also increases. When the drain current of the transistor 103 exceeds the drain current of the transistor 121, which is a constant current circuit, the gate voltage of the transistor 104 becomes equal to the power supply voltage Vdd.
04 is turned off, and the starting circuit 201 is disconnected from the reference voltage circuit 200.

As described above, the reference voltage Vref can be reliably obtained even when the power supply voltage rises slowly. As a result, it is possible to provide a reference power supply circuit that can obtain a reference voltage that operates stably even with a low power supply voltage.

In this example, the transistor 100,
The transistors 101, 103 and 104 have been described as P-channel type and the transistors 102, 110, 111, 120 and 121 as n-channel type.
03 and 104 are n-channel type, and transistors 102 and 1
Similar effects can be obtained even if 10, 111, 120 and 121 are P-channel type.

[0027]

The reference voltage circuit of the present invention can generate a highly accurate reference voltage that operates stably even at a low power supply voltage in a semiconductor integrated circuit.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a reference voltage circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a reference voltage circuit according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a reference voltage circuit according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram of a conventional reference voltage circuit.

[Explanation of symbols]

100, 101, 103 P-channel enhancement type MOS transistors 104, 150-151 P-channel enhancement type MOS transistor 102 n-channel enhancement type MOS transistors 110, 111, 160 n-channel enhancement type MOS transistors 120, 121, 170 n Channel depletion type MOS transistor 200 Reference voltage circuit 201 Starter circuit

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Claims (4)

[Claims] 1. A first conductivity type depletion type first transistor having a source and a gate connected to perform a constant current operation, and a second conductivity type enhancement which receives a constant current formed by the first transistor. -Type second transistor, a second conductivity-type enhancement-type third transistor whose gates and sources are connected to each other so that a current equal to that of the second transistor flows, and the third transistor A first conductivity type enhancement type fourth transistor having a gate and a drain connected to each other, and a gate-source voltage of the fourth transistor is output. An enhancement-type fifth transistor of the first conductivity type for level-shifting between the gate and drain of the second transistor. A reference voltage circuit comprising a transistor and a first conductivity type enhancement type sixth transistor provided so as to apply a bias current to the fifth transistor. 2. The absolute value of the threshold voltage of the fifth transistor is smaller than that of the fourth and sixth transistors of the enhancement type of the first conductivity type. Reference voltage circuit. 3. The sixth transistor obtains a gate bias voltage from another circuit.
Alternatively, the reference voltage circuit according to item 2. 4. The reference voltage circuit according to claim 1, wherein a voltage for turning on the sixth transistor is applied from a starting circuit when the power is turned on.